diff options
| author | Yue Du <daviddu@us.ibm.com> | 2016-12-12 10:57:49 -0600 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 16:55:45 -0500 |
| commit | d6ab1af3663b21708e5b15ea0166aecd63e5724a (patch) | |
| tree | e6af2742bf34fe4eff56e698060329181471c668 | |
| parent | 8690813bdc538af503291160d8069efb02f0188c (diff) | |
| download | talos-hcode-d6ab1af3663b21708e5b15ea0166aecd63e5724a.tar.gz talos-hcode-d6ab1af3663b21708e5b15ea0166aecd63e5724a.zip | |
STOP: apply fused core mode scan workaround to both ex(if PG)
Change-Id: Ic81545c4fb3316e2c767ff233d4740dfade0074f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33734
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c | 105 |
1 files changed, 61 insertions, 44 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c index 552536ee..fade755a 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c @@ -42,6 +42,60 @@ extern SgpeStopRecord G_sgpe_stop_record; uint32_t G_fcm_spin[4] = {0, 435, 1402, 2411}; +void +fused_core_mode_scan_fix(uint32_t qloop, int l2bit) +{ + int spin; + uint64_t scom_data; + + // bit8/9 = l2-0/1, bit49 = cfg + PK_TRACE("FCMS: Setup scan register to select the ring"); + GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x10030005, qloop), + (BIT64(l2bit) | BIT64(49))); + + PK_TRACE("FCMS: checkword set"); + scom_data = 0xa5a5a5a5a5a5a5a5; + GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x1003E000, qloop), scom_data); + + for(spin = 1;; spin++) + { + PK_TRACE("FCMS: spin ring loop%d", spin); + scom_data = (G_fcm_spin[spin] - G_fcm_spin[spin - 1]); + scom_data = scom_data << 32; + GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x10039000, qloop), scom_data); + + PK_TRACE("FCMS: Poll OPCG done for ring spin"); + + do + { + GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(0x10000100, qloop), scom_data); + } + while(~scom_data & BIT64(8)); + + if (spin == 3) + { + PK_TRACE("FCMS: checkword check"); + GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(0x1003E000, qloop), scom_data); + + if (scom_data != 0xa5a5a5a5a5a5a5a5) + { + PK_TRACE_INF("ERROR: checkword[%x%x] failed. HALT SGPE!", + UPPER32(scom_data), LOWER32(scom_data)); + pk_halt(); + } + + break; + } + + PK_TRACE("FCMS: restore fused core mode bit"); + GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(0x1003E000, qloop), scom_data); + RESTORE_RING_BITS(BIT64(0), scom_data, BIT64(0)); + GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x1003E000, qloop), scom_data); + } + + GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x10030005, qloop), 0); +} + #endif int @@ -59,7 +113,7 @@ p9_sgpe_stop_exit() uint64_t cme_flags; ppm_sshsrc_t hist; ocb_ccsr_t ccsr; -#if HW386311_DD1_PBIE_RW_PTR_STOP11_FIX || FUSED_CORE_MODE_SCAN_FIX +#if HW386311_DD1_PBIE_RW_PTR_STOP11_FIX int spin; #endif @@ -272,52 +326,15 @@ p9_sgpe_stop_exit() PK_TRACE_INF("FCMS: Engage with Fused Mode Scan Workaround"); - // bit8/9 = l2-0/1, bit49 = cfg - PK_TRACE("FCMS: Setup scan register to select the ring"); - GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x10030005, qloop), - (((uint64_t)m_l2 << SHIFT64(9)) | BIT64(49))); - - PK_TRACE("FCMS: checkword set"); - scom_data = 0xa5a5a5a5a5a5a5a5; - GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x1003E000, qloop), scom_data); - - for(spin = 1;; spin++) + if (m_pg & FST_EX_IN_QUAD) { - PK_TRACE("FCMS: spin ring loop%d", spin); - scom_data = (G_fcm_spin[spin] - G_fcm_spin[spin - 1]); - scom_data = scom_data << 32; - GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x10039000, qloop), scom_data); - - PK_TRACE("FCMS: Poll OPCG done for ring spin"); - - do - { - GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(0x10000100, qloop), scom_data); - } - while(~scom_data & BIT64(8)); - - if (spin == 3) - { - PK_TRACE("FCMS: checkword check"); - GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(0x1003E000, qloop), scom_data); - - if (scom_data != 0xa5a5a5a5a5a5a5a5) - { - PK_TRACE("ERROR: checkword[%x%x] failed. HALT SGPE!", - UPPER32(scom_data), LOWER32(scom_data)); - pk_halt(); - } - - break; - } - - PK_TRACE("FCMS: restore fused core mode bit"); - GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(0x1003E000, qloop), scom_data); - RESTORE_RING_BITS(BIT64(0), scom_data, BIT64(0)); - GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x1003E000, qloop), scom_data); + fused_core_mode_scan_fix(qloop, 8); } - GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(0x10030005, qloop), 0); + if (m_pg & SND_EX_IN_QUAD) + { + fused_core_mode_scan_fix(qloop, 9); + } #endif |

