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authorRahul Batra <rbatra@us.ibm.com>2017-05-23 21:24:55 -0500
committerJoshua Hunsberger <jahunsbe@us.ibm.com>2017-10-23 17:40:42 -0500
commitd69e4e309c35dfe68f2405a242768630e8926c56 (patch)
tree53495f17549ecf4c0444db6fc6d0cd575f2c9255
parentfd5ec305dd6d63b03face4268f476b4e7215ef8e (diff)
downloadtalos-hcode-d69e4e309c35dfe68f2405a242768630e8926c56.tar.gz
talos-hcode-d69e4e309c35dfe68f2405a242768630e8926c56.zip
PSTATE: System Calc Parameters Fix
- Adds PStateVSlopes and VPStateSlopes to Global Parm Struct - Calculates slopes for RAW/SYSP/BIASED/SYSP_BIASED Operating Pts - Leaves the old slopes and calculation in p9_pstate_parameter_block.C using slope shift of 13. To be removed later - Adds a new slopes format of 4.12[4 bits integer + 12 bit fractional - Recovers the lost system parameter equation fix Change-Id: Ic79ed4d0311c46612d68d6dffdabc459ec88d8e1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40891 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
-rw-r--r--import/chips/p9/procedures/hwp/lib/p9_pstates_common.h18
-rw-r--r--import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h10
2 files changed, 22 insertions, 6 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h b/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
index ff1fad09..b62193a3 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
+++ b/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
@@ -118,13 +118,18 @@
#define VPD_PV_VDN_MV 1
#define VPD_PV_IDN_100MA 2
-#define VPD_NUM_SLOPES_SET 2
-#define VPD_SLOPES_RAW 0
-#define VPD_SLOPES_BIASED 1
+//Remove this. RTC: 174743
+#define VPD_NUM_SLOPES_SET 2
+#define VPD_SLOPES_RAW 0
+#define VPD_SLOPES_BIASED 1
+//Remove until here. RTC: 174743
+
#define VPD_NUM_SLOPES_REGION 3
#define REGION_POWERSAVE_NOMINAL 0
#define REGION_NOMINAL_TURBO 1
#define REGION_TURBO_ULTRA 2
+#define VPD_OP_SLOPES_REGION_ORDER {REGION_POWERSAVE_NOMINAL,REGION_NOMINAL_TURBO,REGION_TURBO_ULTRA}
+#define VPD_OP_SLOPES_REGION_ORDER_STR {"POWERSAVE_NOMINAL", "NOMINAL_TURBO ","TURBO_ULTRA "}
// Different points considered for calculating slopes
#define NUM_VPD_PTS_SET 4
@@ -133,13 +138,14 @@
#define VPD_PT_SET_BIASED 2
#define VPD_PT_SET_BIASED_SYSP 3
#define VPD_PT_SET_ORDER {VPD_PT_SET_RAW, VPD_PT_SET_SYSP, VPD_PT_SET_BIASED, VPD_PT_SET_BIASED_SYSP}
-#define VPD_PT_SET_ORDER_STR {"Raw ", "SysParam ","Biased ", "Biased/SysParam"}
+#define VPD_PT_SET_ORDER_STR {"Raw", "SysParam","Biased", "Biased/SysParam"}
-#define VID_SLOPE_FP_SHIFT 13
+#define VID_SLOPE_FP_SHIFT 13 //TODO: Remove this. RTC 174743
+#define VID_SLOPE_FP_SHIFT_12 12
#define THRESH_SLOPE_FP_SHIFT 12
// 0 = PowerSave, 1 = Nominal; 2 = Turbo; 3 = UltraTurbo; 4 = Enable
-#define VDM_DROOP_OP_POINTS 5
+#define VDM_DROOP_OP_POINTS 5
diff --git a/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h b/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
index 04100cd8..e0600078 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
+++ b/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
@@ -186,6 +186,7 @@ typedef struct
/// VPD operating points are stored without load-line correction. Frequencies
/// are in MHz, voltages are specified in units of 5mV, and currents are
/// in units of 500mA.
+ /// \todo Remove this. RTC: 174743
VpdOperatingPoint operating_points[NUM_OP_POINTS];
/// Biases
@@ -260,9 +261,11 @@ typedef struct
uint32_t nest_frequency_mhz;
/// Precalculated Pstate-Voltage Slopes
+ /// \todo Remove this. RTC: 174743
uint16_t PsVSlopes[VPD_NUM_SLOPES_SET][VPD_NUM_SLOPES_REGION];
/// Precalculated Voltage-Pstates Slopes
+ /// \todo Remove this. RTC: 174743
uint16_t VPsSlopes[VPD_NUM_SLOPES_SET][VPD_NUM_SLOPES_REGION];
/// All operating points
@@ -271,6 +274,13 @@ typedef struct
//DPLL pstate 0 value
uint32_t dpll_pstate0_value;
+ /// Precalculated Pstate-Voltage Slopes
+ uint16_t PStateVSlopes[NUM_VPD_PTS_SET][VPD_NUM_SLOPES_REGION];
+
+ /// Precalculated Voltage-Pstates Slopes
+ uint16_t VPStateSlopes[NUM_VPD_PTS_SET][VPD_NUM_SLOPES_REGION];
+
+
// @todo DPLL Droop Settings. These need communication to SGPE for STOP
} GlobalPstateParmBlock;
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