STOP: Fix VDM being powered down through Stop2

Change-Id: Ifd0606723105e335fdf078d6d188d434c0e89bd8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46959
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>

2 files changed, 11 insertions, 3 deletions

diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c
index 6af4b250..8d15ecdc 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.c
@@ -353,14 +353,16 @@ void p9_cme_analog_control(uint32_t core_mask, ANALOG_CONTROL enable)
         if(enable)
         {
             PK_TRACE_INF("vdm | enabling vdms");
-            // Clear Disable (Poweron is set earlier in Exit flow)
+            // Clear Disable
+            // (Poweron is set earlier in Stop4 Exit flow
+            // due to delay required between poweron and enable)
             CME_PUTSCOM(PPM_VDMCR_CLR, core_mask, BIT64(1));
         }
         else
         {
             PK_TRACE_INF("vdm | disabling vdms");
-            // Clear Poweron and set Disable in one operation
-            CME_PUTSCOM(PPM_VDMCR, core_mask, BIT64(1));
+            // Set Disable (Poweron is cleared in Stop4 Entry)
+            CME_PUTSCOM(PPM_VDMCR_OR, core_mask, BIT64(1));
         }
     }
 
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
index d9023556..7725f552 100755
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
@@ -1124,6 +1124,12 @@ p9_cme_stop_entry()
             }
             else
             {
+                if(in32(CME_LCL_FLAGS) & BIT32(CME_FLAGS_VDM_OPERABLE))
+                {
+                    PK_TRACE_INF("Clear Poweron bit in VDMCR");
+                    CME_PUTSCOM(PPM_VDMCR_CLR, core, BIT64(0));
+                }
+
                 PK_TRACE("Drop vdd_pfet_val/sel_override/regulation_finger_en via PFCS[4,5,8]");
                 // vdd_pfet_val/sel_override     = 0 (disbaled)
                 // vdd_pfet_regulation_finger_en = 0 (controled by FSM)