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| author | Joe McGill <jmcgill@us.ibm.com> | 2018-05-31 17:59:38 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-06-06 10:55:54 -0500 |
| commit | c97bb0a2fd804f78b14140a30a937190913dbc92 (patch) | |
| tree | 7a53a808399e7b4c8bfaa1389f1347623fec267a | |
| parent | a42e940b874c0e122dcc5b7cfe9c45641e51dad9 (diff) | |
| download | talos-hcode-c97bb0a2fd804f78b14140a30a937190913dbc92.tar.gz talos-hcode-c97bb0a2fd804f78b14140a30a937190913dbc92.zip | |
mask core SPATTN bit used for core checkstop handshake
Change-Id: I9c0a7224c3880ab40bb9111d8f66449912029e2f
CQ: SW431474
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59858
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h | 1 | ||||
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_scominit.c | 3 |
2 files changed, 4 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h index 665be9c6..812bda60 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h @@ -101,6 +101,7 @@ #define SPR_MODE 0x20010A84 #define SCRATCH0 0x20010A86 #define SCRATCH1 0x20010A87 +#define C_SPATTN_MASK 0x20010A9A #define THREAD_INFO 0x20010A9B #define DIRECT_CONTROLS 0x20010A9C #define SPURR_FREQ_SCALE 0x20010AA0 diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_scominit.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_scominit.c index c1111f3a..25121736 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_scominit.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_scominit.c @@ -81,6 +81,9 @@ p9_hcd_core_scominit(uint32_t core) CME_PUTSCOM(CORE_ACTION0, core, 0x14A800408A000040); CME_PUTSCOM(CORE_ACTION1, core, 0xBCFC00D7FF100040); CME_PUTSCOM(CORE_FIRMASK, core, 0x0301D70000AB76BE); + + // set mask for core_cs_recovery_handshake + CME_PUTSCOM(C_SPATTN_MASK, core, 0x2222222200000000); #endif PK_TRACE("Update Core Hang Pulse Dividers via C_HANG_CONTROL[0-15]"); |
