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| author | Michael Floyd <mfloyd@us.ibm.com> | 2017-05-16 12:03:44 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:37:36 -0500 |
| commit | c7126d4e340589ae2c78c3e2175e3c8bea85fc1b (patch) | |
| tree | 73ebfcc782ad04e49bc106816427ab1fa99452db | |
| parent | aeda8288c648d39d42e7373a5f7ee56f938fb7c9 (diff) | |
| download | talos-hcode-c7126d4e340589ae2c78c3e2175e3c8bea85fc1b.tar.gz talos-hcode-c7126d4e340589ae2c78c3e2175e3c8bea85fc1b.zip | |
PM: Remove usage of CME flag to disable queued scan.
- Subsequent commit will need to remove attribute and from image build.
Change-Id: Ia8a3771ff883929f96f4451d6dbb6b83bfaa1c17
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40571
Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
8 files changed, 23 insertions, 20 deletions
diff --git a/import/chips/p9/common/pmlib/include/cmehw_common.h b/import/chips/p9/common/pmlib/include/cmehw_common.h index 542ade42..e7a002b4 100644 --- a/import/chips/p9/common/pmlib/include/cmehw_common.h +++ b/import/chips/p9/common/pmlib/include/cmehw_common.h @@ -59,7 +59,7 @@ enum CME_BCEBAR_INDEXES #define CME_SCOM_ADDR(addr, core, op) (addr | (core << 22) | (op << 20)) -#if defined(USE_CME_QUEUED_SCOM) && defined(USE_PPE_IMPRECISE_MODE) +#if defined(USE_CME_QUEUED_SCOM) #define CME_GETSCOM(addr, core, scom_op, data) \ PPE_LVD(CME_SCOM_ADDR(addr, core, scom_op), data); #define CME_PUTSCOM(addr, core, data) \ diff --git a/import/chips/p9/common/pmlib/include/ppehw_common.h b/import/chips/p9/common/pmlib/include/ppehw_common.h index 0a813c65..3b3efafb 100644 --- a/import/chips/p9/common/pmlib/include/ppehw_common.h +++ b/import/chips/p9/common/pmlib/include/ppehw_common.h @@ -99,7 +99,7 @@ typedef union #define PPE_CORE_CYCLE_DIVIDER (PPE_CORE_CYCLE_RATIO*PPE_FOR_LOOP_CYCLES) #ifdef USE_PPE_IMPRECISE_MODE #define PPE_WAIT_CORE_CYCLES(cc) \ - {volatile uint32_t l;for(l=0;l<cc/PPE_CORE_CYCLE_DIVIDER;l++);asm volatile ("sync");} + {volatile uint32_t l;asm volatile ("sync");for(l=0;l<cc/PPE_CORE_CYCLE_DIVIDER;l++);} #else #define PPE_WAIT_CORE_CYCLES(cc) \ {volatile uint32_t l;for(l=0;l<cc/PPE_CORE_CYCLE_DIVIDER;l++);} diff --git a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c index 66c81642..6da6ca1d 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c +++ b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_main.c @@ -169,19 +169,7 @@ main(int argc, char** argv) PK_TRACE("Kernel init completed"); - // reading header attributes and initialize the queued scom mode - cmeHeader_t* pCmeImgHdr = (cmeHeader_t*)(CME_SRAM_HEADER_ADDR); - - if (pCmeImgHdr->g_cme_mode_flags & CME_QUEUED_SCAN_DISABLE_BIT_POS) - { - out32(CME_LCL_LMCR_CLR, BITS32(8, 2)); - } - else - { - out32(CME_LCL_LMCR_OR, BITS32(8, 2)); - } - -#if defined(USE_CME_QUEUED_SCOM) && defined(USE_PPE_IMPRECISE_MODE) +#if defined(USE_CME_QUEUED_SCOM) || defined(USE_CME_QUEUED_SCAN) out32(CME_LCL_LMCR_OR, BITS32(8, 2)); #endif diff --git a/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h b/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h index c5d145ef..bc8e5ee4 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h +++ b/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h @@ -43,8 +43,13 @@ #define USE_PPE_IMPRECISE_MODE #define USE_CME_QUEUED_SCOM +#undef USE_CME_QUEUED_SCAN -/// @todo RTC 161182 +#if !defined(USE_PPE_IMPRECISE_MODE) && (defined(USE_CME_QUEUED_SCOM) || defined(USE_CME_QUEUED_SCAN)) + #error "USE_PPE_IMPRECISE_MODE must be defined in order to enable USE_CME_QUEUED_SCOM or USE_CME_QUEUED_SCAN" +#endif + +// @todo RTC 161182 #if NIMBUS_DD_LEVEL == 1 #define HW386841_NDD1_DSL_STOP1_FIX 1 diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h index 356c7b29..4e9b17c0 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h @@ -208,6 +208,16 @@ enum CME_STOP_FLAGS FLAG_PARTIAL_GOOD_C1 = BIT32(31) }; +enum ATTR_CME_MODE_FLAGS +{ + MAP_3_TO_2 = BIT32(0), + MAP_4_TO_2 = BIT32(1), + MAP_5_TO_4 = BIT32(2), + MAP_8_TO_5 = BIT32(3), + MAP_11_TO_8 = BIT32(4), + SKIP_CORE_POWEROFF = BIT32(31) +}; + enum CME_STOP_PIG_TYPES { PIG_TYPE2 = 2, diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c index 1482869e..8a6a26f5 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c @@ -214,7 +214,7 @@ void p9_cme_stop_exit_end(uint32_t core, uint32_t spwu_stop) while((in32(CME_LCL_EINR)) & (core << SHIFT32(21))); -#if defined(USE_CME_QUEUED_SCOM) && defined(USE_PPE_IMPRECISE_MODE) +#if defined(USE_CME_QUEUED_SCOM) // execute sync before change pcbmux to prevent queued scom issues sync(); diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_chiplet_reset.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_chiplet_reset.c index 6e485d6b..41f749e3 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_chiplet_reset.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_chiplet_reset.c @@ -85,7 +85,7 @@ p9_hcd_core_chiplet_reset(uint32_t core) PK_TRACE("Drop PCB fence via NET_CTRL0[25]"); CME_PUTSCOM(CPPM_NC0INDIR_CLR, core, BIT64(25)); -#if defined(USE_CME_QUEUED_SCOM) && defined(USE_PPE_IMPRECISE_MODE) +#if defined(USE_CME_QUEUED_SCOM) // execute sync before change pcbmux to prevent queued scom issues sync(); diff --git a/import/chips/p9/procedures/ppe_closed/cme/utils/plat_ring_traverse.c b/import/chips/p9/procedures/ppe_closed/cme/utils/plat_ring_traverse.c index 781caa4e..fc3a0f3c 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/utils/plat_ring_traverse.c +++ b/import/chips/p9/procedures/ppe_closed/cme/utils/plat_ring_traverse.c @@ -86,8 +86,8 @@ int putRing( cmeHeader_t* l_cmeHeader = (cmeHeader_t*) ( pCmeImage + CME_INT_VECTOR_SIZE ); -#ifdef USE_PPE_IMPRECISE_MODE - l_scomOp = (l_cmeHeader->g_cme_mode_flags & CME_QUEUED_SCAN_DISABLE_BIT_POS) ? i_scom_op : CME_SCOM_QUEUED; +#if defined(USE_CME_QUEUED_SCAN) + l_scomOp = CME_SCOM_QUEUED; #else l_scomOp = i_scom_op; #endif |

