STOP: collection of small fixes

1) Copy PECE in stop1
   fix Pfet sense poll
2) fix clean db2
3) rebased
4) atomic lock around entry/exit

Change-Id: Iaa3a34ebebd72f2551a2e2af56845b58cc6de5ce
Original-Change-Id: Iabbd8619ee18f949c01000ce849bc93c2de4ba87
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41551
Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>

2 files changed, 34 insertions, 0 deletions

diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
index e852378d..c0c6158d 100755
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
@@ -447,6 +447,18 @@ p9_cme_stop_entry()
                 out32(CME_LCL_SICR_OR,  core_stop1 << SHIFT32(1));
                 out32(CME_LCL_SICR_CLR, core_stop1 << SHIFT32(1));
 
+                if (core & CME_MASK_C0)
+                {
+                    scom_data.value = in64(CME_LCL_PECESR0);
+                    CME_PUTSCOM(CPPM_PECES, CME_MASK_C0, scom_data.value);
+                }
+
+                if (core & CME_MASK_C1)
+                {
+                    scom_data.value = in64(CME_LCL_PECESR1);
+                    CME_PUTSCOM(CPPM_PECES, CME_MASK_C1, scom_data.value);
+                }
+
                 // Removed: Do not want users to become accustomed to
                 //          seeing Stop1 reflected in Stop History on DD1
                 /*
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
index da36fc77..9fa03f3d 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c
@@ -551,6 +551,17 @@ p9_sgpe_stop_entry()
 
         PK_TRACE_INF("SE.8C: L2 Clock Sync Dropped");
 
+        PK_TRACE("Release cache clock controller atomic lock");
+        GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_CC_ATOMIC_LOCK, qloop), 0);
+        GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(EQ_CC_ATOMIC_LOCK, qloop), scom_data.value);
+
+        if (scom_data.words.upper & BIT32(0))
+        {
+            PK_TRACE_ERR("ERROR: Failed to Release Cache %d Clk Ctrl Atomic Lock. Register Content: %x",
+                         qloop, scom_data.words.upper);
+            PK_PANIC(SGPE_STOP_ENTRY_DROP_CLK_LOCK_FAILED);
+        }
+
         //==================================================
         MARK_TAG(SE_STOP8_DONE, ((ex << 6) | (32 >> qloop)))
         //==================================================
@@ -1158,6 +1169,17 @@ p9_sgpe_stop_entry()
         PK_TRACE("Update QSSR: drop stop_entry_ongoing");
         out32(OCB_QSSR_CLR, BIT32(qloop + 20));
 
+        PK_TRACE("Release cache PCB slave atomic lock");
+        GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_ATOMIC_LOCK, qloop), 0);
+        GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_ATOMIC_LOCK, qloop), scom_data.value);
+
+        if (scom_data.words.upper & BIT32(0))
+        {
+            PK_TRACE_ERR("ERROR: Failed to Release Cache %d PCB Slave Atomic Lock. Register Content: %x",
+                         qloop, scom_data.words.upper);
+            PK_PANIC(SGPE_STOP_ENTRY_DROP_SLV_LOCK_FAILED);
+        }
+
         //=====================================
         MARK_TAG(SE_STOP11_DONE, (32 >> qloop))
         //=====================================