diff options
| author | Yue Du <daviddu@us.ibm.com> | 2018-02-23 09:57:34 -0600 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-08-22 17:55:41 -0500 |
| commit | b85b02d31b6c7f731af5957ad0398632b44fd213 (patch) | |
| tree | ca635cfb0c7b92119244511cc0efd8cff150837b | |
| parent | 504882800d12d9afe316dbaabdcff138776a8c1f (diff) | |
| download | talos-hcode-b85b02d31b6c7f731af5957ad0398632b44fd213.tar.gz talos-hcode-b85b02d31b6c7f731af5957ad0398632b44fd213.zip | |
STOP: Support Suspend Entry/Exit and Fix Pig Collision
1) also cleanup todos in Stop Hcode
2) make STOP3 complete trans in SSH
Key_Cronus_Test=PM_REGRESS
Change-Id: I9287d1b24b69f9e1547701da60ab8205ac0de448
Original-Change-Id: I28a146e15e455f09f8d8ff588e122d5ecf34110a
CQ: SW416550
CQ: HW437955
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54660
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
3 files changed, 53 insertions, 120 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c index ee660ecd..54cee07b 100755 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c @@ -584,13 +584,11 @@ p9_cme_stop_entry() while((in32(CME_LCL_EINR)) & (core << SHIFT32(21))); wrteei(1); - sync(); // end of HW407385 // --------------------------------- - #if NIMBUS_DD_LEVEL != 10 if (target_level > STOP_LEVEL_3 || deeper_level > STOP_LEVEL_3) @@ -846,6 +844,8 @@ p9_cme_stop_entry() } } + sync(); + #endif // tlbie stop workaround // ==================================== @@ -933,6 +933,8 @@ p9_cme_stop_entry() #endif turn_off_ram_mode (core); + sync(); + #endif // tlbie stop workaround // ==================================== @@ -940,7 +942,6 @@ p9_cme_stop_entry() // --------------------------------- // Permanent workaround for HW407385 - sync(); wrteei(0); PK_TRACE("HW407385: Drop pm_exit via SICR[4/5]"); @@ -1106,6 +1107,18 @@ p9_cme_stop_entry() MARK_TAG(SE_STOP2_DONE, core) //=========================== + // Round Stop3 to Stop2 + if (target_level == STOP_LEVEL_3) + { + target_level = STOP_LEVEL_2; + } + + if (deeper_level == STOP_LEVEL_3) + { + deeper_core = 0; + deeper_level = 0; + } + PK_TRACE("Update STOP history: in core stop level 2"); // Check if STOP level 2 reaches the target for both or one core entry_ongoing = @@ -1258,72 +1271,6 @@ p9_cme_stop_entry() core, deeper_core, target_level, deeper_level); //---------------------------------------------------------------------- - PK_TRACE("+++++ +++++ STOP LEVEL 3 ENTRY +++++ +++++"); - //---------------------------------------------------------------------- - - if (target_level == 3) - { - /* - //========================== - MARK_TAG(SE_CORE_VMIN, core) - //========================== - - PK_TRACE("SE3.a"); - // Enable IVRM if not already - - PK_TRACE("SE3.b"); - - // Drop to Vmin - if(core & CME_MASK_C0) - { - G_cme_stop_record.act_level[0] = STOP_LEVEL_3; - } - - if(core & CME_MASK_C1) - { - G_cme_stop_record.act_level[1] = STOP_LEVEL_3; - } - - //=========================== - MARK_TAG(SE_STOP3_DONE, core) - //=========================== - - PK_TRACE("SE3.c"); - // Update Stop History: In Core Stop Level 3 - scom_data.words.lower = 0; - scom_data.words.upper = SSH_ACT_LV3_COMPLETE; - CME_PUTSCOM(PPM_SSHSRC, core, scom_data.value); - */ - // If both cores targeting different levels - // deeper core should have at least deeper stop level than 3 - // only need to modify deeper core history if another one was done - if (deeper_core) - { - /* - scom_data.words.lower = 0; - scom_data.words.upper = SSH_ACT_LV3_CONTINUE; - CME_PUTSCOM(PPM_SSHSRC, deeper_core, scom_data.value); - */ - // from now on, proceed with only deeper core - core = deeper_core; - target_level = deeper_level; - deeper_level = 0; - deeper_core = 0; - entry_ongoing = 1; - } - else - { - entry_ongoing = 0; - } - - // If we are done at STOP level 3 - if (!entry_ongoing) - { - break; - } - } - - //---------------------------------------------------------------------- PK_TRACE("+++++ +++++ STOP LEVEL 4 ENTRY +++++ +++++"); //---------------------------------------------------------------------- @@ -1625,7 +1572,7 @@ p9_cme_stop_entry() pig.fields.req_intr_payload = G_cme_stop_record.req_level[core_index]; // put PIG and Wakeup_Notify_Select back to back as possible - CME_PUTSCOM(PPM_PIG, core_mask, pig.value); + send_pig_packet(pig.value, core_mask); CME_PUTSCOM(CPPM_CPMMR_OR, core_mask, BIT64(13)); PK_TRACE_DBG("Switch Core[%d] PPM wakeup to STOP-GPE via CPMMR[13]", core_mask); diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h index 0a6cf2fb..b55abfd2 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h @@ -230,36 +230,38 @@ enum SGPE_WOF_ACTIVE_UPDATE_STATUS enum SGPE_SUSPEND_FUNCTION_STATUS { - STATUS_IDLE = 0, - STATUS_PROCESSING = 1, - STATUS_SUSPENDING = 2, - STATUS_SUSPENDED = 3 + STATUS_ENTRY_SUSPENDED = 1, + STATUS_EXIT_SUSPENDED = 2, + STATUS_SUSPEND_PENDING = 4, + STATUS_STOP_PROCESSING = 8 }; enum SGPE_STOP_VECTOR_INDEX { - VECTOR_BLOCKE = 0, //(core_save, quad_req, qswu_save, qex01) - VECTOR_BLOCKX = 1, //(core_save, quad_req, qswu_save, qex01) - VECTOR_ENTRY = 2, //(core_ipc, quad, qswu) - VECTOR_EXIT = 3, //(core, quad_ipc qswu) - VECTOR_ACTIVE = 4, //(core_ipc, quad_ipc, qswu_active) - VECTOR_CONFIG = 5, //(core, quad) - VECTOR_ERROR = 6, //( quad) + VECTOR_BLOCKE = 0, //(core_save, quad_req, qswu_save, req, ack) + VECTOR_BLOCKX = 1, //(core_save, quad_req, qswu_save, req, ack) + VECTOR_SUSPENDE = 2, //(core_save, qswu_save) + VECTOR_SUSPENDX = 3, //(core_save, qswu_save) + VECTOR_ENTRY = 4, //(core_ipc, quad, qswu) + VECTOR_EXIT = 5, //(core, quad_ipc qswu) + VECTOR_ACTIVE = 6, //(core_ipc, quad_ipc, qswu_active) + VECTOR_CONFIG = 7, //(core, quad) + VECTOR_ERROR = 8, //( quad) #if !DISABLE_STOP8 - VECTOR_PIGE = 7, //(core) - VECTOR_PIGX = 8, //(core) - VECTOR_PCWU = 9 //(core) - -#else - - VECTOR_RCLKE = 7, //(core_blocke, quad) - VECTOR_RCLKX = 8, //(core_blockx, quad) VECTOR_PIGE = 9, //(core) VECTOR_PIGX = 10,//(core) VECTOR_PCWU = 11 //(core) +#else + + VECTOR_RCLKE = 9, //(core_blocke, quad) + VECTOR_RCLKX = 10,//(core_blockx, quad) + VECTOR_PIGE = 11,//(core) + VECTOR_PIGX = 12,//(core) + VECTOR_PCWU = 13 //(core) + #endif }; @@ -295,21 +297,21 @@ typedef struct typedef struct { + uint32_t creq[2]; // 24 bits + uint32_t cack[2]; // 24 bits uint32_t expg[6]; // 2 bits uint32_t ex01[6]; // 2 bits - uint32_t qex0[2]; // 6 bits - uint32_t qex1[2]; // 6 bits - uint32_t qswu[5]; // 6 bits + uint32_t qswu[7]; // 6 bits #if !DISABLE_STOP8 - uint32_t quad[7]; // 6 bits - uint32_t core[10];// 24 bits + uint32_t quad[9]; // 6 bits + uint32_t core[12];// 24 bits #else - uint32_t quad[9]; // 6 bits - uint32_t core[12];// 24 bits + uint32_t quad[11]; // 6 bits + uint32_t core[14];// 24 bits #endif @@ -321,6 +323,8 @@ typedef struct uint8_t status_stop; // sgpe-pgpe interlock status(quad/core updates enable/disable) uint8_t update_pgpe; + // current/latest actions in suspend stop ipc + uint8_t suspend_act; ipc_msg_t* updates_cmd; ipc_msg_t* suspend_cmd; } sgpe_wof_t; @@ -399,7 +403,9 @@ void p9_sgpe_pig_type3_handler(void*, PkIrqId); void p9_sgpe_pig_type5_handler(void*, PkIrqId); void p9_sgpe_pig_type6_handler(void*, PkIrqId); void p9_sgpe_ipi3_low_handler(void*, PkIrqId); -void p9_sgpe_stop_suspend_db1_cme(uint32_t, uint32_t); + +/// Support Functions shared between suspend and block protocol +uint32_t p9_sgpe_stop_suspend_db1_cme(uint32_t, uint32_t); /// SGPE STOP Entry and Exit Prototypes void p9_sgpe_stop_init(); diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c index 0e6b68c9..078bd132 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c @@ -54,9 +54,6 @@ p9_sgpe_stop_entry() data64_t scom_data = {0}; data64_t temp_data = {0}; uint32_t flg2_data = 0; -#if DISABLE_STOP8 - ppm_pig_t pig = {0}; -#endif #if HW386311_NDD1_PBIE_RW_PTR_STOP11_FIX uint32_t spin = 0; #endif @@ -156,22 +153,7 @@ p9_sgpe_stop_entry() { G_sgpe_stop_record.group.quad[VECTOR_RCLKE] &= ~BIT32((qloop + RCLK_DIS_DONE_OFFSET)); G_sgpe_stop_record.group.quad[VECTOR_RCLKE] |= BIT32((qloop + QUAD_IN_STOP11_OFFSET)); - - // if during resonant clock disable, any exit occured, re-assert them, - // but we are going to complete the stop11 entry prior to process it - for(cloop = 0; cloop < CORES_PER_QUAD; cloop++) - { - cindex = (qloop << 2) + cloop; - - if (G_sgpe_stop_record.group.core[VECTOR_RCLKE] & BIT32(cindex)) - { - G_sgpe_stop_record.group.core[VECTOR_RCLKE] &= ~BIT32(cindex); - pig.fields.req_intr_payload = TYPE2_PAYLOAD_SOFTWARE_WAKEUP; - pig.fields.req_intr_type = PIG_TYPE3; - GPE_PUTSCOM(GPE_SCOM_ADDR_CORE(PPM_PIG, cindex), pig.value); - } - } - + G_sgpe_stop_record.group.core[VECTOR_RCLKE] &= ~BITS32((qloop << 2), 4); G_sgpe_stop_record.group.quad[VECTOR_ENTRY] |= BIT32(qloop); ocb_qssr_t qssr = {0}; @@ -189,6 +171,8 @@ p9_sgpe_stop_entry() { // from this point on, only process wakeup when stop11 is entered G_sgpe_stop_record.group.quad[VECTOR_RCLKE] |= BIT32((qloop + RCLK_DIS_REQ_OFFSET)); + // establish mask to ignore the wakeup while in rclk disable + G_sgpe_stop_record.group.core[VECTOR_RCLKE] |= BITS32((qloop << 2), 4); // assume ex0 core0 is good cindex = (qloop << 2); @@ -1147,7 +1131,6 @@ p9_sgpe_stop_entry() // Note: Stop11 will lose all the fences so here needs to assert them GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_CPLT_CTRL1_OR, qloop), CLK_REGION_ALL); - PK_TRACE_INF("SE.11D: Cache Clock Stopped"); PK_TRACE("Gate the PCBMux request so scanning doesn't cause random requests"); @@ -1363,14 +1346,11 @@ p9_sgpe_stop_entry() #if !SKIP_IPC - /// @todo RTC166577 - /// this block can be done as early as after stop cache clocks if ((in32(OCB_OCCS2) & BIT32(PGPE_ACTIVE)) && G_sgpe_stop_record.wof.update_pgpe != IPC_SGPE_PGPE_UPDATE_PGPE_HALTED && G_sgpe_stop_record.group.quad[VECTOR_ENTRY]) { // Note: if all quads aborted on l3 purge, the quad list will be 0s; - p9_sgpe_ipc_pgpe_update_active_quads(UPDATE_ACTIVE_QUADS_TYPE_ENTRY, UPDATE_ACTIVE_QUADS_ENTRY_TYPE_DONE); |

