diff options
| author | Yue Du <daviddu@us.ibm.com> | 2016-03-24 15:26:30 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-08-22 17:54:05 -0500 |
| commit | 61af8a881aae16982a832be698e9cea67f5d892b (patch) | |
| tree | 9970f2b217584ef470d2fa876b1c007a5e7d0f74 | |
| parent | bfede8ec480adca02a24fb9efe0798d61b823206 (diff) | |
| download | talos-hcode-61af8a881aae16982a832be698e9cea67f5d892b.tar.gz talos-hcode-61af8a881aae16982a832be698e9cea67f5d892b.zip | |
CME/SGPE: update stop cme/sgpe images
Change-Id: I5f425dbee4af74a15c60158cc613ce7b9ff0e45c
Original-Change-Id: I9c2de4e90e7445d123290de37fff9e26dae2d1ae
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22464
Tested-by: Jenkins Server
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
3 files changed, 230 insertions, 111 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c index 91d91fdf..cede43da 100755 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c @@ -92,6 +92,7 @@ p9_cme_stop_entry() // Return error if None of both fired if (!core) { + PK_TRACE("Error: no pm_active fired"); pk_halt(); } @@ -139,7 +140,6 @@ p9_cme_stop_entry() } G_cme_stop_record.core_running &= ~core; - out32(CME_LCL_LMCR_OR, (core << SHIFT32(15))); PK_TRACE("SE1: Request Stop Levels[%d %d]", G_cme_stop_record.req_level_c0, @@ -154,6 +154,7 @@ p9_cme_stop_entry() (G_cme_stop_record.req_level_c0 <= STOP_LEVEL_1 || G_cme_stop_record.req_level_c1 <= STOP_LEVEL_1))) { + PK_TRACE("Error: stop 1 requested to hcode"); pk_halt(); } @@ -216,12 +217,6 @@ p9_cme_stop_entry() PK_TRACE("SE2: target_lv[%d], deeper_lv[%d], deeper_core[%d]", target_level, deeper_level, deeper_core); - //============================= - MARK_TRAP(SE_POLL_PCBMUX_GRANT) - //============================= - - PK_TRACE("SE2.f"); - // Poll Infinitely for PCB Mux Grant // MF: change watchdog timer in pk to ensure forward progress while((core & (in32(CME_LCL_SISR) >> SHIFT32(11))) != core); @@ -237,7 +232,8 @@ p9_cme_stop_entry() out32(CME_LCL_SICR_OR, core << SHIFT32(1)); out32(CME_LCL_SICR_CLR, core << SHIFT32(1)); - /// @todo Set LMCR bits 14 and/or 15 (override disables) + /// Set LMCR bits 12/13, 14/15 (override disables) + out32(CME_LCL_LMCR_OR, ((core << SHIFT32(13)) | (core << SHIFT32(15)))); PK_TRACE("SE2.h"); // Raise Core-L2 + Core-CC Quiesces @@ -306,6 +302,8 @@ p9_cme_stop_entry() // Switch glsmux to refclk to save clock grid power CME_PUTSCOM(C_PPM_CGCR, core, 0); + // Assert skew sense to skewadjust Fence + CME_PUTSCOM(CPPM_NC0INDIR_OR, core, BIT64(22)); // Assert Vital Fence CME_PUTSCOM(C_CPLT_CTRL1_OR, core, BIT64(3)); // Assert Regional Fences @@ -720,10 +718,6 @@ p9_cme_stop_entry() // Poll for Purged Done PK_TRACE("SE5.1b"); - //=========================== - MARK_TRAP(SE_IS2_BEGIN) - //=========================== - do { #if !SKIP_L2_PURGE_ABORT @@ -742,10 +736,6 @@ p9_cme_stop_entry() } while((in32(CME_LCL_EISR) & BITS32(22, 2)) != BITS32(22, 2)); - //=================== - MARK_TRAP(SE_IS2_END) - //=================== - // Deassert L2+NCU Purges, their possible aborts, NCU tlbie quiesce PK_TRACE("SE5.1c"); out32(CME_LCL_SICR_CLR, BITS32(18, 6)); @@ -773,10 +763,20 @@ p9_cme_stop_entry() // Send PCB Interrupt per core PK_TRACE("SE5.2b"); - pig.fields.req_intr_type = 2; //0b010: STOP State Change if (core & CME_MASK_C0) { + if (G_cme_stop_record.req_level_c0 < STOP_LEVEL_11) + { + CME_PUTSCOM(CPPM_CPMMR_OR, CME_MASK_C0, BIT64(10)); + pig.fields.req_intr_type = PIG_TYPE3; + } + else + { + CME_PUTSCOM(CPPM_CPMMR_CLR, CME_MASK_C0, BIT64(10)); + pig.fields.req_intr_type = PIG_TYPE2; + } + pig.fields.req_intr_payload = G_cme_stop_record.req_level_c0; CME_PUTSCOM(PPM_PIG, CME_MASK_C0, pig.value); G_cme_stop_record.core_stopgpe |= core; @@ -785,6 +785,17 @@ p9_cme_stop_entry() if (core & CME_MASK_C1) { + if (G_cme_stop_record.req_level_c1 < STOP_LEVEL_11) + { + CME_PUTSCOM(CPPM_CPMMR_OR, CME_MASK_C1, BIT64(10)); + pig.fields.req_intr_type = PIG_TYPE3; + } + else + { + CME_PUTSCOM(CPPM_CPMMR_CLR, CME_MASK_C1, BIT64(10)); + pig.fields.req_intr_type = PIG_TYPE2; + } + pig.fields.req_intr_payload = G_cme_stop_record.req_level_c1; CME_PUTSCOM(PPM_PIG, CME_MASK_C1, pig.value); G_cme_stop_record.core_stopgpe |= core; diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h index 5553907a..61844b9c 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h @@ -58,6 +58,7 @@ #define EQ_BIST 0x100F000B #define EQ_NET_CTRL0_WAND 0x100F0041 #define EQ_NET_CTRL0_WOR 0x100F0042 +#define C_NET_CTRL0_WOR 0x200F0042 #define EQ_NET_CTRL1_WAND 0x100F0045 #define EQ_NET_CTRL1_WOR 0x100F0046 @@ -114,20 +115,23 @@ enum SGPE_STOP_IRQ_SHORT_NAMES enum SGPE_STOP_IRQ_PAYLOAD_MASKS { - TYPE2_PAYLOAD_STOP_EVENT = 0xC00, - TYPE2_PAYLOAD_STOP_LEVEL = 0xF + TYPE2_PAYLOAD_EXIT_EVENT = 0xC00, + TYPE2_PAYLOAD_STOP_LEVEL = 0xF, + TYPE3_PAYLOAD_EXIT_EVENT = 0xC00, + TYPE6_PAYLOAD_EXIT_EVENT = 0xC00 }; enum SGPE_STOP_EVENT_LEVELS { - SGPE_EX_BASE_LV = 8, - SGPE_EQ_BASE_LV = 11 + LEVEL_EX_BASE = 8, + LEVEL_EQ_BASE = 11 }; -enum SGPE_STOP_EVENT_FLAGS +enum SGPE_STOP_VECTOR_INDEX { - SGPE_ENTRY_FLAG = 2, - SGPE_EXIT_FLAG = 1 + VECTOR_EXIT = 0, + VECTOR_ENTRY = 1, + VECTOR_CONFIG = 2 }; typedef struct @@ -144,21 +148,12 @@ typedef struct typedef struct { - uint32_t entry_x0; - uint32_t entry_x1; - uint32_t entry_x; - uint32_t entry_q; - uint32_t entry_c; - uint32_t exit_x0; - uint32_t exit_x1; - uint32_t exit_x; - uint32_t exit_q; - uint32_t exit_c; - uint32_t good_x0; - uint32_t good_x1; - uint32_t good_x; - uint32_t good_q; - uint32_t good_c; + uint32_t core[3]; + uint32_t ex_l[3]; + uint32_t ex_r[3]; + uint32_t ex_b[3]; + uint32_t quad[3]; + uint32_t qswu[2]; } sgpe_group_t; /// SGPE Stop Score Board Structure @@ -175,7 +170,7 @@ typedef struct } SgpeStopRecord; /// SGPE STOP Entry and Exit Prototypes -void p9_sgpe_stop_pig_type2_handler(void*, PkIrqId); +void p9_sgpe_stop_pig_handler(void*, PkIrqId); void p9_sgpe_stop_enter_thread(void*); void p9_sgpe_stop_exit_thread(void*); int p9_sgpe_stop_entry(); diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c index 09e471bc..5876f51f 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c @@ -48,18 +48,113 @@ p9_sgpe_stop_entry() MARK_TAG(BEGINSCOPE_STOP_ENTRY, 0) //================================ - if (G_sgpe_stop_record.group.entry_q) + G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY] = 0; + G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY] = 0; + G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] = 0; + G_sgpe_stop_record.group.quad[VECTOR_ENTRY] = 0; + + for(qloop = 0; qloop < MAX_QUADS; qloop++) { - MARK_TRAP(SE_STOP_SUSPEND_PSTATE) + + if (G_sgpe_stop_record.group.qswu[VECTOR_EXIT] & BIT32(qloop)) + { + continue; + } + + // Calculate EX and Quad targets based on current core stop levels + G_sgpe_stop_record.state[qloop].req_state_x0 = + G_sgpe_stop_record.level[qloop][0] < + G_sgpe_stop_record.level[qloop][1] ? + G_sgpe_stop_record.level[qloop][0] : + G_sgpe_stop_record.level[qloop][1] ; + G_sgpe_stop_record.state[qloop].req_state_x1 = + G_sgpe_stop_record.level[qloop][2] < + G_sgpe_stop_record.level[qloop][3] ? + G_sgpe_stop_record.level[qloop][2] : + G_sgpe_stop_record.level[qloop][3] ; + G_sgpe_stop_record.state[qloop].req_state_q = + G_sgpe_stop_record.state[qloop].req_state_x0 < + G_sgpe_stop_record.state[qloop].req_state_x1 ? + G_sgpe_stop_record.state[qloop].req_state_x0 : + G_sgpe_stop_record.state[qloop].req_state_x1 ; + + // Check if EX and/or Quad qualifies to proceed with entry + if (G_sgpe_stop_record.state[qloop].act_state_x0 < LEVEL_EX_BASE && + G_sgpe_stop_record.state[qloop].req_state_x0 >= LEVEL_EX_BASE) + { + G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY] |= BIT32(qloop); + G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] |= BIT32(qloop << 1); + } + + if (G_sgpe_stop_record.state[qloop].act_state_x1 < LEVEL_EX_BASE && + G_sgpe_stop_record.state[qloop].req_state_x1 >= LEVEL_EX_BASE) + { + G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY] |= BIT32(qloop); + G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] |= + BIT32((qloop << 1) + 1); + } + + if (G_sgpe_stop_record.state[qloop].act_state_q < + G_sgpe_stop_record.state[qloop].req_state_q && + G_sgpe_stop_record.state[qloop].req_state_q >= LEVEL_EQ_BASE) + { + G_sgpe_stop_record.group.quad[VECTOR_ENTRY] |= BIT32(qloop); + } + + if (G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] || + G_sgpe_stop_record.group.quad[VECTOR_ENTRY]) + { + PK_TRACE("clv[%d][%d][%d][%d]", + G_sgpe_stop_record.level[qloop][0], + G_sgpe_stop_record.level[qloop][1], + G_sgpe_stop_record.level[qloop][2], + G_sgpe_stop_record.level[qloop][3]); + + PK_TRACE("act: qlv[%d]x0lv[%d]x1lv[%d]", + G_sgpe_stop_record.state[qloop].act_state_q, + G_sgpe_stop_record.state[qloop].act_state_x0, + G_sgpe_stop_record.state[qloop].act_state_x1); + + PK_TRACE("req: x0lv[%d]x1lv[%d]qlv[%d]", + G_sgpe_stop_record.state[qloop].req_state_x0, + G_sgpe_stop_record.state[qloop].req_state_x1, + G_sgpe_stop_record.state[qloop].req_state_q); + } } + G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] &= + G_sgpe_stop_record.group.ex_b[VECTOR_CONFIG]; + G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY] &= + G_sgpe_stop_record.group.ex_l[VECTOR_CONFIG]; + G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY] &= + G_sgpe_stop_record.group.ex_r[VECTOR_CONFIG]; + + PK_TRACE("Core Entry Vectors: X[%x] X0[%x] X1[%x] Q[%x]", + G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY], + G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY], + G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY], + G_sgpe_stop_record.group.quad[VECTOR_ENTRY]); + //TODO: message pgpe to suspend Pstate only if stop level >= 8 + if (G_sgpe_stop_record.group.quad[VECTOR_ENTRY]) + { + //=============================== + MARK_TRAP(SE_STOP_SUSPEND_PSTATE) + //=============================== + } + else if (!G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY]) + { + //============================ + MARK_TAG(SE_LESSTHAN8_WAIT, 0) + //============================ + } + // ------------------------------------------------------------------------ // EX STOP ENTRY [LEVEL 8-10] // ------------------------------------------------------------------------ // only stop 8 sets x_in - for(xentry = G_sgpe_stop_record.group.entry_x, qloop = 0; + for(xentry = G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY], qloop = 0; xentry > 0; xentry = xentry << 2, qloop++) { @@ -195,7 +290,7 @@ p9_sgpe_stop_entry() STOP_ACT_ENABLE); } - // Update QSSR: l2_stopped, entry_ongoing = 0 + // Update QSSR: l2_stopped, drop stop_entry_ongoing out32(OCB_QSSR_CLR, BIT32(qloop + 20)); out32(OCB_QSSR_OR, (ex << SHIFT32((qloop << 1) + 1))); @@ -209,9 +304,9 @@ p9_sgpe_stop_entry() // QUAD STOP ENTRY [LEVEL 11-15] // ------------------------------------------------------------------------ - for(qentry = G_sgpe_stop_record.group.entry_q, qloop = 0; + for(qentry = G_sgpe_stop_record.group.quad[VECTOR_ENTRY], qloop = 0, ex = 0; qentry > 0; - qentry = qentry << 1, qloop++) + qentry = qentry << 1, qloop++, ex = 0) { // if this quad is not up to entry, skip if (!(qentry & BIT32(0))) @@ -219,12 +314,12 @@ p9_sgpe_stop_entry() continue; } - if (G_sgpe_stop_record.group.good_x0 & BIT32(qloop)) + if (G_sgpe_stop_record.group.ex_l[VECTOR_CONFIG] & BIT32(qloop)) { ex |= FST_EX_IN_QUAD; } - if (G_sgpe_stop_record.group.good_x1 & BIT32(qloop)) + if (G_sgpe_stop_record.group.ex_r[VECTOR_CONFIG] & BIT32(qloop)) { ex |= SND_EX_IN_QUAD; } @@ -286,74 +381,82 @@ p9_sgpe_stop_entry() { #if !SKIP_L3_PURGE_ABORT - if (in32(OCB_OISR1) & BIT32(15)) + if (in32(OCB_OISR1) & (BITS32(15, 2) & BIT32(19))) { - if (in32(OCB_OPITNPRA(2)) & (BITS32((qloop << 2), 4))) + if ((in32(OCB_OPITNPRA(2)) & BITS32((qloop << 2), 4)) || + (in32(OCB_OPITNPRA(3)) & BITS32((qloop << 2), 4))) { for(cloop = 0; cloop < CORES_PER_QUAD; cloop++) { - // todo type3 - if (in32(OCB_OPIT2CN(((qloop << 2) + cloop))) & - TYPE2_PAYLOAD_STOP_EVENT) + if ((in32(OCB_OPIT2CN(((qloop << 2) + cloop))) & + TYPE2_PAYLOAD_EXIT_EVENT) || + (in32(OCB_OPIT3CN(((qloop << 2) + cloop))) & + TYPE3_PAYLOAD_EXIT_EVENT)) { - - //======================================== - MARK_TAG(SE_PURGE_L3_ABORT, (32 >> qloop)) - //======================================== - - // Assert Purge L3 Abort - if (ex & FST_EX_IN_QUAD) - GPE_PUTSCOM(GPE_SCOM_ADDR_EX(EX_PM_PURGE_REG, - qloop, 0), - BIT64(2)); - - if (ex & SND_EX_IN_QUAD) - GPE_PUTSCOM(GPE_SCOM_ADDR_EX(EX_PM_PURGE_REG, - qloop, 1), - BIT64(2)); - - // Poll for Abort Done - if(ex & FST_EX_IN_QUAD) - { - do - { - GPE_GETSCOM(GPE_SCOM_ADDR_EX( - EX_PM_PURGE_REG, - qloop, 0), scom_data); - } - while(scom_data & (BIT64(0) | BIT64(2))); - } - - if(ex & SND_EX_IN_QUAD) - { - do - { - GPE_GETSCOM(GPE_SCOM_ADDR_EX( - EX_PM_PURGE_REG, - qloop, 1), scom_data); - } - while(scom_data & (BIT64(0) | BIT64(2))); - } - - //============================================= - MARK_TAG(SE_PURGE_L3_ABORT_DONE, (32 >> qloop)) - //============================================= - - // Deassert LCO Disable - if(ex & FST_EX_IN_QUAD) - GPE_PUTSCOM(GPE_SCOM_ADDR_EX(EX_PM_LCO_DIS_REG, - qloop, 0), 0); - - if(ex & SND_EX_IN_QUAD) - GPE_PUTSCOM(GPE_SCOM_ADDR_EX(EX_PM_LCO_DIS_REG, - qloop, 1), 0); - - // Notify PGPE to resume l3_purge_aborted = 1; break; } } } + + if ((in32(OCB_OPIT6PRB) & BIT32(qloop)) && + (in32(OCB_OPIT6QN(qloop)) & TYPE6_PAYLOAD_EXIT_EVENT)) + { + l3_purge_aborted = 1; + } + + if (l3_purge_aborted) + { + + //======================================== + MARK_TAG(SE_PURGE_L3_ABORT, (32 >> qloop)) + //======================================== + + // Assert Purge L3 Abort + if (ex & FST_EX_IN_QUAD) + GPE_PUTSCOM(GPE_SCOM_ADDR_EX(EX_PM_PURGE_REG, qloop, 0), + BIT64(2)); + + if (ex & SND_EX_IN_QUAD) + GPE_PUTSCOM(GPE_SCOM_ADDR_EX(EX_PM_PURGE_REG, qloop, 1), + BIT64(2)); + + // Poll for Abort Done + if(ex & FST_EX_IN_QUAD) + { + do + { + GPE_GETSCOM(GPE_SCOM_ADDR_EX(EX_PM_PURGE_REG, + qloop, 0), scom_data); + } + while(scom_data & (BIT64(0) | BIT64(2))); + } + + if(ex & SND_EX_IN_QUAD) + { + do + { + GPE_GETSCOM(GPE_SCOM_ADDR_EX(EX_PM_PURGE_REG, + qloop, 1), scom_data); + } + while(scom_data & (BIT64(0) | BIT64(2))); + } + + //============================================= + MARK_TAG(SE_PURGE_L3_ABORT_DONE, (32 >> qloop)) + //============================================= + + // Deassert LCO Disable + if (ex & FST_EX_IN_QUAD) + GPE_PUTSCOM(GPE_SCOM_ADDR_EX(EX_PM_LCO_DIS_REG, + qloop, 0), 0); + + if (ex & SND_EX_IN_QUAD) + GPE_PUTSCOM(GPE_SCOM_ADDR_EX(EX_PM_LCO_DIS_REG, + qloop, 1), 0); + + // Notify PGPE to resume + } } #endif @@ -489,9 +592,6 @@ p9_sgpe_stop_entry() GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_CPLT_CTRL1_OR, qloop), 0xFFFF700000000000); - // Update QSSR: quad_stopped - out32(OCB_QSSR_OR, BIT32(qloop + 14)); - //========================================= MARK_TAG(SE_POWER_OFF_CACHE, (32 >> qloop)) //========================================= @@ -601,6 +701,9 @@ p9_sgpe_stop_entry() STOP_REQ_DISABLE, STOP_ACT_ENABLE); + // Update QSSR: quad_stopped + out32(OCB_QSSR_OR, BIT32(qloop + 14)); + // Update QSSR: drop stop_entry_ongoing out32(OCB_QSSR_CLR, BIT32(qloop + 20)); @@ -609,8 +712,18 @@ p9_sgpe_stop_entry() //===================================== } - // Enable Type2 Interrupt - out32(OCB_OIMR1_CLR, BIT32(15)); + //loop quad to drop spwu done + clear qswu + for(qloop = 0; qloop < MAX_QUADS; qloop++) + { + if (G_sgpe_stop_record.group.qswu[VECTOR_ENTRY] & BIT32(qloop)) + { + GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(PPM_GPMMR_CLR, qloop), BIT64(0)); + G_sgpe_stop_record.group.qswu[VECTOR_ENTRY] &= ~BIT32(qloop); + } + } + + // Enable Type2/3/6 Interrupt + out32(OCB_OIMR1_CLR, (BITS32(15, 2) | BIT32(19))); //============================ MARK_TRAP(ENDSCOPE_STOP_ENTRY) //============================ |

