diff options
| author | Yue Du <daviddu@us.ibm.com> | 2017-01-22 00:02:26 -0600 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-08-22 17:54:59 -0500 |
| commit | 5ef29f4f0b449d5a82be2f7b32b25abf1db4ac7c (patch) | |
| tree | 18e5750901b6d5decb5a27ccddb332b46e9e7b68 | |
| parent | 3be7a025c4b4f9e6ad98796660be89b374d34026 (diff) | |
| download | talos-hcode-5ef29f4f0b449d5a82be2f7b32b25abf1db4ac7c.tar.gz talos-hcode-5ef29f4f0b449d5a82be2f7b32b25abf1db4ac7c.zip | |
STOP: block wakeup (+ block entry since patch 15)
Change-Id: Ifc462097580e3cac077653864ce19d5c17aa2ab9
Original-Change-Id: I6636b7f77842e9a5e07fffa0f908fb4d46e7d763
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35205
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h | 90 | ||||
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c | 65 |
2 files changed, 66 insertions, 89 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h index 91b209fe..f1685daa 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h @@ -39,6 +39,9 @@ extern "C" { #include "gpehw_common.h" #include "occhw_interrupts.h" +#include "stop_sgpe_cme_api.h" +#include "wof_sgpe_pgpe_api.h" + #include "ocb_register_addresses.h" #include "cme_register_addresses.h" #include "ppm_register_addresses.h" @@ -53,15 +56,17 @@ extern "C" { #include "ipc_api.h" #include "ipc_async_cmd.h" -#include "ipc_messages.h" #include "p9_hcode_image_defines.H" #include "p9_pm_hcd_flags.h" #include "p9_stop_common.h" +#include "p9_dd1_doorbell_wr.h" #if HW386311_NDD1_PBIE_RW_PTR_STOP11_FIX || NDD1_FUSED_CORE_MODE_SCAN_FIX + #define EXTRACT_RING_BITS(mask, ring, save) save = (ring) & (mask); #define RESTORE_RING_BITS(mask, ring, save) ring = (((ring) & (~mask)) | (save)); + #endif @@ -169,36 +174,7 @@ extern "C" { #define PERV_CPLT_STAT0 0x10000100 #define PERV_NET_CTRL1_WAND 0x000F0045 -enum SGPE_IPC_CONSTANTS -{ - ENABLE_CORE_STOP_UPDATES = 1, - ENABLE_QUAD_STOP_UPDATES = 2, - ENABLE_BOTH_STOP_UPDATES = 3, - DISABLE_CORE_STOP_UPDATES = 5, - DISABLE_QUAD_STOP_UPDATES = 6, - DISABLE_BOTH_STOP_UPDATES = 7, - SGPE_IPC_UPDATE_CORE_ENABLED = 1, - SGPE_IPC_UPDATE_QUAD_ENABLED = 2, - SGPE_IPC_UPDATE_TYPE_ENTRY = 0, - SGPE_IPC_UPDATE_TYPE_EXIT = 1, - SGPE_IPC_RETURN_CODE_NULL = 0, - SGPE_IPC_RETURN_CODE_ACK = 1 -}; - -enum SGPE_STOP_IRQ_SHORT_NAMES -{ - IRQ_STOP_TYPE2 = OCCHW_IRQ_PMC_PCB_INTR_TYPE2_PENDING, - IRQ_STOP_TYPE3 = OCCHW_IRQ_PMC_PCB_INTR_TYPE3_PENDING, - IRQ_STOP_TYPE6 = OCCHW_IRQ_PMC_PCB_INTR_TYPE6_PENDING -}; -enum SGPE_STOP_IRQ_PAYLOAD_MASKS -{ - TYPE2_PAYLOAD_EXIT_EVENT = 0xC00, - TYPE2_PAYLOAD_STOP_LEVEL = 0xF, - TYPE3_PAYLOAD_EXIT_EVENT = 0xC00, - TYPE6_PAYLOAD_EXIT_EVENT = 0xF -}; enum SGPE_STOP_STATE_HISTORY_VECTORS { @@ -217,17 +193,6 @@ enum SGPE_STOP_EVENT_LEVELS LEVEL_EQ_BASE = 11 }; -enum SGPE_STOP_CME_FLAGS -{ - CME_QUAD_MGR_INDICATOR = BIT32(3), - CME_EX1_INDICATOR = BIT32(26), - CME_SIBLING_FUNCTIONAL = BIT32(27), - CME_CORE0_ENTRY_FIRST = BIT32(28), - CME_CORE1_ENTRY_FIRST = BIT32(29), - CME_CORE0_ENABLE = BIT32(30), - CME_CORE1_ENABLE = BIT32(31) -}; - enum SGPE_STOP_PSCOM_MASK { PSCOM_MASK_ALL_L2 = BITS32(2, 2) | BITS32(10, 2), @@ -237,7 +202,13 @@ enum SGPE_STOP_PSCOM_MASK PSCOM_MASK_EX1_L3 = BIT32(5) | BIT32(7) | BIT32(9) }; -enum SGPE_FUNCTION_STATUS +enum SGPE_WOF_ACTIVE_UPDATE_STATUS +{ + IPC_SGPE_PGPE_UPDATE_CORE_ENABLED = 1, + IPC_SGPE_PGPE_UPDATE_QUAD_ENABLED = 2 +}; + +enum SGPE_SUSPEND_FUNCTION_STATUS { STATUS_IDLE = 0, STATUS_PROCESSING = 1, @@ -247,11 +218,13 @@ enum SGPE_FUNCTION_STATUS enum SGPE_STOP_VECTOR_INDEX { - VECTOR_EXIT = 0, - VECTOR_ENTRY = 1, - VECTOR_CONFIG = 2, - VECTOR_ACTIVE = 3, - VECTOR_PCWU = 4 + VECTOR_CONFIG = 0, //(core, quad, qswu_ongoing, exlr) + VECTOR_BLOCKE = 1, //(core_save, quad_req, qswu_save, exlr_ack) + VECTOR_BLOCKX = 2, //(core_save, quad_req, qswu_save, exlr_ack) + VECTOR_ENTRY = 3, //(core_ipc, quad, qswu, exlr) + VECTOR_EXIT = 4, //(core, quad_ipc qswu) + VECTOR_ACTIVE = 5, //(core_ipc, quad_ipc) + VECTOR_PCWU = 6 //(core) }; typedef struct @@ -270,22 +243,21 @@ typedef struct typedef struct { - uint32_t core[5]; // 24 bits - uint32_t quad[4]; // 6 bits - uint32_t ex_l[3]; // 6 bits - uint32_t ex_r[3]; // 6 bits - uint32_t ex_b[3]; // 12 bits - uint32_t qswu[3]; // 6 bits + uint32_t ex_l[4]; // 6 bits + uint32_t ex_r[4]; // 6 bits + uint32_t qswu[5]; // 6 bits + uint32_t quad[6]; // 6 bits + uint32_t core[7]; // 24 bits } sgpe_group_t; typedef struct { // function status(functional, suspending, suspended, resuming) - uint8_t status_pstate; - uint8_t status_stop; + uint8_t status_pstate; + uint8_t status_stop; // sgpe-pgpe interlock status(quad/core updates enable/disable) - uint8_t update_pgpe; - ipc_msg_t* suspend_cmd; + uint8_t update_pgpe; + ipc_msg_t* suspend_cmd; } sgpe_wof_t; /// SGPE Stop Score Board Structure @@ -299,7 +271,7 @@ typedef struct // group of ex and quad entering or exiting the stop sgpe_group_t group; sgpe_wof_t wof; - PkSemaphore sem[3]; + PkSemaphore sem[4]; } SgpeStopRecord; typedef struct @@ -327,6 +299,8 @@ void p9_sgpe_ipc_pgpe_rsp_callback(ipc_msg_t* cmd, void* arg); /// SGPE STOP Entry and Exit Prototypes +void p9_sgpe_stop_suspend_msg_db1(uint32_t, uint32_t); +void p9_sgpe_stop_ipi_handler(void*, PkIrqId); void p9_sgpe_stop_pig_handler(void*, PkIrqId); void p9_sgpe_stop_enter_thread(void*); void p9_sgpe_stop_exit_thread(void*); diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c index 218dfb15..81750587 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c @@ -56,8 +56,6 @@ p9_sgpe_stop_entry() uint32_t qloop = 0; uint32_t cloop = 0; uint32_t climit = 0; - uint32_t xentry = 0; - uint32_t qentry = 0; uint64_t host_attn = 0; uint64_t local_xstop = 0; data64_t scom_data = {0}; @@ -79,7 +77,6 @@ p9_sgpe_stop_entry() G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY] = 0; G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY] = 0; - G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] = 0; G_sgpe_stop_record.group.quad[VECTOR_ENTRY] = 0; for(qloop = 0; qloop < MAX_QUADS; qloop++) @@ -112,15 +109,12 @@ p9_sgpe_stop_entry() G_sgpe_stop_record.state[qloop].req_state_x0 >= LEVEL_EX_BASE) { G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY] |= BIT32(qloop); - G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] |= BIT32(qloop << 1); } if (G_sgpe_stop_record.state[qloop].act_state_x1 < LEVEL_EX_BASE && G_sgpe_stop_record.state[qloop].req_state_x1 >= LEVEL_EX_BASE) { G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY] |= BIT32(qloop); - G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] |= - BIT32((qloop << 1) + 1); } if (G_sgpe_stop_record.state[qloop].act_state_q < LEVEL_EQ_BASE && @@ -129,7 +123,8 @@ p9_sgpe_stop_entry() G_sgpe_stop_record.group.quad[VECTOR_ENTRY] |= BIT32(qloop); } - if (G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] || + if (G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY] || + G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY] || G_sgpe_stop_record.group.quad[VECTOR_ENTRY]) { PK_TRACE_DBG("Actual: clv[%d][%d][%d][%d]", @@ -150,8 +145,6 @@ p9_sgpe_stop_entry() } } - G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY] &= - G_sgpe_stop_record.group.ex_b[VECTOR_CONFIG]; G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY] &= G_sgpe_stop_record.group.ex_l[VECTOR_CONFIG]; G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY] &= @@ -159,8 +152,7 @@ p9_sgpe_stop_entry() G_sgpe_stop_record.group.quad[VECTOR_ENTRY] &= G_sgpe_stop_record.group.quad[VECTOR_CONFIG]; - PK_TRACE_DBG("Core Entry Vectors: X[%x] X0[%x] X1[%x] Q[%x]", - G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY], + PK_TRACE_DBG("Core Entry Vectors: X0[%x] X1[%x] Q[%x]", G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY], G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY], G_sgpe_stop_record.group.quad[VECTOR_ENTRY]); @@ -181,12 +173,12 @@ p9_sgpe_stop_entry() // the SGPE will halt as the SGPE and PGPE are now out of synchronization. // [This is not a likely error.] - if((G_sgpe_stop_record.wof.update_pgpe & SGPE_IPC_UPDATE_CORE_ENABLED) && + if((G_sgpe_stop_record.wof.update_pgpe & IPC_SGPE_PGPE_UPDATE_CORE_ENABLED) && G_sgpe_stop_record.group.core[VECTOR_ENTRY]) { PK_TRACE_INF("SEIPC: Update PGPE with Active Cores"); - G_sgpe_ipcmsg_update_cores.fields.update_type = SGPE_IPC_UPDATE_TYPE_ENTRY; - G_sgpe_ipcmsg_update_cores.fields.return_code = SGPE_IPC_RETURN_CODE_NULL; + G_sgpe_ipcmsg_update_cores.fields.update_type = UPDATE_ACTIVE_TYPE_ENTRY; + G_sgpe_ipcmsg_update_cores.fields.return_code = IPC_SGPE_PGPE_RC_NULL; G_sgpe_ipcmsg_update_cores.fields.active_cores = (G_sgpe_stop_record.group.core[VECTOR_ENTRY] >> SHIFT32(5)); @@ -206,9 +198,9 @@ p9_sgpe_stop_entry() // can poll right away since pgpe should ack right back PK_TRACE_INF("SEIPC: Poll PGPE Update Active Cores Ack"); - while (G_sgpe_ipcmsg_update_cores.fields.return_code == SGPE_IPC_RETURN_CODE_NULL); + while (G_sgpe_ipcmsg_update_cores.fields.return_code == IPC_SGPE_PGPE_RC_NULL); - if (G_sgpe_ipcmsg_update_cores.fields.return_code != SGPE_IPC_RETURN_CODE_ACK) + if (G_sgpe_ipcmsg_update_cores.fields.return_code != IPC_SGPE_PGPE_RC_SUCCESS) { PK_TRACE_ERR("ERROR: Entry Updates PGPE with Active Cores Bad RC. HALT SGPE!"); PK_PANIC(SGPE_STOP_ENTRY_IPC_CORE_BAD_RC); @@ -238,8 +230,8 @@ p9_sgpe_stop_entry() //=============================== PK_TRACE_INF("SEIPC: Message PGPE to Suspend Pstate(stop11 and pstate enabled)"); - G_sgpe_ipcmsg_suspend_pstate.fields.update_type = SGPE_IPC_UPDATE_TYPE_ENTRY; - G_sgpe_ipcmsg_suspend_pstate.fields.return_code = SGPE_IPC_RETURN_CODE_NULL; + G_sgpe_ipcmsg_suspend_pstate.fields.update_type = UPDATE_ACTIVE_TYPE_ENTRY; + G_sgpe_ipcmsg_suspend_pstate.fields.return_code = IPC_SGPE_PGPE_RC_NULL; G_sgpe_ipcmsg_suspend_pstate.fields.requested_quads = (G_sgpe_stop_record.group.quad[VECTOR_ENTRY] >> SHIFT32(5)); @@ -261,13 +253,14 @@ p9_sgpe_stop_entry() PK_TRACE_INF("SEIPC: Pend PGPE Suspend Pstate Ack"); pk_semaphore_pend(&(G_sgpe_stop_record.sem[2]), PK_WAIT_FOREVER); - if (G_sgpe_ipcmsg_suspend_pstate.fields.return_code != SGPE_IPC_RETURN_CODE_ACK) + if (G_sgpe_ipcmsg_suspend_pstate.fields.return_code != IPC_SGPE_PGPE_RC_SUCCESS) { PK_TRACE_ERR("ERROR: Entry Suspend PGPE Pstate Function Bad RC. HALT SGPE!"); PK_PANIC(SGPE_STOP_ENTRY_IPC_PSTATE_BAD_RC); } } - else if (!G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY]) + else if ((!G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY]) && + (!G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY])) { //============================ MARK_TAG(SE_LESSTHAN8_DONE, 0) @@ -279,12 +272,22 @@ p9_sgpe_stop_entry() // only stop 8 sets x_in - for(xentry = G_sgpe_stop_record.group.ex_b[VECTOR_ENTRY], qloop = 0; - xentry > 0; - xentry = xentry << 2, qloop++) + for(qloop = 0; qloop < MAX_QUADS; qloop++) { // if this ex is not up to entry, skip - if (!(ex = ((xentry & BITS32(0, 2)) >> SHIFT32(1)))) + ex = 0; + + if (G_sgpe_stop_record.group.ex_l[VECTOR_ENTRY] & BIT32(qloop)) + { + ex |= FST_EX_IN_QUAD; + } + + if (G_sgpe_stop_record.group.ex_r[VECTOR_ENTRY] & BIT32(qloop)) + { + ex |= SND_EX_IN_QUAD; + } + + if (!ex) { continue; } @@ -556,12 +559,10 @@ p9_sgpe_stop_entry() - for(qentry = G_sgpe_stop_record.group.quad[VECTOR_ENTRY], qloop = 0, ex = 0; - qentry > 0; - qentry = qentry << 1, qloop++, ex = 0) + for(qloop = 0; qloop < MAX_QUADS; qloop++) { // if this quad is not up to entry, skip - if (!(qentry & BIT32(0))) + if (!(G_sgpe_stop_record.group.quad[VECTOR_ENTRY] & BIT32(qloop))) { continue; } @@ -570,6 +571,8 @@ p9_sgpe_stop_entry() PK_TRACE("+++++ +++++ QUAD STOP ENTRY [LEVEL 11-15] +++++ +++++"); // ------------------------------------------------------------------------ + ex = 0; + if (G_sgpe_stop_record.group.ex_l[VECTOR_CONFIG] & BIT32(qloop)) { ex |= FST_EX_IN_QUAD; @@ -1186,8 +1189,8 @@ p9_sgpe_stop_entry() G_sgpe_ipcmsg_update_quads.fields.requested_quads = G_sgpe_stop_record.group.quad[VECTOR_ENTRY] >> SHIFT32(5); - G_sgpe_ipcmsg_update_quads.fields.update_type = SGPE_IPC_UPDATE_TYPE_ENTRY; - G_sgpe_ipcmsg_update_quads.fields.return_code = SGPE_IPC_RETURN_CODE_NULL; + G_sgpe_ipcmsg_update_quads.fields.update_type = UPDATE_ACTIVE_TYPE_ENTRY; + G_sgpe_ipcmsg_update_quads.fields.return_code = IPC_SGPE_PGPE_RC_NULL; G_sgpe_ipccmd_to_pgpe.cmd_data = &G_sgpe_ipcmsg_update_quads; ipc_init_msg(&G_sgpe_ipccmd_to_pgpe.cmd, @@ -1205,7 +1208,7 @@ p9_sgpe_stop_entry() PK_TRACE_INF("SEIPC: Pend PGPE Update Active Quads Ack"); pk_semaphore_pend(&(G_sgpe_stop_record.sem[2]), PK_WAIT_FOREVER); - if (G_sgpe_ipcmsg_update_quads.fields.return_code != SGPE_IPC_RETURN_CODE_ACK) + if (G_sgpe_ipcmsg_update_quads.fields.return_code != IPC_SGPE_PGPE_RC_SUCCESS) { PK_TRACE_INF("ERROR: Entry Updates PGPE with Active Quads Bad RC. HALT SGPE!"); PK_PANIC(SGPE_STOP_ENTRY_IPC_QUAD_BAD_RC); |

