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| author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2017-03-21 04:57:38 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:28:33 -0500 |
| commit | 47a91e1bb2425b14f9d7738f578c8bcd977579b4 (patch) | |
| tree | 845ec5c8808b12b4e5ed749a8a5850d2df17ce8b | |
| parent | 1cb71970757485d2331c643e3f22631f5266647e (diff) | |
| download | talos-hcode-47a91e1bb2425b14f9d7738f578c8bcd977579b4.tar.gz talos-hcode-47a91e1bb2425b14f9d7738f578c8bcd977579b4.zip | |
WOF: VRM timing, WOF and VDM enblement attributes additions
Change-Id: I1ff55edf512f1a3ec4b6b1c1773726e31ae2e611
RTC:169800
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38207
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
4 files changed, 18 insertions, 5 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H index 5c495e8f..73615128 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H +++ b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H @@ -364,7 +364,8 @@ HCD_CONST(CME_QUEUED_SCAN_DISABLE_BIT_POS, 0x00000002) HCD_CONST(CME_SKIP_CORE_POWEROFF_BIT_POS, 0x00000001) HCD_CONST(CME_QM_FLAG_RESCLK_ENABLE, 0x8000) HCD_CONST(CME_QM_FLAG_SYS_IVRM_ENABLE, 0x4000) -HCD_CONST(CME_QM_FLAG_SYS_WOF_ENABLE, 0x2000) +HCD_CONST(CME_QM_FLAG_SYS_VDM_ENABLE, 0x2000) +HCD_CONST(CME_QM_FLAG_SYS_WOF_ENABLE, 0x1000) /// CME Hcode @@ -399,6 +400,7 @@ HCD_CONST(CPMR_DEBUG_REGION_OFFSET, CPMR_TRACE_REGION_OFFSET + CPMR_ HCD_CONST(CPMR_DEBUG_REGION_SIZE, (64 * ONE_KB)) // 192K + 64K = 256K + //--------------------------------------------------------------------------------------- /// PPMR Header diff --git a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h index d560fd24..99c990ee 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h @@ -149,9 +149,17 @@ typedef union pgpe_flags uint16_t dpll_droop_protect_enable : 1; uint16_t reserved7 : 1; uint16_t occ_ipc_immed_response : 1; - uint16_t reserved_9_15 : 7; + uint16_t wof_ipc_immed_response : 1; + uint16_t enable_fratio : 1; + uint16_t enable_vratio : 1; + uint16_t vratio_modifier : 1; + uint16_t reserved_13_15 : 7; #else - uint16_t reserved_9_15 : 7; + uint16_t reserved_13_15 : 7; + uint16_t vratio_modifier : 1; + uint16_t enable_vratio : 1; + uint16_t enable_fratio : 1; + uint16_t wof_ipc_immed_response : 1; uint16_t occ_ipc_immed_response : 1; uint16_t reserved7 : 1; uint16_t dpll_droop_protect_enable : 1; diff --git a/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h b/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h index 888445a9..87e4fa63 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h @@ -418,7 +418,7 @@ typedef struct __attribute__((__packed__)) WofTablesHeader typedef struct __attribute__((__packed__)) HomerSysVFRTLayout { VFRTHeaderLayout_t vfrtHeader; - uint8_t vfrt_data[VFRT_VRATIO_SIZE][VFRT_FRATIO_SIZE]; + uint8_t vfrt_data[VFRT_FRATIO_SIZE][VFRT_VRATIO_SIZE]; } HomerSysVFRTLayout_t; @@ -427,7 +427,7 @@ typedef struct __attribute__((__packed__)) HomerSysVFRTLayout typedef struct __attribute__((__packed__)) HomerVFRTLayout { VFRTHeaderLayout_t vfrtHeader; - uint8_t vfrt_data[VFRT_VRATIO_SIZE][VFRT_FRATIO_SIZE]; + uint8_t vfrt_data[VFRT_FRATIO_SIZE][VFRT_VRATIO_SIZE]; uint8_t padding[128]; } HomerVFRTLayout_t; diff --git a/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h b/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h index cd5895c0..eb1b0317 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h @@ -244,6 +244,9 @@ typedef struct /// All operating points VpdOperatingPoint operating_points_set[NUM_VPD_PTS_SET][VPD_PV_POINTS]; + //DPLL pstate 0 value + uint32_t dpll_pstate0_value; + // @todo DPLL Droop Settings. These need communication to SGPE for STOP } GlobalPstateParmBlock; |
