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| author | Joe McGill <jmcgill@us.ibm.com> | 2017-03-02 09:47:11 -0600 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:18:58 -0500 |
| commit | 455c286759455f04a77ec8847674fb676daa88b3 (patch) | |
| tree | 178941bb64f12dccebd154c69b07d1fc82271d09 | |
| parent | 312ef3702c9e9c4e332b586e19bbf097a16efc1d (diff) | |
| download | talos-hcode-455c286759455f04a77ec8847674fb676daa88b3.tar.gz talos-hcode-455c286759455f04a77ec8847674fb676daa88b3.zip | |
update DPLL and IVRM inits
create new EQ analog specific scan initfile
shift application of eq_ana_func ring from cache_initf->cache_dpll_initf
adjust DPLL FF slew rate
add EC feature attributes for DD1 controls
Change-Id: I0000927e946f59e29f312dc9d5b5155676bb5d3c
RTC: 170960
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37370
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
| -rwxr-xr-x | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_dpll_initf.C | 3 | ||||
| -rwxr-xr-x | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_dpll_initf.C b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_dpll_initf.C index 854aff03..5fb0c021 100755 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_dpll_initf.C +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_dpll_initf.C @@ -42,6 +42,9 @@ extern "C" int p9_hcd_cache_dpll_initf(uint32_t quad) FAPI_DBG("Scan eq_dpll_func ring"); FAPI_TRY(fapi2::putRing(l_eqTarget, eq_dpll_func)); + FAPI_DBG("Scan eq_ana_func ring"); + FAPI_TRY(fapi2::putRing(l_eqTarget, eq_ana_func)); + // Markers needed for cache ininf fapi_try_exit: FAPI_INF("<<p9_hcd_cache_dpll_initf"); diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C index 46324f52..4388cbd9 100755 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C @@ -42,8 +42,6 @@ extern "C" int p9_hcd_cache_initf(uint32_t quad) FAPI_DBG("Scan eq_fure ring"); FAPI_TRY(fapi2::putRing(l_eqTarget, eq_fure)); - FAPI_DBG("Scan eq_ana_func ring"); - FAPI_TRY(fapi2::putRing(l_eqTarget, eq_ana_func)); for (auto l_ex_target : l_eqTarget.getChildren<fapi2::TARGET_TYPE_EX>()) { |
