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| author | Yue Du <daviddu@us.ibm.com> | 2017-03-24 14:08:02 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-08-22 17:54:34 -0500 |
| commit | 2f993351fce406c803f2e1bcc70e7c55fdfc49cb (patch) | |
| tree | 5459c38db59c77bdacd7126a0efcc6314133e457 | |
| parent | 397e4a685a0a153e2ebeadd565ff9142215eae77 (diff) | |
| download | talos-hcode-2f993351fce406c803f2e1bcc70e7c55fdfc49cb.tar.gz talos-hcode-2f993351fce406c803f2e1bcc70e7c55fdfc49cb.zip | |
STOP: writing all 1s to lpid of each thread regardless fuse or not
Change-Id: Id73f59173107e99d8637c58310a958526ea9b9df
Original-Change-Id: I9b38af86e1d11167137d4c6a64a1229eb9ab4f59
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38423
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
| -rwxr-xr-x | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c | 46 |
1 files changed, 43 insertions, 3 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c index 9be3f7ab..ea0ae211 100755 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c @@ -504,7 +504,20 @@ p9_cme_stop_entry() if (core & CME_MASK_C0) { lpid_c0[thread] = ram_read_lpid(CME_MASK_C0, thread); - PK_TRACE("c0lpid %X thread %X", (uint32_t) lpid_c0[thread], thread); + PKTRACE("c0lpid %X thread %X", (uint32_t) lpid_c0[thread], thread); + } + + if (core & CME_MASK_C1) + { + lpid_c1[thread] = ram_read_lpid(CME_MASK_C1, thread); + PKTRACE("c1lpid %X thread %X", (uint32_t) lpid_c1[thread], thread); + } + } + + for (thread = 0; thread < 4; thread++ ) + { + if (core & CME_MASK_C0) + { ram_write_lpid(CME_MASK_C0, thread, POWMAN_RESERVED_LPID); #if HW402407_PARANOID_LPID_MODE @@ -520,8 +533,6 @@ p9_cme_stop_entry() if (core & CME_MASK_C1) { - lpid_c1[thread] = ram_read_lpid(CME_MASK_C1, thread); - PK_TRACE("c1lpid %X thread %X", (uint32_t) lpid_c1[thread], thread); ram_write_lpid(CME_MASK_C1, thread, POWMAN_RESERVED_LPID); #if HW402407_PARANOID_LPID_MODE @@ -629,6 +640,35 @@ p9_cme_stop_entry() PK_TRACE("Clear SCAN_REGION_TYPE prior to stop core clocks"); CME_PUTSCOM(C_SCAN_REGION_TYPE, core, 0); +#if NIMBUS_DD_LEVEL == 1 + + // NDD1: Core Global Xstop FIR + if (core & CME_MASK_C0) + { + CME_GETSCOM(0x20040000, CME_MASK_C0, CME_SCOM_AND, scom_data.value); + + if (scom_data.value) + { + PK_TRACE_INF("ERROR: Core[%d] GLOBAL XSTOP[%x] DETECTED. HALT CME!", + core, scom_data.words.upper); + pk_halt(); + } + } + + if (core & CME_MASK_C1) + { + CME_GETSCOM(0x20040000, CME_MASK_C1, CME_SCOM_AND, scom_data.value); + + if (scom_data.value) + { + PK_TRACE_INF("ERROR: Core[%d] GLOBAL XSTOP[%x] DETECTED. HALT CME!", + core, scom_data.words.upper); + pk_halt(); + } + } + +#endif + PK_TRACE("Stop Core Clocks via CLK_REGION"); CME_PUTSCOM(C_CLK_REGION, core, (CLK_STOP_CMD | CLK_REGION_ALL_BUT_PLL | CLK_THOLD_ALL)); |

