diff options
| author | Rahul Batra <rbatra@us.ibm.com> | 2019-01-15 16:39:46 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2019-06-14 10:53:14 -0500 |
| commit | 2def3a70b164ef035b8a616a39d8597a22ab021f (patch) | |
| tree | a3a66665647f34205dd0e33c260f9ef6413e6ecc | |
| parent | e9c438bf807bc6cc5fc734f35b4bf510e28a473a (diff) | |
| download | talos-hcode-2def3a70b164ef035b8a616a39d8597a22ab021f.tar.gz talos-hcode-2def3a70b164ef035b8a616a39d8597a22ab021f.zip | |
PM: WOV(OCS) HW Procedures Changes (1/2)
1st commit in the series of 2 commits for WOV(Over Current
Sampling, OCS)
Commit 1: WOV(OCS) HW procedures updates
Commit 2: WOV(OCS) PGPE Hcode updates
Key_Cronus_Test=PM_REGRESS
HW-Image-Prereq: Ieabbc383d2bbbd1df8cf5a2ed5b503c860518cd8
Change-Id: I6234f0f60b9ed57b8b144159f3fe9c0b756df1e3
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70513
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
5 files changed, 27 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H index eeae5161..69acacb0 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H +++ b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H @@ -374,8 +374,10 @@ HCD_HDR_UINT32(g_wof_table_length, 0 ); // WOF Table length HCD_HDR_UINT32(g_pgpe_core_throttle_assert_cnt, 0 ); // Core throttle assert count HCD_HDR_UINT32(g_pgpe_core_throttle_deassert_cnt, 0 ); // Core throttle de-aasert count HCD_HDR_UINT32(g_pgpe_aux_controls, 0 ); // Auxiliary Controls +HCD_HDR_UINT32(g_pgpe_optrace_pointer, 0 ); // Operational Trace OCC SRAM Pointer HCD_HDR_UINT32(g_pgpe_doptrace_offset, 0 ); // Deep Operational Trace Main Memory Buffer Offset HCD_HDR_UINT32(g_pgpe_doptrace_length, 0 ); // Deep Opeartional Trace Main Memory Buffer Length +HCD_HDR_UINT32(g_pgpe_wof_values_address, 0 ); // SRAM address where PGPE Produced WOF values are located #ifdef __ASSEMBLER__ .endm #else diff --git a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h index 13509e17..fcc74dbd 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HCODE Project */ /* */ -/* COPYRIGHT 2015,2018 */ +/* COPYRIGHT 2015,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -65,6 +65,7 @@ enum PM_GPE_OCCFLG_DEFS PIB_I2C_MASTER_ENGINE_2_LOCK_BIT1 = 19, //BIT0 ored BIT1 gives the field PIB_I2C_MASTER_ENGINE_3_LOCK_BIT0 = 20, //BIT0 ored BIT1 gives the field PIB_I2C_MASTER_ENGINE_3_LOCK_BIT1 = 21, //BIT0 ored BIT1 gives the field + PGPE_OCS_DIRTY = 26, PGPE_PM_RESET_SUPPRESS = 27, WOF_HCODE_MODE_BIT0 = 28, WOF_HCODE_MODE_BIT1 = 29, @@ -77,6 +78,7 @@ enum PM_GPE_OCCFLG2_DEFS { OCCFLG2_DEAD_CORES_START = 0, OCCFLG2_DEAD_CORES_LENGTH = 24, + OCCFLG2_ENABLE_PRODUCE_WOF_VALUES = 24, OCCFLG2_PGPE_HCODE_FIT_ERR_INJ = 27, PM_CALLOUT_ACTIVE = 28, STOP_RECOVERY_TRIGGER_ENABLE = 29, diff --git a/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h b/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h index f97ea82f..5d3c1dbe 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h @@ -240,6 +240,21 @@ typedef struct } SysPowerDistParms; +/// AVSBUS Topology +/// +/// AVS Bus and Rail numbers for VDD, VDN, VCS, and VIO +/// +typedef struct +{ + uint8_t vdd_avsbus_num; + uint8_t vdd_avsbus_rail; + uint8_t vdn_avsbus_num; + uint8_t vdn_avsbus_rail; + uint8_t vcs_avsbus_num; + uint8_t vcs_avsbus_rail; + uint8_t vio_avsbus_num; + uint8_t vio_avsbus_rail; +} AvsBusTopology_t; // // WOF Voltage, Frequency Ratio Tables diff --git a/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h b/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h index 086776e3..053f6d95 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HCODE Project */ /* */ -/* COPYRIGHT 2015,2018 */ +/* COPYRIGHT 2015,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -205,6 +205,8 @@ typedef struct // AC tdp vdd nominal uint16_t lac_tdp_vdd_nominal_10ma; + AvsBusTopology_t avs_bus_topology; + } __attribute__((aligned(128))) OCCPstateParmBlock; #ifdef __cplusplus diff --git a/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h b/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h index ebddeaed..93972404 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h @@ -350,6 +350,10 @@ typedef struct //Jump-value slopes int16_t PsVDMJumpSlopes[VPD_NUM_SLOPES_REGION][NUM_JUMP_VALUES]; + uint8_t pad2[2]; + + //AvsBusTopology + AvsBusTopology_t avs_bus_topology; // @todo DPLL Droop Settings. These need communication to SGPE for STOP |
