diff options
| author | Rahul Batra <rbatra@us.ibm.com> | 2017-04-17 22:35:45 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:25:55 -0500 |
| commit | 245c3072cc60db99dd75709a07c1f415e078ab45 (patch) | |
| tree | 9bf217a5c5c4502f1c44b25665512a37a4723f76 | |
| parent | 12a2ea3e078bd34092cc818707fa7dcc7b4ee6f1 (diff) | |
| download | talos-hcode-245c3072cc60db99dd75709a07c1f415e078ab45.tar.gz talos-hcode-245c3072cc60db99dd75709a07c1f415e078ab45.zip | |
PGPE: OCC Heartbeat Disabled during PGPE Init
Change-Id: Ibadbac01c0d761a8ba3936a5a0bb37157fccf88d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39368
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c index 27e34e17..9072d28b 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c @@ -35,24 +35,28 @@ extern PgpePstateRecord G_pgpe_pstate_record; // //OCB Error Interrupt Handler // -#define OCC_HB_ERROR 4 +#define OCC_HB_ERROR_FIR 4 void p9_pgpe_ocb_hb_error_init() { PK_TRACE_DBG("OCC HB: Enter\n"); uint64_t firact; + //Set up OCB_HB loss FIR bit to generate interrupt GPE_GETSCOM(OCB_OCCLFIRACT0, firact); - firact |= BIT64(OCC_HB_ERROR); + firact |= BIT64(OCC_HB_ERROR_FIR); GPE_PUTSCOM(OCB_OCCLFIRACT0, firact); GPE_GETSCOM(OCB_OCCLFIRACT1, firact); - firact &= ~BIT64(OCC_HB_ERROR); + firact &= ~BIT64(OCC_HB_ERROR_FIR); GPE_PUTSCOM(OCB_OCCLFIRACT1, firact); - GPE_PUTSCOM(OCB_OCCLFIRMASK_AND, ~BIT64(OCC_HB_ERROR)); + GPE_PUTSCOM(OCB_OCCLFIRMASK_AND, ~BIT64(OCC_HB_ERROR_FIR)); - out32(OCB_OIMR0_CLR, BIT32(OCC_HB_ERROR)); + out64(OCB_OCCHBR, 0); //Clear and Disable OCC Heartbeat Register + GPE_PUTSCOM(OCB_OCCLFIR_AND, ~BIT64(OCC_HB_ERROR_FIR)); + out32(OCB_OISR0_CLR, BIT32(2));//Clear any pending interrupts + out32(OCB_OIMR0_CLR, BIT32(2));//Unmask interrupt PK_TRACE_DBG("OCC HB: Exit\n"); } @@ -73,6 +77,7 @@ void p9_pgpe_irq_handler_occ_error(void* arg, PkIrqId irq) //If OCB_LFIR[occ_hb_error] if (fir.fields.occ_hb_error == 1) { + GPE_PUTSCOM(OCB_OCCLFIR_AND, ~BIT64(OCC_HB_ERROR_FIR)); p9_pgpe_pstate_pm_complex_suspend(); } else |

