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| author | Rahul Batra <rbatra@us.ibm.com> | 2017-09-22 19:38:52 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 19:24:00 -0500 |
| commit | 1faad3a5ca8a28c311a85ccafae4159e5a52afe1 (patch) | |
| tree | ecd8827c384b2c5fe12036569b2ed1c9fc1f8250 | |
| parent | f70fda49d8410eeb8cec6ededa1970cd1cb5ec09 (diff) | |
| download | talos-hcode-1faad3a5ca8a28c311a85ccafae4159e5a52afe1.tar.gz talos-hcode-1faad3a5ca8a28c311a85ccafae4159e5a52afe1.zip | |
PGPE: Roundoff Error Fix
Change-Id: I4b1f6c6bfe762f336978d2df6a4fc23f638ae7e2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46653
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c | 13 | ||||
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c | 22 |
2 files changed, 31 insertions, 4 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c index c4d90d54..03db491e 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c @@ -66,9 +66,12 @@ uint32_t p9_pgpe_gppb_intp_vdd_from_ps(Pstate ps, uint8_t vpd_pt_set) uint32_t vdd; uint8_t r = p9_pgpe_gppb_get_ps_region(ps, vpd_pt_set); + //Round-up by adding 1/2 vdd = (((G_gppb->PStateVSlopes[vpd_pt_set][r]) * - (-ps + G_gppb->operating_points_set[vpd_pt_set][r].pstate)) >> VID_SLOPE_FP_SHIFT_12) - + G_gppb->operating_points_set[vpd_pt_set][r].vdd_mv; + (-ps + G_gppb->operating_points_set[vpd_pt_set][r].pstate)) >> (VID_SLOPE_FP_SHIFT_12 - 1)) + + (G_gppb->operating_points_set[vpd_pt_set][r].vdd_mv << 1) + 1; + + vdd = vdd >> 1; //Shift back return vdd; } @@ -106,9 +109,11 @@ uint8_t p9_pgpe_gppb_intp_ps_from_ext_vdd(uint16_t ext_vdd) Pstate ps; uint8_t r = p9_pgpe_gppb_get_ext_vdd_region(ext_vdd); + //Do the math using shifted by 1. ps = -(((G_gppb->VPStateSlopes[VPD_PT_SET_BIASED_SYSP][r]) * - (ext_vdd - G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][r].vdd_mv)) >> VID_SLOPE_FP_SHIFT_12) - + G_gppb->operating_points_set[VPD_SLOPES_BIASED][r].pstate; + (ext_vdd - G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][r].vdd_mv)) >> (VID_SLOPE_FP_SHIFT_12 - 1)) + + (G_gppb->operating_points_set[VPD_SLOPES_BIASED][r].pstate << 1) ; + ps = ps >> 1;//Shift it back return ps; } diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c index 3b29f726..1c817786 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c @@ -1219,6 +1219,17 @@ void p9_pgpe_pstate_do_step() G_pgpe_pstate_record.eVidNext = G_pgpe_pstate_record.eVidCurr - G_gppb->ext_vrm_step_size_mv; G_pgpe_pstate_record.globalPSNext = p9_pgpe_gppb_intp_ps_from_ext_vdd(G_pgpe_pstate_record.eVidNext); + //It's possible that the interpolation function returns Pstate higher than + //target due to rounding errors, so we adjust back. + if (G_pgpe_pstate_record.globalPSNext > G_pgpe_pstate_record.globalPSTarget) + { + G_pgpe_pstate_record.globalPSNext = G_pgpe_pstate_record.globalPSTarget; + } + + //Make sure voltage written corresponds exactly to a pstate + G_pgpe_pstate_record.eVidNext = p9_pgpe_gppb_intp_vdd_from_ps(G_pgpe_pstate_record.globalPSNext, + VPD_PT_SET_BIASED_SYSP); + for (q = 0; q < MAX_QUADS; q++) { if(G_pgpe_pstate_record.activeQuads & QUAD_MASK(q)) @@ -1261,6 +1272,17 @@ void p9_pgpe_pstate_do_step() G_pgpe_pstate_record.eVidNext = G_pgpe_pstate_record.eVidCurr + G_gppb->ext_vrm_step_size_mv; G_pgpe_pstate_record.globalPSNext = p9_pgpe_gppb_intp_ps_from_ext_vdd(G_pgpe_pstate_record.eVidNext); + //It's possible that the interpolation function returns Pstate lower than + //target due to rounding errors, so we adjust back. + if (G_pgpe_pstate_record.globalPSNext < G_pgpe_pstate_record.globalPSTarget) + { + G_pgpe_pstate_record.globalPSNext = G_pgpe_pstate_record.globalPSTarget; + } + + //Make sure voltage written corresponds exactly to a pstate + G_pgpe_pstate_record.eVidNext = p9_pgpe_gppb_intp_vdd_from_ps(G_pgpe_pstate_record.globalPSNext, + VPD_PT_SET_BIASED_SYSP); + for (q = 0; q < MAX_QUADS; q++) { if(G_pgpe_pstate_record.activeQuads & QUAD_MASK(q)) |
