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authorYue Du <daviddu@us.ibm.com>2017-11-14 10:17:03 -0600
committerJoshua Hunsberger <jahunsbe@us.ibm.com>2018-02-01 15:37:53 -0600
commit1774e34585ea995d62da61bdb230ccd1e77ad321 (patch)
treeadb2e0296d17fd3101f78d90b0e9806a7b96e50c
parentb5aa9f87baa929bf38960e5fa03ea28a937fe544 (diff)
downloadtalos-hcode-1774e34585ea995d62da61bdb230ccd1e77ad321.tar.gz
talos-hcode-1774e34585ea995d62da61bdb230ccd1e77ad321.zip
STOP: Fix Block Stop
Key_Cronus_Test=PM_REGRESS Change-Id: If634a57c8dd1746b039f2acf223e871e40867f8f CQ: SW409419 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49657 Dev-Ready: YUE DU <daviddu@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
-rw-r--r--import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_init.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_init.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_init.c
index 6adf5e79..7e19ac73 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_init.c
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_init.c
@@ -602,13 +602,13 @@ p9_sgpe_stop_init()
out32(GPE_GPE3TSEL, BIT32(4));
ppe42_fit_setup((PkIrqHandler)p9_sgpe_fit_handler, 0);
- PK_TRACE_INF("Setup: Clear and Unmask Type 2/3/6 Interrupt");
- out32(OCB_OISR1_CLR, (BITS32(15, 2) | BITS32(18, 2)));
+ PK_TRACE_INF("Setup: Clear and Unmask Type 2,3,5,6 and ipi_lo_3 interrupts");
+ out32(OCB_OISR1_CLR, (BITS32(15, 2) | BITS32(18, 2) | BIT32(29)));
out32(OCB_OPITNPRA_CLR(2), BITS32(0, 24));
out32(OCB_OPITNPRA_CLR(3), BITS32(0, 24));
out32(OCB_OPITNPRA_CLR(5), BITS32(0, 24));
out32(OCB_OPIT6PRB_CLR, BITS32(0, 6));
- out32(OCB_OIMR1_CLR, (BITS32(15, 2) | BITS32(18, 2)));
+ out32(OCB_OIMR1_CLR, (BITS32(15, 2) | BITS32(18, 2) | BIT32(29)));
//--------------------------------------------------------------------------
// SGPE Init Completed
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