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authorYue Du <daviddu@us.ibm.com>2017-04-13 20:41:43 -0500
committerJoshua Hunsberger <jahunsbe@us.ibm.com>2017-10-23 17:26:52 -0500
commit11ae96a208f1dc5a7f935b4f1ef0af695dfc9c86 (patch)
treeb45eb9f7fb416bd45d8fc6c9c0d0d6a65d84dcca
parent3f6f2283d81ce471dc9a58a72393933294684c28 (diff)
downloadtalos-hcode-11ae96a208f1dc5a7f935b4f1ef0af695dfc9c86.tar.gz
talos-hcode-11ae96a208f1dc5a7f935b4f1ef0af695dfc9c86.zip
STOP: Add global checkstop FIR check in CME/SGPE
Change-Id: Ic3559a9c9ee697e44bcef283acb806dbdffbd5fc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39243 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/cme_panic_codes.h38
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h1
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_startclocks.c14
-rw-r--r--import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_startclocks.c14
-rw-r--r--import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h1
-rw-r--r--import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/sgpe_panic_codes.h30
6 files changed, 62 insertions, 36 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/cme_panic_codes.h b/import/chips/p9/procedures/ppe_closed/cme/cme_panic_codes.h
index aa8faab5..c490d9db 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/cme_panic_codes.h
+++ b/import/chips/p9/procedures/ppe_closed/cme/cme_panic_codes.h
@@ -42,7 +42,7 @@
// The following are reserved for instance specific use.
-CME_UIH_DISABLED_NOT_LAST_LVL = 0x1c00,
+CME_UIH_DISABLED_NOT_LAST_LVL = 0x1c00, // Setup or Common Error
CME_UIH_NOT_ALL_IN_PRTY_GROUP = 0x1c01,
CME_UIH_EIMR_STACK_UNDERFLOW = 0x1c02,
CME_UIH_EIMR_STACK_OVERFLOW = 0x1c03,
@@ -50,25 +50,25 @@ CME_UIH_PHANTOM_INTERRUPT = 0x1c04,
CME_STOP_NO_PARTIAL_GOOD_CORE = 0x1c05,
CME_STOP_PUTRING_HEADER_ERROR = 0x1c06,
CME_STOP_BCE_CORE_RING_FAILED = 0x1c07,
-CME_STOP_EXIT_PHANTOM_WAKEUP = 0x1c08,
-CME_STOP_EXIT_BCE_SCOM_FAILED = 0x1c09,
-CME_STOP_EXIT_SELF_RES_SPATTN = 0x1c0a,
-CME_STOP_EXIT_STARTCLK_FAILED = 0x1c0d,
-CME_STOP_ENTRY_STOPCLK_FAILED = 0x1c1c,
-CME_STOP_ENTRY_XSTOP_ERROR = 0x1c1d,
-CME_STOP_ENTRY_WITH_AUTO_NAP = 0x1c1e, // NDD1
-CME_STOP_ENTRY_BAD_LPID_ERROR = 0x1c1f, // NDD1
+//_UNUSED_1c08 = 0x1c08,
+//_UNUSED_1c09 = 0x1c09,
+//_UNUSED_1c0a = 0x1c0a,
+//_UNUSED_1c0d = 0x1c0d,
+//_UNUSED_1c1c = 0x1c1c,
+//_UNUSED_1c1d = 0x1c1d,
+//_UNUSED_1c1e = 0x1c1e,
+//_UNUSED_1c1f = 0x1c1f,
//
-//_UNUSED_1d00 = 0x1d00,
-//_UNUSED_1d01 = 0x1d01,
-//_UNUSED_1d02 = 0x1d02,
-//_UNUSED_1d03 = 0x1d03,
-//_UNUSED_1d04 = 0x1d04,
+CME_STOP_EXIT_PHANTOM_WAKEUP = 0x1d00, // Stop Error
+CME_STOP_EXIT_BCE_SCOM_FAILED = 0x1d01,
+CME_STOP_EXIT_SELF_RES_SPATTN = 0x1d02,
+CME_STOP_EXIT_STARTCLK_FAILED = 0x1d03,
+CME_STOP_EXIT_XSTOP_ERROR = 0x1d04,
//_UNUSED_1d05 = 0x1d05,
//_UNUSED_1d06 = 0x1d06,
//_UNUSED_1d07 = 0x1d07,
-//_UNUSED_1d08 = 0x1d08,
-//_UNUSED_1d09 = 0x1d09,
+CME_STOP_ENTRY_STOPCLK_FAILED = 0x1d08,
+CME_STOP_ENTRY_XSTOP_ERROR = 0x1d09,
//_UNUSED_1d0a = 0x1d0a,
//_UNUSED_1d0d = 0x1d0d,
//_UNUSED_1d1c = 0x1d1c,
@@ -76,7 +76,7 @@ CME_STOP_ENTRY_BAD_LPID_ERROR = 0x1c1f, // NDD1
//_UNUSED_1d1e = 0x1d1e,
//_UNUSED_1d1f = 0x1d1f,
-//_UNUSED_1e00 = 0x1e00,
+//_UNUSED_1e00 = 0x1e00, // Pstate Error
//_UNUSED_1e01 = 0x1e01,
//_UNUSED_1e02 = 0x1e02,
//_UNUSED_1e03 = 0x1e03,
@@ -93,8 +93,8 @@ CME_STOP_ENTRY_BAD_LPID_ERROR = 0x1c1f, // NDD1
//_UNUSED_1e1e = 0x1e1e,
//_UNUSED_1e1f = 0x1e1f,
-//_UNUSED_1f00 = 0x1f00,
-//_UNUSED_1f01 = 0x1f01,
+CME_STOP_ENTRY_WITH_AUTO_NAP = 0x1f00, // NDD1
+CME_STOP_ENTRY_BAD_LPID_ERROR = 0x1f01, // NDD1
//_UNUSED_1f02 = 0x1f02,
//_UNUSED_1f03 = 0x1f03,
//_UNUSED_1f04 = 0x1f04,
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h
index d5ed4b75..c8974f04 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop.h
@@ -107,6 +107,7 @@
#define C_CLOCK_STAT_NSL 0x20030009
#define C_CLOCK_STAT_ARY 0x2003000a
#define C_BIST 0x2003000B
+#define C_XFIR 0x20040000
#define C_THERM_MODE_REG 0x2005000F
#define C_SLAVE_CONFIG_REG 0x200F001E
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_startclocks.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_startclocks.c
index 4504ecf9..2464bc09 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_startclocks.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_hcd_core_startclocks.c
@@ -143,7 +143,19 @@ p9_hcd_core_startclocks(uint32_t core)
PK_TRACE("Drop chiplet fence via NC0INDIR[18]");
CME_PUTSCOM(CPPM_NC0INDIR_CLR, core, BIT64(18));
- /// @todo RTC166917 Check the Global Checkstop FIR
+#if !EPM_P9_TUNING
+
+ PK_TRACE("Check Global Xstop FIR of Core Chiplet");
+ CME_GETSCOM(C_XFIR, core, CME_SCOM_AND, scom_data.value);
+
+ if (scom_data.words.upper & BITS32(0, 27))
+ {
+ PK_TRACE_ERR("Core[%d] Chiplet Global Xstop FIR[%x] Detected. HALT CME!",
+ core, scom_data.words.upper);
+ PK_PANIC(CME_STOP_EXIT_XSTOP_ERROR);
+ }
+
+#endif
PK_TRACE("Drop flushmode_inhibit via CPLT_CTRL0[2]");
CME_PUTSCOM(C_CPLT_CTRL0_CLEAR, core, BIT64(2));
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_startclocks.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_startclocks.c
index 488a5b1e..aac0b30d 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_startclocks.c
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_startclocks.c
@@ -173,7 +173,19 @@ p9_hcd_cache_startclocks(uint32_t quad, uint32_t ex)
// Cleaning up
// -------------------------------
- /// @todo RTC166917 Check the Global Checkstop FIR
+#if !EPM_P9_TUNING
+
+ PK_TRACE("Check Global Xstop FIR of Cache Chiplet");
+ GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(EQ_XFIR, quad), scom_data.value);
+
+ if (scom_data.words.upper & BITS32(0, 27))
+ {
+ PK_TRACE_ERR("Cache[%d] Chiplet Global Xstop FIR[%x] Detected. HALT SGPE!",
+ quad, scom_data.words.upper);
+ PK_PANIC(SGPE_STOP_EXIT_XSTOP_ERROR);
+ }
+
+#endif
#if NIMBUS_DD_LEVEL != 1
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h
index 0392559b..f1ee5dfd 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h
@@ -81,6 +81,7 @@ extern "C" {
#define EQ_CLOCK_STAT_SL 0x10030008
#define EQ_CLOCK_STAT_ARY 0x1003000A
#define EQ_CC_ATOMIC_LOCK 0x100303FF
+#define EQ_XFIR 0x10040000
#define EQ_HOST_ATTN 0x10040009
#define EQ_LOCAL_XSTOP_ERR 0x10040018
#define EQ_THERM_MODE_REG 0x1005000F
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/sgpe_panic_codes.h b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/sgpe_panic_codes.h
index ac480f44..f811ddf1 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/sgpe_panic_codes.h
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/sgpe_panic_codes.h
@@ -22,8 +22,8 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
-#ifndef __CME_PANIC_CODES_H__
-#define __CME_PANIC_CODES_H__
+#ifndef __SGPE_PANIC_CODES_H__
+#define __SGPE_PANIC_CODES_H__
// On PPE42, PANIC codes are stored as part of the trap word instruction.
// tw 31, RA, RB Where RA and RB would used to encode the trap code.
@@ -42,7 +42,7 @@
// The following are reserved for instance specific use.
-SGPE_MAIN_FAPI2_INIT_FAILED = 0x1c00,
+SGPE_MAIN_FAPI2_INIT_FAILED = 0x1c00, // Setup or Common Error
SGPE_UIH_EIMR_STACK_UNDERFLOW = 0x1c01,
SGPE_UIH_EIMR_STACK_OVERFLOW = 0x1c02,
SGPE_UIH_PHANTOM_INTERRUPT = 0x1c03,
@@ -60,7 +60,7 @@ SGPE_PIG_TYPE3_ENTRY_WNS_CME = 0x1c0d,
//_UNUSED_1c1f = 0x1c1f,
-SGPE_STOP_PUTRING_HEADER_ERROR = 0x1d00,
+SGPE_STOP_PUTRING_HEADER_ERROR = 0x1d00, // Stop Exit Error
SGPE_STOP_PUTRING_OPCG_TIMEOUT = 0x1d00,
SGPE_STOP_EXIT_IPC_CORE_FAILED = 0x1d01,
SGPE_STOP_EXIT_IPC_CORE_BAD_RC = 0x1d02,
@@ -71,14 +71,14 @@ SGPE_STOP_EXIT_DROP_SLV_LOCK_FAILED = 0x1d06,
SGPE_STOP_EXIT_DPLL_STARTCLK_FAILED = 0x1d07,
SGPE_STOP_EXIT_L2_STARTCLK_FAILED = 0x1d08,
SGPE_STOP_EXIT_EQ_STARTCLK_FAILED = 0x1d09,
-SGPE_STOP_EXIT_VCS_STOPCLK_FAILED = 0x1d0a, // NDD1
-SGPE_STOP_EXIT_VCS_STARTCLK_FAILED = 0x1d0d, // NDD1
-SGPE_STOP_EXIT_FUSE_SCAN_HEADER_ERR = 0x1d1c, // NDD1
-SGPE_STOP_EXIT_PBRW_SCAN_HEADER_ERR = 0x1d1d, // NDD1
+SGPE_STOP_EXIT_XSTOP_ERROR = 0x1d0a,
+//_UNUSED_1d0d = 0x1d0d,
+//_UNUSED_1d1c = 0x1d1c,
+//_UNUSED_1d1d = 0x1d1d,
//_UNUSED_1d1e = 0x1d1e,
//_UNUSED_1d1f = 0x1d1f,
-SGPE_STOP_ENTRY_IPC_CORE_FAILED = 0x1e00,
+SGPE_STOP_ENTRY_IPC_CORE_FAILED = 0x1e00, // Stop Entry Error
SGPE_STOP_ENTRY_IPC_CORE_BAD_RC = 0x1e01,
SGPE_STOP_ENTRY_IPC_QUAD_FAILED = 0x1e02,
SGPE_STOP_ENTRY_IPC_QUAD_BAD_RC = 0x1e03,
@@ -88,22 +88,22 @@ SGPE_STOP_ENTRY_GET_CLK_LOCK_FAILED = 0x1e06,
SGPE_STOP_ENTRY_GET_SLV_LOCK_FAILED = 0x1e07,
SGPE_STOP_ENTRY_L2_STOPCLK_FAILED = 0x1e08,
SGPE_STOP_ENTRY_EQ_STOPCLK_FAILED = 0x1e09,
-SGPE_STOP_ENTRY_PBRW_SCAN_HEADER_ERR = 0x1e0a, // NDD1
+//_UNUSED_1e0a = 0x1e0a,
//_UNUSED_1e0d = 0x1e0d,
//_UNUSED_1e1c = 0x1e1c,
//_UNUSED_1e1d = 0x1e1d,
//_UNUSED_1e1e = 0x1e1e,
//_UNUSED_1e1f = 0x1e1f,
-//_UNUSED_1f00 = 0x1f00,
-//_UNUSED_1f01 = 0x1f01,
-//_UNUSED_1f02 = 0x1f02,
-//_UNUSED_1f03 = 0x1f03,
+SGPE_STOP_EXIT_VCS_STOPCLK_FAILED = 0x1f00, // NDD1
+SGPE_STOP_EXIT_VCS_STARTCLK_FAILED = 0x1f01, // NDD1
+SGPE_STOP_EXIT_FUSE_SCAN_HEADER_ERR = 0x1f02, // NDD1
+SGPE_STOP_EXIT_PBRW_SCAN_HEADER_ERR = 0x1f03, // NDD1
//_UNUSED_1f04 = 0x1f04,
//_UNUSED_1f05 = 0x1f05,
//_UNUSED_1f06 = 0x1f06,
//_UNUSED_1f07 = 0x1f07,
-//_UNUSED_1f08 = 0x1f08,
+SGPE_STOP_ENTRY_PBRW_SCAN_HEADER_ERR = 0x1f08, // NDD1
//_UNUSED_1f09 = 0x1f09,
//_UNUSED_1f0a = 0x1f0a,
//_UNUSED_1f0d = 0x1f0d,
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