CME: Process DB0 inside intercme_msg_handler

    Key_Cronus_Test=PM_REGRESS

Change-Id: Ibba9da7c8715dcd0b79790c8466db72a0ccdeeb1
CQ: SW426908
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58123
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>

5 files changed, 10 insertions, 15 deletions

diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c
index bd7645c3..5d044856 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_intercme.c
@@ -54,12 +54,10 @@ void p9_cme_pstate_intercme_in0_irq_handler(void)
 
 void p9_cme_pstate_intercme_msg_handler(void)
 {
-    p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_WAIT_ON_RECV ,
-            INTERCME_IN0_PROCESS_SKIP);
+    p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_WAIT_ON_RECV);
 }
 
-void p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_ACTION intercme_msg_lock_action,
-        INTERCME_IN0_PROCESS_ACTION intercme_in0_process_action)
+void p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_ACTION intercme_msg_lock_action)
 {
     PK_TRACE_INF("SIBL: Enter");
     uint32_t msg;
@@ -82,7 +80,7 @@ void p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_ACTION i
     }
 
     //If INTERCME_DIRECT_IN0, then process DB0 data
-    if((in32(CME_LCL_EISR) & BIT32(7)) && (intercme_in0_process_action == INTERCME_IN0_PROCESS))
+    if(in32(CME_LCL_EISR) & BIT32(7))
     {
         p9_cme_pstate_process_db0_sibling();
     }
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.h b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.h
index 68bd1c87..ae5b3feb 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.h
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_pstate.h
@@ -173,12 +173,6 @@ typedef enum
     INTERCME_MSG_LOCK_SKIP         = 1,
 } INTERCME_MSG_LOCK_ACTION;
 
-typedef enum
-{
-    INTERCME_IN0_PROCESS        = 0,
-    INTERCME_IN0_PROCESS_SKIP   = 1,
-} INTERCME_IN0_PROCESS_ACTION;
-
 
 typedef struct
 {
@@ -228,8 +222,7 @@ void intercme_direct(INTERCME_DIRECT_INTF intf, INTERCME_DIRECT_TYPE type, uint3
 void p9_cme_core_stop_analog_control(uint32_t core_mask, ANALOG_CONTROL enable);
 void p9_cme_pstate_pmsr_updt();
 void p9_cme_pstate_pmsr_updt_in_progress();
-void p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_ACTION intercme_msg_lock_action,
-        INTERCME_IN0_PROCESS_ACTION intercme_in0_process_action);
+void p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_ACTION intercme_msg_lock_action);
 void p9_cme_pstate_process_db0_sibling();
 
 
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
index a55194ee..01d0aade 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
@@ -208,7 +208,7 @@ void p9_cme_pstate_db3_handler(void)
 
             intercme_direct(INTERCME_DIRECT_IN2, INTERCME_DIRECT_ACK, 0);
 
-            p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_SKIP, INTERCME_IN0_PROCESS);
+            p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_SKIP);
         }
 
         if (db3.fields.cme_message_numbern == MSGID_DB3_ENTER_SAFE_MODE)
@@ -772,7 +772,7 @@ inline void p9_cme_pstate_register()
                 }
                 else
                 {
-                    p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_WAIT_ON_RECV, INTERCME_IN0_PROCESS);
+                    p9_cme_pstate_sibling_lock_and_intercme_protocol(INTERCME_MSG_LOCK_WAIT_ON_RECV);
                     msgCnt++;
 
                     if (msgCnt == 3)
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
index 42b5e8ec..662c5461 100755
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c
@@ -1062,7 +1062,9 @@ p9_cme_stop_entry()
             }
             while(scom_data.words.upper & BIT32(13));
 
+            wrteei(0);
             p9_cme_core_stop_analog_control(core, ANALOG_DISABLE);
+            wrteei(1);
 
             PK_TRACE("Switch glsmux to refclk to save clock grid power via CGCR[3]");
             CME_PUTSCOM(C_PPM_CGCR, core, 0);
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c
index bd9e74e7..47fda5c0 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c
@@ -378,7 +378,9 @@ p9_cme_stop_exit_lv2(uint32_t core)
     MARK_TRAP(SX_ENABLE_ANALOG)
     //=========================
 
+    wrteei(0);
     p9_cme_core_stop_analog_control(core, ANALOG_ENABLE);
+    wrteei(1);
 
     // do this after assert glsmux so glitch can have time to resolve
     // catchup to stop2 exit will acquire here