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authorGreg Still <stillgs@us.ibm.com>2017-11-07 09:23:48 -0600
committerJoshua Hunsberger <jahunsbe@us.ibm.com>2017-11-17 15:14:08 -0600
commita58dff1fbe35eec3a88eeff28c192564111bd1e0 (patch)
tree2e2fc361d5d3cbd6ec876a26c27e8a35bfe4783e
parent974c394f8b61661d6319fe67454869103a736f59 (diff)
downloadtalos-hcode-a58dff1fbe35eec3a88eeff28c192564111bd1e0.tar.gz
talos-hcode-a58dff1fbe35eec3a88eeff28c192564111bd1e0.zip
PGPE/CME Hcode: Safe Pstate and STOP<>VDM Fixes
- Set OVERRIDE_PSAFE_PSTATE=0(use psafe from GPPB) (PGPE) - Make safe Pstate be lowest frequency limit (PGPE) - Uses POWERSAVE if the safe mode frequency is not set. Otherwise, uses the in the general clipping equation vs the safe computation (PGPE) - Use the correct jump field (L_S) for setting safe mode (split variables for better understanding (HWP) - Incorporate PGPE fix for registration doorbell acks as Safe Mode exacerbated a STOP 11 Quad Manager Registration timing window - Fix CME DB0 ack window upon before QM registration - Fix PGPE auto mode for Cronus - Put CME Pstate analog update and Next Pstate update in critical section to fix testing issues Key_Cronus_Test=PM_REGRESS Change-Id: Iaac118b51e29cbe7c1f555fb9f5c984f525e4c82 Original-Change-Id: I10388e288251d9915a5dc0b38a9424747524ea17 CQ: SW405402 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49372 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
-rw-r--r--import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c2
-rw-r--r--import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c
index 9632687a..eecb38d5 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c
@@ -69,7 +69,7 @@ void p9_pgpe_thread_actuate_pstates(void* arg)
{
for (q = 0; q < MAX_QUADS; q++)
{
- G_pgpe_pstate_record.psClipMax[q] = G_gppb->operating_points[POWERSAVE].pstate;
+ G_pgpe_pstate_record.psClipMax[q] = G_pgpe_pstate_record.safePstate;
G_pgpe_pstate_record.psClipMin[q] = G_gppb->operating_points[ULTRA].pstate;
}
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h
index 7df5f786..bd250b47 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h
@@ -43,7 +43,7 @@
#define PK_TRACE_TIMER_OUTPUT 0
#define SGPE_IPC_ENABLED 1
#define OVERRIDE_OTHER_ENGINES_IRQS 0
-#define OVERRIDE_PSAFE_PSTATE 1
+#define OVERRIDE_PSAFE_PSTATE 0
#define USE_GEN_PSTATE_STRUCT_V 0
///This application uses IPC code
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