/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* $Source: import/chips/centaur/common/include/cen_gen_scom_addresses_fld.H $ */
/*                                                                        */
/* OpenPOWER HCODE Project                                                */
/*                                                                        */
/* COPYRIGHT 2016,2017                                                    */
/* [+] International Business Machines Corp.                              */
/*                                                                        */
/*                                                                        */
/* Licensed under the Apache License, Version 2.0 (the "License");        */
/* you may not use this file except in compliance with the License.       */
/* You may obtain a copy of the License at                                */
/*                                                                        */
/*     http://www.apache.org/licenses/LICENSE-2.0                         */
/*                                                                        */
/* Unless required by applicable law or agreed to in writing, software    */
/* distributed under the License is distributed on an "AS IS" BASIS,      */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
/* implied. See the License for the specific language governing           */
/* permissions and limitations under the License.                         */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
#ifndef CEN_GEN_SCOM_ADDRESSES_FLD_H
#define CEN_GEN_SCOM_ADDRESSES_FLD_H
#include "cen_const_common.H"
#include "cen_gen_scom_fld_template.H"
#include "cen_gen_scom_addresses_fld_fixes.H"

CEN_FLD (CEN_TX_CLK_MODE_PG_PDWN, 48);
CEN_FLD (CEN_TX_CLK_MODE_PG_INVERT, 49);
CEN_FLD (CEN_TX_CLK_MODE_PG_QUIESCE_P, 50);
CEN_FLD (CEN_TX_CLK_MODE_PG_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TX_CLK_MODE_PG_QUIESCE_N, 52);
CEN_FLD (CEN_TX_CLK_MODE_PG_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TX_CLK_MODE_PG_DDR, 54);

CEN_FLD (CEN_TX_SPARE_MODE_PG_0, 48);
CEN_FLD (CEN_TX_SPARE_MODE_PG_1, 49);
CEN_FLD (CEN_TX_SPARE_MODE_PG_2, 50);
CEN_FLD (CEN_TX_SPARE_MODE_PG_3, 51);
CEN_FLD (CEN_TX_SPARE_MODE_PG_4, 52);
CEN_FLD (CEN_TX_SPARE_MODE_PG_5, 53);
CEN_FLD (CEN_TX_SPARE_MODE_PG_6, 54);
CEN_FLD (CEN_TX_SPARE_MODE_PG_7, 55);

CEN_FLD (CEN_TX_MODE_PG_MAX_BAD_LANES, 48);
CEN_FLD (CEN_TX_MODE_PG_MAX_BAD_LANES_LEN, 5);
CEN_FLD (CEN_TX_MODE_PG_MSBSWAP, 53);
CEN_FLD (CEN_TX_MODE_PG_PDWN_LITE_DISABLE, 54);

CEN_FLD (CEN_TX_RESET_ACT_PG_CLR_PAR_ERRS, 62);
CEN_FLD (CEN_TX_RESET_ACT_PG_FIR, 63);

CEN_FLD (CEN_TX_BIST_STAT_PG_CLK_ERR, 49);

CEN_FLD (CEN_TX_FIR_PG_ERRS, 48);
CEN_FLD (CEN_TX_FIR_PG_ERRS_LEN, 8);
CEN_FLD (CEN_TX_FIR_PG_PL_ERR, 63);

CEN_FLD (CEN_TX_FIR_MASK_PG_ERRS, 48);
CEN_FLD (CEN_TX_FIR_MASK_PG_ERRS_LEN, 8);
CEN_FLD (CEN_TX_FIR_MASK_PG_PL_ERR, 63);

CEN_FLD (CEN_TX_FIR_ERROR_INJECT_PG_PG_ERR_INJ, 48);
CEN_FLD (CEN_TX_FIR_ERROR_INJECT_PG_PG_ERR_INJ_LEN, 8);

CEN_FLD (CEN_TX_ID1_PG_BUS_ID, 48);
CEN_FLD (CEN_TX_ID1_PG_BUS_ID_LEN, 6);
CEN_FLD (CEN_TX_ID1_PG_GROUP_ID, 55);
CEN_FLD (CEN_TX_ID1_PG_GROUP_ID_LEN, 6);

CEN_FLD (CEN_TX_ID2_PG_LAST_GROUP_ID, 48);
CEN_FLD (CEN_TX_ID2_PG_LAST_GROUP_ID_LEN, 6);

CEN_FLD (CEN_TX_ID3_PG_START_LANE_ID, 49);
CEN_FLD (CEN_TX_ID3_PG_START_LANE_ID_LEN, 7);
CEN_FLD (CEN_TX_ID3_PG_END_LANE_ID, 57);
CEN_FLD (CEN_TX_ID3_PG_END_LANE_ID_LEN, 7);

CEN_FLD (CEN_TX_CLK_CNTL_GCRMSG_PG_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TX_CLK_CNTL_GCRMSG_PG_DRV_PATTERN_GCRMSG_LEN, 2);

CEN_FLD (CEN_TX_FFE_MODE_PG_TEST, 50);
CEN_FLD (CEN_TX_FFE_MODE_PG_TEST_LEN, 2);
CEN_FLD (CEN_TX_FFE_MODE_PG_TEST_OVERRIDE1R, 54);
CEN_FLD (CEN_TX_FFE_MODE_PG_TEST_OVERRIDE2R, 55);

CEN_FLD (CEN_TX_FFE_MAIN_PG_P_ENC, 49);
CEN_FLD (CEN_TX_FFE_MAIN_PG_P_ENC_LEN, 7);
CEN_FLD (CEN_TX_FFE_MAIN_PG_N_ENC, 57);
CEN_FLD (CEN_TX_FFE_MAIN_PG_N_ENC_LEN, 7);

CEN_FLD (CEN_TX_FFE_POST_PG_P_ENC, 51);
CEN_FLD (CEN_TX_FFE_POST_PG_P_ENC_LEN, 5);
CEN_FLD (CEN_TX_FFE_POST_PG_N_ENC, 59);
CEN_FLD (CEN_TX_FFE_POST_PG_N_ENC_LEN, 5);

CEN_FLD (CEN_TX_FFE_MARGIN_PG_P_ENC, 51);
CEN_FLD (CEN_TX_FFE_MARGIN_PG_P_ENC_LEN, 5);
CEN_FLD (CEN_TX_FFE_MARGIN_PG_N_ENC, 59);
CEN_FLD (CEN_TX_FFE_MARGIN_PG_N_ENC_LEN, 5);

CEN_FLD (CEN_TX_BAD_LANE_ENC_GCRMSG_PG_LANE1_GCRMSG, 48);
CEN_FLD (CEN_TX_BAD_LANE_ENC_GCRMSG_PG_LANE1_GCRMSG_LEN, 7);
CEN_FLD (CEN_TX_BAD_LANE_ENC_GCRMSG_PG_LANE2_GCRMSG, 55);
CEN_FLD (CEN_TX_BAD_LANE_ENC_GCRMSG_PG_LANE2_GCRMSG_LEN, 7);
CEN_FLD (CEN_TX_BAD_LANE_ENC_GCRMSG_PG_CODE_GCRMSG, 62);
CEN_FLD (CEN_TX_BAD_LANE_ENC_GCRMSG_PG_CODE_GCRMSG_LEN, 2);

CEN_FLD (CEN_TX_SLS_LANE_ENC_GCRMSG_PG_GCRMSG, 48);
CEN_FLD (CEN_TX_SLS_LANE_ENC_GCRMSG_PG_GCRMSG_LEN, 7);
CEN_FLD (CEN_TX_SLS_LANE_ENC_GCRMSG_PG_VAL_GCRMSG, 55);

CEN_FLD (CEN_TX_WT_SEG_ENABLE_PG_EN_ALL_CLK_SEGS_GCRMSG, 48);
CEN_FLD (CEN_TX_WT_SEG_ENABLE_PG_EN_ALL_DATA_SEGS_GCRMSG, 49);

CEN_FLD (CEN_TX_LANE_DISABLED_VEC_0_15_PG_15, 48);
CEN_FLD (CEN_TX_LANE_DISABLED_VEC_0_15_PG_15_LEN, 16);

CEN_FLD (CEN_TX_LANE_DISABLED_VEC_16_31_PG_31, 48);
CEN_FLD (CEN_TX_LANE_DISABLED_VEC_16_31_PG_31_LEN, 16);

CEN_FLD (CEN_TX_SLS_LANE_MUX_GCRMSG_PG_SHDW_GCRMSG, 48);

CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SHDW_REQ_GCRMSG, 48);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SHDW_RPR_REQ_GCRMSG, 49);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_UNSHDW_REQ_GCRMSG, 50);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_UNSHDW_RPR_REQ_GCRMSG, 51);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_BUS_WIDTH, 52);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_BUS_WIDTH_LEN, 7);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_RPR_REQ_GCRMSG, 59);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SLS_LANE_SEL_LG_GCRMSG, 60);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SLS_LANE_UNSEL_LG_GCRMSG, 61);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_SPR_LNS_PDWN_LITE_GCRMSG, 62);
CEN_FLD (CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG_LGL_RPR_REQ_GCRMSG, 63);

CEN_FLD (CEN_TX_WIRETEST_PP_WT_PATTERN_LENGTH, 48);
CEN_FLD (CEN_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TX_MODE_PP_REDUCED_SCRAMBLE, 48);
CEN_FLD (CEN_TX_MODE_PP_REDUCED_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TX_MODE_PP_PRBS_SCRAMBLE, 50);
CEN_FLD (CEN_TX_MODE_PP_PRBS_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TX_MODE_PP_FIFO_L2U_DLY, 52);
CEN_FLD (CEN_TX_MODE_PP_FIFO_L2U_DLY_LEN, 3);

CEN_FLD (CEN_TX_SLS_GCRMSG_PP_SND_CMD, 48);
CEN_FLD (CEN_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG, 49);
CEN_FLD (CEN_TX_SLS_GCRMSG_PP_CMD, 50);
CEN_FLD (CEN_TX_SLS_GCRMSG_PP_CMD_LEN, 6);
CEN_FLD (CEN_TX_SLS_GCRMSG_PP_SND_CMD_PREV, 56);
CEN_FLD (CEN_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE, 57);

CEN_FLD (CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL, 49);
CEN_FLD (CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL, 52);
CEN_FLD (CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL, 58);
CEN_FLD (CEN_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN, 6);

CEN_FLD (CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL, 49);
CEN_FLD (CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL, 52);
CEN_FLD (CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL, 58);
CEN_FLD (CEN_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN, 6);

CEN_FLD (CEN_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TX_BIST_CNTL_PP_EN, 48);

CEN_FLD (CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE, 48);
CEN_FLD (CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD, 49);
CEN_FLD (CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL, 50);
CEN_FLD (CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD, 58);
CEN_FLD (CEN_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN, 6);

CEN_FLD (CEN_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE, 48);

CEN_FLD (CEN_TX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TX_TDR_CNTL1_PP_DAC_CNTL, 48);
CEN_FLD (CEN_TX_TDR_CNTL1_PP_DAC_CNTL_LEN, 8);
CEN_FLD (CEN_TX_TDR_CNTL1_PP_PHASE_SEL, 57);

CEN_FLD (CEN_TX_TDR_CNTL2_PP_PULSE_OFFSET, 48);
CEN_FLD (CEN_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN, 12);

CEN_FLD (CEN_TX_TDR_CNTL3_PP_PULSE_WIDTH, 48);
CEN_FLD (CEN_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN, 12);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_WIRETEST_PP_WT_PATTERN_LENGTH, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_REDUCED_SCRAMBLE, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_REDUCED_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_PRBS_SCRAMBLE, 50);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_PRBS_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_FIFO_L2U_DLY, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_FIFO_L2U_DLY_LEN, 3);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_SND_CMD, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_CMD, 50);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_CMD_LEN, 6);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_SND_CMD_PREV, 56);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE, 57);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL, 58);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL, 58);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BIST_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL, 50);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD, 58);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN, 6);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL1_PP_DAC_CNTL, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL1_PP_DAC_CNTL_LEN, 8);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL1_PP_PHASE_SEL, 57);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL2_PP_PULSE_OFFSET, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN, 12);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL3_PP_PULSE_WIDTH, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN, 12);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS0_TXPACK_0_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_WIRETEST_PP_WT_PATTERN_LENGTH, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_REDUCED_SCRAMBLE, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_REDUCED_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_PRBS_SCRAMBLE, 50);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_PRBS_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_FIFO_L2U_DLY, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_FIFO_L2U_DLY_LEN, 3);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_SND_CMD, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_CMD, 50);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_CMD_LEN, 6);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_SND_CMD_PREV, 56);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE, 57);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL, 58);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL, 58);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BIST_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL, 50);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD, 58);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN, 6);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL1_PP_DAC_CNTL, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL1_PP_DAC_CNTL_LEN, 8);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL1_PP_PHASE_SEL, 57);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL2_PP_PULSE_OFFSET, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN, 12);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL3_PP_PULSE_WIDTH, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN, 12);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 49);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS1_TXPACK_1_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS2_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS2_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS2_TX_WIRETEST_PP_WT_PATTERN_LENGTH, 48);
CEN_FLD (CEN_TXPACKS2_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS2_TX_MODE_PP_REDUCED_SCRAMBLE, 48);
CEN_FLD (CEN_TXPACKS2_TX_MODE_PP_REDUCED_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS2_TX_MODE_PP_PRBS_SCRAMBLE, 50);
CEN_FLD (CEN_TXPACKS2_TX_MODE_PP_PRBS_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS2_TX_MODE_PP_FIFO_L2U_DLY, 52);
CEN_FLD (CEN_TXPACKS2_TX_MODE_PP_FIFO_L2U_DLY_LEN, 3);

CEN_FLD (CEN_TXPACKS2_TX_SLS_GCRMSG_PP_SND_CMD, 48);
CEN_FLD (CEN_TXPACKS2_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG, 49);
CEN_FLD (CEN_TXPACKS2_TX_SLS_GCRMSG_PP_CMD, 50);
CEN_FLD (CEN_TXPACKS2_TX_SLS_GCRMSG_PP_CMD_LEN, 6);
CEN_FLD (CEN_TXPACKS2_TX_SLS_GCRMSG_PP_SND_CMD_PREV, 56);
CEN_FLD (CEN_TXPACKS2_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE, 57);

CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL, 58);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL, 58);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS2_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS2_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS2_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS2_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS2_TX_BIST_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE, 48);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD, 49);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL, 50);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD, 58);
CEN_FLD (CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN, 6);

CEN_FLD (CEN_TXPACKS2_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE, 48);

CEN_FLD (CEN_TXPACKS2_TX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS2_TX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS2_TX_TDR_CNTL1_PP_DAC_CNTL, 48);
CEN_FLD (CEN_TXPACKS2_TX_TDR_CNTL1_PP_DAC_CNTL_LEN, 8);
CEN_FLD (CEN_TXPACKS2_TX_TDR_CNTL1_PP_PHASE_SEL, 57);

CEN_FLD (CEN_TXPACKS2_TX_TDR_CNTL2_PP_PULSE_OFFSET, 48);
CEN_FLD (CEN_TXPACKS2_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN, 12);

CEN_FLD (CEN_TXPACKS2_TX_TDR_CNTL3_PP_PULSE_WIDTH, 48);
CEN_FLD (CEN_TXPACKS2_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN, 12);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS2_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS2_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS2_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS2_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS2_SLICE3_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS2_SLICE3_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS3_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS3_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS3_TX_WIRETEST_PP_WT_PATTERN_LENGTH, 48);
CEN_FLD (CEN_TXPACKS3_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS3_TX_MODE_PP_REDUCED_SCRAMBLE, 48);
CEN_FLD (CEN_TXPACKS3_TX_MODE_PP_REDUCED_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS3_TX_MODE_PP_PRBS_SCRAMBLE, 50);
CEN_FLD (CEN_TXPACKS3_TX_MODE_PP_PRBS_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS3_TX_MODE_PP_FIFO_L2U_DLY, 52);
CEN_FLD (CEN_TXPACKS3_TX_MODE_PP_FIFO_L2U_DLY_LEN, 3);

CEN_FLD (CEN_TXPACKS3_TX_SLS_GCRMSG_PP_SND_CMD, 48);
CEN_FLD (CEN_TXPACKS3_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG, 49);
CEN_FLD (CEN_TXPACKS3_TX_SLS_GCRMSG_PP_CMD, 50);
CEN_FLD (CEN_TXPACKS3_TX_SLS_GCRMSG_PP_CMD_LEN, 6);
CEN_FLD (CEN_TXPACKS3_TX_SLS_GCRMSG_PP_SND_CMD_PREV, 56);
CEN_FLD (CEN_TXPACKS3_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE, 57);

CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL, 58);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL, 58);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS3_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS3_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS3_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS3_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS3_TX_BIST_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE, 48);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD, 49);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL, 50);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD, 58);
CEN_FLD (CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN, 6);

CEN_FLD (CEN_TXPACKS3_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE, 48);

CEN_FLD (CEN_TXPACKS3_TX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS3_TX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS3_TX_TDR_CNTL1_PP_DAC_CNTL, 48);
CEN_FLD (CEN_TXPACKS3_TX_TDR_CNTL1_PP_DAC_CNTL_LEN, 8);
CEN_FLD (CEN_TXPACKS3_TX_TDR_CNTL1_PP_PHASE_SEL, 57);

CEN_FLD (CEN_TXPACKS3_TX_TDR_CNTL2_PP_PULSE_OFFSET, 48);
CEN_FLD (CEN_TXPACKS3_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN, 12);

CEN_FLD (CEN_TXPACKS3_TX_TDR_CNTL3_PP_PULSE_WIDTH, 48);
CEN_FLD (CEN_TXPACKS3_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN, 12);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS3_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS3_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS3_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS3_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS3_SLICE3_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS3_SLICE3_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_WIRETEST_PP_WT_PATTERN_LENGTH, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_REDUCED_SCRAMBLE, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_REDUCED_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_PRBS_SCRAMBLE, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_PRBS_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_FIFO_L2U_DLY, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_FIFO_L2U_DLY_LEN, 3);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_SND_CMD, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_CMD, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_CMD_LEN, 6);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_SND_CMD_PREV, 56);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE, 57);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL, 58);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL, 58);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BIST_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD, 58);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN, 6);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL1_PP_DAC_CNTL, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL1_PP_DAC_CNTL_LEN, 8);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL1_PP_PHASE_SEL, 57);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL2_PP_PULSE_OFFSET, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN, 12);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL3_PP_PULSE_WIDTH, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN, 12);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE3_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS4_TXPACK_4_SLICE4_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 53);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE0_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_WIRETEST_PP_WT_PATTERN_LENGTH, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_WIRETEST_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_REDUCED_SCRAMBLE, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_REDUCED_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_PRBS_SCRAMBLE, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_PRBS_SCRAMBLE_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_FIFO_L2U_DLY, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_FIFO_L2U_DLY_LEN, 3);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_SND_CMD, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_DYN_RECAL_TSR_IGNORE_GCRMSG, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_CMD, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_CMD_LEN, 6);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_SND_CMD_PREV, 56);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_SND_USING_REG_SCRAMBLE, 57);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL, 58);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_ERR_INJ_A_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_RAND_BEAT_DIS, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_FINE_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_COARSE_SEL_LEN, 4);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL, 58);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_ERR_INJ_B_SEL_LEN, 6);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BIST_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_MODE, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_ALL_CMD, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_RECAL, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD, 58);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_ERR_INJ_SLS_CMD_LEN, 6);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_CNTL_PP_ENABLE_REDUCED_SCRAMBLE, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL1_PP_DAC_CNTL, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL1_PP_DAC_CNTL_LEN, 8);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL1_PP_PHASE_SEL, 57);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL2_PP_PULSE_OFFSET, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL2_PP_PULSE_OFFSET_LEN, 12);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL3_PP_PULSE_WIDTH, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL3_PP_PULSE_WIDTH_LEN, 12);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 53);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE1_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 53);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE2_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 53);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE3_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_INVERT, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_QUIESCE_P, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_QUIESCE_P_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_QUIESCE_N, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_QUIESCE_N_LEN, 2);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_TX_PL_SPARE_MODE, 53);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_BIST_STAT_PL_LANE_ERR, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG, 48);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_DATA_CNTL_GCRMSG_PL_DRV_PATTERN_GCRMSG_LEN, 4);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_DATA_CNTL_GCRMSG_PL_SLS_LANE_SEL_GCRMSG, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_FIR_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_FIR_MASK_PL_ERRS, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_FAST_PL_ERR_INJ_A_ENABLE, 52);
CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_FAST_PL_ERR_INJ_B_ENABLE, 53);

CEN_FLD (CEN_TXPACKS5_TXPACK_5_SLICE4_TX_CNTL_GCRMSG_PL_PDWN_LITE_GCRMSG, 48);

CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_BYPASSN, 3);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_SPEDIV, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_SPEDIV_LEN, 5);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CPISEL, 9);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CPISEL_LEN, 3);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_DIVSELB, 12);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_DIVSELB_LEN, 9);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_PCLKSEL, 21);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_PCLKSEL_LEN, 2);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_UNUSED0, 23);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_BANDSEL, 24);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_BANDSEL_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE0, 28);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE1, 29);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE23, 30);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE23_LEN, 2);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE4, 32);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE5, 33);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE6, 34);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE7, 35);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE8, 36);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE9, 37);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ANALOGTUNE10, 38);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ATSTSEL, 39);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_ATSTSEL_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_VCOSEL, 43);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_BGOFFSET, 44);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_BGOFFSET_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CCALBANDSEL, 48);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CCALBANDSEL_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_UNUSED1, 52);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_UNUSED1_LEN, 3);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CCALFMAX, 55);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CCALFMIN, 56);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CCALLOAD, 57);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CCALCVHOLD, 58);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_DCTEST_DC, 59);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CCALMETH, 60);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_UNUSED4, 61);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_CMLEN, 62);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL0_UNUSED5, 63);

CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_CALREQ, 0);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_CALRECAL, 1);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_RDIV, 2);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_RDIV_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_UNUSED2, 6);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_UNUSED2_LEN, 2);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_CCALCOMP, 8);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_CCALERR, 9);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_SEL, 10);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_SEL_LEN, 2);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_EN, 12);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_VSEL, 13);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_VSEL_LEN, 3);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL1_PLLOUTA_DISABLE, 63);

CEN_FLD (CEN_DMIPLL_PLL_CNTRL2_UNUSED_OUTB_DISABLE, 0);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL2_UNUSED, 1);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL2_UNUSED_LEN, 3);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL2_RESET, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL2_SPARE, 5);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL2_SPARE_LEN, 3);

CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BYPASSN, 3);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_SPEDIV, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_SPEDIV_LEN, 5);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CPISEL, 9);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CPISEL_LEN, 3);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_DIVSELB, 12);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_DIVSELB_LEN, 9);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_PCLKSEL, 21);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_PCLKSEL_LEN, 2);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED0, 23);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BANDSEL, 24);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BANDSEL_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_ANALOGTUNE, 28);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_ANALOGTUNE_LEN, 11);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_ATSTSEL, 39);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_ATSTSEL_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_VCOSEL, 43);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BGOFFSET, 44);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_BGOFFSET_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALBANDSEL, 48);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALBANDSEL_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED1, 52);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED1_LEN, 3);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALFMAX, 55);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALFMIN, 56);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALLOAD, 57);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALCVHOLD, 58);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CCALMETH, 60);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED4, 61);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_CMLEN, 62);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP0_SHADOW_UNUSED5, 63);

CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_CALREQ, 0);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_CALRECAL, 1);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_RDIV, 2);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_RDIV_LEN, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_UNUSED2, 6);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_UNUSED2_LEN, 2);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_CCALCOMP, 8);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_CCALERR, 9);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP1_SHADOW_PLLOUTA_DISABLE, 63);

CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_UNUSED_OUTB_DISABLE, 0);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_UNUSED, 1);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_UNUSED_LEN, 3);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_RESET, 4);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_SPARE, 5);
CEN_FLD (CEN_DMIPLL_PLL_CNTRL_SETUP2_SHADOW_SPARE_LEN, 3);

CEN_FLD (CEN_CUPLL_CTL_ANALOGTUNE, 0);
CEN_FLD (CEN_CUPLL_CTL_ANALOGTUNE_LEN, 11);
CEN_FLD (CEN_CUPLL_CTL_ATSTSEL, 11);
CEN_FLD (CEN_CUPLL_CTL_ATSTSEL_LEN, 4);
CEN_FLD (CEN_CUPLL_CTL_BANDSEL, 15);
CEN_FLD (CEN_CUPLL_CTL_BANDSEL_LEN, 2);
CEN_FLD (CEN_CUPLL_CTL_DIVSELFB, 17);
CEN_FLD (CEN_CUPLL_CTL_DIVSELFB_LEN, 9);
CEN_FLD (CEN_CUPLL_CTL_BGOFFSET, 26);
CEN_FLD (CEN_CUPLL_CTL_BGOFFSET_LEN, 3);
CEN_FLD (CEN_CUPLL_CTL_SPARE, 29);
CEN_FLD (CEN_CUPLL_CTL_CAPSEL, 30);
CEN_FLD (CEN_CUPLL_CTL_CPISEL, 31);
CEN_FLD (CEN_CUPLL_CTL_CPISEL_LEN, 3);
CEN_FLD (CEN_CUPLL_CTL_ITUNE, 34);
CEN_FLD (CEN_CUPLL_CTL_ITUNE_LEN, 3);
CEN_FLD (CEN_CUPLL_CTL_PCLKSEL, 37);
CEN_FLD (CEN_CUPLL_CTL_PCLKSEL_LEN, 2);
CEN_FLD (CEN_CUPLL_CTL_PHASEFB, 39);
CEN_FLD (CEN_CUPLL_CTL_PHASEFB_LEN, 2);
CEN_FLD (CEN_CUPLL_CTL_RDIV, 41);
CEN_FLD (CEN_CUPLL_CTL_REFCLKSEL, 42);
CEN_FLD (CEN_CUPLL_CTL_RESSEL, 43);
CEN_FLD (CEN_CUPLL_CTL_VREGENABLE_N, 44);
CEN_FLD (CEN_CUPLL_CTL_VREGBYPASS, 45);
CEN_FLD (CEN_CUPLL_CTL_PLLLOCK, 46);

CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_ANALOGTUNE, 0);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_ANALOGTUNE_LEN, 11);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_ATSTSEL, 11);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_ATSTSEL_LEN, 4);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_BANDSEL, 15);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_BANDSEL_LEN, 2);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_DIVSELFB, 17);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_DIVSELFB_LEN, 9);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_BGOFFSET, 26);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_BGOFFSET_LEN, 3);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_SPARE, 29);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_CAPSEL, 30);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_CPISEL, 31);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_CPISEL_LEN, 3);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_ITUNE, 34);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_ITUNE_LEN, 3);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_PCLKSEL, 37);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_PCLKSEL_LEN, 2);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_PHASEFB, 39);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_PHASEFB_LEN, 2);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_RDIV, 41);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_REFCLKSEL, 42);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_RESSEL, 43);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_VREGENABLE_N, 44);
CEN_FLD (CEN_CUPLL_CTL_SETUP_SHADOW_VREGBYPASS, 45);

CEN_FLD (CEN_RX_CLK_MODE_PG_PDWN, 48);
CEN_FLD (CEN_RX_CLK_MODE_PG_INVERT, 49);

CEN_FLD (CEN_RX_SPARE_MODE_PG_0, 48);
CEN_FLD (CEN_RX_SPARE_MODE_PG_1, 49);
CEN_FLD (CEN_RX_SPARE_MODE_PG_2, 50);
CEN_FLD (CEN_RX_SPARE_MODE_PG_3, 51);
CEN_FLD (CEN_RX_SPARE_MODE_PG_4, 52);
CEN_FLD (CEN_RX_SPARE_MODE_PG_SLS_EXTEND_SEL, 53);
CEN_FLD (CEN_RX_SPARE_MODE_PG_SLS_EXTEND_SEL_LEN, 3);

CEN_FLD (CEN_RX_MODE_PG_MASTER, 48);
CEN_FLD (CEN_RX_MODE_PG_DISABLE_FENCE_RESET, 49);
CEN_FLD (CEN_RX_MODE_PG_PDWN_LITE_DISABLE, 50);
CEN_FLD (CEN_RX_MODE_PG_USE_SLS_AS_SPR, 51);
CEN_FLD (CEN_RX_MODE_PG_BUMP_BEFORE_PRBS_SYNC, 52);

CEN_FLD (CEN_RX_RESET_ACT_PG_CLR_PAR_ERRS, 62);
CEN_FLD (CEN_RX_RESET_ACT_PG_FIR, 63);

CEN_FLD (CEN_RX_ID1_PG_BUS_ID, 48);
CEN_FLD (CEN_RX_ID1_PG_BUS_ID_LEN, 6);
CEN_FLD (CEN_RX_ID1_PG_GROUP_ID, 55);
CEN_FLD (CEN_RX_ID1_PG_GROUP_ID_LEN, 6);

CEN_FLD (CEN_RX_ID2_PG_LAST_GROUP_ID, 48);
CEN_FLD (CEN_RX_ID2_PG_LAST_GROUP_ID_LEN, 6);

CEN_FLD (CEN_RX_ID3_PG_START_LANE_ID, 49);
CEN_FLD (CEN_RX_ID3_PG_START_LANE_ID_LEN, 7);
CEN_FLD (CEN_RX_ID3_PG_END_LANE_ID, 57);
CEN_FLD (CEN_RX_ID3_PG_END_LANE_ID_LEN, 7);

CEN_FLD (CEN_RX_MINIKERF_PG_MINIKERF, 48);
CEN_FLD (CEN_RX_MINIKERF_PG_MINIKERF_LEN, 16);

CEN_FLD (CEN_RX_DYN_RPR_DEBUG2_PG_BAD_BUS_LANE_ERR_CNTR_DIS_CLR, 48);

CEN_FLD (CEN_RX_SLS_MODE_PG_DISABLE, 48);
CEN_FLD (CEN_RX_SLS_MODE_PG_TX_DISABLE, 49);
CEN_FLD (CEN_RX_SLS_MODE_PG_CNTR_TAP_PTS, 50);
CEN_FLD (CEN_RX_SLS_MODE_PG_CNTR_TAP_PTS_LEN, 2);
CEN_FLD (CEN_RX_SLS_MODE_PG_NONSLS_CNTR_TAP_PTS, 52);
CEN_FLD (CEN_RX_SLS_MODE_PG_NONSLS_CNTR_TAP_PTS_LEN, 2);
CEN_FLD (CEN_RX_SLS_MODE_PG_ERR_CHK_RUN, 54);
CEN_FLD (CEN_RX_SLS_MODE_PG_FINAL_NOP_CS, 55);
CEN_FLD (CEN_RX_SLS_MODE_PG_SR_FINAL_NOP_TIMEOUT_SEL, 56);
CEN_FLD (CEN_RX_SLS_MODE_PG_SR_FINAL_NOP_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_RX_SLS_MODE_PG_EXCEPTION2_CS, 59);

CEN_FLD (CEN_RX_TRAINING_START_PG_START_WIRETEST, 48);
CEN_FLD (CEN_RX_TRAINING_START_PG_START_DESKEW, 49);
CEN_FLD (CEN_RX_TRAINING_START_PG_START_EYE_OPT, 50);
CEN_FLD (CEN_RX_TRAINING_START_PG_START_REPAIR, 51);
CEN_FLD (CEN_RX_TRAINING_START_PG_START_FUNC_MODE, 52);
CEN_FLD (CEN_RX_TRAINING_START_PG_START_BIST, 53);
CEN_FLD (CEN_RX_TRAINING_START_PG_START_OFFSET_CAL, 54);
CEN_FLD (CEN_RX_TRAINING_START_PG_START_WT_BYPASS, 55);

CEN_FLD (CEN_RX_TRAINING_STATUS_PG_WIRETEST_DONE, 48);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_DESKEW_DONE, 49);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_EYE_OPT_DONE, 50);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_REPAIR_DONE, 51);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_FUNC_MODE_DONE, 52);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_BIST_STARTED, 53);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_OFFSET_CAL_DONE, 54);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_WT_BYPASS_DONE, 55);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_WIRETEST_FAILED, 56);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_DESKEW_FAILED, 57);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_EYE_OPT_FAILED, 58);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_REPAIR_FAILED, 59);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_START_BIST_FAILED, 61);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_OFFSET_CAL_FAILED, 62);
CEN_FLD (CEN_RX_TRAINING_STATUS_PG_WT_BYPASS_FAILED, 63);

CEN_FLD (CEN_RX_RECAL_STATUS_PG_STATUS, 48);
CEN_FLD (CEN_RX_RECAL_STATUS_PG_STATUS_LEN, 16);

CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_SLS, 48);
CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_SLS_LEN, 4);
CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_DS_BL, 52);
CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_DS_BL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_CL, 55);
CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_CL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_WT, 58);
CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_WT_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_DS, 61);
CEN_FLD (CEN_RX_TIMEOUT_SEL_PG_DS_LEN, 3);

CEN_FLD (CEN_RX_FIFO_MODE_PG_INITIAL_L2U_DLY, 48);
CEN_FLD (CEN_RX_FIFO_MODE_PG_INITIAL_L2U_DLY_LEN, 4);
CEN_FLD (CEN_RX_FIFO_MODE_PG_FINAL_L2U_DLY, 52);
CEN_FLD (CEN_RX_FIFO_MODE_PG_FINAL_L2U_DLY_LEN, 4);
CEN_FLD (CEN_RX_FIFO_MODE_PG_FINAL_L2U_MIN_ERR_THRESH, 60);
CEN_FLD (CEN_RX_FIFO_MODE_PG_FINAL_L2U_MIN_ERR_THRESH_LEN, 2);

CEN_FLD (CEN_RX_DYN_RPR_MODE_PG_ENC_BAD_DATA_LANE_SHFT_AMT, 48);
CEN_FLD (CEN_RX_DYN_RPR_MODE_PG_ENC_BAD_DATA_LANE_SHFT_AMT_LEN, 7);

CEN_FLD (CEN_RX_FIR1_PG_ERRS, 48);
CEN_FLD (CEN_RX_FIR1_PG_ERRS_LEN, 14);
CEN_FLD (CEN_RX_FIR1_PG_PL_FIR_ERR, 63);

CEN_FLD (CEN_RX_FIR2_PG_ERRS, 48);
CEN_FLD (CEN_RX_FIR2_PG_ERRS_LEN, 9);

CEN_FLD (CEN_RX_FIR1_MASK_PG_ERRS, 48);
CEN_FLD (CEN_RX_FIR1_MASK_PG_ERRS_LEN, 14);
CEN_FLD (CEN_RX_FIR1_MASK_PG_PL_FIR_ERR_MASK, 63);

CEN_FLD (CEN_RX_FIR2_MASK_PG_ERRS, 48);
CEN_FLD (CEN_RX_FIR2_MASK_PG_ERRS_LEN, 9);

CEN_FLD (CEN_RX_FIR1_ERROR_INJECT_PG_PG_ERR_INJ, 48);
CEN_FLD (CEN_RX_FIR1_ERROR_INJECT_PG_PG_ERR_INJ_LEN, 14);

CEN_FLD (CEN_RX_FIR2_ERROR_INJECT_PG_PG_ERR_INJ, 48);
CEN_FLD (CEN_RX_FIR2_ERROR_INJECT_PG_PG_ERR_INJ_LEN, 9);

CEN_FLD (CEN_RX_FIR_TRAINING_PG_ERROR, 48);
CEN_FLD (CEN_RX_FIR_TRAINING_PG_PG_STATIC_SPARE_DEPLOYED, 49);
CEN_FLD (CEN_RX_FIR_TRAINING_PG_PG_STATIC_MAX_SPARES_EXCEEDED, 50);
CEN_FLD (CEN_RX_FIR_TRAINING_PG_PG_DYNAMIC_REPAIR_ERROR, 51);
CEN_FLD (CEN_RX_FIR_TRAINING_PG_PG_DYNAMIC_SPARE_DEPLOYED, 52);
CEN_FLD (CEN_RX_FIR_TRAINING_PG_PG_DYNAMIC_MAX_SPARES_EXCEEDED, 53);
CEN_FLD (CEN_RX_FIR_TRAINING_PG_PG_RECAL_ERROR, 54);
CEN_FLD (CEN_RX_FIR_TRAINING_PG_PG_RECAL_SPARE_DEPLOYED, 55);
CEN_FLD (CEN_RX_FIR_TRAINING_PG_PG_RECAL_MAX_SPARES_EXCEEDED, 56);
CEN_FLD (CEN_RX_FIR_TRAINING_PG_PG_TOO_MANY_BUS_ERRORS, 57);

CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_ERROR, 48);
CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_PG_STATIC_SPARE_DEPLOYED_MASK, 49);
CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_PG_STATIC_MAX_SPARES_EXCEEDED_MASK, 50);
CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_PG_DYNAMIC_REPAIR_ERROR_MASK, 51);
CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_PG_DYNAMIC_SPARE_DEPLOYED_MASK, 52);
CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_PG_DYNAMIC_MAX_SPARES_EXCEEDED_MASK, 53);
CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_PG_RECAL_ERROR_MASK, 54);
CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_PG_RECAL_SPARE_DEPLOYED_MASK, 55);
CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_PG_RECAL_MAX_SPARES_EXCEEDED_MASK, 56);
CEN_FLD (CEN_RX_FIR_TRAINING_MASK_PG_PG_TOO_MANY_BUS_ERRORS_MASK, 57);

CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_OFFSET_SEL, 48);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_OFFSET_SEL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_AMP_SEL, 51);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_AMP_SEL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_CTLE_SEL, 54);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_CTLE_SEL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_H1AP_SEL, 57);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_H1AP_SEL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_DDC_SEL, 60);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_DDC_SEL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL1_PG_EO_FINAL_L2U_SEL, 63);

CEN_FLD (CEN_RX_LANE_BAD_VEC_0_15_PG_15, 48);
CEN_FLD (CEN_RX_LANE_BAD_VEC_0_15_PG_15_LEN, 16);

CEN_FLD (CEN_RX_LANE_BAD_VEC_16_31_PG_31, 48);
CEN_FLD (CEN_RX_LANE_BAD_VEC_16_31_PG_31_LEN, 16);

CEN_FLD (CEN_RX_LANE_DISABLED_VEC_0_15_PG_15, 48);
CEN_FLD (CEN_RX_LANE_DISABLED_VEC_0_15_PG_15_LEN, 16);

CEN_FLD (CEN_RX_LANE_DISABLED_VEC_16_31_PG_31, 48);
CEN_FLD (CEN_RX_LANE_DISABLED_VEC_16_31_PG_31_LEN, 16);

CEN_FLD (CEN_RX_LANE_SWAPPED_VEC_0_15_PG_15, 48);
CEN_FLD (CEN_RX_LANE_SWAPPED_VEC_0_15_PG_15_LEN, 16);

CEN_FLD (CEN_RX_LANE_SWAPPED_VEC_16_31_PG_31, 48);
CEN_FLD (CEN_RX_LANE_SWAPPED_VEC_16_31_PG_31_LEN, 16);

CEN_FLD (CEN_RX_WIRETEST_LANEINFO_PG_WTR_MAX_BAD_LANES, 53);
CEN_FLD (CEN_RX_WIRETEST_LANEINFO_PG_WTR_MAX_BAD_LANES_LEN, 5);

CEN_FLD (CEN_RX_WIRETEST_GCRMSG_PG_WT_PREV_DONE_GCRMSG, 48);
CEN_FLD (CEN_RX_WIRETEST_GCRMSG_PG_WT_ALL_DONE_GCRMSG, 49);
CEN_FLD (CEN_RX_WIRETEST_GCRMSG_PG_CD_PREV_DONE_GCRMSG, 50);
CEN_FLD (CEN_RX_WIRETEST_GCRMSG_PG_CD_ALL_DONE_GCRMSG, 51);
CEN_FLD (CEN_RX_WIRETEST_GCRMSG_PG_CNTLS_PREV_LDED_GCRMSG, 52);

CEN_FLD (CEN_RX_DESKEW_GCRMSG_PG_SEQ, 48);
CEN_FLD (CEN_RX_DESKEW_GCRMSG_PG_SEQ_LEN, 3);
CEN_FLD (CEN_RX_DESKEW_GCRMSG_PG_SKMIN, 52);
CEN_FLD (CEN_RX_DESKEW_GCRMSG_PG_SKMIN_LEN, 6);
CEN_FLD (CEN_RX_DESKEW_GCRMSG_PG_SKMAX, 58);
CEN_FLD (CEN_RX_DESKEW_GCRMSG_PG_SKMAX_LEN, 6);

CEN_FLD (CEN_RX_DESKEW_MODE_PG_MAX_LIMIT, 48);
CEN_FLD (CEN_RX_DESKEW_MODE_PG_MAX_LIMIT_LEN, 6);

CEN_FLD (CEN_RX_DESKEW_STATUS_PG_MINSKEW_GRP, 48);
CEN_FLD (CEN_RX_DESKEW_STATUS_PG_MINSKEW_GRP_LEN, 6);
CEN_FLD (CEN_RX_DESKEW_STATUS_PG_MAXSKEW_GRP, 54);
CEN_FLD (CEN_RX_DESKEW_STATUS_PG_MAXSKEW_GRP_LEN, 6);

CEN_FLD (CEN_RX_BAD_LANE_ENC_GCRMSG_PG_LANE1_GCRMSG, 48);
CEN_FLD (CEN_RX_BAD_LANE_ENC_GCRMSG_PG_LANE1_GCRMSG_LEN, 7);
CEN_FLD (CEN_RX_BAD_LANE_ENC_GCRMSG_PG_LANE2_GCRMSG, 55);
CEN_FLD (CEN_RX_BAD_LANE_ENC_GCRMSG_PG_LANE2_GCRMSG_LEN, 7);
CEN_FLD (CEN_RX_BAD_LANE_ENC_GCRMSG_PG_CODE_GCRMSG, 62);
CEN_FLD (CEN_RX_BAD_LANE_ENC_GCRMSG_PG_CODE_GCRMSG_LEN, 2);

CEN_FLD (CEN_RX_TX_BUS_INFO_PG_WIDTH, 48);
CEN_FLD (CEN_RX_TX_BUS_INFO_PG_WIDTH_LEN, 7);
CEN_FLD (CEN_RX_TX_BUS_INFO_PG_BUS_WIDTH, 55);
CEN_FLD (CEN_RX_TX_BUS_INFO_PG_BUS_WIDTH_LEN, 7);

CEN_FLD (CEN_RX_SLS_LANE_ENC_GCRMSG_PG_GCRMSG, 48);
CEN_FLD (CEN_RX_SLS_LANE_ENC_GCRMSG_PG_GCRMSG_LEN, 7);
CEN_FLD (CEN_RX_SLS_LANE_ENC_GCRMSG_PG_VAL_GCRMSG, 55);

CEN_FLD (CEN_RX_FENCE_PG_FENCE, 48);

CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_FUNC_MODE_SEL, 48);
CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_FUNC_MODE_SEL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_RC_SLOWDOWN_SEL, 51);
CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_RC_SLOWDOWN_SEL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_PUP_LITE_WAIT_SEL, 54);
CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_PUP_LITE_WAIT_SEL_LEN, 2);
CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_EO_L2U_WD_SEL, 57);
CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_EO_L2U_WD_SEL_LEN, 3);
CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_EO_VGA_WD_SEL, 60);
CEN_FLD (CEN_RX_TIMEOUT_SEL2_PG_EO_VGA_WD_SEL_LEN, 4);

CEN_FLD (CEN_RX_MISC_ANALOG_PG_C4_SEL, 48);
CEN_FLD (CEN_RX_MISC_ANALOG_PG_C4_SEL_LEN, 2);
CEN_FLD (CEN_RX_MISC_ANALOG_PG_NEGZ_EN, 50);
CEN_FLD (CEN_RX_MISC_ANALOG_PG_PROT_SPEED_SLCT, 51);
CEN_FLD (CEN_RX_MISC_ANALOG_PG_IREF_BC, 52);
CEN_FLD (CEN_RX_MISC_ANALOG_PG_IREF_BC_LEN, 3);

CEN_FLD (CEN_RX_DYN_RPR_GCRMSG_PG_REQ, 48);
CEN_FLD (CEN_RX_DYN_RPR_GCRMSG_PG_LANE2RPR, 49);
CEN_FLD (CEN_RX_DYN_RPR_GCRMSG_PG_LANE2RPR_LEN, 7);
CEN_FLD (CEN_RX_DYN_RPR_GCRMSG_PG_IP, 56);
CEN_FLD (CEN_RX_DYN_RPR_GCRMSG_PG_COMPLETE, 57);

CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING1_PG_BAD_LANE_MAX, 48);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING1_PG_BAD_LANE_MAX_LEN, 7);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING1_PG_CNTR1_DURATION, 55);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING1_PG_CNTR1_DURATION_LEN, 4);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING1_PG_CLR_CNTR1, 59);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING1_PG_DISABLE, 60);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING1_PG_ENC_BAD_DATA_LANE_WIDTH, 61);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING1_PG_ENC_BAD_DATA_LANE_WIDTH_LEN, 3);

CEN_FLD (CEN_RX_EO_FINAL_L2U_GCRMSG_PG_DLY_SEQ, 48);
CEN_FLD (CEN_RX_EO_FINAL_L2U_GCRMSG_PG_DLY_SEQ_LEN, 2);
CEN_FLD (CEN_RX_EO_FINAL_L2U_GCRMSG_PG_DLY_MAXCHG, 50);
CEN_FLD (CEN_RX_EO_FINAL_L2U_GCRMSG_PG_DLY_MAXCHG_LEN, 6);

CEN_FLD (CEN_RX_DYN_RECAL_PG_SERVO_RECAL_IP, 48);

CEN_FLD (CEN_RX_WT_CLK_STATUS_PG_LANE_INVERTED, 49);
CEN_FLD (CEN_RX_WT_CLK_STATUS_PG_LANE_BAD_CODE, 50);
CEN_FLD (CEN_RX_WT_CLK_STATUS_PG_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_RX_DYN_RECAL_CONFIG_PG_OVERALL_TIMEOUT_SEL, 48);
CEN_FLD (CEN_RX_DYN_RECAL_CONFIG_PG_OVERALL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_RX_DYN_RECAL_CONFIG_PG_SUSPEND, 51);

CEN_FLD (CEN_RX_DYN_RECAL_GCRMSG_PG_IP, 48);
CEN_FLD (CEN_RX_DYN_RECAL_GCRMSG_PG_FAILED, 49);
CEN_FLD (CEN_RX_DYN_RECAL_GCRMSG_PG_RIPPLE, 50);
CEN_FLD (CEN_RX_DYN_RECAL_GCRMSG_PG_TIMEOUT, 51);

CEN_FLD (CEN_RX_WIRETEST_PLL_CNTL_PG_WT_CU_PLL_PGOOD, 48);
CEN_FLD (CEN_RX_WIRETEST_PLL_CNTL_PG_WT_CU_PLL_RESET, 49);
CEN_FLD (CEN_RX_WIRETEST_PLL_CNTL_PG_WT_CU_PLL_PGOODDLY, 50);
CEN_FLD (CEN_RX_WIRETEST_PLL_CNTL_PG_WT_CU_PLL_PGOODDLY_LEN, 3);
CEN_FLD (CEN_RX_WIRETEST_PLL_CNTL_PG_WT_PLL_REFCLKSEL, 54);
CEN_FLD (CEN_RX_WIRETEST_PLL_CNTL_PG_PLL_REFCLKSEL_SCOM_EN, 55);

CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_LATCH_OFFSET_CAL, 48);
CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_CTLE_CAL, 49);
CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_VGA_CAL, 50);
CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_DFE_H1_CAL, 52);
CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_H1AP_TWEAK, 53);
CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_DDC, 54);
CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_FINAL_L2U_ADJ, 56);
CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_BER_TEST, 57);
CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_RESULT_CHECK, 58);
CEN_FLD (CEN_RX_EO_STEP_CNTL_PG_ENABLE_CTLE_EDGE_TRACK_ONLY, 59);

CEN_FLD (CEN_RX_EO_STEP_STAT_PG_LATCH_OFFSET_DONE, 48);
CEN_FLD (CEN_RX_EO_STEP_STAT_PG_CTLE_DONE, 49);
CEN_FLD (CEN_RX_EO_STEP_STAT_PG_VGA_DONE, 50);
CEN_FLD (CEN_RX_EO_STEP_STAT_PG_H1AP_TWEAK_DONE, 53);
CEN_FLD (CEN_RX_EO_STEP_STAT_PG_DDC_DONE, 54);
CEN_FLD (CEN_RX_EO_STEP_STAT_PG_FINAL_L2U_ADJ_DONE, 56);
CEN_FLD (CEN_RX_EO_STEP_STAT_PG_DFE_FLAG, 57);
CEN_FLD (CEN_RX_EO_STEP_STAT_PG_BER_TEST_DONE, 58);
CEN_FLD (CEN_RX_EO_STEP_STAT_PG_RESULT_CHECK_DONE, 59);

CEN_FLD (CEN_RX_AP_PG_EVEN_WORK, 48);
CEN_FLD (CEN_RX_AP_PG_EVEN_WORK_LEN, 8);
CEN_FLD (CEN_RX_AP_PG_ODD_WORK, 56);
CEN_FLD (CEN_RX_AP_PG_ODD_WORK_LEN, 8);

CEN_FLD (CEN_RX_AN_PG_EVEN_WORK, 48);
CEN_FLD (CEN_RX_AN_PG_EVEN_WORK_LEN, 8);
CEN_FLD (CEN_RX_AN_PG_ODD_WORK, 56);
CEN_FLD (CEN_RX_AN_PG_ODD_WORK_LEN, 8);

CEN_FLD (CEN_RX_AMIN_PG_EVEN_WORK, 48);
CEN_FLD (CEN_RX_AMIN_PG_EVEN_WORK_LEN, 8);
CEN_FLD (CEN_RX_AMIN_PG_ODD_WORK, 56);
CEN_FLD (CEN_RX_AMIN_PG_ODD_WORK_LEN, 8);

CEN_FLD (CEN_RX_AMAX_PG_HIGH, 48);
CEN_FLD (CEN_RX_AMAX_PG_HIGH_LEN, 8);
CEN_FLD (CEN_RX_AMAX_PG_LOW, 56);
CEN_FLD (CEN_RX_AMAX_PG_LOW_LEN, 8);

CEN_FLD (CEN_RX_AMP_VAL_PG_PEAK_WORK, 48);
CEN_FLD (CEN_RX_AMP_VAL_PG_PEAK_WORK_LEN, 4);
CEN_FLD (CEN_RX_AMP_VAL_PG_GAIN_WORK, 52);
CEN_FLD (CEN_RX_AMP_VAL_PG_GAIN_WORK_LEN, 4);
CEN_FLD (CEN_RX_AMP_VAL_PG_OFFSET_WORK, 58);
CEN_FLD (CEN_RX_AMP_VAL_PG_OFFSET_WORK_LEN, 6);

CEN_FLD (CEN_RX_AMP_OFFSET_PG_MAX, 48);
CEN_FLD (CEN_RX_AMP_OFFSET_PG_MAX_LEN, 6);
CEN_FLD (CEN_RX_AMP_OFFSET_PG_MIN, 54);
CEN_FLD (CEN_RX_AMP_OFFSET_PG_MIN_LEN, 6);

CEN_FLD (CEN_RX_EO_CONVERGENCE_PG_CONVERGED_COUNT, 48);
CEN_FLD (CEN_RX_EO_CONVERGENCE_PG_CONVERGED_COUNT_LEN, 4);
CEN_FLD (CEN_RX_EO_CONVERGENCE_PG_CONVERGED_END_COUNT, 52);
CEN_FLD (CEN_RX_EO_CONVERGENCE_PG_CONVERGED_END_COUNT_LEN, 4);

CEN_FLD (CEN_RX_SLS_RCVY_PG_DISABLE, 48);

CEN_FLD (CEN_RX_SLS_RCVY_GCRMSG_PG_REQ, 48);
CEN_FLD (CEN_RX_SLS_RCVY_GCRMSG_PG_IP, 49);
CEN_FLD (CEN_RX_SLS_RCVY_GCRMSG_PG_DONE, 50);

CEN_FLD (CEN_RX_TX_LANE_INFO_GCRMSG_PG_BAD_CNTR_GCRMSG, 48);
CEN_FLD (CEN_RX_TX_LANE_INFO_GCRMSG_PG_BAD_CNTR_GCRMSG_LEN, 2);

CEN_FLD (CEN_RX_ERR_TALLYING_GCRMSG_PG_DIS_SYND_TALLYING_GCRMSG, 48);

CEN_FLD (CEN_RX_TRACE_PG_TRC_MODE, 48);
CEN_FLD (CEN_RX_TRACE_PG_TRC_MODE_LEN, 4);
CEN_FLD (CEN_RX_TRACE_PG_TRC_GRP, 54);
CEN_FLD (CEN_RX_TRACE_PG_TRC_GRP_LEN, 6);

CEN_FLD (CEN_RX_RC_STEP_CNTL_PG_ENABLE_LATCH_OFFSET_CAL, 48);
CEN_FLD (CEN_RX_RC_STEP_CNTL_PG_ENABLE_CTLE_CAL, 49);
CEN_FLD (CEN_RX_RC_STEP_CNTL_PG_ENABLE_VGA_CAL, 50);
CEN_FLD (CEN_RX_RC_STEP_CNTL_PG_ENABLE_DFE_H1_CAL, 52);
CEN_FLD (CEN_RX_RC_STEP_CNTL_PG_ENABLE_H1AP_TWEAK, 53);
CEN_FLD (CEN_RX_RC_STEP_CNTL_PG_ENABLE_DDC, 54);
CEN_FLD (CEN_RX_RC_STEP_CNTL_PG_ENABLE_BER_TEST, 56);
CEN_FLD (CEN_RX_RC_STEP_CNTL_PG_ENABLE_RESULT_CHECK, 57);
CEN_FLD (CEN_RX_RC_STEP_CNTL_PG_ENABLE_CTLE_EDGE_TRACK_ONLY, 59);

CEN_FLD (CEN_RX_SERVO_BER_COUNT_PG_WORK, 48);
CEN_FLD (CEN_RX_SERVO_BER_COUNT_PG_WORK_LEN, 12);

CEN_FLD (CEN_RX_DYN_RPR_DEBUG_PG_ENC_BAD_DATA_LANE, 49);
CEN_FLD (CEN_RX_DYN_RPR_DEBUG_PG_ENC_BAD_DATA_LANE_LEN, 7);

CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING2_PG_BAD_BUS_MAX, 48);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING2_PG_BAD_BUS_MAX_LEN, 7);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING2_PG_CNTR2_DURATION, 55);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING2_PG_CNTR2_DURATION_LEN, 4);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING2_PG_CLR_CNTR2, 59);
CEN_FLD (CEN_RX_DYN_RPR_ERR_TALLYING2_PG_DISABLE2, 60);

CEN_FLD (CEN_RX_RESULT_CHK_PG_MIN_EYE_WIDTH, 50);
CEN_FLD (CEN_RX_RESULT_CHK_PG_MIN_EYE_WIDTH_LEN, 6);
CEN_FLD (CEN_RX_RESULT_CHK_PG_MIN_EYE_HEIGHT, 56);
CEN_FLD (CEN_RX_RESULT_CHK_PG_MIN_EYE_HEIGHT_LEN, 8);

CEN_FLD (CEN_RX_BER_CHK_PG_MAX_CHECK_COUNT, 56);
CEN_FLD (CEN_RX_BER_CHK_PG_MAX_CHECK_COUNT_LEN, 8);

CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_SHDW_DONE_FIN_GCRMSG, 48);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_SHDW_NOP_FIN_GCRMSG, 49);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_SHDW_RPR_DONE_FIN_GCRMSG, 50);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_SHDW_RPR_NOP_FIN_GCRMSG, 51);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_UNSHDW_DONE_FIN_GCRMSG, 52);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_UNSHDW_NOP_FIN_GCRMSG, 53);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_UNSHDW_RPR_DONE_FIN_GCRMSG, 54);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_UNSHDW_RPR_NOP_FIN_GCRMSG, 55);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_DONE_NOP_FIN_GCRMSG, 56);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_FAIL_NOP_FIN_GCRMSG, 57);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_FRESULTS_FIN_GCRMSG, 59);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_ABORT_ACK_FIN_GCRMSG, 60);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_ABORT_MNOP_FIN_GCRMSG, 61);
CEN_FLD (CEN_RX_SLS_RCVY_FIN_GCRMSG_PG_SLV_RECAL_ABORT_SNOP_FIN_GCRMSG, 62);

CEN_FLD (CEN_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE, 48);
CEN_FLD (CEN_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_RX_MODE1_PP_PRBS_SCRAMBLE_MODE, 50);
CEN_FLD (CEN_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL, 52);
CEN_FLD (CEN_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL, 55);
CEN_FLD (CEN_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL, 58);
CEN_FLD (CEN_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_RX_MODE1_PP_ENABLE_DFE_V1, 61);
CEN_FLD (CEN_RX_MODE1_PP_AMIN_ALL, 62);

CEN_FLD (CEN_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC, 49);
CEN_FLD (CEN_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE, 50);

CEN_FLD (CEN_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_RX_BER_CNTL_PP_EN, 48);

CEN_FLD (CEN_RX_BER_MODE_PP_TIMER_FREEZE_EN, 48);
CEN_FLD (CEN_RX_BER_MODE_PP_COUNT_FREEZE_EN, 49);
CEN_FLD (CEN_RX_BER_MODE_PP_COUNT_SEL, 51);
CEN_FLD (CEN_RX_BER_MODE_PP_COUNT_SEL_LEN, 3);
CEN_FLD (CEN_RX_BER_MODE_PP_TIMER_SEL, 54);
CEN_FLD (CEN_RX_BER_MODE_PP_TIMER_SEL_LEN, 3);
CEN_FLD (CEN_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN, 57);
CEN_FLD (CEN_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN, 58);

CEN_FLD (CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN, 4);
CEN_FLD (CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_C, 56);
CEN_FLD (CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN, 4);
CEN_FLD (CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_D, 60);
CEN_FLD (CEN_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN, 4);

CEN_FLD (CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_F, 52);
CEN_FLD (CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN, 4);
CEN_FLD (CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_RX_DFE_CONFIG_PP_PEAK_CFG, 48);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_PEAK_CFG_LEN, 2);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_AMIN_CFG, 50);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_AMIN_CFG_LEN, 3);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_ANAP_CFG, 53);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_ANAP_CFG_LEN, 2);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_H1_CFG, 55);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_H1_CFG_LEN, 2);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_H1AP_CFG, 57);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_H1AP_CFG_LEN, 3);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_CA_CFG, 60);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_CA_CFG_LEN, 2);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_SPMUX_CFG, 62);
CEN_FLD (CEN_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN, 2);

CEN_FLD (CEN_RX_DFE_TIMERS_PP_INIT_TMR_CFG, 48);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN, 3);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_BER_CFG, 51);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_BER_CFG_LEN, 3);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_FIFO_DLY_CFG, 54);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN, 2);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_DDC_CFG, 56);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_DDC_CFG_LEN, 2);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_DAC_BO_CFG, 58);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN, 3);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_PROT_CFG, 61);
CEN_FLD (CEN_RX_DFE_TIMERS_PP_PROT_CFG_LEN, 2);

CEN_FLD (CEN_RX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_RX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_RX_RECAL_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_RX_RECAL_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN, 4);

CEN_FLD (CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_RX_MODE2_PP_PP_TRC_EN, 48);
CEN_FLD (CEN_RX_MODE2_PP_PP_TRC_MODE, 49);
CEN_FLD (CEN_RX_MODE2_PP_PP_TRC_MODE_LEN, 3);
CEN_FLD (CEN_RX_MODE2_PP_BIST_JITTER_PULSE_SEL, 52);
CEN_FLD (CEN_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN, 2);
CEN_FLD (CEN_RX_MODE2_PP_BIST_MIN_EYE_WIDTH, 54);
CEN_FLD (CEN_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN, 6);
CEN_FLD (CEN_RX_MODE2_PP_WT_PATTERN_LENGTH, 62);
CEN_FLD (CEN_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_RX_BIST_GCRMSG_PP_EN, 48);

CEN_FLD (CEN_RX_SCOPE_CNTL_PP_CONTROL, 48);
CEN_FLD (CEN_RX_SCOPE_CNTL_PP_CONTROL_LEN, 2);
CEN_FLD (CEN_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG, 51);
CEN_FLD (CEN_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN, 3);

CEN_FLD (CEN_RX_MODE3_PP_BIST_STEP_INTERVAL_EN, 48);
CEN_FLD (CEN_RX_MODE3_PP_BIST_STEP_INTERVAL, 49);
CEN_FLD (CEN_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN, 2);
CEN_FLD (CEN_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN, 51);
CEN_FLD (CEN_RX_MODE3_PP_BIST_PHASEROT_OFFSET, 52);
CEN_FLD (CEN_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN, 2);
CEN_FLD (CEN_RX_MODE3_PP_BIST_BUFFER_SEL, 54);
CEN_FLD (CEN_RX_MODE3_PP_BIST_BUFFER_SEL_LEN, 3);

CEN_FLD (CEN_RX_STOP_CNTL_STAT_PG_STATE_ENABLE, 48);
CEN_FLD (CEN_RX_STOP_CNTL_STAT_PG_ADDR_MSB, 56);
CEN_FLD (CEN_RX_STOP_CNTL_STAT_PG_ADDR_MSB_LEN, 4);
CEN_FLD (CEN_RX_STOP_CNTL_STAT_PG_MASK_MSB, 60);
CEN_FLD (CEN_RX_STOP_CNTL_STAT_PG_MASK_MSB_LEN, 4);

CEN_FLD (CEN_RX_STOP_ADDR_LSB_PG_LSB, 48);
CEN_FLD (CEN_RX_STOP_ADDR_LSB_PG_LSB_LEN, 16);

CEN_FLD (CEN_RX_STOP_MASK_LSB_PG_LSB, 48);
CEN_FLD (CEN_RX_STOP_MASK_LSB_PG_LSB_LEN, 16);

CEN_FLD (CEN_RX_WT_CONFIG_PG_CHECK_COUNT, 48);
CEN_FLD (CEN_RX_WT_CONFIG_PG_CHECK_COUNT_LEN, 5);
CEN_FLD (CEN_RX_WT_CONFIG_PG_CHECK_LANES, 53);
CEN_FLD (CEN_RX_WT_CONFIG_PG_CHECK_LANES_LEN, 2);

CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE, 48);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_PRBS_SCRAMBLE_MODE, 50);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL, 55);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL, 58);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_ENABLE_DFE_V1, 61);
CEN_FLD (CEN_TXPACKS0_RX_MODE1_PP_AMIN_ALL, 62);

CEN_FLD (CEN_TXPACKS0_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC, 49);
CEN_FLD (CEN_TXPACKS0_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE, 50);

CEN_FLD (CEN_TXPACKS0_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS0_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS0_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS0_RX_BER_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS0_RX_BER_MODE_PP_TIMER_FREEZE_EN, 48);
CEN_FLD (CEN_TXPACKS0_RX_BER_MODE_PP_COUNT_FREEZE_EN, 49);
CEN_FLD (CEN_TXPACKS0_RX_BER_MODE_PP_COUNT_SEL, 51);
CEN_FLD (CEN_TXPACKS0_RX_BER_MODE_PP_COUNT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_BER_MODE_PP_TIMER_SEL, 54);
CEN_FLD (CEN_TXPACKS0_RX_BER_MODE_PP_TIMER_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN, 57);
CEN_FLD (CEN_TXPACKS0_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN, 58);

CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_C, 56);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_D, 60);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN, 4);

CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_F, 52);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS0_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_PEAK_CFG, 48);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_PEAK_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_AMIN_CFG, 50);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_AMIN_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_ANAP_CFG, 53);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_ANAP_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_H1_CFG, 55);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_H1_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_H1AP_CFG, 57);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_H1AP_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_CA_CFG, 60);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_CA_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_SPMUX_CFG, 62);
CEN_FLD (CEN_TXPACKS0_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_INIT_TMR_CFG, 48);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_BER_CFG, 51);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_BER_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_FIFO_DLY_CFG, 54);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_DDC_CFG, 56);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_DDC_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_DAC_BO_CFG, 58);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_PROT_CFG, 61);
CEN_FLD (CEN_TXPACKS0_RX_DFE_TIMERS_PP_PROT_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS0_RX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS0_RX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN, 4);

CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS0_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS0_RX_MODE2_PP_PP_TRC_EN, 48);
CEN_FLD (CEN_TXPACKS0_RX_MODE2_PP_PP_TRC_MODE, 49);
CEN_FLD (CEN_TXPACKS0_RX_MODE2_PP_PP_TRC_MODE_LEN, 3);
CEN_FLD (CEN_TXPACKS0_RX_MODE2_PP_BIST_JITTER_PULSE_SEL, 52);
CEN_FLD (CEN_TXPACKS0_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_MODE2_PP_BIST_MIN_EYE_WIDTH, 54);
CEN_FLD (CEN_TXPACKS0_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN, 6);
CEN_FLD (CEN_TXPACKS0_RX_MODE2_PP_WT_PATTERN_LENGTH, 62);
CEN_FLD (CEN_TXPACKS0_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS0_RX_BIST_GCRMSG_PP_EN, 48);

CEN_FLD (CEN_TXPACKS0_RX_SCOPE_CNTL_PP_CONTROL, 48);
CEN_FLD (CEN_TXPACKS0_RX_SCOPE_CNTL_PP_CONTROL_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG, 51);
CEN_FLD (CEN_TXPACKS0_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN, 3);

CEN_FLD (CEN_TXPACKS0_RX_MODE3_PP_BIST_STEP_INTERVAL_EN, 48);
CEN_FLD (CEN_TXPACKS0_RX_MODE3_PP_BIST_STEP_INTERVAL, 49);
CEN_FLD (CEN_TXPACKS0_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN, 51);
CEN_FLD (CEN_TXPACKS0_RX_MODE3_PP_BIST_PHASEROT_OFFSET, 52);
CEN_FLD (CEN_TXPACKS0_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN, 2);
CEN_FLD (CEN_TXPACKS0_RX_MODE3_PP_BIST_BUFFER_SEL, 54);
CEN_FLD (CEN_TXPACKS0_RX_MODE3_PP_BIST_BUFFER_SEL_LEN, 3);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS0_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS0_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS0_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS0_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS0_SLICE2_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS0_SLICE2_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS0_SLICE3_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS0_SLICE3_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE, 48);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_PRBS_SCRAMBLE_MODE, 50);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL, 55);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL, 58);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_ENABLE_DFE_V1, 61);
CEN_FLD (CEN_TXPACKS1_RX_MODE1_PP_AMIN_ALL, 62);

CEN_FLD (CEN_TXPACKS1_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC, 49);
CEN_FLD (CEN_TXPACKS1_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE, 50);

CEN_FLD (CEN_TXPACKS1_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS1_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS1_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS1_RX_BER_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS1_RX_BER_MODE_PP_TIMER_FREEZE_EN, 48);
CEN_FLD (CEN_TXPACKS1_RX_BER_MODE_PP_COUNT_FREEZE_EN, 49);
CEN_FLD (CEN_TXPACKS1_RX_BER_MODE_PP_COUNT_SEL, 51);
CEN_FLD (CEN_TXPACKS1_RX_BER_MODE_PP_COUNT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_BER_MODE_PP_TIMER_SEL, 54);
CEN_FLD (CEN_TXPACKS1_RX_BER_MODE_PP_TIMER_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN, 57);
CEN_FLD (CEN_TXPACKS1_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN, 58);

CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_C, 56);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_D, 60);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN, 4);

CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_F, 52);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS1_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_PEAK_CFG, 48);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_PEAK_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_AMIN_CFG, 50);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_AMIN_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_ANAP_CFG, 53);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_ANAP_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_H1_CFG, 55);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_H1_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_H1AP_CFG, 57);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_H1AP_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_CA_CFG, 60);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_CA_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_SPMUX_CFG, 62);
CEN_FLD (CEN_TXPACKS1_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_INIT_TMR_CFG, 48);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_BER_CFG, 51);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_BER_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_FIFO_DLY_CFG, 54);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_DDC_CFG, 56);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_DDC_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_DAC_BO_CFG, 58);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_PROT_CFG, 61);
CEN_FLD (CEN_TXPACKS1_RX_DFE_TIMERS_PP_PROT_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS1_RX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS1_RX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN, 4);

CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS1_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS1_RX_MODE2_PP_PP_TRC_EN, 48);
CEN_FLD (CEN_TXPACKS1_RX_MODE2_PP_PP_TRC_MODE, 49);
CEN_FLD (CEN_TXPACKS1_RX_MODE2_PP_PP_TRC_MODE_LEN, 3);
CEN_FLD (CEN_TXPACKS1_RX_MODE2_PP_BIST_JITTER_PULSE_SEL, 52);
CEN_FLD (CEN_TXPACKS1_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_MODE2_PP_BIST_MIN_EYE_WIDTH, 54);
CEN_FLD (CEN_TXPACKS1_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN, 6);
CEN_FLD (CEN_TXPACKS1_RX_MODE2_PP_WT_PATTERN_LENGTH, 62);
CEN_FLD (CEN_TXPACKS1_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS1_RX_BIST_GCRMSG_PP_EN, 48);

CEN_FLD (CEN_TXPACKS1_RX_SCOPE_CNTL_PP_CONTROL, 48);
CEN_FLD (CEN_TXPACKS1_RX_SCOPE_CNTL_PP_CONTROL_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG, 51);
CEN_FLD (CEN_TXPACKS1_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN, 3);

CEN_FLD (CEN_TXPACKS1_RX_MODE3_PP_BIST_STEP_INTERVAL_EN, 48);
CEN_FLD (CEN_TXPACKS1_RX_MODE3_PP_BIST_STEP_INTERVAL, 49);
CEN_FLD (CEN_TXPACKS1_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN, 51);
CEN_FLD (CEN_TXPACKS1_RX_MODE3_PP_BIST_PHASEROT_OFFSET, 52);
CEN_FLD (CEN_TXPACKS1_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN, 2);
CEN_FLD (CEN_TXPACKS1_RX_MODE3_PP_BIST_BUFFER_SEL, 54);
CEN_FLD (CEN_TXPACKS1_RX_MODE3_PP_BIST_BUFFER_SEL_LEN, 3);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS1_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS1_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS1_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS1_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS1_SLICE2_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS1_SLICE2_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS1_SLICE3_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS1_SLICE3_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE, 48);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_PRBS_SCRAMBLE_MODE, 50);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL, 55);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL, 58);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_ENABLE_DFE_V1, 61);
CEN_FLD (CEN_TXPACKS2_RX_MODE1_PP_AMIN_ALL, 62);

CEN_FLD (CEN_TXPACKS2_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC, 49);
CEN_FLD (CEN_TXPACKS2_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE, 50);

CEN_FLD (CEN_TXPACKS2_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS2_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS2_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS2_RX_BER_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS2_RX_BER_MODE_PP_TIMER_FREEZE_EN, 48);
CEN_FLD (CEN_TXPACKS2_RX_BER_MODE_PP_COUNT_FREEZE_EN, 49);
CEN_FLD (CEN_TXPACKS2_RX_BER_MODE_PP_COUNT_SEL, 51);
CEN_FLD (CEN_TXPACKS2_RX_BER_MODE_PP_COUNT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_BER_MODE_PP_TIMER_SEL, 54);
CEN_FLD (CEN_TXPACKS2_RX_BER_MODE_PP_TIMER_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN, 57);
CEN_FLD (CEN_TXPACKS2_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN, 58);

CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_C, 56);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_D, 60);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN, 4);

CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_F, 52);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS2_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_PEAK_CFG, 48);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_PEAK_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_AMIN_CFG, 50);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_AMIN_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_ANAP_CFG, 53);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_ANAP_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_H1_CFG, 55);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_H1_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_H1AP_CFG, 57);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_H1AP_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_CA_CFG, 60);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_CA_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_SPMUX_CFG, 62);
CEN_FLD (CEN_TXPACKS2_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_INIT_TMR_CFG, 48);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_BER_CFG, 51);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_BER_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_FIFO_DLY_CFG, 54);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_DDC_CFG, 56);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_DDC_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_DAC_BO_CFG, 58);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_PROT_CFG, 61);
CEN_FLD (CEN_TXPACKS2_RX_DFE_TIMERS_PP_PROT_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS2_RX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS2_RX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN, 4);

CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS2_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS2_RX_MODE2_PP_PP_TRC_EN, 48);
CEN_FLD (CEN_TXPACKS2_RX_MODE2_PP_PP_TRC_MODE, 49);
CEN_FLD (CEN_TXPACKS2_RX_MODE2_PP_PP_TRC_MODE_LEN, 3);
CEN_FLD (CEN_TXPACKS2_RX_MODE2_PP_BIST_JITTER_PULSE_SEL, 52);
CEN_FLD (CEN_TXPACKS2_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_MODE2_PP_BIST_MIN_EYE_WIDTH, 54);
CEN_FLD (CEN_TXPACKS2_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN, 6);
CEN_FLD (CEN_TXPACKS2_RX_MODE2_PP_WT_PATTERN_LENGTH, 62);
CEN_FLD (CEN_TXPACKS2_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS2_RX_BIST_GCRMSG_PP_EN, 48);

CEN_FLD (CEN_TXPACKS2_RX_SCOPE_CNTL_PP_CONTROL, 48);
CEN_FLD (CEN_TXPACKS2_RX_SCOPE_CNTL_PP_CONTROL_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG, 51);
CEN_FLD (CEN_TXPACKS2_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN, 3);

CEN_FLD (CEN_TXPACKS2_RX_MODE3_PP_BIST_STEP_INTERVAL_EN, 48);
CEN_FLD (CEN_TXPACKS2_RX_MODE3_PP_BIST_STEP_INTERVAL, 49);
CEN_FLD (CEN_TXPACKS2_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN, 51);
CEN_FLD (CEN_TXPACKS2_RX_MODE3_PP_BIST_PHASEROT_OFFSET, 52);
CEN_FLD (CEN_TXPACKS2_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN, 2);
CEN_FLD (CEN_TXPACKS2_RX_MODE3_PP_BIST_BUFFER_SEL, 54);
CEN_FLD (CEN_TXPACKS2_RX_MODE3_PP_BIST_BUFFER_SEL_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS2_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS2_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS2_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS2_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS2_SLICE2_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS2_SLICE2_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS2_SLICE3_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS2_SLICE3_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE, 48);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_PRBS_SCRAMBLE_MODE, 50);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL, 55);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL, 58);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_ENABLE_DFE_V1, 61);
CEN_FLD (CEN_TXPACKS3_RX_MODE1_PP_AMIN_ALL, 62);

CEN_FLD (CEN_TXPACKS3_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC, 49);
CEN_FLD (CEN_TXPACKS3_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE, 50);

CEN_FLD (CEN_TXPACKS3_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS3_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS3_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS3_RX_BER_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS3_RX_BER_MODE_PP_TIMER_FREEZE_EN, 48);
CEN_FLD (CEN_TXPACKS3_RX_BER_MODE_PP_COUNT_FREEZE_EN, 49);
CEN_FLD (CEN_TXPACKS3_RX_BER_MODE_PP_COUNT_SEL, 51);
CEN_FLD (CEN_TXPACKS3_RX_BER_MODE_PP_COUNT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_BER_MODE_PP_TIMER_SEL, 54);
CEN_FLD (CEN_TXPACKS3_RX_BER_MODE_PP_TIMER_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN, 57);
CEN_FLD (CEN_TXPACKS3_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN, 58);

CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_C, 56);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_D, 60);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN, 4);

CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_F, 52);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS3_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_PEAK_CFG, 48);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_PEAK_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_AMIN_CFG, 50);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_AMIN_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_ANAP_CFG, 53);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_ANAP_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_H1_CFG, 55);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_H1_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_H1AP_CFG, 57);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_H1AP_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_CA_CFG, 60);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_CA_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_SPMUX_CFG, 62);
CEN_FLD (CEN_TXPACKS3_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_INIT_TMR_CFG, 48);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_BER_CFG, 51);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_BER_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_FIFO_DLY_CFG, 54);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_DDC_CFG, 56);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_DDC_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_DAC_BO_CFG, 58);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_PROT_CFG, 61);
CEN_FLD (CEN_TXPACKS3_RX_DFE_TIMERS_PP_PROT_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS3_RX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS3_RX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN, 4);

CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS3_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS3_RX_MODE2_PP_PP_TRC_EN, 48);
CEN_FLD (CEN_TXPACKS3_RX_MODE2_PP_PP_TRC_MODE, 49);
CEN_FLD (CEN_TXPACKS3_RX_MODE2_PP_PP_TRC_MODE_LEN, 3);
CEN_FLD (CEN_TXPACKS3_RX_MODE2_PP_BIST_JITTER_PULSE_SEL, 52);
CEN_FLD (CEN_TXPACKS3_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_MODE2_PP_BIST_MIN_EYE_WIDTH, 54);
CEN_FLD (CEN_TXPACKS3_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN, 6);
CEN_FLD (CEN_TXPACKS3_RX_MODE2_PP_WT_PATTERN_LENGTH, 62);
CEN_FLD (CEN_TXPACKS3_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS3_RX_BIST_GCRMSG_PP_EN, 48);

CEN_FLD (CEN_TXPACKS3_RX_SCOPE_CNTL_PP_CONTROL, 48);
CEN_FLD (CEN_TXPACKS3_RX_SCOPE_CNTL_PP_CONTROL_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG, 51);
CEN_FLD (CEN_TXPACKS3_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN, 3);

CEN_FLD (CEN_TXPACKS3_RX_MODE3_PP_BIST_STEP_INTERVAL_EN, 48);
CEN_FLD (CEN_TXPACKS3_RX_MODE3_PP_BIST_STEP_INTERVAL, 49);
CEN_FLD (CEN_TXPACKS3_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN, 51);
CEN_FLD (CEN_TXPACKS3_RX_MODE3_PP_BIST_PHASEROT_OFFSET, 52);
CEN_FLD (CEN_TXPACKS3_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN, 2);
CEN_FLD (CEN_TXPACKS3_RX_MODE3_PP_BIST_BUFFER_SEL, 54);
CEN_FLD (CEN_TXPACKS3_RX_MODE3_PP_BIST_BUFFER_SEL_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS3_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS3_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS3_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS3_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS3_SLICE2_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS3_SLICE2_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_4, 52);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS3_SLICE3_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS3_SLICE3_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_REDUCED_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_PRBS_SCRAMBLE_MODE, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_PRBS_SCRAMBLE_MODE_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_ACT_CHECK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL, 55);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_BLOCK_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL, 58);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_BIT_LOCK_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_ENABLE_DFE_V1, 61);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_AMIN_ALL, 62);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_CNTL_FAST_PP_PRBS_CHECK_SYNC, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_CNTL_FAST_PP_ENABLE_REDUCED_SCRAMBLE, 50);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DYN_RECAL_TIMEOUTS_PP_INTERVAL_TIMEOUT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DYN_RECAL_TIMEOUTS_PP_STATUS_RPT_TIMEOUT_SEL_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BER_CNTL_PP_EN, 48);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_TIMER_FREEZE_EN, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_COUNT_FREEZE_EN, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_COUNT_SEL, 51);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_COUNT_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_TIMER_SEL, 54);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_TIMER_SEL_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_CLR_COUNT_ON_READ_EN, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_CLR_TIMER_ON_READ_EN, 58);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_B_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_C, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_C_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_D, 60);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_TIMEOUT_SEL_D_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_F, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_F_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_PEAK_CFG, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_PEAK_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_AMIN_CFG, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_AMIN_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_ANAP_CFG, 53);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_ANAP_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_H1_CFG, 55);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_H1_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_H1AP_CFG, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_H1AP_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_CA_CFG, 60);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_CA_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_SPMUX_CFG, 62);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_SPMUX_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_INIT_TMR_CFG, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_INIT_TMR_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_BER_CFG, 51);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_BER_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_FIFO_DLY_CFG, 54);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_FIFO_DLY_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_DDC_CFG, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_DDC_CFG_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_DAC_BO_CFG, 58);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_DAC_BO_CFG_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_PROT_CFG, 61);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_PROT_CFG_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RESET_CFG_PP_HLD, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RESET_CFG_PP_HLD_LEN, 16);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO1_PP_TIMEOUT_SEL_A, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO1_PP_TIMEOUT_SEL_A_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO1_PP_TIMEOUT_SEL_B, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO1_PP_TIMEOUT_SEL_B_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_E, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_E_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_G, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_G_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_H, 60);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_TIMEOUT_SEL_H_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_I, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_I_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_J, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_J_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_K, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_K_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_L, 60);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_TIMEOUT_SEL_L_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_PP_TRC_EN, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_PP_TRC_MODE, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_PP_TRC_MODE_LEN, 3);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_BIST_JITTER_PULSE_SEL, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_BIST_JITTER_PULSE_SEL_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_BIST_MIN_EYE_WIDTH, 54);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_BIST_MIN_EYE_WIDTH_LEN, 6);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_WT_PATTERN_LENGTH, 62);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_WT_PATTERN_LENGTH_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_BIST_GCRMSG_PP_EN, 48);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SCOPE_CNTL_PP_CONTROL, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SCOPE_CNTL_PP_CONTROL_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG, 51);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_SCOPE_CNTL_PP_H1_CLKADJ_CFG_LEN, 3);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_STEP_INTERVAL_EN, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_STEP_INTERVAL, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_STEP_INTERVAL_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_PHASEROT_OFFSET_EN, 51);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_PHASEROT_OFFSET, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_PHASEROT_OFFSET_LEN, 2);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_BUFFER_SEL, 54);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_BIST_BUFFER_SEL_LEN, 3);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_RX_PL_SPARE_MODE, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE0_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_MODE_PL_LANE_PDWN, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_MODE_PL_LANE_SCRAMBLE_DISABLE, 54);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_CNTL_PL_BLOCK_LOCK_LANE, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_CNTL_PL_CHECK_SKEW_LANE, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_CNTL_PL_PDWN_LITE, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_CNTL_PL_OFFCAL_MODE, 51);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_0, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_2, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_3, 51);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_RX_PL_SPARE_MODE, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_5, 53);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_6, 54);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL_7, 55);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_BIST_STAT_PL_ERR, 48);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_PEAK, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_PEAK_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_GAIN, 52);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_GAIN_LEN, 4);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_OFFSET, 58);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_CNTL_PL_ADJ_DONE, 48);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PROT_MODE_PL_PHASEROT_OFFSET_LEN, 6);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIFO_STAT_PL_L2U_DLY, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIFO_STAT_PL_L2U_DLY_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AP_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AP_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AP_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AP_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AN_PL_EVEN_SAMP, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AN_PL_EVEN_SAMP_LEN, 8);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AN_PL_ODD_SAMP, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AN_PL_ODD_SAMP_LEN, 8);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMIN_PL_EVEN, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMIN_PL_EVEN_LEN, 8);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMIN_PL_ODD, 56);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMIN_PL_ODD_LEN, 8);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_EVEN_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_EVEN_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_EVEN_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_EVEN_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_ODD_PL_SAMP1, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_ODD_PL_SAMP1_LEN, 7);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_ODD_PL_SAMP0, 57);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_ODD_PL_SAMP0_LEN, 7);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PRBS_MODE_PL_TAP_ID, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PRBS_MODE_PL_TAP_ID_LEN, 3);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DESKEW_STAT_PL_BAD_BLOCK_LOCK, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DESKEW_STAT_PL_BAD_SKEW, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DESKEW_STAT_PL_BAD, 50);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_MASK_PL_ERRS, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_MASK_PL_ERRS_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_ERROR_INJECT_PL_PL_ERR_INJ_LEN, 2);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SLS_PL_LANE_SEL, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SLS_PL_9TH_PATTERN_EN, 49);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_WT_STATUS_PL_LANE_DISABLED, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_WT_STATUS_PL_LANE_INVERTED, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_WT_STATUS_PL_LANE_BAD_CODE_LEN, 3);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SERVO_CNTL_PL_OP_DONE, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SERVO_CNTL_PL_OP, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SERVO_CNTL_PL_OP_LEN, 5);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DFE_CLKADJ_PL_CLKADJ_LEN, 4);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_TRACE_PL_LN_TRC_EN, 48);

CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_EYE_OPT_STAT_PL_BAD_BER, 48);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_EYE_OPT_STAT_PL_BAD_WIDTH, 49);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_EYE_OPT_STAT_PL_BAD_HEIGHT, 50);
CEN_FLD (CEN_TXPACKS4_RXPACK_4_SLICE1_RX_EYE_OPT_STAT_PL_BAD_DDC, 51);

CEN_FLD (CEN_SCOM_MODE_PB_GCR_TEST, 0);
CEN_FLD (CEN_SCOM_MODE_PB_ENABLE_GCR_OFL_BUFF, 1);
CEN_FLD (CEN_SCOM_MODE_PB_IORESET_HARD_BUS0, 2);
CEN_FLD (CEN_SCOM_MODE_PB_IORESET_HARD_BUS0_LEN, 6);
CEN_FLD (CEN_SCOM_MODE_PB_GCR_HANG_DET_SEL, 8);
CEN_FLD (CEN_SCOM_MODE_PB_GCR_HANG_DET_SEL_LEN, 3);
CEN_FLD (CEN_SCOM_MODE_PB_GCR_BUFFER_ENABLED_RO_SIGNAL, 11);
CEN_FLD (CEN_SCOM_MODE_PB_GCR_HANG_ERROR_MASK, 12);
CEN_FLD (CEN_SCOM_MODE_PB_GCR_HANG_ERROR_INJ, 13);
CEN_FLD (CEN_SCOM_MODE_PB_SPARES, 14);
CEN_FLD (CEN_SCOM_MODE_PB_SPARES_LEN, 8);

CEN_FLD (CEN_FIR_REG_RX_INVALID_STATE_OR_PARITY_ERROR, 0);
CEN_FLD (CEN_FIR_REG_TX_INVALID_STATE_OR_PARITY_ERROR, 1);
CEN_FLD (CEN_FIR_REG_GCR_HANG_ERROR, 2);
CEN_FLD (CEN_FIR_REG_RESERVED3_7, 3);
CEN_FLD (CEN_FIR_REG_RESERVED3_7_LEN, 5);
CEN_FLD (CEN_FIR_REG_RX_BUS0_TRAINING_ERROR, 8);
CEN_FLD (CEN_FIR_REG_RX_BUS0_SPARE_DEPLOYED, 9);
CEN_FLD (CEN_FIR_REG_RX_BUS0_MAX_SPARES_EXCEEDED, 10);
CEN_FLD (CEN_FIR_REG_RX_BUS0_RECAL_OR_DYN_REPAIR_ERROR, 11);
CEN_FLD (CEN_FIR_REG_RX_BUS0_TOO_MANY_BUS_ERRORS, 12);
CEN_FLD (CEN_FIR_REG_RESERVED13_15, 13);
CEN_FLD (CEN_FIR_REG_RESERVED13_15_LEN, 3);
CEN_FLD (CEN_FIR_REG_RX_BUS1_TRAINING_ERROR, 16);
CEN_FLD (CEN_FIR_REG_RX_BUS1_SPARE_DEPLOYED, 17);
CEN_FLD (CEN_FIR_REG_RX_BUS1_MAX_SPARES_EXCEEDED, 18);
CEN_FLD (CEN_FIR_REG_RX_BUS1_RECAL_OR_DYN_REPAIR_ERROR, 19);
CEN_FLD (CEN_FIR_REG_RX_BUS1_TOO_MANY_BUS_ERRORS, 20);
CEN_FLD (CEN_FIR_REG_RESERVED21_23, 21);
CEN_FLD (CEN_FIR_REG_RESERVED21_23_LEN, 3);
CEN_FLD (CEN_FIR_REG_RX_BUS2_TRAINING_ERROR, 24);
CEN_FLD (CEN_FIR_REG_RX_BUS2_SPARE_DEPLOYED, 25);
CEN_FLD (CEN_FIR_REG_RX_BUS2_MAX_SPARES_EXCEEDED, 26);
CEN_FLD (CEN_FIR_REG_RX_BUS2_RECAL_OR_DYN_REPAIR_ERROR, 27);
CEN_FLD (CEN_FIR_REG_RX_BUS2_TOO_MANY_BUS_ERRORS, 28);
CEN_FLD (CEN_FIR_REG_RESERVED29_31, 29);
CEN_FLD (CEN_FIR_REG_RESERVED29_31_LEN, 3);
CEN_FLD (CEN_FIR_REG_RX_BUS3_TRAINING_ERROR, 32);
CEN_FLD (CEN_FIR_REG_RX_BUS3_SPARE_DEPLOYED, 33);
CEN_FLD (CEN_FIR_REG_RX_BUS3_MAX_SPARES_EXCEEDED, 34);
CEN_FLD (CEN_FIR_REG_RX_BUS3_RECAL_OR_DYN_REPAIR_ERROR, 35);
CEN_FLD (CEN_FIR_REG_RX_BUS3_TOO_MANY_BUS_ERRORS, 36);
CEN_FLD (CEN_FIR_REG_RESERVED37_39, 37);
CEN_FLD (CEN_FIR_REG_RESERVED37_39_LEN, 3);
CEN_FLD (CEN_FIR_REG_RX_BUS4_TRAINING_ERROR, 40);
CEN_FLD (CEN_FIR_REG_RX_BUS4_SPARE_DEPLOYED, 41);
CEN_FLD (CEN_FIR_REG_RX_BUS4_MAX_SPARES_EXCEEDED, 42);
CEN_FLD (CEN_FIR_REG_RX_BUS4_RECAL_OR_DYN_REPAIR_ERROR, 43);
CEN_FLD (CEN_FIR_REG_RX_BUS4_TOO_MANY_BUS_ERRORS, 44);
CEN_FLD (CEN_FIR_REG_RESERVED45_47, 45);
CEN_FLD (CEN_FIR_REG_RESERVED45_47_LEN, 3);
CEN_FLD (CEN_FIR_REG_SCOMFIR_ERROR, 48);
CEN_FLD (CEN_FIR_REG_SCOMFIR_ERROR_CLONE, 49);

CEN_FLD (CEN_FIR_MASK_REG_RX_INVALID_STATE_OR_PARITY_ERROR, 0);
CEN_FLD (CEN_FIR_MASK_REG_TX_INVALID_STATE_OR_PARITY_ERROR, 1);
CEN_FLD (CEN_FIR_MASK_REG_GCR_HANG_ERROR, 2);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED3_7, 3);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED3_7_LEN, 5);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS0_TRAINING_ERROR, 8);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS0_SPARE_DEPLOYED, 9);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS0_MAX_SPARES_EXCEEDED, 10);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS0_RECAL_OR_DYN_REPAIR_ERROR, 11);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS0_TOO_MANY_BUS_ERRORS, 12);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED13_15, 13);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED13_15_LEN, 3);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS1_TRAINING_ERROR, 16);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS1_SPARE_DEPLOYED, 17);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS1_MAX_SPARES_EXCEEDED, 18);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS1_RECAL_OR_DYN_REPAIR_ERROR, 19);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS1_TOO_MANY_BUS_ERRORS, 20);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED21_23, 21);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED21_23_LEN, 3);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS2_TRAINING_ERROR, 24);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS2_SPARE_DEPLOYED, 25);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS2_MAX_SPARES_EXCEEDED, 26);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS2_RECAL_OR_DYN_REPAIR_ERROR, 27);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS2_TOO_MANY_BUS_ERRORS, 28);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED29_31, 29);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED29_31_LEN, 3);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS3_TRAINING_ERROR, 32);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS3_SPARE_DEPLOYED, 33);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS3_MAX_SPARES_EXCEEDED, 34);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS3_RECAL_OR_DYN_REPAIR_ERROR, 35);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS3_TOO_MANY_BUS_ERRORS, 36);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED37_39, 37);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED37_39_LEN, 3);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS4_TRAINING_ERROR, 40);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS4_SPARE_DEPLOYED, 41);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS4_MAX_SPARES_EXCEEDED, 42);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS4_RECAL_OR_DYN_REPAIR_ERROR, 43);
CEN_FLD (CEN_FIR_MASK_REG_RX_BUS4_TOO_MANY_BUS_ERRORS, 44);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED45_47, 45);
CEN_FLD (CEN_FIR_MASK_REG_RESERVED45_47_LEN, 3);
CEN_FLD (CEN_FIR_MASK_REG_INTERNAL_SCOM_ERROR, 48);
CEN_FLD (CEN_FIR_MASK_REG_INTERNAL_SCOM_ERROR_CLONE, 49);

CEN_FLD (CEN_FIR_ACTION0_REG_ACTION0, 0);
CEN_FLD (CEN_FIR_ACTION0_REG_ACTION0_LEN, 50);

CEN_FLD (CEN_FIR_ACTION1_REG_ACTION1, 0);
CEN_FLD (CEN_FIR_ACTION1_REG_ACTION1_LEN, 50);


CEN_FLD (CEN_TX_IMPCAL_NVAL_PB_ZCAL_N, 48);
CEN_FLD (CEN_TX_IMPCAL_NVAL_PB_ZCAL_N_LEN, 9);

CEN_FLD (CEN_TX_IMPCAL_PVAL_PB_ZCAL_P, 48);
CEN_FLD (CEN_TX_IMPCAL_PVAL_PB_ZCAL_P_LEN, 9);

CEN_FLD (CEN_TX_IMPCAL_P_4X_PB_ZCAL_P_4X, 48);
CEN_FLD (CEN_TX_IMPCAL_P_4X_PB_ZCAL_P_4X_LEN, 5);

CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_EN, 48);
CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_CAL_SEGS, 49);
CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_CMP_INV, 50);
CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_CMP_OFFSET, 51);
CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_CMP_RESET, 52);
CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_SWO_POWERDOWN, 53);
CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_CYA_DATA_INV, 54);
CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_TEST_OVR_2R, 55);
CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_DEBUG_MODE, 62);
CEN_FLD (CEN_TX_IMPCAL_SWO1_PB_ZCAL_DEBUG_MODE_LEN, 2);

CEN_FLD (CEN_TX_IMPCAL_SWO2_PB_ZCAL_SM_MIN_VAL, 48);
CEN_FLD (CEN_TX_IMPCAL_SWO2_PB_ZCAL_SM_MIN_VAL_LEN, 7);
CEN_FLD (CEN_TX_IMPCAL_SWO2_PB_ZCAL_SM_MAX_VAL, 55);
CEN_FLD (CEN_TX_IMPCAL_SWO2_PB_ZCAL_SM_MAX_VAL_LEN, 7);

CEN_FLD (CEN_TX_ANALOG_IREF_PB_IREF_BC, 48);
CEN_FLD (CEN_TX_ANALOG_IREF_PB_IREF_BC_LEN, 3);

CEN_FLD (CEN_TX_MINIKERF_PB_MINIKERF, 48);
CEN_FLD (CEN_TX_MINIKERF_PB_MINIKERF_LEN, 16);

CEN_FLD (CEN_TX_INIT_VERSION_PB_VERSION, 48);
CEN_FLD (CEN_TX_INIT_VERSION_PB_VERSION_LEN, 16);

CEN_FLD (CEN_TX_SCRATCH_REG_PB_REG, 48);
CEN_FLD (CEN_TX_SCRATCH_REG_PB_REG_LEN, 16);

CEN_FLD (CEN_RX_FIR_RESET_PB_PB_CLR_PAR_ERRS, 62);
CEN_FLD (CEN_RX_FIR_RESET_PB_RESET, 63);

CEN_FLD (CEN_RX_FIR_PB_ERRS, 48);
CEN_FLD (CEN_RX_FIR_PB_ERRS_LEN, 10);

CEN_FLD (CEN_RX_FIR_MASK_PB_ERRS, 48);
CEN_FLD (CEN_RX_FIR_MASK_PB_ERRS_LEN, 10);

CEN_FLD (CEN_RX_FIR_ERROR_INJECT_PB_PB_ERRS_INJ, 48);
CEN_FLD (CEN_RX_FIR_ERROR_INJECT_PB_PB_ERRS_INJ_LEN, 10);

CEN_FLD (CEN_MBCCFGQ_CACHE_ENABLE, 0);
CEN_FLD (CEN_MBCCFGQ_CFG_DYN_WHAP_EN, 1);
CEN_FLD (CEN_MBCCFGQ_CLEANER_ENABLE, 2);
CEN_FLD (CEN_MBCCFGQ_CACHE_ONLY_ENABLE, 3);
CEN_FLD (CEN_MBCCFGQ_LRU_DMAP_EN, 4);
CEN_FLD (CEN_MBCCFGQ_LRU_RANDOM_EN, 5);
CEN_FLD (CEN_MBCCFGQ_LRU_SINGLE_MEM_EN, 6);
CEN_FLD (CEN_MBCCFGQ_CFG_SRW_DELETE_UE_EN, 7);
CEN_FLD (CEN_MBCCFGQ_SRW_LINE_DELETE_NEXT_CE_EN, 8);
CEN_FLD (CEN_MBCCFGQ_ONLY_LOG_ECC_UE, 9);
CEN_FLD (CEN_MBCCFGQ_ONLY_LOG_ECC_CE, 10);
CEN_FLD (CEN_MBCCFGQ_SRW_PREFETCH_DIS, 11);
CEN_FLD (CEN_MBCCFGQ_PRQ_PREFETCH_DIS, 12);
CEN_FLD (CEN_MBCCFGQ_CLN_PAGE_MODE_BUNDLE_MAX_CNT_0_3, 13);
CEN_FLD (CEN_MBCCFGQ_CLN_PAGE_MODE_BUNDLE_MAX_CNT_0_3_LEN, 4);
CEN_FLD (CEN_MBCCFGQ_CLN_WRQ_TGT_ALLOC_0_5, 17);
CEN_FLD (CEN_MBCCFGQ_CLN_WRQ_TGT_ALLOC_0_5_LEN, 6);
CEN_FLD (CEN_MBCCFGQ_CLN_WR_PRIORITY_WRQ_HWMARK_0_5, 23);
CEN_FLD (CEN_MBCCFGQ_CLN_WR_PRIORITY_WRQ_HWMARK_0_5_LEN, 6);
CEN_FLD (CEN_MBCCFGQ_CLN_WR_PRIORITY_WRQ_LWMARK_0_5, 29);
CEN_FLD (CEN_MBCCFGQ_CLN_WR_PRIORITY_WRQ_LWMARK_0_5_LEN, 6);
CEN_FLD (CEN_MBCCFGQ_CLN_WR_PRIORITY_DV_HWMARK_0_13, 35);
CEN_FLD (CEN_MBCCFGQ_CLN_WR_PRIORITY_DV_HWMARK_0_13_LEN, 14);
CEN_FLD (CEN_MBCCFGQ_CLN_WR_PRIORITY_DV_LWMARK_0_13, 49);
CEN_FLD (CEN_MBCCFGQ_CLN_WR_PRIORITY_DV_LWMARK_0_13_LEN, 14);
CEN_FLD (CEN_MBCCFGQ_MBS_WAT_TRIGGER, 63);

CEN_FLD (CEN_MBCDCPMQ_MBCD0_CP_UTIL_EN_DC, 0);
CEN_FLD (CEN_MBCDCPMQ_MBCD0_CP_UTIL_SEL_DC_0_1, 1);
CEN_FLD (CEN_MBCDCPMQ_MBCD0_CP_UTIL_SEL_DC_0_1_LEN, 2);
CEN_FLD (CEN_MBCDCPMQ_MBCD0_CP_UTIL_EXT_SEL_0_2, 3);
CEN_FLD (CEN_MBCDCPMQ_MBCD0_CP_UTIL_EXT_SEL_0_2_LEN, 3);
CEN_FLD (CEN_MBCDCPMQ_MBCD0_CP_UTIL_MON_BITS_0_5, 6);
CEN_FLD (CEN_MBCDCPMQ_MBCD0_CP_UTIL_MON_BITS_0_5_LEN, 6);
CEN_FLD (CEN_MBCDCPMQ_MBCD1_CP_UTIL_EN_DC, 12);
CEN_FLD (CEN_MBCDCPMQ_MBCD1_CP_UTIL_SEL_DC_0_1, 13);
CEN_FLD (CEN_MBCDCPMQ_MBCD1_CP_UTIL_SEL_DC_0_1_LEN, 2);
CEN_FLD (CEN_MBCDCPMQ_MBCD1_CP_UTIL_EXT_SEL_0_2, 15);
CEN_FLD (CEN_MBCDCPMQ_MBCD1_CP_UTIL_EXT_SEL_0_2_LEN, 3);
CEN_FLD (CEN_MBCDCPMQ_MBCD1_CP_UTIL_MON_BITS_0_5, 18);
CEN_FLD (CEN_MBCDCPMQ_MBCD1_CP_UTIL_MON_BITS_0_5_LEN, 6);

CEN_FLD (CEN_MBCELOGQ_VALID_ECC_ERR, 0);
CEN_FLD (CEN_MBCELOGQ_CE, 1);
CEN_FLD (CEN_MBCELOGQ_UE, 2);
CEN_FLD (CEN_MBCELOGQ_SUE, 3);
CEN_FLD (CEN_MBCELOGQ_MBCD_READ_PORT, 4);
CEN_FLD (CEN_MBCELOGQ_ECC_SYNDROME, 5);
CEN_FLD (CEN_MBCELOGQ_ECC_SYNDROME_LEN, 8);
CEN_FLD (CEN_MBCELOGQ_CEUE_PERSISTENT, 13);
CEN_FLD (CEN_MBCELOGQ_CEUE_WINDOW_CLEAR, 14);
CEN_FLD (CEN_MBCELOGQ_RSVD, 15);
CEN_FLD (CEN_MBCELOGQ_EDRAM_BNK_3, 16);
CEN_FLD (CEN_MBCELOGQ_EDRAM_CA_0_2, 17);
CEN_FLD (CEN_MBCELOGQ_EDRAM_CA_0_2_LEN, 3);
CEN_FLD (CEN_MBCELOGQ_EDRAM_RA_2_9, 20);
CEN_FLD (CEN_MBCELOGQ_EDRAM_RA_2_9_LEN, 8);
CEN_FLD (CEN_MBCELOGQ_EDRAM_RA_0_1, 28);
CEN_FLD (CEN_MBCELOGQ_EDRAM_RA_0_1_LEN, 2);
CEN_FLD (CEN_MBCELOGQ_EDRAM_BNK_0_2, 30);
CEN_FLD (CEN_MBCELOGQ_EDRAM_BNK_0_2_LEN, 3);
CEN_FLD (CEN_MBCELOGQ_EDRAM_DW, 33);
CEN_FLD (CEN_MBCELOGQ_EDRAM_DW_LEN, 4);

CEN_FLD (CEN_MBCPGQ_CFG_MBC_MEMBER_DIS, 0);
CEN_FLD (CEN_MBCPGQ_CFG_MBC_MEMBER_DIS_LEN, 16);
CEN_FLD (CEN_MBCPGQ_CFG_MBC_PARTIAL_GOOD_DIS, 16);
CEN_FLD (CEN_MBCPGQ_EVEN_DIS, 17);
CEN_FLD (CEN_MBCPGQ_ODD_DIS, 18);

CEN_FLD (CEN_MBCPRGQ_PURGE_ENTIRE_CACHE, 0);
CEN_FLD (CEN_MBCPRGQ_PURGE_CACHE_RANGE, 1);
CEN_FLD (CEN_MBCPRGQ_PURGE_SINGLE_MEMBER_AND_INVALIDATE, 2);
CEN_FLD (CEN_MBCPRGQ_PURGE_SINGLE_MEMBER_AND_DELETE, 3);
CEN_FLD (CEN_MBCPRGQ_PURGE_CACHE_START_MEMBER, 4);
CEN_FLD (CEN_MBCPRGQ_PURGE_CACHE_START_MEMBER_LEN, 4);
CEN_FLD (CEN_MBCPRGQ_PURGE_CACHE_START_CGC, 8);
CEN_FLD (CEN_MBCPRGQ_PURGE_CACHE_START_CGC_LEN, 13);
CEN_FLD (CEN_MBCPRGQ_PURGE_CACHE_END_MEMBER, 21);
CEN_FLD (CEN_MBCPRGQ_PURGE_CACHE_END_MEMBER_LEN, 4);
CEN_FLD (CEN_MBCPRGQ_PURGE_CACHE_END_CGC, 25);
CEN_FLD (CEN_MBCPRGQ_PURGE_CACHE_END_CGC_LEN, 13);

CEN_FLD (CEN_MBCPRGSQ_MAX_DELETED_MEMBERS, 0);
CEN_FLD (CEN_MBCPRGSQ_MAX_DELETED_MEMBERS_LEN, 4);
CEN_FLD (CEN_MBCPRGSQ_PURGE_ENGINE_IS_BUSY, 4);
CEN_FLD (CEN_MBCPRGSQ_PURGE_CMD_ERROR, 5);
CEN_FLD (CEN_MBCPRGSQ_PURGE_CACHE_ADDRESS_16_32, 6);
CEN_FLD (CEN_MBCPRGSQ_PURGE_CACHE_ADDRESS_16_32_LEN, 17);
CEN_FLD (CEN_MBCPRGSQ_RSVD, 23);

CEN_FLD (CEN_MBSACUMQ_HCA_DECAY_UPDATE_EVENDW, 0);
CEN_FLD (CEN_MBSACUMQ_HCA_DECAY_UPDATE_EVENDW_LEN, 16);
CEN_FLD (CEN_MBSACUMQ_HCA_DECAY_UPDATE_ODDDW, 16);
CEN_FLD (CEN_MBSACUMQ_HCA_DECAY_UPDATE_ODDDW_LEN, 16);

CEN_FLD (CEN_MBSCERR1Q_MBCD0_RP0_CE, 0);
CEN_FLD (CEN_MBSCERR1Q_MBCD0_RP0_UE, 1);
CEN_FLD (CEN_MBSCERR1Q_MBCD0_RP0_SUE, 2);
CEN_FLD (CEN_MBSCERR1Q_MBCD1_RP0_CE, 3);
CEN_FLD (CEN_MBSCERR1Q_MBCD1_RP0_UE, 4);
CEN_FLD (CEN_MBSCERR1Q_MBCD1_RP0_SUE, 5);
CEN_FLD (CEN_MBSCERR1Q_MBCD0_RP1_CE, 6);
CEN_FLD (CEN_MBSCERR1Q_MBCD0_RP1_UE, 7);
CEN_FLD (CEN_MBSCERR1Q_MBCD0_RP1_SUE, 8);
CEN_FLD (CEN_MBSCERR1Q_MBCD1_RP1_CE, 9);
CEN_FLD (CEN_MBSCERR1Q_MBCD1_RP1_UE, 10);
CEN_FLD (CEN_MBSCERR1Q_MBCD1_RP1_SUE, 11);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP0_EVEN_CE, 12);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP0_EVEN_UE, 13);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP0_EVEN_SUE, 14);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP0_ODD_CE, 15);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP0_ODD_UE, 16);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP0_ODD_SUE, 17);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP1_EVEN_CE, 18);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP1_EVEN_UE, 19);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP1_EVEN_SUE, 20);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP1_ODD_CE, 21);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP1_ODD_UE, 22);
CEN_FLD (CEN_MBSCERR1Q_SRB_RP1_ODD_SUE, 23);
CEN_FLD (CEN_MBSCERR1Q_PFB0_CE, 24);
CEN_FLD (CEN_MBSCERR1Q_PFB0_UE, 25);
CEN_FLD (CEN_MBSCERR1Q_PFB0_SUE, 26);
CEN_FLD (CEN_MBSCERR1Q_PFB1_CE, 27);
CEN_FLD (CEN_MBSCERR1Q_PFB1_UE, 28);
CEN_FLD (CEN_MBSCERR1Q_PFB1_SUE, 29);
CEN_FLD (CEN_MBSCERR1Q_PFB2_CE, 30);
CEN_FLD (CEN_MBSCERR1Q_PFB2_UE, 31);
CEN_FLD (CEN_MBSCERR1Q_PFB2_SUE, 32);
CEN_FLD (CEN_MBSCERR1Q_PFB3_CE, 33);
CEN_FLD (CEN_MBSCERR1Q_PFB3_UE, 34);
CEN_FLD (CEN_MBSCERR1Q_PFB3_SUE, 35);
CEN_FLD (CEN_MBSCERR1Q_WRQA01_PE, 36);
CEN_FLD (CEN_MBSCERR1Q_WRQA23_PE, 37);
CEN_FLD (CEN_MBSCERR1Q_SRWADD_PE, 38);
CEN_FLD (CEN_MBSCERR1Q_DADDP_PE, 39);
CEN_FLD (CEN_MBSCERR1Q_SWPAB_PE, 40);
CEN_FLD (CEN_MBSCERR1Q_SWB_EVEN_CE, 41);
CEN_FLD (CEN_MBSCERR1Q_SWB_EVEN_UE, 42);
CEN_FLD (CEN_MBSCERR1Q_SWB_EVEN_SUE, 43);
CEN_FLD (CEN_MBSCERR1Q_SWB_ODD_CE, 44);
CEN_FLD (CEN_MBSCERR1Q_SWB_ODD_UE, 45);
CEN_FLD (CEN_MBSCERR1Q_SWB_ODD_SUE, 46);
CEN_FLD (CEN_MBSCERR1Q_SRW_PWRT_SIZE_ERR, 47);
CEN_FLD (CEN_MBSCERR1Q_WBMGR_WRQ01_IDX_ERR, 48);
CEN_FLD (CEN_MBSCERR1Q_WBMGR_WRQ23_IDX_ERR, 49);
CEN_FLD (CEN_MBSCERR1Q_CLNFSM_TIMEOUT_ERR, 50);
CEN_FLD (CEN_MBSCERR1Q_COADD_ADDR_ERR, 51);
CEN_FLD (CEN_MBSCERR1Q_DIR_ADDR_PARITY_ERR, 52);
CEN_FLD (CEN_MBSCERR1Q_DISP_INVALID_DS_CMD_ERR, 53);
CEN_FLD (CEN_MBSCERR1Q_DISP_INVALID_ADDR_ERR, 54);
CEN_FLD (CEN_MBSCERR1Q_DISP_INVALID_CAC_ONLY_ERR, 55);
CEN_FLD (CEN_MBSCERR1Q_DISP_LRU_ID_ERR, 56);
CEN_FLD (CEN_MBSCERR1Q_DISP_RRQ01_CNT_PARITY_ERR, 57);
CEN_FLD (CEN_MBSCERR1Q_DISP_RRQ23_CNT_PARITY_ERR, 58);
CEN_FLD (CEN_MBSCERR1Q_DISP_RRQ01_OVERFLOW_ERR, 59);
CEN_FLD (CEN_MBSCERR1Q_DISP_RRQ23_OVERFLOW_ERR, 60);
CEN_FLD (CEN_MBSCERR1Q_RESERVED_61_63, 61);
CEN_FLD (CEN_MBSCERR1Q_RESERVED_61_63_LEN, 3);

CEN_FLD (CEN_MBSCERR2Q_PFFSM_TIMEOUT, 0);
CEN_FLD (CEN_MBSCERR2Q_PRQ_PROTOCOL_ERR, 1);
CEN_FLD (CEN_MBSCERR2Q_PFFSM_PROTOCOL_ERR, 2);
CEN_FLD (CEN_MBSCERR2Q_PFARB_PROTOCOL_ERR, 3);
CEN_FLD (CEN_MBSCERR2Q_SRWFSM_UNEXPECTED_DS_CRESP, 4);
CEN_FLD (CEN_MBSCERR2Q_SRWFSM_UNEXPECTED_DS_CMD, 5);
CEN_FLD (CEN_MBSCERR2Q_SRWFSM_EXT_TIMOUT, 6);
CEN_FLD (CEN_MBSCERR2Q_SRWFSM_INT_TIMEOUT, 7);
CEN_FLD (CEN_MBSCERR2Q_SRWFSM_PURGE_LINE_DEL, 8);
CEN_FLD (CEN_MBSCERR2Q_SRWFSM_PURGE_CLEAN_UE, 9);
CEN_FLD (CEN_MBSCERR2Q_SRWFSM_PURGE_DIRTY_UE, 10);
CEN_FLD (CEN_MBSCERR2Q_SWDONE_WDONE_P_ERR, 11);
CEN_FLD (CEN_MBSCERR2Q_SWPAB_DS_TSIZE_ERR_HOLD, 12);
CEN_FLD (CEN_MBSCERR2Q_SWB_DS_WDATA_ERR0_HOLD, 13);
CEN_FLD (CEN_MBSCERR2Q_SWB_DS_WDATA_ERR1_HOLD, 14);
CEN_FLD (CEN_MBSCERR2Q_MBX_MBS_RDTAG_PERR, 15);
CEN_FLD (CEN_MBSCERR2Q_RDTAG_FIFO_PERR, 16);
CEN_FLD (CEN_MBSCERR2Q_DS_FRAME_SEG_ERR, 17);
CEN_FLD (CEN_MBSCERR2Q_DS_INVALID_DATA_SUE_ERR, 18);
CEN_FLD (CEN_MBSCERR2Q_US_READ_DATA_PERR, 19);
CEN_FLD (CEN_MBSCERR2Q_US_READ_DATA_INFO_PERR, 20);
CEN_FLD (CEN_MBSCERR2Q_IBB_CE, 21);
CEN_FLD (CEN_MBSCERR2Q_IBB_UE, 22);
CEN_FLD (CEN_MBSCERR2Q_IBB_SUE, 23);
CEN_FLD (CEN_MBSCERR2Q_IBB_DS_CE, 24);
CEN_FLD (CEN_MBSCERR2Q_IBB_DS_PROTOCOL_ERR, 25);
CEN_FLD (CEN_MBSCERR2Q_CLNFSM_SCOMFIR_CERR_HOLD, 26);
CEN_FLD (CEN_MBSCERR2Q_SPARE, 27);
CEN_FLD (CEN_MBSCERR2Q_RXLT_SIR_PERR, 28);
CEN_FLD (CEN_MBSCERR2Q_CACTL_ADDRESS_ERR, 29);
CEN_FLD (CEN_MBSCERR2Q_EMER_THROTTLE_CERR, 30);
CEN_FLD (CEN_MBSCERR2Q_MAX_LINE_DEL_ERR, 31);
CEN_FLD (CEN_MBSCERR2Q_MBCD0_DW02_13BNK_DRAM_ERR, 32);
CEN_FLD (CEN_MBSCERR2Q_MBCD0_DW46_57BNK_ERR, 33);
CEN_FLD (CEN_MBSCERR2Q_MBCD0_DW8A_9BBNK_ERR, 34);
CEN_FLD (CEN_MBSCERR2Q_MBCD0_DWCE_DFBNK_ERR, 35);
CEN_FLD (CEN_MBSCERR2Q_MBCD1_DW02_13BNK_ERR, 36);
CEN_FLD (CEN_MBSCERR2Q_MBCD1_DW46_57BNK_ERR, 37);
CEN_FLD (CEN_MBSCERR2Q_MBCD1_DW8A_9BBNK_ERR, 38);
CEN_FLD (CEN_MBSCERR2Q_MBCD1_DWCE_DFBNK_ERR, 39);
CEN_FLD (CEN_MBSCERR2Q_RXLAT_PERR, 40);
CEN_FLD (CEN_MBSCERR2Q_CLNADD_PERR, 41);
CEN_FLD (CEN_MBSCERR2Q_COADDR_PERR, 42);
CEN_FLD (CEN_MBSCERR2Q_PFADDR_PERR, 43);
CEN_FLD (CEN_MBSCERR2Q_PRQADDR_PERR, 44);
CEN_FLD (CEN_MBSCERR2Q_WDF_SWB_DW0_CE, 45);
CEN_FLD (CEN_MBSCERR2Q_WDF_SWB_DW0_UE, 46);
CEN_FLD (CEN_MBSCERR2Q_WDF_SWB_DW0_SUE, 47);
CEN_FLD (CEN_MBSCERR2Q_WDF_SWB_DW1_CE, 48);
CEN_FLD (CEN_MBSCERR2Q_WDF_SWB_DW1_UE, 49);
CEN_FLD (CEN_MBSCERR2Q_WDF_SWB_DW1_SUE, 50);
CEN_FLD (CEN_MBSCERR2Q_WDF_SRB_DW0_CE, 51);
CEN_FLD (CEN_MBSCERR2Q_WDF_SRB_DW0_UE, 52);
CEN_FLD (CEN_MBSCERR2Q_WDF_SRB_DW0_SUE, 53);
CEN_FLD (CEN_MBSCERR2Q_WDF_SRB_DW1_CE, 54);
CEN_FLD (CEN_MBSCERR2Q_WDF_SRB_DW1_UE, 55);
CEN_FLD (CEN_MBSCERR2Q_WDF_SRB_DW1_SUE, 56);
CEN_FLD (CEN_MBSCERR2Q_US_DTAG_PERR, 57);
CEN_FLD (CEN_MBSCERR2Q_US_DONE_PERR, 58);
CEN_FLD (CEN_MBSCERR2Q_DS_WDAT0_PERR, 59);
CEN_FLD (CEN_MBSCERR2Q_DS_WDAT1_PERR, 60);
CEN_FLD (CEN_MBSCERR2Q_DIR_DCECK_PERR, 61);
CEN_FLD (CEN_MBSCERR2Q_SRB_INFO_PERR, 62);
CEN_FLD (CEN_MBSCERR2Q_RESERVED_63, 63);

CEN_FLD (CEN_MBSCFGQ_ECCBP_EXIT_SEL, 0);
CEN_FLD (CEN_MBSCFGQ_DRAM_ECC_BYPASS_DIS, 1);
CEN_FLD (CEN_MBSCFGQ_MBS_SCOM_WAT_TRIGGER, 2);
CEN_FLD (CEN_MBSCFGQ_MBS_PRQ_REF_AVOIDANCE_EN, 3);
CEN_FLD (CEN_MBSCFGQ_RSV4_6, 4);
CEN_FLD (CEN_MBSCFGQ_RSV4_6_LEN, 3);
CEN_FLD (CEN_MBSCFGQ_OCC_DEADMAN_TIMER_SEL, 7);
CEN_FLD (CEN_MBSCFGQ_OCC_DEADMAN_TIMER_SEL_LEN, 4);
CEN_FLD (CEN_MBSCFGQ_SYNC_FSYNC_MBA_STROBE_EN, 11);
CEN_FLD (CEN_MBSCFGQ_HCA_TIMEBASE_OP_MODE, 12);
CEN_FLD (CEN_MBSCFGQ_HCA_LOCAL_TIMER_INC_SELECT, 13);
CEN_FLD (CEN_MBSCFGQ_HCA_LOCAL_TIMER_INC_SELECT_LEN, 3);
CEN_FLD (CEN_MBSCFGQ_MBS_01_RDTAG_DELAY, 16);
CEN_FLD (CEN_MBSCFGQ_MBS_01_RDTAG_DELAY_LEN, 4);
CEN_FLD (CEN_MBSCFGQ_MBS_01_RDTAG_FORCE_DEAD_CYCLE, 20);
CEN_FLD (CEN_MBSCFGQ_SYNC_LAT_POL_01, 21);
CEN_FLD (CEN_MBSCFGQ_SYNC_LAT_ADJ_01, 22);
CEN_FLD (CEN_MBSCFGQ_SYNC_LAT_ADJ_01_LEN, 2);
CEN_FLD (CEN_MBSCFGQ_MBS_23_RDTAG_DELAY, 24);
CEN_FLD (CEN_MBSCFGQ_MBS_23_RDTAG_DELAY_LEN, 4);
CEN_FLD (CEN_MBSCFGQ_MBS_23_RDTAG_FORCE_DEAD_CYCLE, 28);
CEN_FLD (CEN_MBSCFGQ_SYNC_LAT_POL_23, 29);
CEN_FLD (CEN_MBSCFGQ_SYNC_LAT_ADJ_23, 30);
CEN_FLD (CEN_MBSCFGQ_SYNC_LAT_ADJ_23_LEN, 2);

CEN_FLD (CEN_MBSDBG0CTLQ_DEBUG_SOURCE, 0);
CEN_FLD (CEN_MBSDBG0CTLQ_DEBUG_SOURCE_LEN, 44);
CEN_FLD (CEN_MBSDBG0CTLQ_PENDING_SEL, 44);
CEN_FLD (CEN_MBSDBG0CTLQ_PENDING_SEL_LEN, 4);
CEN_FLD (CEN_MBSDBG0CTLQ_DEBUG_ENABLE, 48);

CEN_FLD (CEN_MBSDBG0DATQ_DEBUG_DATA, 0);
CEN_FLD (CEN_MBSDBG0DATQ_DEBUG_DATA_LEN, 64);

CEN_FLD (CEN_MBSDBG1CTLQ_DEBUG_SOURCE, 0);
CEN_FLD (CEN_MBSDBG1CTLQ_DEBUG_SOURCE_LEN, 44);

CEN_FLD (CEN_MBSDBG1DATQ_DEBUG_DATA, 0);
CEN_FLD (CEN_MBSDBG1DATQ_DEBUG_DATA_LEN, 64);

CEN_FLD (CEN_MBSDBGXDATQ_DEBUG0_EXTENDED, 0);
CEN_FLD (CEN_MBSDBGXDATQ_DEBUG0_EXTENDED_LEN, 24);
CEN_FLD (CEN_MBSDBGXDATQ_DEBUG1_EXTENDED, 24);
CEN_FLD (CEN_MBSDBGXDATQ_DEBUG1_EXTENDED_LEN, 24);

CEN_FLD (CEN_MBSEINJQ_CACHE_WP0_ERR_INJECT_MODE, 0);
CEN_FLD (CEN_MBSEINJQ_CACHE_WP0_ERR_INJECT_CE, 1);
CEN_FLD (CEN_MBSEINJQ_CACHE_WP0_ERR_INJECT_UE, 2);
CEN_FLD (CEN_MBSEINJQ_CACHE_WP0_ERR_INJECT_SUE, 3);
CEN_FLD (CEN_MBSEINJQ_DIRECTORY_ERR_INJECT_MODE, 4);
CEN_FLD (CEN_MBSEINJQ_DIRECTORY_ERR_INJECT_CE, 5);
CEN_FLD (CEN_MBSEINJQ_DIRECTORY_ERR_INJECT_UE, 6);
CEN_FLD (CEN_MBSEINJQ_SWB_ERR_INJECT_MODE, 7);
CEN_FLD (CEN_MBSEINJQ_SWB_ERR_INJECT_CE, 8);
CEN_FLD (CEN_MBSEINJQ_SWB_ERR_INJECT_UE, 9);
CEN_FLD (CEN_MBSEINJQ_SRB_RP0_ERR_INJECT_MODE, 10);
CEN_FLD (CEN_MBSEINJQ_SRB_RP0_ERR_INJECT_CE, 11);
CEN_FLD (CEN_MBSEINJQ_SRB_RP0_ERR_INJECT_UE, 12);
CEN_FLD (CEN_MBSEINJQ_SRB_RP1_ERROR_INJECT_MODE, 13);
CEN_FLD (CEN_MBSEINJQ_SRB_RP1_ERROR_INJECT_CE, 14);
CEN_FLD (CEN_MBSEINJQ_SRB_RP1_ERROR_INJECT_UE, 15);
CEN_FLD (CEN_MBSEINJQ_PFB_ERR_INJECT_MODE, 16);
CEN_FLD (CEN_MBSEINJQ_PFB_ERR_INJECT_CE, 17);
CEN_FLD (CEN_MBSEINJQ_PFB_ERR_INJECT_UE, 18);
CEN_FLD (CEN_MBSEINJQ_SPWA_ERR_INJECT_MODE, 19);
CEN_FLD (CEN_MBSEINJQ_SPWA_ERR_INJECT_PERR, 20);
CEN_FLD (CEN_MBSEINJQ_CO_ERR_INJECT_MODE, 21);
CEN_FLD (CEN_MBSEINJQ_CO_ERR_INJECT_CE, 22);
CEN_FLD (CEN_MBSEINJQ_CO_ERR_INJECT_UE, 23);
CEN_FLD (CEN_MBSEINJQ_INT_RESET_KEEPER, 24);
CEN_FLD (CEN_MBSEINJQ_RESERVED_25, 25);
CEN_FLD (CEN_MBSEINJQ_RESERVED_26, 26);
CEN_FLD (CEN_MBSEINJQ_IB_BFR_ERR_INJECT_MODE, 27);
CEN_FLD (CEN_MBSEINJQ_IB_BFR_ERR_INJECT_CE, 28);
CEN_FLD (CEN_MBSEINJQ_IB_BFR_ERR_INJECT_UE, 29);
CEN_FLD (CEN_MBSEINJQ_DIRECTORY_ERR_INJECT_ADDR_PERR, 30);
CEN_FLD (CEN_MBSEINJQ_RRQ_POP_INJECT, 31);
CEN_FLD (CEN_MBSEINJQ_RRQ_POP_INJECT_PERR, 32);
CEN_FLD (CEN_MBSEINJQ_SHORT_HANG_TIMER, 33);
CEN_FLD (CEN_MBSEINJQ_LRU_ERR_INJ, 34);

CEN_FLD (CEN_MBSEMERTHROQ_EMERGENCY_THROTTLE_IN_PROGRESS, 0);

CEN_FLD (CEN_MBSIBERR0Q_IB_HOST_ADDRESS, 0);
CEN_FLD (CEN_MBSIBERR0Q_IB_HOST_ADDRESS_LEN, 32);
CEN_FLD (CEN_MBSIBERR0Q_IB_HOST_ERROR_VALID, 32);
CEN_FLD (CEN_MBSIBERR0Q_IB_HOST_ERROR_STATUS, 33);
CEN_FLD (CEN_MBSIBERR0Q_IB_HOST_ERROR_STATUS_LEN, 3);
CEN_FLD (CEN_MBSIBERR0Q_IB_HOST_WRITE_NOT_READ, 36);

CEN_FLD (CEN_MBSIBERR1Q_OCC_IB_ADDRESS, 0);
CEN_FLD (CEN_MBSIBERR1Q_OCC_IB_ADDRESS_LEN, 32);
CEN_FLD (CEN_MBSIBERR1Q_OCC_IB_ERROR_VALID, 32);
CEN_FLD (CEN_MBSIBERR1Q_OCC_IB_ERROR_STATUS, 33);
CEN_FLD (CEN_MBSIBERR1Q_OCC_IB_ERROR_STATUS_LEN, 3);
CEN_FLD (CEN_MBSIBERR1Q_OCC_IB_WRITE_NOT_READ, 36);

CEN_FLD (CEN_MBSIBWRSTATQ_SPARE0, 0);
CEN_FLD (CEN_MBSIBWRSTATQ_SPARE0_LEN, 8);

CEN_FLD (CEN_MBSOCC01HQ_OCC_01_RD_HIT, 0);
CEN_FLD (CEN_MBSOCC01HQ_OCC_01_RD_HIT_LEN, 32);
CEN_FLD (CEN_MBSOCC01HQ_OCC_01_WR_HIT, 32);
CEN_FLD (CEN_MBSOCC01HQ_OCC_01_WR_HIT_LEN, 32);

CEN_FLD (CEN_MBSOCC23HQ_OCC_23_RD_HIT, 0);
CEN_FLD (CEN_MBSOCC23HQ_OCC_23_RD_HIT_LEN, 32);
CEN_FLD (CEN_MBSOCC23HQ_OCC_23_WR_HIT, 32);
CEN_FLD (CEN_MBSOCC23HQ_OCC_23_WR_HIT_LEN, 32);

CEN_FLD (CEN_MBSOCCITCQ_OCC_CENT_IDLE_TH_CNT, 0);
CEN_FLD (CEN_MBSOCCITCQ_OCC_CENT_IDLE_TH_CNT_LEN, 32);

CEN_FLD (CEN_MBSOCCSCANQ_OCC_01_SPEC_CAN, 0);
CEN_FLD (CEN_MBSOCCSCANQ_OCC_01_SPEC_CAN_LEN, 32);
CEN_FLD (CEN_MBSOCCSCANQ_OCC_23_SPEC_CAN, 32);
CEN_FLD (CEN_MBSOCCSCANQ_OCC_23_SPEC_CAN_LEN, 32);

CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER0_ENABLE, 0);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER1_ENABLE, 1);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER2_ENABLE, 2);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER3_ENABLE, 3);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_PRESCALER_SEL, 4);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_PRESCALER_SEL_LEN, 3);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER_FREEZE_MODE, 7);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER_RESET_MODE, 8);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER0_EVENT_SEL, 9);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER0_EVENT_SEL_LEN, 4);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER0_POSEDGE_SEL, 13);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER0_BIT_PAIR_SEL, 14);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER0_BIT_PAIR_SEL_LEN, 2);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER1_EVENT_SEL, 16);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER1_EVENT_SEL_LEN, 4);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER1_POSEDGE_SEL, 20);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER1_BIT_PAIR_SEL, 21);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER1_BIT_PAIR_SEL_LEN, 2);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER2_EVENT_SEL, 23);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER2_EVENT_SEL_LEN, 4);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER2_POSEDGE_SEL, 27);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER2_BIT_PAIR_SEL, 28);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER2_BIT_PAIR_SEL_LEN, 2);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER3_EVENT_SEL, 30);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER3_EVENT_SEL_LEN, 4);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER3_POSEDGE_SEL, 34);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER3_BIT_PAIR_SEL, 35);
CEN_FLD (CEN_MBSPMU0CFGQ_PMU0_COUNTER3_BIT_PAIR_SEL_LEN, 2);

CEN_FLD (CEN_MBSPMU0CNTQ_PMU0_CNT0, 0);
CEN_FLD (CEN_MBSPMU0CNTQ_PMU0_CNT0_LEN, 16);
CEN_FLD (CEN_MBSPMU0CNTQ_PMU0_CNT1, 16);
CEN_FLD (CEN_MBSPMU0CNTQ_PMU0_CNT1_LEN, 16);
CEN_FLD (CEN_MBSPMU0CNTQ_PMU0_CNT2, 32);
CEN_FLD (CEN_MBSPMU0CNTQ_PMU0_CNT2_LEN, 16);
CEN_FLD (CEN_MBSPMU0CNTQ_PMU0_CNT3, 48);
CEN_FLD (CEN_MBSPMU0CNTQ_PMU0_CNT3_LEN, 16);

CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT0_IN_SEL, 0);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT0_IN_SEL_LEN, 6);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT1_IN_SEL, 6);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT1_IN_SEL_LEN, 6);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT2_IN_SEL, 12);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT2_IN_SEL_LEN, 6);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT3_IN_SEL, 18);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT3_IN_SEL_LEN, 6);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT4_IN_SEL, 24);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT4_IN_SEL_LEN, 6);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT5_SIN_EL, 30);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT5_SIN_EL_LEN, 6);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT6_IN_SEL, 36);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT6_IN_SEL_LEN, 6);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT7_IN_SEL, 42);
CEN_FLD (CEN_MBSPMUSELQ_PMU_EVENT7_IN_SEL_LEN, 6);
CEN_FLD (CEN_MBSPMUSELQ_PMU_RANK_FILTER_EN, 48);
CEN_FLD (CEN_MBSPMUSELQ_PMU_RANK_FILTER, 49);
CEN_FLD (CEN_MBSPMUSELQ_PMU_RANK_FILTER_LEN, 3);
CEN_FLD (CEN_MBSPMUSELQ_PMU_SPARE, 52);
CEN_FLD (CEN_MBSPMUSELQ_PMU_SPARE_LEN, 4);

CEN_FLD (CEN_MBSSQ_ALL_QUEUES_EMPTY, 0);
CEN_FLD (CEN_MBSSQ_ECCBP_EXIT1_SELECTED, 1);
CEN_FLD (CEN_MBSSQ_IML_COMPLETE, 2);

CEN_FLD (CEN_MBS_FIR_ACTION0_REG_ACTION0, 0);
CEN_FLD (CEN_MBS_FIR_ACTION0_REG_ACTION0_LEN, 35);

CEN_FLD (CEN_MBS_FIR_ACTION1_REG_ACTION1, 0);
CEN_FLD (CEN_MBS_FIR_ACTION1_REG_ACTION1_LEN, 35);

CEN_FLD (CEN_MBS_FIR_MASK_REG_HOST_PROTOCOL_ERROR, 0);
CEN_FLD (CEN_MBS_FIR_MASK_REG_INT_PROTOCOL_ERROR, 1);
CEN_FLD (CEN_MBS_FIR_MASK_REG_INVALID_ADDRESS_ERROR, 2);
CEN_FLD (CEN_MBS_FIR_MASK_REG_EXTERNAL_TIMEOUT, 3);
CEN_FLD (CEN_MBS_FIR_MASK_REG_INTERNAL_TIMEOUT, 4);
CEN_FLD (CEN_MBS_FIR_MASK_REG_INT_BUFFER_CE, 5);
CEN_FLD (CEN_MBS_FIR_MASK_REG_INT_BUFFER_UE, 6);
CEN_FLD (CEN_MBS_FIR_MASK_REG_INT_BUFFER_SUE, 7);
CEN_FLD (CEN_MBS_FIR_MASK_REG_INT_PARITY_ERROR, 8);
CEN_FLD (CEN_MBS_FIR_MASK_REG_CACHE_SRW_CE, 9);
CEN_FLD (CEN_MBS_FIR_MASK_REG_CACHE_SRW_UE, 10);
CEN_FLD (CEN_MBS_FIR_MASK_REG_CACHE_SRW_SUE, 11);
CEN_FLD (CEN_MBS_FIR_MASK_REG_CACHE_CO_CE, 12);
CEN_FLD (CEN_MBS_FIR_MASK_REG_CACHE_CO_UE, 13);
CEN_FLD (CEN_MBS_FIR_MASK_REG_CACHE_CO_SUE, 14);
CEN_FLD (CEN_MBS_FIR_MASK_REG_DIR_CE, 15);
CEN_FLD (CEN_MBS_FIR_MASK_REG_DIR_UE, 16);
CEN_FLD (CEN_MBS_FIR_MASK_REG_DIR_MEMBER_DELETED, 17);
CEN_FLD (CEN_MBS_FIR_MASK_REG_DIR_ALL_MEMBERS_DELETED, 18);
CEN_FLD (CEN_MBS_FIR_MASK_REG_LRU_ERROR, 19);
CEN_FLD (CEN_MBS_FIR_MASK_REG_EDRAM_ERROR, 20);
CEN_FLD (CEN_MBS_FIR_MASK_REG_EMERGENCY_THROTTLE_SET, 21);
CEN_FLD (CEN_MBS_FIR_MASK_REG_HOST_INBAND_READ_ERROR, 22);
CEN_FLD (CEN_MBS_FIR_MASK_REG_HOST_INBAND_WRITE_ERROR, 23);
CEN_FLD (CEN_MBS_FIR_MASK_REG_OCC_INBAND_READ_ERROR, 24);
CEN_FLD (CEN_MBS_FIR_MASK_REG_OCC_INBAND_WRITE_ERROR, 25);
CEN_FLD (CEN_MBS_FIR_MASK_REG_SRB_BUFFER_CE, 26);
CEN_FLD (CEN_MBS_FIR_MASK_REG_SRB_BUFFER_UE, 27);
CEN_FLD (CEN_MBS_FIR_MASK_REG_SRB_BUFFER_SUE, 28);
CEN_FLD (CEN_MBS_FIR_MASK_REG_DIR_PURGE_CE, 29);
CEN_FLD (CEN_MBS_FIR_MASK_REG_PROXIMAL_CE_UE, 30);
CEN_FLD (CEN_MBS_FIR_MASK_REG_SPARE_FIR31, 31);
CEN_FLD (CEN_MBS_FIR_MASK_REG_SPARE_FIR32, 32);
CEN_FLD (CEN_MBS_FIR_MASK_REG_INTERNAL_SCOM_ERROR, 33);
CEN_FLD (CEN_MBS_FIR_MASK_REG_INTERNAL_SCOM_ERROR_COPY, 34);

CEN_FLD (CEN_MBS_FIR_REG_HOST_PROTOCOL_ERROR, 0);
CEN_FLD (CEN_MBS_FIR_REG_INT_PROTOCOL_ERROR, 1);
CEN_FLD (CEN_MBS_FIR_REG_INVALID_ADDRESS_ERROR, 2);
CEN_FLD (CEN_MBS_FIR_REG_EXTERNAL_TIMEOUT, 3);
CEN_FLD (CEN_MBS_FIR_REG_INTERNAL_TIMEOUT, 4);
CEN_FLD (CEN_MBS_FIR_REG_INT_BUFFER_CE, 5);
CEN_FLD (CEN_MBS_FIR_REG_INT_BUFFER_UE, 6);
CEN_FLD (CEN_MBS_FIR_REG_INT_BUFFER_SUE, 7);
CEN_FLD (CEN_MBS_FIR_REG_INT_PARITY_ERROR, 8);
CEN_FLD (CEN_MBS_FIR_REG_CACHE_SRW_CE, 9);
CEN_FLD (CEN_MBS_FIR_REG_CACHE_SRW_UE, 10);
CEN_FLD (CEN_MBS_FIR_REG_CACHE_SRW_SUE, 11);
CEN_FLD (CEN_MBS_FIR_REG_CACHE_CO_CE, 12);
CEN_FLD (CEN_MBS_FIR_REG_CACHE_CO_UE, 13);
CEN_FLD (CEN_MBS_FIR_REG_CACHE_CO_SUE, 14);
CEN_FLD (CEN_MBS_FIR_REG_DIR_CE, 15);
CEN_FLD (CEN_MBS_FIR_REG_DIR_UE, 16);
CEN_FLD (CEN_MBS_FIR_REG_DIR_MEMBER_DELETED, 17);
CEN_FLD (CEN_MBS_FIR_REG_DIR_ALL_MEMBERS_DELETED, 18);
CEN_FLD (CEN_MBS_FIR_REG_LRU_ERROR, 19);
CEN_FLD (CEN_MBS_FIR_REG_EDRAM_ERROR, 20);
CEN_FLD (CEN_MBS_FIR_REG_EMERGENCY_THROTTLE_SET, 21);
CEN_FLD (CEN_MBS_FIR_REG_HOST_INBAND_READ_ERROR, 22);
CEN_FLD (CEN_MBS_FIR_REG_HOST_INBAND_WRITE_ERROR, 23);
CEN_FLD (CEN_MBS_FIR_REG_OCC_INBAND_READ_ERROR, 24);
CEN_FLD (CEN_MBS_FIR_REG_OCC_INBAND_WRITE_ERROR, 25);
CEN_FLD (CEN_MBS_FIR_REG_SRB_BUFFER_CE, 26);
CEN_FLD (CEN_MBS_FIR_REG_SRB_BUFFER_UE, 27);
CEN_FLD (CEN_MBS_FIR_REG_SRB_BUFFER_SUE, 28);
CEN_FLD (CEN_MBS_FIR_REG_DIR_PURGE_CE, 29);
CEN_FLD (CEN_MBS_FIR_REG_PROXIMAL_CE_UE, 30);
CEN_FLD (CEN_MBS_FIR_REG_SPARE_FIR31, 31);
CEN_FLD (CEN_MBS_FIR_REG_SPARE_FIR32, 32);
CEN_FLD (CEN_MBS_FIR_REG_INTERNAL_SCOM_ERROR, 33);
CEN_FLD (CEN_MBS_FIR_REG_INTERNAL_SCOM_ERROR_COPY, 34);

CEN_FLD (CEN_MBS_FIR_WOF_WOF, 0);
CEN_FLD (CEN_MBS_FIR_WOF_WOF_LEN, 35);

CEN_FLD (CEN_MBAXCR01Q_MBA01_CONFIG_TYPE, 0);
CEN_FLD (CEN_MBAXCR01Q_MBA01_CONFIG_TYPE_LEN, 4);
CEN_FLD (CEN_MBAXCR01Q_MBA01_CONFIG_SUBTYPE, 4);
CEN_FLD (CEN_MBAXCR01Q_MBA01_CONFIG_SUBTYPE_LEN, 2);
CEN_FLD (CEN_MBAXCR01Q_MBA01_DRAM_SIZE, 6);
CEN_FLD (CEN_MBAXCR01Q_MBA01_DRAM_SIZE_LEN, 2);
CEN_FLD (CEN_MBAXCR01Q_MBA01_CONFIGURATION, 8);
CEN_FLD (CEN_MBAXCR01Q_MBA01_DRAM_WIDTH, 9);
CEN_FLD (CEN_MBAXCR01Q_MBA01_HASH_MODE, 10);
CEN_FLD (CEN_MBAXCR01Q_MBA01_HASH_MODE_LEN, 2);
CEN_FLD (CEN_MBAXCR01Q_MBA01_INTERLEAVE_MODE, 12);
CEN_FLD (CEN_MBAXCR01Q_MBA01_SLOT1_ONLY, 13);

CEN_FLD (CEN_MBAXCR23Q_MBA23_CONFIG_TYPE, 0);
CEN_FLD (CEN_MBAXCR23Q_MBA23_CONFIG_TYPE_LEN, 4);
CEN_FLD (CEN_MBAXCR23Q_MBA23_CONFIG_SUBTYPE, 4);
CEN_FLD (CEN_MBAXCR23Q_MBA23_CONFIG_SUBTYPE_LEN, 2);
CEN_FLD (CEN_MBAXCR23Q_MBA23_DRAM_SIZE, 6);
CEN_FLD (CEN_MBAXCR23Q_MBA23_DRAM_SIZE_LEN, 2);
CEN_FLD (CEN_MBAXCR23Q_MBA23_CONFIGURATION, 8);
CEN_FLD (CEN_MBAXCR23Q_MBA23_DRAM_WIDTH, 9);
CEN_FLD (CEN_MBAXCR23Q_MBA23_HASH_MODE, 10);
CEN_FLD (CEN_MBAXCR23Q_MBA23_HASH_MODE_LEN, 2);
CEN_FLD (CEN_MBAXCR23Q_MBA23_INTERLEAVE_MODE, 12);
CEN_FLD (CEN_MBAXCR23Q_MBA23_SLOT1_ONLY, 13);

CEN_FLD (CEN_MBAXCRMSQ_MBA01_MASTER_RANK_0_SELECT, 0);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_MASTER_RANK_0_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_MASTER_RANK_1_SELECT, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_MASTER_RANK_1_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_MASTER_RANK_2_SELECT, 6);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_MASTER_RANK_2_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_0_SELECT, 9);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_0_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_1_SELECT, 12);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_1_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_2_SELECT, 15);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_SLAVE_RANK_2_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_B2_DDR3_B0_DDR4_SELECT, 18);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_B2_DDR3_B0_DDR4_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_B0_DDR3_B1_DDR4_SELECT, 21);
CEN_FLD (CEN_MBAXCRMSQ_MBA01_B0_DDR3_B1_DDR4_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_MASTER_RANK_0_SELECT, 24);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_MASTER_RANK_0_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_MASTER_RANK_1_SELECT, 27);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_MASTER_RANK_1_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_MASTER_RANK_2_SELECT, 30);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_MASTER_RANK_2_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_0_SELECT, 33);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_0_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_1_SELECT, 36);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_1_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_2_SELECT, 39);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_SLAVE_RANK_2_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_B2_DDR3_B0_DDR4_SELECT, 42);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_B2_DDR3_B0_DDR4_SELECT_LEN, 3);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_B0_DDR3_B1_DDR4_SELECT, 45);
CEN_FLD (CEN_MBAXCRMSQ_MBA23_B0_DDR3_B1_DDR4_SELECT_LEN, 3);

CEN_FLD (CEN_MBSSIRACT0_ACTION_0, 0);
CEN_FLD (CEN_MBSSIRACT0_ACTION_0_LEN, 6);

CEN_FLD (CEN_MBSSIRACT1_ACTION_1, 0);
CEN_FLD (CEN_MBSSIRACT1_ACTION_1_LEN, 6);

CEN_FLD (CEN_MBSSIRMASK_INVALID_MBSXCR_ACCESS, 0);
CEN_FLD (CEN_MBSSIRMASK_INVALID_MBAXCR01_ACCESS, 1);
CEN_FLD (CEN_MBSSIRMASK_INVALID_MBAXCR23_ACCESS, 2);
CEN_FLD (CEN_MBSSIRMASK_INVALID_MBAXCRMS_ACCRESS, 3);
CEN_FLD (CEN_MBSSIRMASK_SPARE, 4);
CEN_FLD (CEN_MBSSIRMASK_INVALID_SIR_MASK_OR_ACTION_REGISTER_ACCESS, 5);

CEN_FLD (CEN_MBSSIRQ_INVALID_MBSXCR_ACCESS, 0);
CEN_FLD (CEN_MBSSIRQ_INVALID_MBAXCR01_ACCESS, 1);
CEN_FLD (CEN_MBSSIRQ_INVALID_MBAXCR23_ACCESS, 2);
CEN_FLD (CEN_MBSSIRQ_INVALID_MBAXCRMS_ACCRESS, 3);
CEN_FLD (CEN_MBSSIRQ_SPARE, 4);
CEN_FLD (CEN_MBSSIRQ_INVALID_SIR_MASK_OR_ACTION_REGISTER_ACCESS, 5);

CEN_FLD (CEN_MBSXCRQ_MBA_ADDRESS_INTERLEAVE_MODE, 0);
CEN_FLD (CEN_MBSXCRQ_MBA_ADDRESS_INTERLEAVE_MODE_LEN, 5);
CEN_FLD (CEN_MBSXCRQ_Z_MODE_CENTAUR_ADDR4_SELECT, 5);
CEN_FLD (CEN_MBSXCRQ_USE_ALT_CLEANER_CONFIG, 6);
CEN_FLD (CEN_MBSXCRQ_ALT_CLEANER_RANK_TYPE, 7);
CEN_FLD (CEN_MBSXCRQ_ALT_CLEANER_RANK_TYPE_LEN, 2);
CEN_FLD (CEN_MBSXCRQ_ALT_CLEANER_MRANK0, 9);
CEN_FLD (CEN_MBSXCRQ_ALT_CLEANER_MRANK0_LEN, 2);
CEN_FLD (CEN_MBSXCRQ_ALT_CLEANER_MRANK1, 11);
CEN_FLD (CEN_MBSXCRQ_ALT_CLEANER_MRANK1_LEN, 2);
CEN_FLD (CEN_MBSXCRQ_USE_ALT_PREFETCH_CONFIG, 13);
CEN_FLD (CEN_MBSXCRQ_ALT_PREFETCH_RANK_LOCATION, 14);
CEN_FLD (CEN_MBSXCRQ_ALT_PREFETCH_RANK_LOCATION_LEN, 4);
CEN_FLD (CEN_MBSXCRQ_ALT_PREFETCH_RANK_TYPE, 18);
CEN_FLD (CEN_MBSXCRQ_ALT_PREFETCH_RANK_TYPE_LEN, 3);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_0, 21);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_1, 22);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_2, 23);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_3, 24);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_4, 25);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_5, 26);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_6, 27);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_22, 28);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDRESS_MASK_30, 29);
CEN_FLD (CEN_MBSXCRQ_RESERVED_30_31, 30);
CEN_FLD (CEN_MBSXCRQ_RESERVED_30_31_LEN, 2);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR2_SELECT, 32);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR2_SELECT_LEN, 4);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR3_SELECT, 36);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR3_SELECT_LEN, 4);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR4_SELECT, 40);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR4_SELECT_LEN, 4);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR5_SELECT, 44);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR5_SELECT_LEN, 4);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR6_SELECT, 48);
CEN_FLD (CEN_MBSXCRQ_CENTAUR_ADDR6_SELECT_LEN, 4);

CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_MASTER_RANK0, 0);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_DIMM_SELECT, 1);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_MASTER_RANK1, 2);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_MASTER_RANK2, 3);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_SLAVE_RANK, 4);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_BANK, 7);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_BANK_LEN, 4);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_ROW, 11);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_ROW_LEN, 17);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_COL, 28);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_COL_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_ERR_OCCURRED_AFTER_UE_RETRY, 40);
CEN_FLD (CEN_MCBISTS01_MBMPERQ_RD_MPE_ROW17, 41);

CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_MASTER_RANK0, 0);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_DIMM_SELECT, 1);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_MASTER_RANK1, 2);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_MASTER_RANK2, 3);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_SLAVE_RANK, 4);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_BANK, 7);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_BANK_LEN, 4);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_ROW, 11);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_ROW_LEN, 17);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_COL, 28);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_COL_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_ERR_OCCURRED__AFTER_UE_RETRY, 40);
CEN_FLD (CEN_MCBISTS01_MBNCERQ_RD_NCE_ROW17, 41);

CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_MASTER_RANK0, 0);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_DIMM_SELECT, 1);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_MASTER_RANK1, 2);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_MASTER_RANK2, 3);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_SLAVE_RANK, 4);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_BANK, 7);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_BANK_LEN, 4);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_ROW, 11);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_ROW_LEN, 17);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_COL, 28);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_COL_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_ERR_OCCURRED_AFTER_UE_RETRY, 40);
CEN_FLD (CEN_MCBISTS01_MBRCERQ_RD_RCE_ROW17, 41);

CEN_FLD (CEN_MCBISTS01_MBSEC0Q_SOFT_CE_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSEC0Q_SOFT_CE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSEC0Q_INTERMITTENT_CE_COUNT, 12);
CEN_FLD (CEN_MCBISTS01_MBSEC0Q_INTERMITTENT_CE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSEC0Q_HARD_CE_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSEC0Q_HARD_CE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSEC0Q_SCE_COUNT, 36);
CEN_FLD (CEN_MCBISTS01_MBSEC0Q_SCE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSEC0Q_MCE_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSEC0Q_MCE_COUNT_LEN, 12);

CEN_FLD (CEN_MCBISTS01_MBSEC1Q_RCE_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSEC1Q_RCE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSEC1Q_MPE_COUNT, 12);
CEN_FLD (CEN_MCBISTS01_MBSEC1Q_MPE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSEC1Q_UE_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSEC1Q_UE_COUNT_LEN, 12);

CEN_FLD (CEN_MCBISTS01_MBSEVRQ_ERR_VECTOR0, 0);
CEN_FLD (CEN_MCBISTS01_MBSEVRQ_ERR_VECTOR0_LEN, 56);

CEN_FLD (CEN_MCBISTS01_MBSFIRACT0_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT0_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT0_RESERVED_2_14, 2);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT0_RESERVED_2_14_LEN, 13);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT0_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT0_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS01_MBSFIRACT1_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT1_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT1_RESERVED_2_14, 2);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT1_RESERVED_2_14_LEN, 13);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT1_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS01_MBSFIRACT1_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS01_MBSFIRMASK_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS01_MBSFIRMASK_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS01_MBSFIRMASK_RESERVED_2_14, 2);
CEN_FLD (CEN_MCBISTS01_MBSFIRMASK_RESERVED_2_14_LEN, 13);
CEN_FLD (CEN_MCBISTS01_MBSFIRMASK_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS01_MBSFIRMASK_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS01_MBSFIRQ_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS01_MBSFIRQ_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS01_MBSFIRQ_DRAM_EVENTN_BIT0, 2);
CEN_FLD (CEN_MCBISTS01_MBSFIRQ_DRAM_EVENTN_BIT1, 3);
CEN_FLD (CEN_MCBISTS01_MBSFIRQ_RESERVED_4_14, 4);
CEN_FLD (CEN_MCBISTS01_MBSFIRQ_RESERVED_4_14_LEN, 11);
CEN_FLD (CEN_MCBISTS01_MBSFIRQ_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS01_MBSFIRQ_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS01_MBSFIRWOF_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS01_MBSFIRWOF_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS01_MBSFIRWOF_RESERVED_2_14, 2);
CEN_FLD (CEN_MCBISTS01_MBSFIRWOF_RESERVED_2_14_LEN, 13);
CEN_FLD (CEN_MCBISTS01_MBSFIRWOF_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS01_MBSFIRWOF_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_0_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_0_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_1_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_1_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_2_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_2_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_3_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_3_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_4_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_4_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_5_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_5_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_6_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_6_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_7_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC0Q_SYMBOL_7_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_8_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_8_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_9_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_9_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_10_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_10_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_11_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_11_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_12_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_12_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_13_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_13_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_14_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_14_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_15_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC1Q_SYMBOL_15_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_16_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_16_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_17_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_17_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_18_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_18_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_19_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_19_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_20_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_20_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_21_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_21_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_22_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_22_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_23_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC2Q_SYMBOL_23_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_24_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_24_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_25_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_25_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_26_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_26_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_27_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_27_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_28_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_28_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_29_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_29_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_30_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_30_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_31_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC3Q_SYMBOL_31_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_32_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_32_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_33_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_33_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_34_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_34_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_35_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_35_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_36_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_36_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_37_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_37_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_38ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_38ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_39_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC4Q_SYMBOL_39_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_40_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_40_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_41_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_41_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_42_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_42_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_43_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_43_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_44_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_44_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_45_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_45_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_46_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_46_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_47_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC5Q_SYMBOL_47_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_48_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_48_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_49_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_49_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_50_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_50_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_51_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_51_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_52_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_52_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_53_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_53_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_54_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_54_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_55_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC6Q_SYMBOL_55_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_56_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_56_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_57_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_57_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_58_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_58_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_59_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_59_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_60_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_60_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_61_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_61_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_62_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_62_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_63_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC7Q_SYMBOL_63_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_64_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_64_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_65_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_65_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_66_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_66_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_67_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_67_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_68_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_68_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_69_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_69_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_70_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_70_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_71_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSSYMEC8Q_SYMBOL_71_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBSTRQ_SOFT_CE_COUNT_THRESHOLD_ATTN_STOP, 0);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD_ATTN_STOP, 1);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_HARD_CE_COUNT_THRESHOLD_ATTN_STOP, 2);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_RCE_COUNT_THRESHOLD_ATTN_STOP, 3);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_SOFT_CE_COUNT_THRESHOLD, 4);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_SOFT_CE_COUNT_THRESHOLD_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD, 16);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_HARD_CE_COUNT_THRESHOLD, 28);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_HARD_CE_COUNT_THRESHOLD_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_RETRY_CE_COUNT_THRESHOLD, 40);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_RETRY_CE_COUNT_THRESHOLD_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_RESET_KEEPER, 52);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_RESET_ALL_ERROR_COUNT_REGISTERS, 53);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_DISABLE_RESET_ERROR_REG_RANK_END, 54);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_SOFT_CE_INCR_SYMBOL_COUNT, 55);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_INTERMIT_INCR_SYMBOL_COUNT, 56);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_HARD_CE_INCR_SYMBOL_COUNT, 57);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_MCE_INCR_SYMBOL_COUNT, 58);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_UE_TRAP, 59);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_CFG_MAINT_RCE_WITH_CE, 60);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_RESERVED_61, 61);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_INTERMITTENT_NCE_INJECT, 62);
CEN_FLD (CEN_MCBISTS01_MBSTRQ_RESERVED_63, 63);

CEN_FLD (CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_DATA_ROT, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_DATA_ROT_LEN, 4);
CEN_FLD (CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_DATA_ROT_SEED, 4);
CEN_FLD (CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_DATA_ROT_SEED_LEN, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBDRCRQ_CFG_INVERT_DATA, 20);
CEN_FLD (CEN_MCBISTS01_MBS_MCBDRCRQ_DD2_HW234828_ROUTE_NONMAINT_DATA_TO_MAINTBUFF_EN, 21);
CEN_FLD (CEN_MCBISTS01_MBS_MCBDRCRQ_RESERVED_22_63, 22);
CEN_FLD (CEN_MCBISTS01_MBS_MCBDRCRQ_RESERVED_22_63_LEN, 42);

CEN_FLD (CEN_MCBISTS01_MBS_MCBDRSRQ_CFG_DATA_ROT_SEED, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFD0Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFD0Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFD1Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFD1Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFD2Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFD2Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFD3Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFD3Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFD4Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFD4Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFD5Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFD5Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFD6Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFD6Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFD7Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFD7Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED1, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED2, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED3, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED4, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED5, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED6, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED7, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED7_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED8, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDQ_CFG_FIXED_SEED8_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED1, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED2, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED3, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED4, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED5, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED6, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED7, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED7_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED8, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBFDSPQ_CFG_FIXED_SEED8_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS0Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS1Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS2Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS3Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS4Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS5Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS6Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS7Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDS8Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS01_MBS_MCBRDSSPQ_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_MASTER_RANK0, 0);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_DIMM_SELECT, 1);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_MASTER_RANK1, 2);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_MASTER_RANK2, 3);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_SLAVE_RANK, 4);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_BANK, 7);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_BANK_LEN, 4);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_ROW, 11);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_ROW_LEN, 17);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_COL, 28);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_COL_LEN, 12);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RESERVED_40, 40);
CEN_FLD (CEN_MCBISTS01_MBUERQ_RD_UE_ROW17, 41);

CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_RCMD_ERR_INJ_MODE, 0);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_RCMD_ERR_INJ, 1);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_WRD_CE_ERR_INJ_MODE, 2);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_WRD_CE_ERR_INJ, 3);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_WRD_UE_ERR_INJ_MODE, 4);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_WRD_UE_ERR_INJ, 5);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_MAINT_CE_ERR_INJ_MODE, 6);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_MAINT_CE_ERR_INJ, 7);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_MAINT_UE_ERR_INJ_MODE, 8);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_MAINT_UE_ERR_INJ, 9);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_SCOM_PE_ERR_INJ_MODE, 10);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_SCOM_PE_ERR_INJ, 11);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_RESERVED_12_63, 12);
CEN_FLD (CEN_MCBISTS01_MBXERRINJQ_RESERVED_12_63_LEN, 52);

CEN_FLD (CEN_MCBISTS01_MBXERRSTATQ_WDONE_PAR_ERROR, 0);
CEN_FLD (CEN_MCBISTS01_MBXERRSTATQ_RDTAG_RDCHECK_ERROR, 1);
CEN_FLD (CEN_MCBISTS01_MBXERRSTATQ_RDTAG_PAR_ERROR, 2);
CEN_FLD (CEN_MCBISTS01_MBXERRSTATQ_RDTAG_PAR_RC_ERROR, 3);
CEN_FLD (CEN_MCBISTS01_MBXERRSTATQ_RESERVED_4_63, 4);
CEN_FLD (CEN_MCBISTS01_MBXERRSTATQ_RESERVED_4_63_LEN, 60);

CEN_FLD (CEN_MCBISTS01_MCBCMA1Q_COMPARE_MASK_A, 0);
CEN_FLD (CEN_MCBISTS01_MCBCMA1Q_COMPARE_MASK_A_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MCBCMABQ_COMPARE_MASK_A, 0);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_COMPARE_MASK_A_LEN, 16);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_COMPARE_MASK_B, 16);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_COMPARE_MASK_B_LEN, 16);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_CFG_STORE_FAIL, 32);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_MCBIST_ENABLE_CE_TRAP, 33);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_MCBIST_ENABLE_MPE_TRAP, 34);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_ENABLE_UE_TRAP, 35);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_MCBIST_STOP_ON_NTH_FAIL, 36);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_ARRAY_READ_ENABLE, 37);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_RESERVED_38_63, 38);
CEN_FLD (CEN_MCBISTS01_MCBCMABQ_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MCBISTS01_MCBCMB1Q_COMPARE_MASK_B, 0);
CEN_FLD (CEN_MCBISTS01_MCBCMB1Q_COMPARE_MASK_B_LEN, 64);

CEN_FLD (CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK0, 0);
CEN_FLD (CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK0_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK1, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK1_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK2, 40);
CEN_FLD (CEN_MCBISTS01_MCBEMA1Q_ERROR_MAP_PORTA_RNK2_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA1Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MCBISTS01_MCBEMA1Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK3, 0);
CEN_FLD (CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK3_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK4, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK4_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK5, 40);
CEN_FLD (CEN_MCBISTS01_MCBEMA2Q_ERROR_MAP_PORTA_RNK5_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA2Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MCBISTS01_MCBEMA2Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MCBISTS01_MCBEMA3Q_ERROR_MAP_PORTA_RNK6, 0);
CEN_FLD (CEN_MCBISTS01_MCBEMA3Q_ERROR_MAP_PORTA_RNK6_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA3Q_ERROR_MAP_PORTA_RNK7, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA3Q_ERROR_MAP_PORTA_RNK7_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMA3Q_RESERVED_40_63, 40);
CEN_FLD (CEN_MCBISTS01_MCBEMA3Q_RESERVED_40_63_LEN, 24);

CEN_FLD (CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK0, 0);
CEN_FLD (CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK0_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK1, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK1_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK2, 40);
CEN_FLD (CEN_MCBISTS01_MCBEMB1Q_ERROR_MAP_PORTB_RNK2_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB1Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MCBISTS01_MCBEMB1Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK3, 0);
CEN_FLD (CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK3_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK4, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK4_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK5, 40);
CEN_FLD (CEN_MCBISTS01_MCBEMB2Q_ERROR_MAP_PORTB_RNK5_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB2Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MCBISTS01_MCBEMB2Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MCBISTS01_MCBEMB3Q_ERROR_MAP_PORTB_RNK6, 0);
CEN_FLD (CEN_MCBISTS01_MCBEMB3Q_ERROR_MAP_PORTB_RNK6_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB3Q_ERROR_MAP_PORTB_RNK7, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB3Q_ERROR_MAP_PORTB_RNK7_LEN, 20);
CEN_FLD (CEN_MCBISTS01_MCBEMB3Q_RESERVED_40_63, 40);
CEN_FLD (CEN_MCBISTS01_MCBEMB3Q_RESERVED_40_63_LEN, 24);

CEN_FLD (CEN_MCBISTS01_MCBSTATAQ_PORTA_CE_ERR, 0);
CEN_FLD (CEN_MCBISTS01_MCBSTATAQ_PORTA_UE_ERR, 1);
CEN_FLD (CEN_MCBISTS01_MCBSTATAQ_PORTA_ERR_TRAP_OVERFLOW, 2);
CEN_FLD (CEN_MCBISTS01_MCBSTATAQ_PORTA_CNTL_TRAP_SUBTST_NUM, 3);
CEN_FLD (CEN_MCBISTS01_MCBSTATAQ_PORTA_CNTL_TRAP_SUBTST_NUM_LEN, 5);
CEN_FLD (CEN_MCBISTS01_MCBSTATAQ_PORTA_ERR_LOG_PTR, 8);
CEN_FLD (CEN_MCBISTS01_MCBSTATAQ_PORTA_ERR_LOG_PTR_LEN, 3);
CEN_FLD (CEN_MCBISTS01_MCBSTATAQ_RESERVED_11_23, 11);
CEN_FLD (CEN_MCBISTS01_MCBSTATAQ_RESERVED_11_23_LEN, 13);

CEN_FLD (CEN_MCBISTS01_MCBSTATBQ_PORTB_CE_ERR, 0);
CEN_FLD (CEN_MCBISTS01_MCBSTATBQ_PORTB_UE_ERR, 1);
CEN_FLD (CEN_MCBISTS01_MCBSTATBQ_PORTB_ERR_TRAP_OVERFLOW, 2);
CEN_FLD (CEN_MCBISTS01_MCBSTATBQ_PORTB_CNTL_TRAP_SUBTST_NUM, 3);
CEN_FLD (CEN_MCBISTS01_MCBSTATBQ_PORTB_CNTL_TRAP_SUBTST_NUM_LEN, 5);
CEN_FLD (CEN_MCBISTS01_MCBSTATBQ_PORTB_ERR_LOG_PTR, 8);
CEN_FLD (CEN_MCBISTS01_MCBSTATBQ_PORTB_ERR_LOG_PTR_LEN, 3);
CEN_FLD (CEN_MCBISTS01_MCBSTATBQ_RESERVED_11_23, 11);
CEN_FLD (CEN_MCBISTS01_MCBSTATBQ_RESERVED_11_23_LEN, 13);

CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR0, 0);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR0_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR1, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR1_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR2, 14);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR2_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR3, 21);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR3_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR4, 28);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR4_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR5, 35);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR5_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR6, 42);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR6_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR7, 49);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR7_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR8, 56);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR8_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA1Q_RESERVED_63, 63);

CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR9, 0);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR9_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR10, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR10_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR11, 14);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR11_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR12, 21);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR12_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR13, 28);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR13_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR14, 35);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR14_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR15, 42);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR15_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR16, 49);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR16_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR17, 56);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR17_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA2Q_ERR_CNTR_OVERFLOW, 63);

CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR18, 0);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR18_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR19, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR19_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA3Q_RESERVED_14_63, 14);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTA3Q_RESERVED_14_63_LEN, 50);

CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR0, 0);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR0_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR1, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR1_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR2, 14);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR2_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR3, 21);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR3_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR4, 28);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR4_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR5, 35);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR5_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR6, 42);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR6_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR7, 49);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR7_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR8, 56);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR8_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB1Q_RESERVED_63, 63);

CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR9, 0);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR9_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR10, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR10_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR11, 14);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR11_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR12, 21);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR12_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR13, 28);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR13_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR14, 35);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR14_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR15, 42);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR15_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR16, 49);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR16_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR17, 56);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR17_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB2Q_ERR_CNTR_OVERFLOW, 63);

CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR18, 0);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR18_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR19, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR19_LEN, 7);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB3Q_RESERVED_14_63, 14);
CEN_FLD (CEN_MCBISTS01_MCB_ERRCNTB3Q_RESERVED_14_63_LEN, 50);

CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG, 0);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG, 8);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG, 12);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG, 16);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG, 20);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG, 24);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG, 28);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG, 32);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG, 36);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG, 40);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG, 44);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG, 48);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG, 52);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG, 56);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG_LEN, 4);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG, 60);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG_LEN, 4);

CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS, 0);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS_LEN, 64);

CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS, 0);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS_LEN, 64);

CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS, 0);
CEN_FLD (CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS_LEN, 64);

CEN_FLD (CEN_ECC01_MBECCFIR_MEMORY_MPE_RANK_0_7, 0);
CEN_FLD (CEN_ECC01_MBECCFIR_MEMORY_MPE_RANK_0_7_LEN, 8);
CEN_FLD (CEN_ECC01_MBECCFIR_RESERVED_8_15, 8);
CEN_FLD (CEN_ECC01_MBECCFIR_RESERVED_8_15_LEN, 8);
CEN_FLD (CEN_ECC01_MBECCFIR_MEMORY_NCE, 16);
CEN_FLD (CEN_ECC01_MBECCFIR_MEMORY_RCE, 17);
CEN_FLD (CEN_ECC01_MBECCFIR_MEMORY_SUE, 18);
CEN_FLD (CEN_ECC01_MBECCFIR_MEMORY_UE, 19);
CEN_FLD (CEN_ECC01_MBECCFIR_MAINT_MPE_RANK_0_7, 20);
CEN_FLD (CEN_ECC01_MBECCFIR_MAINT_MPE_RANK_0_7_LEN, 8);
CEN_FLD (CEN_ECC01_MBECCFIR_RESERVED_28_35, 28);
CEN_FLD (CEN_ECC01_MBECCFIR_RESERVED_28_35_LEN, 8);
CEN_FLD (CEN_ECC01_MBECCFIR_MAINTENANCE_NCE, 36);
CEN_FLD (CEN_ECC01_MBECCFIR_MAINTENANCE_SCE, 37);
CEN_FLD (CEN_ECC01_MBECCFIR_MAINTENANCE_MCE, 38);
CEN_FLD (CEN_ECC01_MBECCFIR_MAINTENANCE_RCE, 39);
CEN_FLD (CEN_ECC01_MBECCFIR_MAINTENANCE_SUE, 40);
CEN_FLD (CEN_ECC01_MBECCFIR_MAINTENANCE_UE, 41);
CEN_FLD (CEN_ECC01_MBECCFIR_MPE_DURING_USE_MAINTENANCE_MARK_MODE, 42);
CEN_FLD (CEN_ECC01_MBECCFIR_PREFETCH_MEMORY_UE, 43);
CEN_FLD (CEN_ECC01_MBECCFIR_MEMORY_RCD_PARITY_ERROR, 44);
CEN_FLD (CEN_ECC01_MBECCFIR_MAINTENANCE_RCD_PARITY_ERROR, 45);
CEN_FLD (CEN_ECC01_MBECCFIR_RECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR, 46);
CEN_FLD (CEN_ECC01_MBECCFIR_UNRECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR, 47);
CEN_FLD (CEN_ECC01_MBECCFIR_MASKABLE_CONFIGURATION_REGISTER_PARITY_ERROR, 48);
CEN_FLD (CEN_ECC01_MBECCFIR_ECC_DATAPATH_PARITY_ERROR, 49);
CEN_FLD (CEN_ECC01_MBECCFIR_INTERNAL_SCOM_ERROR, 50);
CEN_FLD (CEN_ECC01_MBECCFIR_INTERNAL_SCOM_ERROR_COPY, 51);

CEN_FLD (CEN_ECC01_MBECCFIR_ACTION0_FIR, 0);
CEN_FLD (CEN_ECC01_MBECCFIR_ACTION0_FIR_LEN, 52);

CEN_FLD (CEN_ECC01_MBECCFIR_ACTION1_FIR, 0);
CEN_FLD (CEN_ECC01_MBECCFIR_ACTION1_FIR_LEN, 52);

CEN_FLD (CEN_ECC01_MBECCFIR_MASK_FIR, 0);
CEN_FLD (CEN_ECC01_MBECCFIR_MASK_FIR_LEN, 52);

CEN_FLD (CEN_ECC01_MBECCFIR_WOF_FIR, 0);
CEN_FLD (CEN_ECC01_MBECCFIR_WOF_FIR_LEN, 52);

CEN_FLD (CEN_ECC01_MBMMRQ_SYMBOL_MAINTENANCE_MARK_VALUE, 0);
CEN_FLD (CEN_ECC01_MBMMRQ_SYMBOL_MAINTENANCE_MARK_VALUE_LEN, 8);
CEN_FLD (CEN_ECC01_MBMMRQ_CHIP_MAINTENANCE_MARK_VALUE, 8);
CEN_FLD (CEN_ECC01_MBMMRQ_CHIP_MAINTENANCE_MARK_VALUE_LEN, 8);

CEN_FLD (CEN_ECC01_MBMS0_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC01_MBMS0_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC01_MBMS0_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC01_MBMS0_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC01_MBMS1_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC01_MBMS1_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC01_MBMS1_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC01_MBMS1_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC01_MBMS2_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC01_MBMS2_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC01_MBMS2_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC01_MBMS2_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC01_MBMS3_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC01_MBMS3_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC01_MBMS3_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC01_MBMS3_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC01_MBMS4_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC01_MBMS4_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC01_MBMS4_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC01_MBMS4_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC01_MBMS5_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC01_MBMS5_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC01_MBMS5_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC01_MBMS5_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC01_MBMS6_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC01_MBMS6_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC01_MBMS6_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC01_MBMS6_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC01_MBMS7_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC01_MBMS7_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC01_MBMS7_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC01_MBMS7_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC01_MBRCEICRQ_ADDRESS, 0);
CEN_FLD (CEN_ECC01_MBRCEICRQ_ADDRESS_LEN, 38);
CEN_FLD (CEN_ECC01_MBRCEICRQ_ENABLE_RCE_INJECT, 38);
CEN_FLD (CEN_ECC01_MBRCEICRQ_ENABLE_SCRUB_INJECT, 39);
CEN_FLD (CEN_ECC01_MBRCEICRQ_READ1_ERROR_TYPE, 40);
CEN_FLD (CEN_ECC01_MBRCEICRQ_READ1_ERROR_TYPE_LEN, 5);
CEN_FLD (CEN_ECC01_MBRCEICRQ_READ2_ERROR_TYPE, 45);
CEN_FLD (CEN_ECC01_MBRCEICRQ_READ2_ERROR_TYPE_LEN, 5);
CEN_FLD (CEN_ECC01_MBRCEICRQ_READ3_ERROR_TYPE, 50);
CEN_FLD (CEN_ECC01_MBRCEICRQ_READ3_ERROR_TYPE_LEN, 5);
CEN_FLD (CEN_ECC01_MBRCEICRQ_BANK_MASK_SELECT, 55);
CEN_FLD (CEN_ECC01_MBRCEICRQ_BANK_MASK_SELECT_LEN, 2);
CEN_FLD (CEN_ECC01_MBRCEICRQ_ROW_MASK_SELECT, 57);
CEN_FLD (CEN_ECC01_MBRCEICRQ_ROW_MASK_SELECT_LEN, 3);
CEN_FLD (CEN_ECC01_MBRCEICRQ_COLUMN_MASK_SELECT, 60);
CEN_FLD (CEN_ECC01_MBRCEICRQ_COLUMN_MASK_SELECT_LEN, 3);
CEN_FLD (CEN_ECC01_MBRCEICRQ_ROW17_ADDRESS, 63);

CEN_FLD (CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC01_MBSBS0_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC01_MBSBS1_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC01_MBSBS2_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC01_MBSBS3_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC01_MBSBS4_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC01_MBSBS5_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC01_MBSBS6_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC01_MBSBS7_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS0_CHIP_PARITY, 33);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS0_SYMBOL_PARITY, 34);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS0_PARITY, 35);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS1_CHIP_PARITY, 36);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS1_SYMBOL_PARITY, 37);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS1_PARITY, 38);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS2_CHIP_PARITY, 39);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS2_SYMBOL_PARITY, 40);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS2_PARITY, 41);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS3_CHIP_PARITY, 42);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS3_SYMBOL_PARITY, 43);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS3_PARITY, 44);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS4_CHIP_PARITY, 45);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS4_SYMBOL_PARITY, 46);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS4_PARITY, 47);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS5_CHIP_PARITY, 48);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS5_SYMBOL_PARITY, 49);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS5_PARITY, 50);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS6_CHIP_PARITY, 51);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS6_SYMBOL_PARITY, 52);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS6_PARITY, 53);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS7_CHIP_PARITY, 54);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS7_SYMBOL_PARITY, 55);
CEN_FLD (CEN_ECC01_MBSECCERR0_MBMS7_PARITY, 56);

CEN_FLD (CEN_ECC01_MBSECCERR1_MEMORY_BIT_STEER_PARITY, 0);
CEN_FLD (CEN_ECC01_MBSECCERR1_MEMORY_BIT_STEER_PARITY_LEN, 8);
CEN_FLD (CEN_ECC01_MBSECCERR1_MBMMR_PARITY, 9);
CEN_FLD (CEN_ECC01_MBSECCERR1_MBRCEICR_PARITY, 11);

CEN_FLD (CEN_ECC01_MBSECCQ_DISABLE_MEMORY_ECC_CHECK_CORRECT, 0);
CEN_FLD (CEN_ECC01_MBSECCQ_DISABLE_MEMORY_ECC_CORRECT, 1);
CEN_FLD (CEN_ECC01_MBSECCQ_RESERVED_2, 2);
CEN_FLD (CEN_ECC01_MBSECCQ_ENABLE_64BYTE_DATA_CHECKBIT_INVERSION, 3);
CEN_FLD (CEN_ECC01_MBSECCQ_USE_MAINTENANCE_MARK, 4);
CEN_FLD (CEN_ECC01_MBSECCQ_DISABLE_MARK_STORE_WRITE, 5);
CEN_FLD (CEN_ECC01_MBSECCQ_ENABLE_FIRST_SHADOW_READ_UE, 6);
CEN_FLD (CEN_ECC01_MBSECCQ_ECC_METADATA_MODE, 7);
CEN_FLD (CEN_ECC01_MBSECCQ_ECC_METADATA_MODE_LEN, 3);
CEN_FLD (CEN_ECC01_MBSECCQ_SINGLE_WIRE_MODE, 10);
CEN_FLD (CEN_ECC01_MBSECCQ_INT_RESET_KEEPER, 11);
CEN_FLD (CEN_ECC01_MBSECCQ_INJECT_SCOM_PARITY_ERROR, 12);
CEN_FLD (CEN_ECC01_MBSECCQ_INJECT_MARK_STORE_SYMBOL_PARITY_ERROR, 13);
CEN_FLD (CEN_ECC01_MBSECCQ_INJECT_MARK_STORE_CHIP_PARITY_ERROR, 14);
CEN_FLD (CEN_ECC01_MBSECCQ_MBRCEICRQ_DATAPATH_PARITY_ERROR_INJECT, 15);
CEN_FLD (CEN_ECC01_MBSECCQ_REPORT_RCE_ON_CORRECTIONS, 16);
CEN_FLD (CEN_ECC01_MBSECCQ_RESERVED_17_23, 17);
CEN_FLD (CEN_ECC01_MBSECCQ_RESERVED_17_23_LEN, 7);

CEN_FLD (CEN_ECC01_MBSMSRQ_MARK_VALUE, 0);
CEN_FLD (CEN_ECC01_MBSMSRQ_MARK_VALUE_LEN, 16);
CEN_FLD (CEN_ECC01_MBSMSRQ_MARK_SHADOW_RANK, 16);
CEN_FLD (CEN_ECC01_MBSMSRQ_MARK_SHADOW_RANK_LEN, 3);

CEN_FLD (CEN_ECC23_MBECCFIR_MEMORY_MPE_RANK_0_7, 0);
CEN_FLD (CEN_ECC23_MBECCFIR_MEMORY_MPE_RANK_0_7_LEN, 8);
CEN_FLD (CEN_ECC23_MBECCFIR_RESERVED_8_15, 8);
CEN_FLD (CEN_ECC23_MBECCFIR_RESERVED_8_15_LEN, 8);
CEN_FLD (CEN_ECC23_MBECCFIR_MEMORY_NCE, 16);
CEN_FLD (CEN_ECC23_MBECCFIR_MEMORY_RCE, 17);
CEN_FLD (CEN_ECC23_MBECCFIR_MEMORY_SUE, 18);
CEN_FLD (CEN_ECC23_MBECCFIR_MEMORY_UE, 19);
CEN_FLD (CEN_ECC23_MBECCFIR_MAINT_MPE_RANK_0_7, 20);
CEN_FLD (CEN_ECC23_MBECCFIR_MAINT_MPE_RANK_0_7_LEN, 8);
CEN_FLD (CEN_ECC23_MBECCFIR_RESERVED_28_35, 28);
CEN_FLD (CEN_ECC23_MBECCFIR_RESERVED_28_35_LEN, 8);
CEN_FLD (CEN_ECC23_MBECCFIR_MAINTENANCE_NCE, 36);
CEN_FLD (CEN_ECC23_MBECCFIR_MAINTENANCE_SCE, 37);
CEN_FLD (CEN_ECC23_MBECCFIR_MAINTENANCE_MCE, 38);
CEN_FLD (CEN_ECC23_MBECCFIR_MAINTENANCE_RCE, 39);
CEN_FLD (CEN_ECC23_MBECCFIR_MAINTENANCE_SUE, 40);
CEN_FLD (CEN_ECC23_MBECCFIR_MAINTENANCE_UE, 41);
CEN_FLD (CEN_ECC23_MBECCFIR_MPE_DURING_USE_MAINTENANCE_MARK_MODE, 42);
CEN_FLD (CEN_ECC23_MBECCFIR_PREFETCH_MEMORY_UE, 43);
CEN_FLD (CEN_ECC23_MBECCFIR_MEMORY_RCD_PARITY_ERROR, 44);
CEN_FLD (CEN_ECC23_MBECCFIR_MAINTENANCE_RCD_PARITY_ERROR, 45);
CEN_FLD (CEN_ECC23_MBECCFIR_RECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR, 46);
CEN_FLD (CEN_ECC23_MBECCFIR_UNRECOVERABLE_CONFIGURATION_REGISTER_PARITY_ERROR, 47);
CEN_FLD (CEN_ECC23_MBECCFIR_MASKABLE_CONFIGURATION_REGISTER_PARITY_ERROR, 48);
CEN_FLD (CEN_ECC23_MBECCFIR_ECC_DATAPATH_PARITY_ERROR, 49);
CEN_FLD (CEN_ECC23_MBECCFIR_INTERNAL_SCOM_ERROR, 50);
CEN_FLD (CEN_ECC23_MBECCFIR_INTERNAL_SCOM_ERROR_COPY, 51);

CEN_FLD (CEN_ECC23_MBECCFIR_ACTION0_FIR, 0);
CEN_FLD (CEN_ECC23_MBECCFIR_ACTION0_FIR_LEN, 52);

CEN_FLD (CEN_ECC23_MBECCFIR_ACTION1_FIR, 0);
CEN_FLD (CEN_ECC23_MBECCFIR_ACTION1_FIR_LEN, 52);

CEN_FLD (CEN_ECC23_MBECCFIR_MASK_FIR, 0);
CEN_FLD (CEN_ECC23_MBECCFIR_MASK_FIR_LEN, 52);

CEN_FLD (CEN_ECC23_MBECCFIR_WOF_FIR, 0);
CEN_FLD (CEN_ECC23_MBECCFIR_WOF_FIR_LEN, 52);

CEN_FLD (CEN_ECC23_MBMMRQ_SYMBOL_MAINTENANCE_MARK_VALUE, 0);
CEN_FLD (CEN_ECC23_MBMMRQ_SYMBOL_MAINTENANCE_MARK_VALUE_LEN, 8);
CEN_FLD (CEN_ECC23_MBMMRQ_CHIP_MAINTENANCE_MARK_VALUE, 8);
CEN_FLD (CEN_ECC23_MBMMRQ_CHIP_MAINTENANCE_MARK_VALUE_LEN, 8);

CEN_FLD (CEN_ECC23_MBMS0_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC23_MBMS0_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC23_MBMS0_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC23_MBMS0_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC23_MBMS1_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC23_MBMS1_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC23_MBMS1_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC23_MBMS1_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC23_MBMS2_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC23_MBMS2_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC23_MBMS2_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC23_MBMS2_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC23_MBMS3_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC23_MBMS3_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC23_MBMS3_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC23_MBMS3_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC23_MBMS4_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC23_MBMS4_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC23_MBMS4_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC23_MBMS4_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC23_MBMS5_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC23_MBMS5_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC23_MBMS5_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC23_MBMS5_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC23_MBMS6_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC23_MBMS6_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC23_MBMS6_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC23_MBMS6_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC23_MBMS7_SYMBOL_MARK_VALUE_FOR_RANKX, 0);
CEN_FLD (CEN_ECC23_MBMS7_SYMBOL_MARK_VALUE_FOR_RANKX_LEN, 8);
CEN_FLD (CEN_ECC23_MBMS7_CHIP_MARK_VALUE_FOR_RANKX, 8);
CEN_FLD (CEN_ECC23_MBMS7_CHIP_MARK_VALUE_FOR_RANKX_LEN, 8);

CEN_FLD (CEN_ECC23_MBRCEICRQ_ADDRESS, 0);
CEN_FLD (CEN_ECC23_MBRCEICRQ_ADDRESS_LEN, 38);
CEN_FLD (CEN_ECC23_MBRCEICRQ_ENABLE_RCE_INJECT, 38);
CEN_FLD (CEN_ECC23_MBRCEICRQ_ENABLE_SCRUB_INJECT, 39);
CEN_FLD (CEN_ECC23_MBRCEICRQ_READ1_ERROR_TYPE, 40);
CEN_FLD (CEN_ECC23_MBRCEICRQ_READ1_ERROR_TYPE_LEN, 5);
CEN_FLD (CEN_ECC23_MBRCEICRQ_READ2_ERROR_TYPE, 45);
CEN_FLD (CEN_ECC23_MBRCEICRQ_READ2_ERROR_TYPE_LEN, 5);
CEN_FLD (CEN_ECC23_MBRCEICRQ_READ3_ERROR_TYPE, 50);
CEN_FLD (CEN_ECC23_MBRCEICRQ_READ3_ERROR_TYPE_LEN, 5);
CEN_FLD (CEN_ECC23_MBRCEICRQ_BANK_MASK_SELECT, 55);
CEN_FLD (CEN_ECC23_MBRCEICRQ_BANK_MASK_SELECT_LEN, 2);
CEN_FLD (CEN_ECC23_MBRCEICRQ_ROW_MASK_SELECT, 57);
CEN_FLD (CEN_ECC23_MBRCEICRQ_ROW_MASK_SELECT_LEN, 3);
CEN_FLD (CEN_ECC23_MBRCEICRQ_COLUMN_MASK_SELECT, 60);
CEN_FLD (CEN_ECC23_MBRCEICRQ_COLUMN_MASK_SELECT_LEN, 3);
CEN_FLD (CEN_ECC23_MBRCEICRQ_ROW17_ADDRESS, 63);

CEN_FLD (CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC23_MBSBS0_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC23_MBSBS1_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC23_MBSBS2_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC23_MBSBS3_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC23_MBSBS4_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC23_MBSBS5_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC23_MBSBS6_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_ECC23_MBSBS7_READ_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS0_CHIP_PARITY, 33);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS0_SYMBOL_PARITY, 34);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS0_PARITY, 35);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS1_CHIP_PARITY, 36);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS1_SYMBOL_PARITY, 37);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS1_PARITY, 38);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS2_CHIP_PARITY, 39);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS2_SYMBOL_PARITY, 40);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS2_PARITY, 41);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS3_CHIP_PARITY, 42);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS3_SYMBOL_PARITY, 43);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS3_PARITY, 44);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS4_CHIP_PARITY, 45);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS4_SYMBOL_PARITY, 46);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS4_PARITY, 47);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS5_CHIP_PARITY, 48);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS5_SYMBOL_PARITY, 49);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS5_PARITY, 50);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS6_CHIP_PARITY, 51);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS6_SYMBOL_PARITY, 52);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS6_PARITY, 53);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS7_CHIP_PARITY, 54);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS7_SYMBOL_PARITY, 55);
CEN_FLD (CEN_ECC23_MBSECCERR0_MBMS7_PARITY, 56);

CEN_FLD (CEN_ECC23_MBSECCERR1_MEMORY_BIT_STEER_PARITY, 0);
CEN_FLD (CEN_ECC23_MBSECCERR1_MEMORY_BIT_STEER_PARITY_LEN, 8);
CEN_FLD (CEN_ECC23_MBSECCERR1_MBMMR_PARITY, 9);
CEN_FLD (CEN_ECC23_MBSECCERR1_MBRCEICR_PARITY, 11);

CEN_FLD (CEN_ECC23_MBSECCQ_DISABLE_MEMORY_ECC_CHECK_CORRECT, 0);
CEN_FLD (CEN_ECC23_MBSECCQ_DISABLE_MEMORY_ECC_CORRECT, 1);
CEN_FLD (CEN_ECC23_MBSECCQ_RESERVED_2, 2);
CEN_FLD (CEN_ECC23_MBSECCQ_ENABLE_64BYTE_DATA_CHECKBIT_INVERSION, 3);
CEN_FLD (CEN_ECC23_MBSECCQ_USE_MAINTENANCE_MARK, 4);
CEN_FLD (CEN_ECC23_MBSECCQ_DISABLE_MARK_STORE_WRITE, 5);
CEN_FLD (CEN_ECC23_MBSECCQ_ENABLE_FIRST_SHADOW_READ_UE, 6);
CEN_FLD (CEN_ECC23_MBSECCQ_ECC_METADATA_MODE, 7);
CEN_FLD (CEN_ECC23_MBSECCQ_ECC_METADATA_MODE_LEN, 3);
CEN_FLD (CEN_ECC23_MBSECCQ_SINGLE_WIRE_MODE, 10);
CEN_FLD (CEN_ECC23_MBSECCQ_INT_RESET_KEEPER, 11);
CEN_FLD (CEN_ECC23_MBSECCQ_INJECT_SCOM_PARITY_ERROR, 12);
CEN_FLD (CEN_ECC23_MBSECCQ_INJECT_MARK_STORE_SYMBOL_PARITY_ERROR, 13);
CEN_FLD (CEN_ECC23_MBSECCQ_INJECT_MARK_STORE_CHIP_PARITY_ERROR, 14);
CEN_FLD (CEN_ECC23_MBSECCQ_MBRCEICRQ_DATAPATH_PARITY_ERROR_INJECT, 15);
CEN_FLD (CEN_ECC23_MBSECCQ_REPORT_RCE_ON_CORRECTIONS, 16);
CEN_FLD (CEN_ECC23_MBSECCQ_RESERVED_17_23, 17);
CEN_FLD (CEN_ECC23_MBSECCQ_RESERVED_17_23_LEN, 7);

CEN_FLD (CEN_ECC23_MBSMSRQ_MARK_VALUE, 0);
CEN_FLD (CEN_ECC23_MBSMSRQ_MARK_VALUE_LEN, 16);
CEN_FLD (CEN_ECC23_MBSMSRQ_MARK_SHADOW_RANK, 16);
CEN_FLD (CEN_ECC23_MBSMSRQ_MARK_SHADOW_RANK_LEN, 3);

CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_MASTER_RANK0, 0);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_DIMM_SELECT, 1);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_MASTER_RANK1, 2);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_MASTER_RANK2, 3);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_SLAVE_RANK, 4);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_BANK, 7);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_BANK_LEN, 4);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_ROW, 11);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_ROW_LEN, 17);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_COL, 28);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_COL_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_ERR_OCCURRED_AFTER_UE_RETRY, 40);
CEN_FLD (CEN_MCBISTS23_MBMPERQ_RD_MPE_ROW17, 41);

CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_MASTER_RANK0, 0);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_DIMM_SELECT, 1);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_MASTER_RANK1, 2);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_MASTER_RANK2, 3);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_SLAVE_RANK, 4);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_BANK, 7);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_BANK_LEN, 4);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_ROW, 11);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_ROW_LEN, 17);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_COL, 28);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_COL_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_ERR_OCCURRED__AFTER_UE_RETRY, 40);
CEN_FLD (CEN_MCBISTS23_MBNCERQ_RD_NCE_ROW17, 41);

CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_MASTER_RANK0, 0);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_DIMM_SELECT, 1);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_MASTER_RANK1, 2);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_MASTER_RANK2, 3);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_SLAVE_RANK, 4);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_BANK, 7);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_BANK_LEN, 4);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_ROW, 11);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_ROW_LEN, 17);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_COL, 28);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_COL_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_ERR_OCCURRED_AFTER_UE_RETRY, 40);
CEN_FLD (CEN_MCBISTS23_MBRCERQ_RD_RCE_ROW17, 41);

CEN_FLD (CEN_MCBISTS23_MBSEC0Q_SOFT_CE_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSEC0Q_SOFT_CE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSEC0Q_INTERMITTENT_CE_COUNT, 12);
CEN_FLD (CEN_MCBISTS23_MBSEC0Q_INTERMITTENT_CE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSEC0Q_HARD_CE_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSEC0Q_HARD_CE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSEC0Q_SCE_COUNT, 36);
CEN_FLD (CEN_MCBISTS23_MBSEC0Q_SCE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSEC0Q_MCE_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSEC0Q_MCE_COUNT_LEN, 12);

CEN_FLD (CEN_MCBISTS23_MBSEC1Q_RCE_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSEC1Q_RCE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSEC1Q_MPE_COUNT, 12);
CEN_FLD (CEN_MCBISTS23_MBSEC1Q_MPE_COUNT_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSEC1Q_UE_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSEC1Q_UE_COUNT_LEN, 12);

CEN_FLD (CEN_MCBISTS23_MBSEVRQ_ERR_VECTOR0, 0);
CEN_FLD (CEN_MCBISTS23_MBSEVRQ_ERR_VECTOR0_LEN, 56);

CEN_FLD (CEN_MCBISTS23_MBSFIRACT0_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT0_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT0_RESERVED_2_14, 2);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT0_RESERVED_2_14_LEN, 13);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT0_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT0_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS23_MBSFIRACT1_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT1_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT1_RESERVED_2_14, 2);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT1_RESERVED_2_14_LEN, 13);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT1_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS23_MBSFIRACT1_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS23_MBSFIRMASK_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS23_MBSFIRMASK_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS23_MBSFIRMASK_RESERVED_2_14, 2);
CEN_FLD (CEN_MCBISTS23_MBSFIRMASK_RESERVED_2_14_LEN, 13);
CEN_FLD (CEN_MCBISTS23_MBSFIRMASK_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS23_MBSFIRMASK_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS23_MBSFIRQ_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS23_MBSFIRQ_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS23_MBSFIRQ_DRAM_EVENTN_BIT0, 2);
CEN_FLD (CEN_MCBISTS23_MBSFIRQ_DRAM_EVENTN_BIT1, 3);
CEN_FLD (CEN_MCBISTS23_MBSFIRQ_RESERVED_4_14, 4);
CEN_FLD (CEN_MCBISTS23_MBSFIRQ_RESERVED_4_14_LEN, 11);
CEN_FLD (CEN_MCBISTS23_MBSFIRQ_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS23_MBSFIRQ_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS23_MBSFIRWOF_SCOM_PAR_ERRORS, 0);
CEN_FLD (CEN_MCBISTS23_MBSFIRWOF_MBX_PAR_ERRORS, 1);
CEN_FLD (CEN_MCBISTS23_MBSFIRWOF_RESERVED_2_14, 2);
CEN_FLD (CEN_MCBISTS23_MBSFIRWOF_RESERVED_2_14_LEN, 13);
CEN_FLD (CEN_MCBISTS23_MBSFIRWOF_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MCBISTS23_MBSFIRWOF_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_0_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_0_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_1_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_1_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_2_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_2_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_3_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_3_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_4_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_4_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_5_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_5_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_6_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_6_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_7_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC0Q_SYMBOL_7_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_8_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_8_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_9_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_9_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_10_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_10_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_11_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_11_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_12_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_12_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_13_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_13_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_14_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_14_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_15_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC1Q_SYMBOL_15_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_16_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_16_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_17_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_17_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_18_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_18_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_19_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_19_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_20_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_20_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_21_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_21_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_22_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_22_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_23_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC2Q_SYMBOL_23_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_24_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_24_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_25_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_25_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_26_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_26_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_27_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_27_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_28_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_28_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_29_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_29_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_30_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_30_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_31_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC3Q_SYMBOL_31_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_32_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_32_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_33_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_33_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_34_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_34_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_35_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_35_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_36_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_36_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_37_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_37_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_38ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_38ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_39_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC4Q_SYMBOL_39_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_40_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_40_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_41_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_41_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_42_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_42_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_43_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_43_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_44_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_44_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_45_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_45_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_46_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_46_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_47_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC5Q_SYMBOL_47_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_48_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_48_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_49_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_49_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_50_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_50_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_51_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_51_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_52_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_52_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_53_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_53_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_54_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_54_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_55_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC6Q_SYMBOL_55_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_56_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_56_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_57_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_57_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_58_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_58_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_59_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_59_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_60_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_60_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_61_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_61_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_62_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_62_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_63_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC7Q_SYMBOL_63_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_64_ERROR_COUNT, 0);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_64_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_65_ERROR_COUNT, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_65_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_66_ERROR_COUNT, 16);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_66_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_67_ERROR_COUNT, 24);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_67_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_68_ERROR_COUNT, 32);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_68_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_69_ERROR_COUNT, 40);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_69_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_70_ERROR_COUNT, 48);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_70_ERROR_COUNT_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_71_ERROR_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSSYMEC8Q_SYMBOL_71_ERROR_COUNT_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBSTRQ_SOFT_CE_COUNT_THRESHOLD_ATTN_STOP, 0);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD_ATTN_STOP, 1);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_HARD_CE_COUNT_THRESHOLD_ATTN_STOP, 2);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_RCE_COUNT_THRESHOLD_ATTN_STOP, 3);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_SOFT_CE_COUNT_THRESHOLD, 4);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_SOFT_CE_COUNT_THRESHOLD_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD, 16);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_INTERMITTENT_CE_COUNT_THRESHOLD_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_HARD_CE_COUNT_THRESHOLD, 28);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_HARD_CE_COUNT_THRESHOLD_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_RETRY_CE_COUNT_THRESHOLD, 40);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_RETRY_CE_COUNT_THRESHOLD_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_RESET_KEEPER, 52);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_RESET_ALL_ERROR_COUNT_REGISTERS, 53);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_DISABLE_RESET_ERROR_REG_RANK_END, 54);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_SOFT_CE_INCR_SYMBOL_COUNT, 55);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_INTERMIT_INCR_SYMBOL_COUNT, 56);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_HARD_CE_INCR_SYMBOL_COUNT, 57);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_MCE_INCR_SYMBOL_COUNT, 58);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_UE_TRAP, 59);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_CFG_MAINT_RCE_WITH_CE, 60);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_RESERVED_61, 61);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_INTERMITTENT_NCE_INJECT, 62);
CEN_FLD (CEN_MCBISTS23_MBSTRQ_RESERVED_63, 63);

CEN_FLD (CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_DATA_ROT, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_DATA_ROT_LEN, 4);
CEN_FLD (CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_DATA_ROT_SEED, 4);
CEN_FLD (CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_DATA_ROT_SEED_LEN, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBDRCRQ_CFG_INVERT_DATA, 20);
CEN_FLD (CEN_MCBISTS23_MBS_MCBDRCRQ_DD2_HW234828_ROUTE_NONMAINT_DATA_TO_MAINTBUFF_EN, 21);
CEN_FLD (CEN_MCBISTS23_MBS_MCBDRCRQ_RESERVED_22_63, 22);
CEN_FLD (CEN_MCBISTS23_MBS_MCBDRCRQ_RESERVED_22_63_LEN, 42);

CEN_FLD (CEN_MCBISTS23_MBS_MCBDRSRQ_CFG_DATA_ROT_SEED, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFD0Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFD0Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFD1Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFD1Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFD2Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFD2Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFD3Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFD3Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFD4Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFD4Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFD5Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFD5Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFD6Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFD6Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFD7Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFD7Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED1, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED2, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED3, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED4, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED5, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED6, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED7, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED7_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED8, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDQ_CFG_FIXED_SEED8_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED1, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED2, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED3, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED4, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED5, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED6, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED7, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED7_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED8, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBFDSPQ_CFG_FIXED_SEED8_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS0Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS1Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS2Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS3Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS4Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS5Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS6Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS7Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDS8Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MCBISTS23_MBS_MCBRDSSPQ_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_MASTER_RANK0, 0);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_DIMM_SELECT, 1);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_MASTER_RANK1, 2);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_MASTER_RANK2, 3);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_SLAVE_RANK, 4);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_BANK, 7);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_BANK_LEN, 4);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_ROW, 11);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_ROW_LEN, 17);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_COL, 28);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_COL_LEN, 12);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RESERVED_40, 40);
CEN_FLD (CEN_MCBISTS23_MBUERQ_RD_UE_ROW17, 41);

CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_RCMD_ERR_INJ_MODE, 0);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_RCMD_ERR_INJ, 1);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_WRD_CE_ERR_INJ_MODE, 2);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_WRD_CE_ERR_INJ, 3);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_WRD_UE_ERR_INJ_MODE, 4);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_WRD_UE_ERR_INJ, 5);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_MAINT_CE_ERR_INJ_MODE, 6);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_MAINT_CE_ERR_INJ, 7);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_MAINT_UE_ERR_INJ_MODE, 8);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_MAINT_UE_ERR_INJ, 9);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_SCOM_PE_ERR_INJ_MODE, 10);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_SCOM_PE_ERR_INJ, 11);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_RESERVED_12_63, 12);
CEN_FLD (CEN_MCBISTS23_MBXERRINJQ_RESERVED_12_63_LEN, 52);

CEN_FLD (CEN_MCBISTS23_MBXERRSTATQ_WDONE_PAR_ERROR, 0);
CEN_FLD (CEN_MCBISTS23_MBXERRSTATQ_RDTAG_RDCHECK_ERROR, 1);
CEN_FLD (CEN_MCBISTS23_MBXERRSTATQ_RDTAG_PAR_ERROR, 2);
CEN_FLD (CEN_MCBISTS23_MBXERRSTATQ_RDTAG_PAR_RC_ERROR, 3);
CEN_FLD (CEN_MCBISTS23_MBXERRSTATQ_RESERVED_4_63, 4);
CEN_FLD (CEN_MCBISTS23_MBXERRSTATQ_RESERVED_4_63_LEN, 60);

CEN_FLD (CEN_MCBISTS23_MCBCMA1Q_COMPARE_MASK_A, 0);
CEN_FLD (CEN_MCBISTS23_MCBCMA1Q_COMPARE_MASK_A_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MCBCMABQ_COMPARE_MASK_A, 0);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_COMPARE_MASK_A_LEN, 16);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_COMPARE_MASK_B, 16);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_COMPARE_MASK_B_LEN, 16);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_CFG_STORE_FAIL, 32);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_MCBIST_ENABLE_CE_TRAP, 33);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_MCBIST_ENABLE_MPE_TRAP, 34);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_ENABLE_UE_TRAP, 35);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_MCBIST_STOP_ON_NTH_FAIL, 36);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_ARRAY_READ_ENABLE, 37);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_RESERVED_38_63, 38);
CEN_FLD (CEN_MCBISTS23_MCBCMABQ_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MCBISTS23_MCBCMB1Q_COMPARE_MASK_B, 0);
CEN_FLD (CEN_MCBISTS23_MCBCMB1Q_COMPARE_MASK_B_LEN, 64);

CEN_FLD (CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK0, 0);
CEN_FLD (CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK0_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK1, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK1_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK2, 40);
CEN_FLD (CEN_MCBISTS23_MCBEMA1Q_ERROR_MAP_PORTA_RNK2_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA1Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MCBISTS23_MCBEMA1Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK3, 0);
CEN_FLD (CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK3_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK4, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK4_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK5, 40);
CEN_FLD (CEN_MCBISTS23_MCBEMA2Q_ERROR_MAP_PORTA_RNK5_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA2Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MCBISTS23_MCBEMA2Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MCBISTS23_MCBEMA3Q_ERROR_MAP_PORTA_RNK6, 0);
CEN_FLD (CEN_MCBISTS23_MCBEMA3Q_ERROR_MAP_PORTA_RNK6_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA3Q_ERROR_MAP_PORTA_RNK7, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA3Q_ERROR_MAP_PORTA_RNK7_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMA3Q_RESERVED_40_63, 40);
CEN_FLD (CEN_MCBISTS23_MCBEMA3Q_RESERVED_40_63_LEN, 24);

CEN_FLD (CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK0, 0);
CEN_FLD (CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK0_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK1, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK1_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK2, 40);
CEN_FLD (CEN_MCBISTS23_MCBEMB1Q_ERROR_MAP_PORTB_RNK2_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB1Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MCBISTS23_MCBEMB1Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK3, 0);
CEN_FLD (CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK3_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK4, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK4_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK5, 40);
CEN_FLD (CEN_MCBISTS23_MCBEMB2Q_ERROR_MAP_PORTB_RNK5_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB2Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MCBISTS23_MCBEMB2Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MCBISTS23_MCBEMB3Q_ERROR_MAP_PORTB_RNK6, 0);
CEN_FLD (CEN_MCBISTS23_MCBEMB3Q_ERROR_MAP_PORTB_RNK6_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB3Q_ERROR_MAP_PORTB_RNK7, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB3Q_ERROR_MAP_PORTB_RNK7_LEN, 20);
CEN_FLD (CEN_MCBISTS23_MCBEMB3Q_RESERVED_40_63, 40);
CEN_FLD (CEN_MCBISTS23_MCBEMB3Q_RESERVED_40_63_LEN, 24);

CEN_FLD (CEN_MCBISTS23_MCBSTATAQ_PORTA_CE_ERR, 0);
CEN_FLD (CEN_MCBISTS23_MCBSTATAQ_PORTA_UE_ERR, 1);
CEN_FLD (CEN_MCBISTS23_MCBSTATAQ_PORTA_ERR_TRAP_OVERFLOW, 2);
CEN_FLD (CEN_MCBISTS23_MCBSTATAQ_PORTA_CNTL_TRAP_SUBTST_NUM, 3);
CEN_FLD (CEN_MCBISTS23_MCBSTATAQ_PORTA_CNTL_TRAP_SUBTST_NUM_LEN, 5);
CEN_FLD (CEN_MCBISTS23_MCBSTATAQ_PORTA_ERR_LOG_PTR, 8);
CEN_FLD (CEN_MCBISTS23_MCBSTATAQ_PORTA_ERR_LOG_PTR_LEN, 3);
CEN_FLD (CEN_MCBISTS23_MCBSTATAQ_RESERVED_11_23, 11);
CEN_FLD (CEN_MCBISTS23_MCBSTATAQ_RESERVED_11_23_LEN, 13);

CEN_FLD (CEN_MCBISTS23_MCBSTATBQ_PORTB_CE_ERR, 0);
CEN_FLD (CEN_MCBISTS23_MCBSTATBQ_PORTB_UE_ERR, 1);
CEN_FLD (CEN_MCBISTS23_MCBSTATBQ_PORTB_ERR_TRAP_OVERFLOW, 2);
CEN_FLD (CEN_MCBISTS23_MCBSTATBQ_PORTB_CNTL_TRAP_SUBTST_NUM, 3);
CEN_FLD (CEN_MCBISTS23_MCBSTATBQ_PORTB_CNTL_TRAP_SUBTST_NUM_LEN, 5);
CEN_FLD (CEN_MCBISTS23_MCBSTATBQ_PORTB_ERR_LOG_PTR, 8);
CEN_FLD (CEN_MCBISTS23_MCBSTATBQ_PORTB_ERR_LOG_PTR_LEN, 3);
CEN_FLD (CEN_MCBISTS23_MCBSTATBQ_RESERVED_11_23, 11);
CEN_FLD (CEN_MCBISTS23_MCBSTATBQ_RESERVED_11_23_LEN, 13);

CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR0, 0);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR0_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR1, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR1_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR2, 14);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR2_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR3, 21);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR3_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR4, 28);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR4_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR5, 35);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR5_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR6, 42);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR6_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR7, 49);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR7_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR8, 56);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_NIBBLE_ERR_PORTA_CNTR8_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA1Q_RESERVED_63, 63);

CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR9, 0);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR9_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR10, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR10_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR11, 14);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR11_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR12, 21);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR12_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR13, 28);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR13_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR14, 35);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR14_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR15, 42);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR15_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR16, 49);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR16_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR17, 56);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_NIBBLE_ERR_PORTA_CNTR17_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA2Q_ERR_CNTR_OVERFLOW, 63);

CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR18, 0);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR18_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR19, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA3Q_NIBBLE_ERR_PORTA_CNTR19_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA3Q_RESERVED_14_63, 14);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTA3Q_RESERVED_14_63_LEN, 50);

CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR0, 0);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR0_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR1, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR1_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR2, 14);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR2_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR3, 21);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR3_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR4, 28);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR4_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR5, 35);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR5_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR6, 42);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR6_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR7, 49);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR7_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR8, 56);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_NIBBLE_ERR_PORTB_CNTR8_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB1Q_RESERVED_63, 63);

CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR9, 0);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR9_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR10, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR10_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR11, 14);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR11_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR12, 21);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR12_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR13, 28);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR13_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR14, 35);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR14_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR15, 42);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR15_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR16, 49);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR16_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR17, 56);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_NIBBLE_ERR_PORTB_CNTR17_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB2Q_ERR_CNTR_OVERFLOW, 63);

CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR18, 0);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR18_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR19, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB3Q_NIBBLE_ERR_PORTB_CNTR19_LEN, 7);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB3Q_RESERVED_14_63, 14);
CEN_FLD (CEN_MCBISTS23_MCB_ERRCNTB3Q_RESERVED_14_63_LEN, 50);

CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA0_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA1_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA2_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA3_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA4_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA5_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA6_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA7_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF0_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA0_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA1_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA2_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA3_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA4_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA5_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA6_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA7_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF1_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA0_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA1_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA2_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA3_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA4_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA5_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA6_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA7_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF2_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA0_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA1_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA2_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA3_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA4_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA5_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA6_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA7_DATA, 0);
CEN_FLD (CEN_MBS01_SRB_BUFF3_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA0_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA1_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA2_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA3_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA4_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA5_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA6_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA7_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF0_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA0_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA1_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA2_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA3_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA4_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA5_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA6_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA7_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF1_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA0_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA1_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA2_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA3_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA4_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA5_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA6_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA7_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF2_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA0_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA1_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA2_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA3_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA4_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA5_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA6_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA7_DATA, 0);
CEN_FLD (CEN_MBS23_SRB_BUFF3_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA0_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA1_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA2_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA3_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA4_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA5_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA6_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA7_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF0_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA0_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA1_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA2_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA3_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA4_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA5_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA6_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA7_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF1_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA0_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA1_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA2_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA3_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA4_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA5_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA6_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA7_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF2_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA0_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA1_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA2_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA3_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA4_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA5_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA6_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA7_DATA, 0);
CEN_FLD (CEN_MBS01_PFB_BUFF3_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA0_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA1_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA2_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA3_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA4_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA5_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA6_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA7_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF0_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA0_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA1_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA2_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA3_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA4_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA5_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA6_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA7_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF1_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA0_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA1_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA2_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA3_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA4_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA5_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA6_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA7_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF2_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA0_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA1_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA2_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA3_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA4_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA5_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA6_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA7_DATA, 0);
CEN_FLD (CEN_MBS23_PFB_BUFF3_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBIERPT0_MBISTAT_PARITY_ERROR, 1);
CEN_FLD (CEN_MBIERPT0_MBICRCSYN_PARITY_ERROR, 2);
CEN_FLD (CEN_MBIERPT0_MBIERRINJ_PARITY_ERROR, 3);
CEN_FLD (CEN_MBIERPT0_MBIFPGAINTR_PARITY_ERROR, 4);
CEN_FLD (CEN_MBIERPT0_CRCG_DATAFLOW_PARITY_ERROR, 11);
CEN_FLD (CEN_MBIERPT0_ECCG_DATAFLOW_PARITY_ERROR, 13);
CEN_FLD (CEN_MBIERPT0_US_CHINIT_READY_TIMEOUT_ERROR, 17);
CEN_FLD (CEN_MBIERPT0_DS_FRAME_START_TIMEOUT_ERROR, 18);
CEN_FLD (CEN_MBIERPT0_DS_NULL_PACKET_TIMEOUT_ERROR, 19);
CEN_FLD (CEN_MBIERPT0_DS_ACK_PACKET_TIMEOUT_ERROR, 20);
CEN_FLD (CEN_MBIERPT0_FRTL_SM_PARITY_ERROR, 22);
CEN_FLD (CEN_MBIERPT0_FL_SM_PARITY_ERROR, 23);
CEN_FLD (CEN_MBIERPT0_GLOBAL_SM_PARITY_ERROR, 24);
CEN_FLD (CEN_MBIERPT0_REPLAY0_SM_PARITY_ERROR, 25);
CEN_FLD (CEN_MBIERPT0_REPLAY1_SM_PARITY_ERROR, 26);
CEN_FLD (CEN_MBIERPT0_REPLAY2_SM_PARITY_ERROR, 27);
CEN_FLD (CEN_MBIERPT0_REPLAY3_SM_PARITY_ERROR, 28);
CEN_FLD (CEN_MBIERPT0_REPLAY4_SM_PARITY_ERROR, 29);
CEN_FLD (CEN_MBIERPT0_REPLAY5_SM_PARITY_ERROR, 30);
CEN_FLD (CEN_MBIERPT0_REPLAY6_SM_PARITY_ERROR, 31);
CEN_FLD (CEN_MBIERPT0_REPLAY7_SM_PARITY_ERROR, 32);
CEN_FLD (CEN_MBIERPT0_REPLAY8_SM_PARITY_ERROR, 33);
CEN_FLD (CEN_MBIERPT0_REPLAY9_SM_PARITY_ERROR, 34);
CEN_FLD (CEN_MBIERPT0_REPLAY10_SM_PARITY_ERROR, 35);
CEN_FLD (CEN_MBIERPT0_REPLAY11_SM_PARITY_ERROR, 36);
CEN_FLD (CEN_MBIERPT0_REPLAY12_SM_PARITY_ERROR, 37);
CEN_FLD (CEN_MBIERPT0_REPLAY13_SM_PARITY_ERROR, 38);
CEN_FLD (CEN_MBIERPT0_REPLAY14_SM_PARITY_ERROR, 39);
CEN_FLD (CEN_MBIERPT0_REPLAY15_SM_PARITY_ERROR, 40);
CEN_FLD (CEN_MBIERPT0_REPLAY16_SM_PARITY_ERROR, 41);
CEN_FLD (CEN_MBIERPT0_REPLAY17_SM_PARITY_ERROR, 42);
CEN_FLD (CEN_MBIERPT0_REPLAY18_SM_PARITY_ERROR, 43);
CEN_FLD (CEN_MBIERPT0_REPLAY19_SM_PARITY_ERROR, 44);
CEN_FLD (CEN_MBIERPT0_REPLAY20_SM_PARITY_ERROR, 45);
CEN_FLD (CEN_MBIERPT0_REPLAY21_SM_PARITY_ERROR, 46);
CEN_FLD (CEN_MBIERPT0_REPLAY22_SM_PARITY_ERROR, 47);
CEN_FLD (CEN_MBIERPT0_REPLAY23_SM_PARITY_ERROR, 48);
CEN_FLD (CEN_MBIERPT0_REPLAY24_SM_PARITY_ERROR, 49);
CEN_FLD (CEN_MBIERPT0_REPLAY25_SM_PARITY_ERROR, 50);
CEN_FLD (CEN_MBIERPT0_REPLAY26_SM_PARITY_ERROR, 51);
CEN_FLD (CEN_MBIERPT0_REPLAY27_SM_PARITY_ERROR, 52);
CEN_FLD (CEN_MBIERPT0_REPLAY28_SM_PARITY_ERROR, 53);
CEN_FLD (CEN_MBIERPT0_REPLAY29_SM_PARITY_ERROR, 54);
CEN_FLD (CEN_MBIERPT0_REPLAY30_SM_PARITY_ERROR, 55);
CEN_FLD (CEN_MBIERPT0_REPLAY31_SM_PARITY_ERROR, 56);

CEN_FLD (CEN_MBICFGQ_FORCE_CHANNEL_FAIL, 0);
CEN_FLD (CEN_MBICFGQ_REPLAY_CRC_DISABLE, 1);
CEN_FLD (CEN_MBICFGQ_REPLAY_NOACK_DISABLE, 2);
CEN_FLD (CEN_MBICFGQ_REPLAY_OUTOFORDER_DISABLE, 3);
CEN_FLD (CEN_MBICFGQ_FORCE_LFSR_REPLAY, 4);
CEN_FLD (CEN_MBICFGQ_CRC_CHECK_DISABLE, 5);
CEN_FLD (CEN_MBICFGQ_ECC_CHECK_DISABLE, 6);
CEN_FLD (CEN_MBICFGQ_FORCE_FRAME_LOCK, 7);
CEN_FLD (CEN_MBICFGQ_FORCE_FRTL, 8);
CEN_FLD (CEN_MBICFGQ_AUTO_FRTL_DISABLE, 9);
CEN_FLD (CEN_MBICFGQ_MANUAL_FRTL_VALUE, 10);
CEN_FLD (CEN_MBICFGQ_MANUAL_FRTL_VALUE_LEN, 7);
CEN_FLD (CEN_MBICFGQ_MANUAL_FRTL_DONE, 17);
CEN_FLD (CEN_MBICFGQ_ECC_CORRECT_DISABLE, 18);
CEN_FLD (CEN_MBICFGQ_SPARE1, 19);
CEN_FLD (CEN_MBICFGQ_LANE_VOTING_BYPASS, 20);
CEN_FLD (CEN_MBICFGQ_BAD_LANE_VALUE, 21);
CEN_FLD (CEN_MBICFGQ_BAD_LANE_VALUE_LEN, 5);
CEN_FLD (CEN_MBICFGQ_BAD_LANE_VOTING_DISABLE, 26);
CEN_FLD (CEN_MBICFGQ_NO_FORWARD_PROGRESS_TIMEOUT_VALUE, 27);
CEN_FLD (CEN_MBICFGQ_NO_FORWARD_PROGRESS_TIMEOUT_VALUE_LEN, 6);
CEN_FLD (CEN_MBICFGQ_PERFORMANCE_DEGRADATION_PERCENT_SELECT, 33);
CEN_FLD (CEN_MBICFGQ_PERFORMANCE_DEGRADATION_PERCENT_SELECT_LEN, 2);
CEN_FLD (CEN_MBICFGQ_CHANNEL_INITIALIZATION_STATE_MACHINE_TIMEOUT_VALUE, 35);
CEN_FLD (CEN_MBICFGQ_CHANNEL_INITIALIZATION_STATE_MACHINE_TIMEOUT_VALUE_LEN, 2);
CEN_FLD (CEN_MBICFGQ_MBI_RESET_KEEPER, 37);
CEN_FLD (CEN_MBICFGQ_FAULT_LINE_ERROR_ENABLE, 38);
CEN_FLD (CEN_MBICFGQ_DEBUG_BUS_WAT_CONTROL, 39);
CEN_FLD (CEN_MBICFGQ_SPARE3, 40);
CEN_FLD (CEN_MBICFGQ_SPARE3_LEN, 4);

CEN_FLD (CEN_MBICRCSYNQ_VALID, 0);
CEN_FLD (CEN_MBICRCSYNQ_FIRST, 1);
CEN_FLD (CEN_MBICRCSYNQ_AUTO_RESET_DISABLE, 2);
CEN_FLD (CEN_MBICRCSYNQ_DS_SYNDROME, 3);
CEN_FLD (CEN_MBICRCSYNQ_DS_SYNDROME_LEN, 25);

CEN_FLD (CEN_MBIERRINJQ_FRAME_CRC_ERROR_INJECT_MODE, 0);
CEN_FLD (CEN_MBIERRINJQ_FRAME_CRC_ERROR_INJECT, 1);
CEN_FLD (CEN_MBIERRINJQ_REPLAY_BUFFER_ERROR_INJECT_MODE, 2);
CEN_FLD (CEN_MBIERRINJQ_REPLAY_BUFFER_ECC_CE_INJECT, 3);
CEN_FLD (CEN_MBIERRINJQ_REPLAY_BUFFER_ECC_UE_INJECT, 4);
CEN_FLD (CEN_MBIERRINJQ_DATA_FLOW_PARITY_ERROR_INJECT_MODE, 5);
CEN_FLD (CEN_MBIERRINJQ_DATA_FLOW_PARITY_ERROR_INJECT, 6);
CEN_FLD (CEN_MBIERRINJQ_DEAD_FRAME_CRC_ERROR_INJECT, 7);

CEN_FLD (CEN_MBIFIRACT0_ACTION_0, 0);
CEN_FLD (CEN_MBIFIRACT0_ACTION_0_LEN, 27);

CEN_FLD (CEN_MBIFIRACT1_ACTION_1, 0);
CEN_FLD (CEN_MBIFIRACT1_ACTION_1_LEN, 27);

CEN_FLD (CEN_MBIFIRMASK_REPLAY_TIMEOUT, 0);
CEN_FLD (CEN_MBIFIRMASK_CHANNEL_FAIL, 1);
CEN_FLD (CEN_MBIFIRMASK_CRC_ERROR, 2);
CEN_FLD (CEN_MBIFIRMASK_FRAME_NOACK, 3);
CEN_FLD (CEN_MBIFIRMASK_SEQID_OUT_OF_ORDER, 4);
CEN_FLD (CEN_MBIFIRMASK_REPLAY_BUFFER_ECC_CE, 5);
CEN_FLD (CEN_MBIFIRMASK_REPLAY_BUFFER_ECC_UE, 6);
CEN_FLD (CEN_MBIFIRMASK_MBI_CHINIT_STATE_MACHINE_TIMEOUT, 7);
CEN_FLD (CEN_MBIFIRMASK_MBI_INTERNAL_CONTROL_PARITY_ERROR, 8);
CEN_FLD (CEN_MBIFIRMASK_MBI_DATA_FLOW_PARITY_ERROR, 9);
CEN_FLD (CEN_MBIFIRMASK_CRC_PERFORMANCE_DEGRADATION, 10);
CEN_FLD (CEN_MBIFIRMASK_HOST_MC_CHECKSTOP, 11);
CEN_FLD (CEN_MBIFIRMASK_HOST_MC_TRACESTOP, 12);
CEN_FLD (CEN_MBIFIRMASK_CHANNEL_INTERLOCK_FAIL, 13);
CEN_FLD (CEN_MBIFIRMASK_HOST_MC_LOCAL_CHECKSTOP, 14);
CEN_FLD (CEN_MBIFIRMASK_FRTL_COUNTER_OVERFLOW, 15);
CEN_FLD (CEN_MBIFIRMASK_SCOM_REGISTER_PARITY_ERROR, 16);
CEN_FLD (CEN_MBIFIRMASK_IO_FAULT, 17);
CEN_FLD (CEN_MBIFIRMASK_MULTIPLE_REPLAY, 18);
CEN_FLD (CEN_MBIFIRMASK_MBICFG_PARITY_SCOM_ERROR, 19);
CEN_FLD (CEN_MBIFIRMASK_BUFFER_OVERRUN_ERROR, 20);
CEN_FLD (CEN_MBIFIRMASK_WAT_EVENT, 21);
CEN_FLD (CEN_MBIFIRMASK_RESERVED_2, 22);
CEN_FLD (CEN_MBIFIRMASK_RESERVED_3, 23);
CEN_FLD (CEN_MBIFIRMASK_RESERVED_4, 24);
CEN_FLD (CEN_MBIFIRMASK_INTERNAL_SCOM_ERROR_CLONE, 25);
CEN_FLD (CEN_MBIFIRMASK_INTERNAL_SCOM_ERROR_CLONE_COPY, 26);

CEN_FLD (CEN_MBIFIRQ_REPLAY_TIMEOUT, 0);
CEN_FLD (CEN_MBIFIRQ_CHANNEL_FAIL, 1);
CEN_FLD (CEN_MBIFIRQ_CRC_ERROR, 2);
CEN_FLD (CEN_MBIFIRQ_FRAME_NOACK, 3);
CEN_FLD (CEN_MBIFIRQ_SEQID_OUT_OF_ORDER, 4);
CEN_FLD (CEN_MBIFIRQ_REPLAY_BUFFER_ECC_CE, 5);
CEN_FLD (CEN_MBIFIRQ_REPLAY_BUFFER_ECC_UE, 6);
CEN_FLD (CEN_MBIFIRQ_MBI_STATE_MACHINE_TIMEOUT, 7);
CEN_FLD (CEN_MBIFIRQ_MBI_INTERNAL_CONTROL_PARITY_ERROR, 8);
CEN_FLD (CEN_MBIFIRQ_MBI_DATA_FLOW_PARITY_ERROR, 9);
CEN_FLD (CEN_MBIFIRQ_CRC_PERFORMANCE_DEGRADATION, 10);
CEN_FLD (CEN_MBIFIRQ_HOST_MC_GLOBAL_CHECKSTOP, 11);
CEN_FLD (CEN_MBIFIRQ_HOST_MC_TRACESTOP, 12);
CEN_FLD (CEN_MBIFIRQ_CHANNEL_INTERLOCK_FAIL, 13);
CEN_FLD (CEN_MBIFIRQ_HOST_MC_LOCAL_CHECKSTOP, 14);
CEN_FLD (CEN_MBIFIRQ_FRTL_CONTER_OVERFLOW, 15);
CEN_FLD (CEN_MBIFIRQ_SCOM_REGISTER_PARITY_ERROR, 16);
CEN_FLD (CEN_MBIFIRQ_IO_FAULT, 17);
CEN_FLD (CEN_MBIFIRQ_MULTIPLE_REPLAY, 18);
CEN_FLD (CEN_MBIFIRQ_MBICFG_PARITY_SCOM_ERROR, 19);
CEN_FLD (CEN_MBIFIRQ_BUFFER_OVERRUN_ERROR, 20);
CEN_FLD (CEN_MBIFIRQ_WAT_EVENT, 21);
CEN_FLD (CEN_MBIFIRQ_RESERVED_2, 22);
CEN_FLD (CEN_MBIFIRQ_RESERVED_3, 23);
CEN_FLD (CEN_MBIFIRQ_RESERVED_4, 24);
CEN_FLD (CEN_MBIFIRQ_INTERNAL_SCOM_ERROR_CLONE, 25);
CEN_FLD (CEN_MBIFIRQ_INTERNAL_SCOM_ERROR_CLONE_COPY, 26);

CEN_FLD (CEN_MBIFPGAINTRQ_FPGA_INTERRUPT_ENABLE, 0);
CEN_FLD (CEN_MBIFPGAINTRQ_FPGA_INTERRUPT_TRIGGER, 1);
CEN_FLD (CEN_MBIFPGAINTRQ_FPGA_INTERRUPT_FENCE_DISABLE, 2);

CEN_FLD (CEN_MBISTATQ_FRAME_LOCK_PASS, 0);
CEN_FLD (CEN_MBISTATQ_FRAME_LOCK_FAIL, 1);
CEN_FLD (CEN_MBISTATQ_FRTL_PASS, 2);
CEN_FLD (CEN_MBISTATQ_FRTL_FAIL, 3);
CEN_FLD (CEN_MBISTATQ_REPLAY_IN_PROGRESS, 4);
CEN_FLD (CEN_MBISTATQ_OPERATING_FRTL_VALUE, 5);
CEN_FLD (CEN_MBISTATQ_OPERATING_FRTL_VALUE_LEN, 7);
CEN_FLD (CEN_MBISTATQ_DMI_EDI_FENCE, 12);
CEN_FLD (CEN_MBISTATQ_CHAN_INTERLOCK_PASS, 13);
CEN_FLD (CEN_MBISTATQ_CHAN_INTERLOCK_FAIL, 14);
CEN_FLD (CEN_MBISTATQ_SPARE0, 15);

CEN_FLD (CEN_MBIFIRWOF_REPLAY_TIMEOUT, 0);
CEN_FLD (CEN_MBIFIRWOF_CHANNEL_FAIL, 1);
CEN_FLD (CEN_MBIFIRWOF_CRC_ERROR, 2);
CEN_FLD (CEN_MBIFIRWOF_FRAME_NOACK, 3);
CEN_FLD (CEN_MBIFIRWOF_SEQID_OUT_OF_ORDER, 4);
CEN_FLD (CEN_MBIFIRWOF_REPLAY_BUFFER_ECC_CE, 5);
CEN_FLD (CEN_MBIFIRWOF_REPLAY_BUFFER_ECC_UE, 6);
CEN_FLD (CEN_MBIFIRWOF_MBI_STATE_MACHINE_TIMEOUT, 7);
CEN_FLD (CEN_MBIFIRWOF_MBI_INTERNAL_CONTROL_PARITY_ERROR, 8);
CEN_FLD (CEN_MBIFIRWOF_MBI_DATA_FLOW_PARITY_ERROR, 9);
CEN_FLD (CEN_MBIFIRWOF_CRC_PERFORMANCE_DEGRADATION, 10);
CEN_FLD (CEN_MBIFIRWOF_HOST_MC_GLOBAL_CHECKSTOP, 11);
CEN_FLD (CEN_MBIFIRWOF_HOST_MC_TRACESTOP, 12);
CEN_FLD (CEN_MBIFIRWOF_CHANNEL_INTERLOCK_FAIL, 13);
CEN_FLD (CEN_MBIFIRWOF_HOST_MC_LOCAL_CHECKSTOP, 14);
CEN_FLD (CEN_MBIFIRWOF_FRTL_CONTER_OVERFLOW, 15);
CEN_FLD (CEN_MBIFIRWOF_SCOM_REGISTER_PARITY_ERROR, 16);
CEN_FLD (CEN_MBIFIRWOF_IO_FAULT, 17);
CEN_FLD (CEN_MBIFIRWOF_MULTIPLE_REPLAY, 18);
CEN_FLD (CEN_MBIFIRWOF_MBICFG_PARITY_SCOM_ERROR, 19);
CEN_FLD (CEN_MBIFIRWOF_BUFFER_OVERRUN_ERROR, 20);
CEN_FLD (CEN_MBIFIRWOF_RESERVED_21_24, 21);
CEN_FLD (CEN_MBIFIRWOF_RESERVED_21_24_LEN, 4);
CEN_FLD (CEN_MBIFIRWOF_INTERNAL_SCOM_ERROR_CLONE, 25);
CEN_FLD (CEN_MBIFIRWOF_INTERNAL_SCOM_ERROR_CLONE_COPY, 26);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA0_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA1_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA2_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA3_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA4_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA5_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA6_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA7_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC0_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC0_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC0_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC1_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC1_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC1_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC2_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC2_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC2_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC3_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC3_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC3_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC4_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC4_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC4_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC5_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC5_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC5_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC6_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC6_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC6_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC7_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC7_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF0_DATA_ECC7_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA0_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA1_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA2_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA3_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA4_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA5_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA6_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA7_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC0_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC0_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC0_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC1_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC1_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC1_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC2_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC2_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC2_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC3_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC3_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC3_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC4_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC4_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC4_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC5_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC5_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC5_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC6_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC6_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC6_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC7_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC7_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF1_DATA_ECC7_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA0_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA1_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA2_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA3_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA4_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA5_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA6_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA7_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC0_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC0_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC0_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC1_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC1_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC1_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC2_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC2_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC2_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC3_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC3_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC3_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC4_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC4_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC4_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC5_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC5_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC5_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC6_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC6_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC6_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC7_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC7_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF2_DATA_ECC7_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA0_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA1_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA2_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA3_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA4_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA5_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA6_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA7_DATA, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC0_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC0_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC0_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC1_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC1_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC1_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC2_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC2_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC2_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC3_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC3_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC3_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC4_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC4_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC4_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC5_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC5_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC5_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC6_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC6_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC6_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC7_SPARE, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC7_ECC, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF3_DATA_ECC7_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_CHECKBIT0_1, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_TAG0_2, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_TAG1_3, 2);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_MDI, 3);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_FABRIC_ECC, 48);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_CHECKBIT0_1, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_TAG0_2, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_TAG1_3, 2);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_MDI, 3);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_FABRIC_ECC, 48);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_CHECKBIT0_1, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_TAG0_2, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_TAG1_3, 2);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_MDI, 3);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_FABRIC_ECC, 48);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_CHECKBIT0_1, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_TAG0_2, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_TAG1_3, 2);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_MDI, 3);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_FABRIC_ECC, 48);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_CHECKBIT0_1, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_TAG0_2, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_TAG1_3, 2);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_MDI, 3);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_FABRIC_ECC, 48);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_CHECKBIT0_1, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_TAG0_2, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_TAG1_3, 2);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_MDI, 3);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_FABRIC_ECC, 48);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_CHECKBIT0_1, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_TAG0_2, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_TAG1_3, 2);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_MDI, 3);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_FABRIC_ECC, 48);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_CHECKBIT0_1, 0);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_TAG0_2, 1);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_TAG1_3, 2);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_MDI, 3);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_FABRIC_ECC, 48);
CEN_FLD (CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA0_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA1_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA2_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA3_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA4_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA5_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA6_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA7_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC0_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC0_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC0_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC1_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC1_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC1_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC2_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC2_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC2_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC3_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC3_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC3_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC4_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC4_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC4_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC5_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC5_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC5_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC6_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC6_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC6_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC7_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC7_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC7_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA0_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA1_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA2_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA3_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA4_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA5_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA6_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA7_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC0_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC0_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC0_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC1_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC1_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC1_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC2_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC2_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC2_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC3_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC3_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC3_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC4_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC4_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC4_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC5_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC5_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC5_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC6_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC6_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC6_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC7_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC7_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC7_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA0_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA1_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA2_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA3_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA4_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA5_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA6_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA7_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC0_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC0_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC0_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC1_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC1_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC1_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC2_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC2_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC2_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC3_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC3_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC3_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC4_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC4_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC4_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC5_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC5_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC5_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC6_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC6_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC6_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC7_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC7_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC7_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA0_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA0_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA1_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA1_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA2_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA2_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA3_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA3_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA4_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA4_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA5_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA5_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA6_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA6_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA7_DATA, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA7_DATA_LEN, 64);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC0_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC0_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC0_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC1_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC1_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC1_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC2_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC2_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC2_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC3_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC3_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC3_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC4_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC4_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC4_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC5_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC5_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC5_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC6_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC6_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC6_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC7_SPARE, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC7_ECC, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC7_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_CHECKBIT0_1, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_TAG0_2, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_TAG1_3, 2);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_MDI, 3);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_FABRIC_ECC, 48);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_CHECKBIT0_1, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_TAG0_2, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_TAG1_3, 2);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_MDI, 3);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_FABRIC_ECC, 48);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_CHECKBIT0_1, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_TAG0_2, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_TAG1_3, 2);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_MDI, 3);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_FABRIC_ECC, 48);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_CHECKBIT0_1, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_TAG0_2, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_TAG1_3, 2);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_MDI, 3);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_FABRIC_ECC, 48);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_CHECKBIT0_1, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_TAG0_2, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_TAG1_3, 2);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_MDI, 3);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_FABRIC_ECC, 48);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_CHECKBIT0_1, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_TAG0_2, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_TAG1_3, 2);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_MDI, 3);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_FABRIC_ECC, 48);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_CHECKBIT0_1, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_TAG0_2, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_TAG1_3, 2);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_MDI, 3);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_FABRIC_ECC, 48);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_CHECKBIT0_1, 0);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_TAG0_2, 1);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_TAG1_3, 2);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_MDI, 3);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C6_C5_C4, 4);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C6_C5_C4_LEN, 12);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C3_C2_C1_C0, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_ECC_C3_C2_C1_C0_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_SPARE_ECC_BITS, 32);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_SPARE_ECC_BITS_LEN, 16);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_FABRIC_ECC, 48);
CEN_FLD (CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_FABRIC_ECC_LEN, 8);

CEN_FLD (CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_MBA_MBABS0_WRITE_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_MBA_MBABS1_WRITE_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_MBA_MBABS2_WRITE_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_MBA_MBABS3_WRITE_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_MBA_MBABS4_WRITE_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_MBA_MBABS5_WRITE_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_MBA_MBABS6_WRITE_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_0, 0);
CEN_FLD (CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_0_LEN, 5);
CEN_FLD (CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_1, 5);
CEN_FLD (CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_1_LEN, 5);
CEN_FLD (CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_2, 10);
CEN_FLD (CEN_MBA_MBABS7_WRITE_BIT_STEER_MUX_SELECT_2_LEN, 6);

CEN_FLD (CEN_MBA_MBA_INJQ_INJQ_CFG_RDTAG_ERR_INJ, 0);
CEN_FLD (CEN_MBA_MBA_INJQ_INJQ_CFG_RRQ_POP_ERR_INJ, 1);
CEN_FLD (CEN_MBA_MBA_INJQ_INJQ_CFG_WR_ECC_INJ_MODE, 2);
CEN_FLD (CEN_MBA_MBA_INJQ_INJQ_CFG_WR_ECC_ERR_INJ, 3);
CEN_FLD (CEN_MBA_MBA_INJQ_INJQ_CFG_WRD_BUFF_INJ_MODE, 4);
CEN_FLD (CEN_MBA_MBA_INJQ_INJQ_CFG_WRD_BUFFER_CE_INJ, 5);
CEN_FLD (CEN_MBA_MBA_INJQ_INJQ_CFG_WRD_BUFFER_UE_INJ, 6);

CEN_FLD (CEN_MBA_MBA_WRD_MODE_WRD_MODE_CFG_ECC_CHK_DISABLE, 0);
CEN_FLD (CEN_MBA_MBA_WRD_MODE_WRD_MODE_CFG_ECC_COR_DISABLE, 1);
CEN_FLD (CEN_MBA_MBA_WRD_MODE_WRD_MODE_ECC_METADATA, 2);
CEN_FLD (CEN_MBA_MBA_WRD_MODE_WRD_MODE_ECC_METADATA_LEN, 3);
CEN_FLD (CEN_MBA_MBA_WRD_MODE_WRD_MODE_CFG_MAINT_ECC_CHK_DISABLE, 5);

CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_ARRAY_CE_ERR_INJ_MODE, 0);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_ARRAY_CE_ERR_INJ, 1);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_ARRAY_UE_ERR_INJ_MODE, 2);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_ARRAY_UE_ERR_INJ, 3);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CS_CHIP_ID_2N_MODE, 4);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_DISABLE_2N_MODE, 5);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_RESERVED_6_14, 6);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_RESERVED_6_14_LEN, 9);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_READ_RESPONSE_DELAY_ENABLE, 15);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE0, 16);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE0_LEN, 16);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE1, 32);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE1_LEN, 16);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE2, 48);
CEN_FLD (CEN_MBA_CCSARRERRINJQ_CCS_LOOP_COUNTER_COMPARE2_LEN, 16);

CEN_FLD (CEN_MBA_CCS_CNTLQ_START, 0);
CEN_FLD (CEN_MBA_CCS_CNTLQ_STOP, 1);

CEN_FLD (CEN_MBA_CCS_FIXED_DATA0Q_DATA_0_63, 0);
CEN_FLD (CEN_MBA_CCS_FIXED_DATA0Q_DATA_0_63_LEN, 64);

CEN_FLD (CEN_MBA_CCS_FIXED_DATA1Q_DATA_64_79, 0);
CEN_FLD (CEN_MBA_CCS_FIXED_DATA1Q_DATA_64_79_LEN, 16);
CEN_FLD (CEN_MBA_CCS_FIXED_DATA1Q_RESERVED_16_63, 16);
CEN_FLD (CEN_MBA_CCS_FIXED_DATA1Q_RESERVED_16_63_LEN, 48);

CEN_FLD (CEN_MBA_CCS_MODEQ_STOP_ON_ERR, 0);
CEN_FLD (CEN_MBA_CCS_MODEQ_UE_DISABLE, 1);
CEN_FLD (CEN_MBA_CCS_MODEQ_DATA_SEL, 2);
CEN_FLD (CEN_MBA_CCS_MODEQ_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_CCS_MODEQ_MCBIST_DDR_DPHY_NCLK, 4);
CEN_FLD (CEN_MBA_CCS_MODEQ_MCBIST_DDR_DPHY_NCLK_LEN, 2);
CEN_FLD (CEN_MBA_CCS_MODEQ_MCBIST_DDR_DPHY_PCLK, 6);
CEN_FLD (CEN_MBA_CCS_MODEQ_MCBIST_DDR_DPHY_PCLK_LEN, 2);
CEN_FLD (CEN_MBA_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT, 8);
CEN_FLD (CEN_MBA_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_MODEQ_MCBIST_DDR_RESETN, 24);
CEN_FLD (CEN_MBA_CCS_MODEQ_MCBIST_DDR_DFI_RESET_RECOVER, 25);
CEN_FLD (CEN_MBA_CCS_MODEQ_COPY_CKE_TO_SPARE, 26);
CEN_FLD (CEN_MBA_CCS_MODEQ_DISABLE_ECC_ARRAY_CHK, 27);
CEN_FLD (CEN_MBA_CCS_MODEQ_DISABLE_ECC_ARRAY_CORRECTION, 28);
CEN_FLD (CEN_MBA_CCS_MODEQ_ADDR_MUX_SEL, 29);
CEN_FLD (CEN_MBA_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT, 30);
CEN_FLD (CEN_MBA_CCS_MODEQ_DDR_CAL_TIMEOUT_CNT_MULT_LEN, 2);
CEN_FLD (CEN_MBA_CCS_MODEQ_MA_B_ADDRESS_IDLE_PAT, 32);
CEN_FLD (CEN_MBA_CCS_MODEQ_MA_B_ADDRESS_IDLE_PAT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_MODEQ_MA_B_BANK_IDLE_PAT, 48);
CEN_FLD (CEN_MBA_CCS_MODEQ_MA_B_BANK_IDLE_PAT_LEN, 3);
CEN_FLD (CEN_MBA_CCS_MODEQ_MA_B_ACTIVATE_IDLE_PAT, 51);
CEN_FLD (CEN_MBA_CCS_MODEQ_MA_B_RASN_IDLE_PAT, 52);
CEN_FLD (CEN_MBA_CCS_MODEQ_MA_B_CASN_IDLE_PAT, 53);
CEN_FLD (CEN_MBA_CCS_MODEQ_MA_B_WEN_IDLE_PAT, 54);
CEN_FLD (CEN_MBA_CCS_MODEQ_NTTM_MODE, 55);
CEN_FLD (CEN_MBA_CCS_MODEQ_NTTM_RW_DATA_DLY, 56);
CEN_FLD (CEN_MBA_CCS_MODEQ_NTTM_RW_DATA_DLY_LEN, 4);
CEN_FLD (CEN_MBA_CCS_MODEQ_DDR_RESETN_ENABLE, 60);
CEN_FLD (CEN_MBA_CCS_MODEQ_DDR_PARITY_ENABLE, 61);
CEN_FLD (CEN_MBA_CCS_MODEQ_GP_BIT_3_ENABLE, 62);
CEN_FLD (CEN_MBA_CCS_MODEQ_FORCE_MCLK_LOW_N, 63);

CEN_FLD (CEN_MBA_CCS_STATQ_IP, 0);
CEN_FLD (CEN_MBA_CCS_STATQ_DONE, 1);
CEN_FLD (CEN_MBA_CCS_STATQ_FAIL, 2);
CEN_FLD (CEN_MBA_CCS_STATQ_FAIL_TYPE, 3);
CEN_FLD (CEN_MBA_CCS_STATQ_FAIL_TYPE_LEN, 3);

CEN_FLD (CEN_MBA_MBAFIRACT0_INVALID_MAINT_CMD, 0);
CEN_FLD (CEN_MBA_MBAFIRACT0_INVALID_MAINT_ADDRESS, 1);
CEN_FLD (CEN_MBA_MBAFIRACT0_MULTI_ADDRESS_MAINT_TIMEOUT, 2);
CEN_FLD (CEN_MBA_MBAFIRACT0_INTERNAL_FSM_ERROR, 3);
CEN_FLD (CEN_MBA_MBAFIRACT0_MCBIST_ERROR, 4);
CEN_FLD (CEN_MBA_MBAFIRACT0_SCOM_CMD_REG_PE, 5);
CEN_FLD (CEN_MBA_MBAFIRACT0_CHANNEL_CHKSTP_ERR, 6);
CEN_FLD (CEN_MBA_MBAFIRACT0_WRD_CAW2_DATA_CE_UE_ERR, 7);
CEN_FLD (CEN_MBA_MBAFIRACT0_MAINT_1HOT_ST_ERROR_DD2, 8);
CEN_FLD (CEN_MBA_MBAFIRACT0_RESERVED_9_14, 9);
CEN_FLD (CEN_MBA_MBAFIRACT0_RESERVED_9_14_LEN, 6);
CEN_FLD (CEN_MBA_MBAFIRACT0_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MBA_MBAFIRACT0_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MBA_MBAFIRACT1_INVALID_MAINT_CMD, 0);
CEN_FLD (CEN_MBA_MBAFIRACT1_INVALID_MAINT_ADDRESS, 1);
CEN_FLD (CEN_MBA_MBAFIRACT1_MULTI_ADDRESS_MAINT_TIMEOUT, 2);
CEN_FLD (CEN_MBA_MBAFIRACT1_INTERNAL_FSM_ERROR, 3);
CEN_FLD (CEN_MBA_MBAFIRACT1_MCBIST_ERROR, 4);
CEN_FLD (CEN_MBA_MBAFIRACT1_SCOM_CMD_REG_PE, 5);
CEN_FLD (CEN_MBA_MBAFIRACT1_CHANNEL_CHKSTP_ERR, 6);
CEN_FLD (CEN_MBA_MBAFIRACT1_WRD_CAW2_DATA_CE_UE_ERR, 7);
CEN_FLD (CEN_MBA_MBAFIRACT1_MAINT_1HOT_ST_ERROR_DD2, 8);
CEN_FLD (CEN_MBA_MBAFIRACT1_RESERVED_9_14, 9);
CEN_FLD (CEN_MBA_MBAFIRACT1_RESERVED_9_14_LEN, 6);
CEN_FLD (CEN_MBA_MBAFIRACT1_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MBA_MBAFIRACT1_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MBA_MBAFIRMASK_INVALID_MAINT_CMD, 0);
CEN_FLD (CEN_MBA_MBAFIRMASK_INVALID_MAINT_ADDRESS, 1);
CEN_FLD (CEN_MBA_MBAFIRMASK_MULTI_ADDRESS_MAINT_TIMEOUT, 2);
CEN_FLD (CEN_MBA_MBAFIRMASK_INTERNAL_FSM_ERROR, 3);
CEN_FLD (CEN_MBA_MBAFIRMASK_MCBIST_ERROR, 4);
CEN_FLD (CEN_MBA_MBAFIRMASK_SCOM_CMD_REG_PE, 5);
CEN_FLD (CEN_MBA_MBAFIRMASK_CHANNEL_CHKSTP_ERR, 6);
CEN_FLD (CEN_MBA_MBAFIRMASK_WRD_CAW2_DATA_CE_UE_ERR, 7);
CEN_FLD (CEN_MBA_MBAFIRMASK_MAINT_1HOT_ST_ERROR_DD2, 8);
CEN_FLD (CEN_MBA_MBAFIRMASK_RESERVED_9_14, 9);
CEN_FLD (CEN_MBA_MBAFIRMASK_RESERVED_9_14_LEN, 6);
CEN_FLD (CEN_MBA_MBAFIRMASK_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MBA_MBAFIRMASK_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MBA_MBAFIRQ_INVALID_MAINT_CMD, 0);
CEN_FLD (CEN_MBA_MBAFIRQ_INVALID_MAINT_ADDRESS, 1);
CEN_FLD (CEN_MBA_MBAFIRQ_MULTI_ADDRESS_MAINT_TIMEOUT, 2);
CEN_FLD (CEN_MBA_MBAFIRQ_INTERNAL_FSM_ERROR, 3);
CEN_FLD (CEN_MBA_MBAFIRQ_MCBIST_ERROR, 4);
CEN_FLD (CEN_MBA_MBAFIRQ_SCOM_CMD_REG_PE, 5);
CEN_FLD (CEN_MBA_MBAFIRQ_CHANNEL_CHKSTP_ERR, 6);
CEN_FLD (CEN_MBA_MBAFIRQ_WRD_CAW2_DATA_CE_UE_ERR, 7);
CEN_FLD (CEN_MBA_MBAFIRQ_MAINT_1HOT_ST_ERROR_DD2, 8);
CEN_FLD (CEN_MBA_MBAFIRQ_RESERVED_9_14, 9);
CEN_FLD (CEN_MBA_MBAFIRQ_RESERVED_9_14_LEN, 6);
CEN_FLD (CEN_MBA_MBAFIRQ_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MBA_MBAFIRQ_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MBA_MBAFIRWOF_INVALID_MAINT_CMD, 0);
CEN_FLD (CEN_MBA_MBAFIRWOF_INVALID_MAINT_ADDRESS, 1);
CEN_FLD (CEN_MBA_MBAFIRWOF_MULTI_ADDRESS_MAINT_TIMEOUT, 2);
CEN_FLD (CEN_MBA_MBAFIRWOF_INTERNAL_FSM_ERROR, 3);
CEN_FLD (CEN_MBA_MBAFIRWOF_MCBIST_ERROR, 4);
CEN_FLD (CEN_MBA_MBAFIRWOF_SCOM_CMD_REG_PE, 5);
CEN_FLD (CEN_MBA_MBAFIRWOF_CHANNEL_CHKSTP_ERR, 6);
CEN_FLD (CEN_MBA_MBAFIRWOF_WRD_CAW2_DATA_CE_UE_ERR, 7);
CEN_FLD (CEN_MBA_MBAFIRWOF_RESERVED_8_14, 8);
CEN_FLD (CEN_MBA_MBAFIRWOF_RESERVED_8_14_LEN, 7);
CEN_FLD (CEN_MBA_MBAFIRWOF_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_MBA_MBAFIRWOF_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_MBA_MBASCTLQ_STOP_ETE_NOW, 0);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_ETE_RANK_END, 1);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_NCE_HARD, 2);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_NCE_INTERMITTENT, 3);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_NCE_SOFT, 4);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_SCE, 5);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_MCE, 6);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_RETRYCE, 7);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_MPE, 8);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_UE, 9);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_ON_END_ADDRESS, 10);
CEN_FLD (CEN_MBA_MBASCTLQ_ENABLE_ATT_MAINT_CMD_DONE, 11);
CEN_FLD (CEN_MBA_MBASCTLQ_STOP_SUE, 12);
CEN_FLD (CEN_MBA_MBASCTLQ_CMD_TIMEOUT_SEL, 13);
CEN_FLD (CEN_MBA_MBASCTLQ_CMD_TIMEOUT_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MBASCTLQ_RESET_KEEPER, 15);
CEN_FLD (CEN_MBA_MBASCTLQ_MBSPA_BIT_0_MODE, 16);
CEN_FLD (CEN_MBA_MBASCTLQ_RESERVED_17_63, 17);
CEN_FLD (CEN_MBA_MBASCTLQ_RESERVED_17_63_LEN, 47);

CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MAINT_START_ADDR_ERR, 0);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MAINT_END_ADDR_ERR, 1);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_FIR_CCS_ERR, 2);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MAINT_1HOT_ST_ERROR, 3);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_FIR_MCBAGEN_ERR, 4);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_FIR_MCBFSM_ERR, 5);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBMCCQ_PE, 6);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_CCS_CNTLQ_PE, 7);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_CNTLQ_PE, 8);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBSPAQ_PE, 9);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MAINT_CCS_PE, 10);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCBAGEN_PE, 11);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCBDGEN_PE, 12);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MCB_CONTROLLER_PE, 13);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS0_PE, 14);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS1_PE, 15);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS2_PE, 16);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS3_PE, 17);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS4_PE, 18);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS5_PE, 19);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS6_PE, 20);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBABS7_PE, 21);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_INJQ_PE, 22);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_WRD_MODE_PE, 23);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBMACAQ_PE, 24);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_MBMCTQ_PE, 25);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_RESERVED_26_63, 26);
CEN_FLD (CEN_MBA_MBA_MCBERRPTQ_MCBERRPTQ_RESERVED_26_63_LEN, 38);

CEN_FLD (CEN_MBA_MBECTLQ_ATOMIC_ALT_CE_INJ, 0);
CEN_FLD (CEN_MBA_MBECTLQ_ATOMIC_ALT_CHIP_KILL_INJ, 1);
CEN_FLD (CEN_MBA_MBECTLQ_ATOMIC_ALT_SD_UE_INJ, 2);
CEN_FLD (CEN_MBA_MBECTLQ_ATOMIC_ALT_SUE_INJ, 3);
CEN_FLD (CEN_MBA_MBECTLQ_ATOMIC_ALT_INJ_SYM_SEL, 4);
CEN_FLD (CEN_MBA_MBECTLQ_ATOMIC_ALT_INJ_SYM_SEL_LEN, 7);
CEN_FLD (CEN_MBA_MBECTLQ_ATOMIC_ALT_INJ_DATA_SEL, 11);
CEN_FLD (CEN_MBA_MBECTLQ_SCOM_CMD_REG_INJ_MODE, 12);
CEN_FLD (CEN_MBA_MBECTLQ_SCOM_CMD_REG_INJ, 13);
CEN_FLD (CEN_MBA_MBECTLQ_MAINT_INTERNAL_FSM_INJ_MODE, 14);
CEN_FLD (CEN_MBA_MBECTLQ_MAINT_INTERNAL_FSM_INJ_REG, 15);
CEN_FLD (CEN_MBA_MBECTLQ_CCS_INTERNAL_FSM_INJ_MODE, 16);
CEN_FLD (CEN_MBA_MBECTLQ_CCS_INTERNAL_FSM_INJ_REG, 17);
CEN_FLD (CEN_MBA_MBECTLQ_WRD_CAW2_UE_CE_DETECT, 18);
CEN_FLD (CEN_MBA_MBECTLQ_RESERVED_19_31, 19);
CEN_FLD (CEN_MBA_MBECTLQ_RESERVED_19_31_LEN, 13);

CEN_FLD (CEN_MBA_MBMACAQ_CMD_MASTER_RANK0, 0);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_DIMM_SELECT, 1);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_MASTER_RANK1, 2);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_MASTER_RANK2, 3);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_SLAVE_RANK, 4);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_BANK, 7);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_BANK_LEN, 4);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_ROW, 11);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_ROW_LEN, 17);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_COL, 28);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_COL_LEN, 12);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_ERR_STATUS, 40);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_ERR_STATUS_LEN, 7);
CEN_FLD (CEN_MBA_MBMACAQ_MRANK_SCRUBED, 47);
CEN_FLD (CEN_MBA_MBMACAQ_MRANK_SCRUBED_LEN, 12);
CEN_FLD (CEN_MBA_MBMACAQ_CMD_ROW17, 59);

CEN_FLD (CEN_MBA_MBMCCQ_MAINT_CMD_START, 0);
CEN_FLD (CEN_MBA_MBMCCQ_MAINT_CMD_STOP, 1);

CEN_FLD (CEN_MBA_MBMCTQ_MAINT_CMD_TYPE, 0);
CEN_FLD (CEN_MBA_MBMCTQ_MAINT_CMD_TYPE_LEN, 5);
CEN_FLD (CEN_MBA_MBMCTQ_SF_INCREMENT_MODE, 5);
CEN_FLD (CEN_MBA_MBMCTQ_BURST_WINDOW_SEL, 6);
CEN_FLD (CEN_MBA_MBMCTQ_RESERVED_7_8, 7);
CEN_FLD (CEN_MBA_MBMCTQ_RESERVED_7_8_LEN, 2);
CEN_FLD (CEN_MBA_MBMCTQ_TIMEBASE_SEL, 9);
CEN_FLD (CEN_MBA_MBMCTQ_TIMEBASE_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MBMCTQ_TIMEBASE_BURST_SEL, 11);
CEN_FLD (CEN_MBA_MBMCTQ_TIMEBASE_INTERVAL, 12);
CEN_FLD (CEN_MBA_MBMCTQ_TIMEBASE_INTERVAL_LEN, 12);
CEN_FLD (CEN_MBA_MBMCTQ_BURST_WINDOW, 24);
CEN_FLD (CEN_MBA_MBMCTQ_BURST_WINDOW_LEN, 8);
CEN_FLD (CEN_MBA_MBMCTQ_BURST_INTERVAL, 32);
CEN_FLD (CEN_MBA_MBMCTQ_BURST_INTERVAL_LEN, 8);

CEN_FLD (CEN_MBA_MBMEAQ_END_MASTER_RANK0, 0);
CEN_FLD (CEN_MBA_MBMEAQ_END_DIMM_SELECT, 1);
CEN_FLD (CEN_MBA_MBMEAQ_END_MASTER_RANK1, 2);
CEN_FLD (CEN_MBA_MBMEAQ_END_MASTER_RANK2, 3);
CEN_FLD (CEN_MBA_MBMEAQ_END_SLAVE_RANK, 4);
CEN_FLD (CEN_MBA_MBMEAQ_END_SLAVE_RANK_LEN, 3);
CEN_FLD (CEN_MBA_MBMEAQ_END_BANK, 7);
CEN_FLD (CEN_MBA_MBMEAQ_END_BANK_LEN, 4);
CEN_FLD (CEN_MBA_MBMEAQ_END_ROW, 11);
CEN_FLD (CEN_MBA_MBMEAQ_END_ROW_LEN, 17);
CEN_FLD (CEN_MBA_MBMEAQ_END_COL, 28);
CEN_FLD (CEN_MBA_MBMEAQ_END_COL_LEN, 12);
CEN_FLD (CEN_MBA_MBMEAQ_CMD_ROW17, 40);

CEN_FLD (CEN_MBA_MBMSRQ_MAINT_CMD_IP, 0);

CEN_FLD (CEN_MBA_MBSPAMSKQ_COMMAND_COMPLETE_WO_ENA_ERR_ATTN, 0);
CEN_FLD (CEN_MBA_MBSPAMSKQ_HARD_CE_ETE_ATTN, 1);
CEN_FLD (CEN_MBA_MBSPAMSKQ_SOFT_CE_ETE_ATTN, 2);
CEN_FLD (CEN_MBA_MBSPAMSKQ_INTERMITTENT_ETE_ATTN, 3);
CEN_FLD (CEN_MBA_MBSPAMSKQ_RCE_ETE_ATTN, 4);
CEN_FLD (CEN_MBA_MBSPAMSKQ_EMERGENCY_THROTTLE_ATTN, 5);
CEN_FLD (CEN_MBA_MBSPAMSKQ_FIRMWARE_ATTN0, 6);
CEN_FLD (CEN_MBA_MBSPAMSKQ_FIRMWARE_ATTN1, 7);
CEN_FLD (CEN_MBA_MBSPAMSKQ_WAT_DEBUG_ATTN, 8);
CEN_FLD (CEN_MBA_MBSPAMSKQ_SPARE_ATTN1, 9);
CEN_FLD (CEN_MBA_MBSPAMSKQ_MCBIST_DONE, 10);

CEN_FLD (CEN_MBA_MBSPAQ_COMMAND_COMPLETE_WO_ENA_ERR_ATTN, 0);
CEN_FLD (CEN_MBA_MBSPAQ_HARD_CE_ETE_ATTN, 1);
CEN_FLD (CEN_MBA_MBSPAQ_SOFT_CE_ETE_ATTN, 2);
CEN_FLD (CEN_MBA_MBSPAQ_INTERMITTENT_ETE_ATTN, 3);
CEN_FLD (CEN_MBA_MBSPAQ_RCE_ETE_ATTN, 4);
CEN_FLD (CEN_MBA_MBSPAQ_EMERGENCY_THROTTLE_ATTN, 5);
CEN_FLD (CEN_MBA_MBSPAQ_FIRMWARE_ATTN0, 6);
CEN_FLD (CEN_MBA_MBSPAQ_FIRMWARE_ATTN1, 7);
CEN_FLD (CEN_MBA_MBSPAQ_WAT_DEBUG_ATTN, 8);
CEN_FLD (CEN_MBA_MBSPAQ_SPARE_ATTN1, 9);
CEN_FLD (CEN_MBA_MBSPAQ_MCBIST_DONE, 10);

CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_FIXED_WIDTH_A0, 0);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_FIXED_WIDTH_A0_LEN, 6);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_FIXED_WIDTH_A1, 6);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_FIXED_WIDTH_A1_LEN, 6);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_PORTA0_RATIO, 12);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_PORTA0_RATIO_LEN, 4);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_PORTA1_RATIO, 16);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_PORTA1_RATIO_LEN, 4);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_RANDPORT_WGT_A, 20);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_RANDPORT_WGT_A_LEN, 3);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_DET_RAND_WGT_A, 23);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_PORTA_SCKT_PPLTD, 24);
CEN_FLD (CEN_MBA_MCBAGRAQ_CFG_PORTA_SCKT_PPLTD_LEN, 2);
CEN_FLD (CEN_MBA_MCBAGRAQ_RESERVED_26_31, 26);
CEN_FLD (CEN_MBA_MCBAGRAQ_RESERVED_26_31_LEN, 6);

CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK0, 0);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK0_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK1, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK1_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK2, 12);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK3, 18);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_MRANK3_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK0, 24);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK0_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK1, 30);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK1_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK2, 36);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_SRANK2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK3, 42);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK3_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK2, 48);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK1, 54);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_CFG_A0MAP_BANK1_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MBA_MCBAMR0A0Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK0, 0);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK0_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK1, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK1_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK2, 12);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK3, 18);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_MRANK3_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK0, 24);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK0_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK1, 30);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK1_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK2, 36);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_SRANK2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK3, 42);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK3_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK2, 48);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK1, 54);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_CFG_A1MAP_BANK1_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MBA_MCBAMR0A1Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_BANK0, 0);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_BANK0_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW16, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW16_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW15, 12);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW15_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW14, 18);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW14_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW13, 24);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW13_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW12, 30);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW12_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW11, 36);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW11_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW10, 42);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW10_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW9, 48);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW9_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW8, 54);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_CFG_A0MAP_ROW8_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MBA_MCBAMR1A0Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_BANK0, 0);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_BANK0_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW16, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW16_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW15, 12);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW15_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW14, 18);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW14_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW13, 24);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW13_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW12, 30);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW12_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW11, 36);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW11_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW10, 42);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW10_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW9, 48);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW9_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW8, 54);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_CFG_A1MAP_ROW8_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MBA_MCBAMR1A1Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW7, 0);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW7_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW6, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW6_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW5, 12);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW5_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW4, 18);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW4_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW3, 24);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW3_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW2, 30);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW1, 36);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW1_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW0, 42);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_ROW0_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_COL13, 48);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_COL13_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_COL11, 54);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_CFG_A0MAP_COL11_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MBA_MCBAMR2A0Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW7, 0);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW7_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW6, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW6_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW5, 12);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW5_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW4, 18);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW4_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW3, 24);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW3_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW2, 30);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW1, 36);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW1_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW0, 42);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_ROW0_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_COL13, 48);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_COL13_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_COL11, 54);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_CFG_A1MAP_COL11_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MBA_MCBAMR2A1Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL9, 0);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL9_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL8, 6);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL8_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL7, 12);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL7_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL6, 18);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL6_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL5, 24);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL5_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL4, 30);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL4_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL3, 36);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL3_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL2, 42);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_CFG_A0MAP_COL2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_RESERVED_48_63, 48);
CEN_FLD (CEN_MBA_MCBAMR3A0Q_RESERVED_48_63_LEN, 16);

CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL9, 0);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL9_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL8, 6);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL8_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL7, 12);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL7_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL6, 18);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL6_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL5, 24);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL5_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL4, 30);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL4_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL3, 36);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL3_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL2, 42);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_CFG_A1MAP_COL2_LEN, 6);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_RESERVED_48_63, 48);
CEN_FLD (CEN_MBA_MCBAMR3A1Q_RESERVED_48_63_LEN, 16);

CEN_FLD (CEN_MBA_MCBCFGQ_RESERVED_0_37, 0);
CEN_FLD (CEN_MBA_MCBCFGQ_RESERVED_0_37_LEN, 38);
CEN_FLD (CEN_MBA_MCBCFGQ_REFRESH_ONLY_SUBTEST_EN, 38);
CEN_FLD (CEN_MBA_MCBCFGQ_REFRESH_ONLY_SUBTEST_TIMEBASE_SEL, 39);
CEN_FLD (CEN_MBA_MCBCFGQ_REFRESH_ONLY_SUBTEST_TIMEBASE_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBCFGQ_RAND_ADDR_ALL_MODE_EN, 41);
CEN_FLD (CEN_MBA_MCBCFGQ_MCBIST_CFG_REF_WAIT_TIME, 42);
CEN_FLD (CEN_MBA_MCBCFGQ_MCBIST_CFG_REF_WAIT_TIME_LEN, 14);
CEN_FLD (CEN_MBA_MCBCFGQ_RESERVED_56_59, 56);
CEN_FLD (CEN_MBA_MCBCFGQ_RESERVED_56_59_LEN, 4);
CEN_FLD (CEN_MBA_MCBCFGQ_MCBIST_CFG_RESET_ERROR_DATA, 60);
CEN_FLD (CEN_MBA_MCBCFGQ_MCBIST_CFG_BREAK_ON_SUBTEST, 61);
CEN_FLD (CEN_MBA_MCBCFGQ_MCBIST_CFG_STOP_ON_ERR, 62);
CEN_FLD (CEN_MBA_MCBCFGQ_RESERVED_63, 63);

CEN_FLD (CEN_MBA_MCBDRCRQ_CFG_DATA_ROT, 0);
CEN_FLD (CEN_MBA_MCBDRCRQ_CFG_DATA_ROT_LEN, 4);
CEN_FLD (CEN_MBA_MCBDRCRQ_CFG_DATA_ROT_SEED, 4);
CEN_FLD (CEN_MBA_MCBDRCRQ_CFG_DATA_ROT_SEED_LEN, 16);
CEN_FLD (CEN_MBA_MCBDRCRQ_CFG_INVERT_DATA, 20);
CEN_FLD (CEN_MBA_MCBDRCRQ_RESERVED_21_63, 21);
CEN_FLD (CEN_MBA_MCBDRCRQ_RESERVED_21_63_LEN, 43);

CEN_FLD (CEN_MBA_MCBDRSRQ_CFG_DATA_ROT_SEED, 0);
CEN_FLD (CEN_MBA_MCBDRSRQ_CFG_DATA_ROT_SEED_LEN, 64);

CEN_FLD (CEN_MBA_MCBFD0Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MBA_MCBFD0Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MBA_MCBFD1Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MBA_MCBFD1Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MBA_MCBFD2Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MBA_MCBFD2Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MBA_MCBFD3Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MBA_MCBFD3Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MBA_MCBFD4Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MBA_MCBFD4Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MBA_MCBFD5Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MBA_MCBFD5Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MBA_MCBFD6Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MBA_MCBFD6Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MBA_MCBFD7Q_CFG_FIXED_SEED, 0);
CEN_FLD (CEN_MBA_MCBFD7Q_CFG_FIXED_SEED_LEN, 64);

CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED1, 0);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED2, 8);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED3, 16);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED4, 24);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED5, 32);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED6, 40);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED7, 48);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED7_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED8, 56);
CEN_FLD (CEN_MBA_MCBFDQ_CFG_FIXED_SEED8_LEN, 8);

CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED1, 0);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED2, 8);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED3, 16);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED4, 24);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED5, 32);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED6, 40);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED7, 48);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED7_LEN, 8);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED8, 56);
CEN_FLD (CEN_MBA_MCBFDSPQ_CFG_FIXED_SEED8_LEN, 8);

CEN_FLD (CEN_MBA_MCBLFSRA0Q_CFG_LFSR_MASK_A0, 0);
CEN_FLD (CEN_MBA_MCBLFSRA0Q_CFG_LFSR_MASK_A0_LEN, 38);
CEN_FLD (CEN_MBA_MCBLFSRA0Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBLFSRA0Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCBLFSRA1Q_CFG_LFSR_MASK_A1, 0);
CEN_FLD (CEN_MBA_MCBLFSRA1Q_CFG_LFSR_MASK_A1_LEN, 38);
CEN_FLD (CEN_MBA_MCBLFSRA1Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBLFSRA1Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_OP_TYPE, 0);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_1ST_CMD, 3);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_2ND_CMD, 4);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_3RD_CMD, 5);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_MODE, 6);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DATA_MODE, 8);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DONE, 11);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DATA_SEL, 12);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_SEL, 14);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST00_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_OP_TYPE, 16);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_1ST_CMD, 19);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_2ND_CMD, 20);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_COMPL_3RD_CMD, 21);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_MODE, 22);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DATA_MODE, 24);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DONE, 27);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DATA_SEL, 28);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_SEL, 30);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST01_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_OP_TYPE, 32);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_1ST_CMD, 35);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_2ND_CMD, 36);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_COMPL_3RD_CMD, 37);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_MODE, 38);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DATA_MODE, 40);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DONE, 43);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DATA_SEL, 44);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_SEL, 46);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST02_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_OP_TYPE, 48);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_1ST_CMD, 51);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_2ND_CMD, 52);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_COMPL_3RD_CMD, 53);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_MODE, 54);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DATA_MODE, 56);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DONE, 59);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DATA_SEL, 60);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_SEL, 62);
CEN_FLD (CEN_MBA_MCBMR0Q_MCBIST_CFG_TEST03_ADDR_SEL_LEN, 2);

CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_OP_TYPE, 0);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_1ST_CMD, 3);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_2ND_CMD, 4);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_COMPL_3RD_CMD, 5);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_MODE, 6);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DATA_MODE, 8);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DONE, 11);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DATA_SEL, 12);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_SEL, 14);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST04_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_OP_TYPE, 16);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_1ST_CMD, 19);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_2ND_CMD, 20);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_COMPL_3RD_CMD, 21);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_MODE, 22);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DATA_MODE, 24);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DONE, 27);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DATA_SEL, 28);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_SEL, 30);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST05_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_OP_TYPE, 32);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_1ST_CMD, 35);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_2ND_CMD, 36);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_COMPL_3RD_CMD, 37);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_MODE, 38);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DATA_MODE, 40);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DONE, 43);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DATA_SEL, 44);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_SEL, 46);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST06_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_OP_TYPE, 48);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_1ST_CMD, 51);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_2ND_CMD, 52);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_COMPL_3RD_CMD, 53);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_MODE, 54);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DATA_MODE, 56);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DONE, 59);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DATA_SEL, 60);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_SEL, 62);
CEN_FLD (CEN_MBA_MCBMR1Q_MCBIST_CFG_TEST07_ADDR_SEL_LEN, 2);

CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_OP_TYPE, 0);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_1ST_CMD, 3);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_2ND_CMD, 4);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_COMPL_3RD_CMD, 5);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_MODE, 6);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DATA_MODE, 8);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DONE, 11);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DATA_SEL, 12);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_SEL, 14);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST08_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_OP_TYPE, 16);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_1ST_CMD, 19);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_2ND_CMD, 20);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_COMPL_3RD_CMD, 21);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_MODE, 22);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DATA_MODE, 24);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DONE, 27);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DATA_SEL, 28);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_SEL, 30);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST09_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_OP_TYPE, 32);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_1ST_CMD, 35);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_2ND_CMD, 36);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_COMPL_3RD_CMD, 37);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_MODE, 38);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DATA_MODE, 40);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DONE, 43);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DATA_SEL, 44);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_SEL, 46);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST10_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_OP_TYPE, 48);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_1ST_CMD, 51);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_2ND_CMD, 52);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_COMPL_3RD_CMD, 53);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_MODE, 54);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DATA_MODE, 56);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DONE, 59);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DATA_SEL, 60);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_SEL, 62);
CEN_FLD (CEN_MBA_MCBMR2Q_MCBIST_CFG_TEST11_ADDR_SEL_LEN, 2);

CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_OP_TYPE, 0);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_1ST_CMD, 3);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_2ND_CMD, 4);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_COMPL_3RD_CMD, 5);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_MODE, 6);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DATA_MODE, 8);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DONE, 11);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DATA_SEL, 12);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_SEL, 14);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST12_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_OP_TYPE, 16);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_1ST_CMD, 19);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_2ND_CMD, 20);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_COMPL_3RD_CMD, 21);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_MODE, 22);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DATA_MODE, 24);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DONE, 27);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DATA_SEL, 28);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_SEL, 30);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST13_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_OP_TYPE, 32);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_1ST_CMD, 35);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_2ND_CMD, 36);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_COMPL_3RD_CMD, 37);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_MODE, 38);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DATA_MODE, 40);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DONE, 43);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DATA_SEL, 44);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_SEL, 46);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST14_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_OP_TYPE, 48);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_1ST_CMD, 51);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_2ND_CMD, 52);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_COMPL_3RD_CMD, 53);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_MODE, 54);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DATA_MODE, 56);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DONE, 59);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DATA_SEL, 60);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_SEL, 62);
CEN_FLD (CEN_MBA_MCBMR3Q_MCBIST_CFG_TEST15_ADDR_SEL_LEN, 2);

CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_OP_TYPE, 0);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_1ST_CMD, 3);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_2ND_CMD, 4);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_COMPL_3RD_CMD, 5);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_MODE, 6);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DATA_MODE, 8);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DONE, 11);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DATA_SEL, 12);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_SEL, 14);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST16_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_OP_TYPE, 16);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_1ST_CMD, 19);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_2ND_CMD, 20);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_COMPL_3RD_CMD, 21);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_MODE, 22);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DATA_MODE, 24);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DONE, 27);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DATA_SEL, 28);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_SEL, 30);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST17_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_OP_TYPE, 32);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_1ST_CMD, 35);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_2ND_CMD, 36);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_COMPL_3RD_CMD, 37);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_MODE, 38);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DATA_MODE, 40);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DONE, 43);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DATA_SEL, 44);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_SEL, 46);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST18_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_OP_TYPE, 48);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_1ST_CMD, 51);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_2ND_CMD, 52);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_COMPL_3RD_CMD, 53);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_MODE, 54);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DATA_MODE, 56);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DONE, 59);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DATA_SEL, 60);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_SEL, 62);
CEN_FLD (CEN_MBA_MCBMR4Q_MCBIST_CFG_TEST19_ADDR_SEL_LEN, 2);

CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_OP_TYPE, 0);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_1ST_CMD, 3);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_2ND_CMD, 4);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_COMPL_3RD_CMD, 5);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_MODE, 6);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DATA_MODE, 8);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DONE, 11);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DATA_SEL, 12);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_SEL, 14);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST20_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_OP_TYPE, 16);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_1ST_CMD, 19);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_2ND_CMD, 20);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_COMPL_3RD_CMD, 21);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_MODE, 22);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DATA_MODE, 24);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DONE, 27);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DATA_SEL, 28);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_SEL, 30);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST21_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_OP_TYPE, 32);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_1ST_CMD, 35);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_2ND_CMD, 36);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_COMPL_3RD_CMD, 37);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_MODE, 38);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DATA_MODE, 40);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DONE, 43);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DATA_SEL, 44);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_SEL, 46);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST22_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_OP_TYPE, 48);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_1ST_CMD, 51);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_2ND_CMD, 52);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_COMPL_3RD_CMD, 53);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_MODE, 54);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DATA_MODE, 56);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DONE, 59);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DATA_SEL, 60);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_SEL, 62);
CEN_FLD (CEN_MBA_MCBMR5Q_MCBIST_CFG_TEST23_ADDR_SEL_LEN, 2);

CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_OP_TYPE, 0);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_1ST_CMD, 3);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_2ND_CMD, 4);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_COMPL_3RD_CMD, 5);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_MODE, 6);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DATA_MODE, 8);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DONE, 11);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DATA_SEL, 12);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_SEL, 14);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST24_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_OP_TYPE, 16);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_1ST_CMD, 19);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_2ND_CMD, 20);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_COMPL_3RD_CMD, 21);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_MODE, 22);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DATA_MODE, 24);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DONE, 27);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DATA_SEL, 28);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_SEL, 30);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST25_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_OP_TYPE, 32);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_1ST_CMD, 35);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_2ND_CMD, 36);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_COMPL_3RD_CMD, 37);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_MODE, 38);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DATA_MODE, 40);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DONE, 43);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DATA_SEL, 44);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_SEL, 46);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST26_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_OP_TYPE, 48);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_1ST_CMD, 51);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_2ND_CMD, 52);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_COMPL_3RD_CMD, 53);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_MODE, 54);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DATA_MODE, 56);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DONE, 59);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DATA_SEL, 60);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_SEL, 62);
CEN_FLD (CEN_MBA_MCBMR6Q_MCBIST_CFG_TEST27_ADDR_SEL_LEN, 2);

CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_OP_TYPE, 0);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_1ST_CMD, 3);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_2ND_CMD, 4);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_COMPL_3RD_CMD, 5);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_MODE, 6);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DATA_MODE, 8);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DONE, 11);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DATA_SEL, 12);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_SEL, 14);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST28_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_OP_TYPE, 16);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_1ST_CMD, 19);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_2ND_CMD, 20);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_COMPL_3RD_CMD, 21);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_MODE, 22);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DATA_MODE, 24);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DONE, 27);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DATA_SEL, 28);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_SEL, 30);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST29_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_OP_TYPE, 32);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_1ST_CMD, 35);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_2ND_CMD, 36);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_COMPL_3RD_CMD, 37);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_MODE, 38);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DATA_MODE, 40);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DONE, 43);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DATA_SEL, 44);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_SEL, 46);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST30_ADDR_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_OP_TYPE, 48);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_OP_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_1ST_CMD, 51);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_2ND_CMD, 52);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_COMPL_3RD_CMD, 53);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_MODE, 54);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DATA_MODE, 56);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DATA_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DONE, 59);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DATA_SEL, 60);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_DATA_SEL_LEN, 2);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_SEL, 62);
CEN_FLD (CEN_MBA_MCBMR7Q_MCBIST_CFG_TEST31_ADDR_SEL_LEN, 2);

CEN_FLD (CEN_MBA_MCBPARMQ_RESERVED_0_49, 0);
CEN_FLD (CEN_MBA_MCBPARMQ_RESERVED_0_49_LEN, 50);
CEN_FLD (CEN_MBA_MCBPARMQ_CFG_RANDCMD_WGT, 50);
CEN_FLD (CEN_MBA_MCBPARMQ_CFG_RANDCMD_WGT_LEN, 3);
CEN_FLD (CEN_MBA_MCBPARMQ_CFG_MIN_CMD_GAP, 53);
CEN_FLD (CEN_MBA_MCBPARMQ_CFG_MIN_CMD_GAP_LEN, 7);
CEN_FLD (CEN_MBA_MCBPARMQ_CFG_EN_RANDCMD_GAP, 60);
CEN_FLD (CEN_MBA_MCBPARMQ_CFG_RANDGAP_WGT, 61);
CEN_FLD (CEN_MBA_MCBPARMQ_CFG_RANDGAP_WGT_LEN, 2);
CEN_FLD (CEN_MBA_MCBPARMQ_CFG_BC4_EN, 63);

CEN_FLD (CEN_MBA_MCBRCRQ_RESERVED_0_31, 0);
CEN_FLD (CEN_MBA_MCBRCRQ_RESERVED_0_31_LEN, 32);
CEN_FLD (CEN_MBA_MCBRCRQ_CFG_RUNTIME_MCBALL, 32);
CEN_FLD (CEN_MBA_MCBRCRQ_CFG_RUNTIME_SUBTEST, 33);
CEN_FLD (CEN_MBA_MCBRCRQ_CFG_RUNTIME_SUBTEST_LEN, 5);
CEN_FLD (CEN_MBA_MCBRCRQ_CFG_RUNTIME_OVERHEAD, 38);
CEN_FLD (CEN_MBA_MCBRCRQ_RESERVED_39, 39);

CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDS0Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDS1Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDS2Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDS3Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDS4Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDS5Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDS6Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDS7Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDS8Q_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED0, 0);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED0_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED1, 8);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED1_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED2, 16);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED2_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED3, 24);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED3_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED4, 32);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED4_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED5, 40);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED5_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED6, 48);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED6_LEN, 8);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED7, 56);
CEN_FLD (CEN_MBA_MCBRDSSPQ_DGEN_RNDD_SEED7_LEN, 8);

CEN_FLD (CEN_MBA_MCBREARA0Q_CFG_RAND_END_ADDR_A0, 0);
CEN_FLD (CEN_MBA_MCBREARA0Q_CFG_RAND_END_ADDR_A0_LEN, 38);
CEN_FLD (CEN_MBA_MCBREARA0Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBREARA0Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCBREARA1Q_CFG_RAND_END_ADDR_A1, 0);
CEN_FLD (CEN_MBA_MCBREARA1Q_CFG_RAND_END_ADDR_A1_LEN, 38);
CEN_FLD (CEN_MBA_MCBREARA1Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBREARA1Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCBRSARA0Q_CFG_RAND_START_ADDR_A0, 0);
CEN_FLD (CEN_MBA_MCBRSARA0Q_CFG_RAND_START_ADDR_A0_LEN, 38);
CEN_FLD (CEN_MBA_MCBRSARA0Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBRSARA0Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCBRSARA1Q_CFG_RAND_START_ADDR_A1, 0);
CEN_FLD (CEN_MBA_MCBRSARA1Q_CFG_RAND_START_ADDR_A1_LEN, 38);
CEN_FLD (CEN_MBA_MCBRSARA1Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBRSARA1Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCBSEARA0Q_CFG_SEQ_END_ADDR_A0, 0);
CEN_FLD (CEN_MBA_MCBSEARA0Q_CFG_SEQ_END_ADDR_A0_LEN, 38);
CEN_FLD (CEN_MBA_MCBSEARA0Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBSEARA0Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCBSEARA1Q_CFG_SEQ_END_ADDR_A1, 0);
CEN_FLD (CEN_MBA_MCBSEARA1Q_CFG_SEQ_END_ADDR_A1_LEN, 38);
CEN_FLD (CEN_MBA_MCBSEARA1Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBSEARA1Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCBSSARA0Q_CFG_SEQ_START_ADDR_A0, 0);
CEN_FLD (CEN_MBA_MCBSSARA0Q_CFG_SEQ_START_ADDR_A0_LEN, 38);
CEN_FLD (CEN_MBA_MCBSSARA0Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBSSARA0Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCBSSARA1Q_CFG_SEQ_START_ADDR_A1, 0);
CEN_FLD (CEN_MBA_MCBSSARA1Q_CFG_SEQ_START_ADDR_A1_LEN, 38);
CEN_FLD (CEN_MBA_MCBSSARA1Q_RESERVED_38_63, 38);
CEN_FLD (CEN_MBA_MCBSSARA1Q_RESERVED_38_63_LEN, 26);

CEN_FLD (CEN_MBA_MCB_CNTLQ_START, 0);
CEN_FLD (CEN_MBA_MCB_CNTLQ_STOP, 1);

CEN_FLD (CEN_MBA_MCB_CNTLSTATQ_IP, 0);
CEN_FLD (CEN_MBA_MCB_CNTLSTATQ_DONE, 1);
CEN_FLD (CEN_MBA_MCB_CNTLSTATQ_FAIL, 2);

CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM, 0);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD1, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD1_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD2, 8);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD2_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD3, 12);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD3_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD4, 16);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD4_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD5, 20);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD5_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD6, 24);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD6_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD7, 28);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD7_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD8, 32);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD8_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD9, 36);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD9_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD10, 40);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD10_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD11, 44);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD11_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD12, 48);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD12_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD13, 52);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD13_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD14, 56);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD14_LEN, 4);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD15, 60);
CEN_FLD (CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q_LRDIMM_WORD15_LEN, 4);

CEN_FLD (CEN_MBA_RUNTIMECTRQ_CFG_RUNTIME_CTR, 0);
CEN_FLD (CEN_MBA_RUNTIMECTRQ_CFG_RUNTIME_CTR_LEN, 37);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_0_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_1_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_10_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_11_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_12_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_13_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_14_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_15_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_16_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_17_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_18_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_19_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_2_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_20_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_21_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_22_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_23_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_24_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_25_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_26_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_27_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_28_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_29_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_3_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_30_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_31_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_4_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_5_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_6_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_MA_B_CKE3, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_7_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_8_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_ADDRESS, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_ADDRESS_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_DDR_RESETN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_BANK, 17);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_BANK_LEN, 3);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_ACTIVATE, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_RASN, 21);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_CASN, 22);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_WEN, 23);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_CKE, 24);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_CKE_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_CSN, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_CSN_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_ODT, 48);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_ODT_LEN, 8);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_DDR_CALIBRATION_TYPE, 56);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_DDR_CALIBRATION_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_DDR_PARITY, 60);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_MA_B_CKE3_7, 61);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_LOOP_BREAK_MODE, 62);
CEN_FLD (CEN_MBA_CCS_INST_ARR0_9_LOOP_BREAK_MODE_LEN, 2);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_0_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_1_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_10_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_11_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_12_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_13_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_14_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_15_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_16_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_17_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_18_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_19_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_2_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_20_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_21_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_22_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_23_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_24_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_25_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_26_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_27_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_28_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_29_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_3_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_30_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_31_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_4_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_5_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_6_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_7_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_8_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_IDLES, 0);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_IDLES_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_REPEAT_CMD_CNT, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_REPEAT_CMD_CNT_LEN, 16);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_READ_OR_WRITE_DATA, 32);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_READ_OR_WRITE_DATA_LEN, 20);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_READ_COMPARE_REQUIRED, 52);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_DDR_CAL_RANK, 53);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_DDR_CAL_RANK_LEN, 4);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_DDR_CALIBRATION_ENABLE, 57);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_END, 58);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_GOTO_CMD, 59);
CEN_FLD (CEN_MBA_CCS_INST_ARR1_9_GOTO_CMD_LEN, 5);

CEN_FLD (CEN_MBA_MBACALFIRQ_RECOVERABLE_ERROR, 0);
CEN_FLD (CEN_MBA_MBACALFIRQ_NONRECOVERABLE_ERROR, 1);
CEN_FLD (CEN_MBA_MBACALFIRQ_REFRESH_OVERRUN, 2);
CEN_FLD (CEN_MBA_MBACALFIRQ_WAT__ERROR, 3);
CEN_FLD (CEN_MBA_MBACALFIRQ_RCD_PARITY_ERROR_0, 4);
CEN_FLD (CEN_MBA_MBACALFIRQ_DDR0_CAL_TIMEOUT_ERR, 5);
CEN_FLD (CEN_MBA_MBACALFIRQ_DDR1_CAL_TIMEOUT_ERR, 6);
CEN_FLD (CEN_MBA_MBACALFIRQ_RCD_PARITY_ERROR_1, 7);
CEN_FLD (CEN_MBA_MBACALFIRQ_MBX_TO_PAR_ERROR, 8);
CEN_FLD (CEN_MBA_MBACALFIRQ_WRD_UE, 9);
CEN_FLD (CEN_MBA_MBACALFIRQ_WRD_CE, 10);
CEN_FLD (CEN_MBA_MBACALFIRQ_MAINT_UE, 11);
CEN_FLD (CEN_MBA_MBACALFIRQ_MAINT_CE, 12);
CEN_FLD (CEN_MBA_MBACALFIRQ_DDR_CAL_RESET_TIMEOUT, 13);
CEN_FLD (CEN_MBA_MBACALFIRQ_WRQ_DATA_CE, 14);
CEN_FLD (CEN_MBA_MBACALFIRQ_WRQ_DATA_UE, 15);
CEN_FLD (CEN_MBA_MBACALFIRQ_WRQ_DATA_SUE, 16);
CEN_FLD (CEN_MBA_MBACALFIRQ_WRQ_RRQ_HANG_ERR, 17);
CEN_FLD (CEN_MBA_MBACALFIRQ_SM_1HOT_ERR, 18);
CEN_FLD (CEN_MBA_MBACALFIRQ_WRD_SCOM_ERROR, 19);
CEN_FLD (CEN_MBA_MBACALFIRQ_RHMR_PRIM_REACHED_MAX, 20);
CEN_FLD (CEN_MBA_MBACALFIRQ_RHMR_SEC_REACHED_MAX, 21);
CEN_FLD (CEN_MBA_MBACALFIRQ_RHMR_SEC_ALREADY_FULL, 22);
CEN_FLD (CEN_MBA_MBACALFIRQ_RESERVED_23, 23);
CEN_FLD (CEN_MBA_MBACALFIRQ_INTERNAL_SCOM_ERROR, 24);
CEN_FLD (CEN_MBA_MBACALFIRQ_INTERNAL_SCOM_ERROR_COPY, 25);

CEN_FLD (CEN_MBA_MBACALFIR_ACTION0_FIR, 0);
CEN_FLD (CEN_MBA_MBACALFIR_ACTION0_FIR_LEN, 26);

CEN_FLD (CEN_MBA_MBACALFIR_ACTION1_FIR, 0);
CEN_FLD (CEN_MBA_MBACALFIR_ACTION1_FIR_LEN, 26);

CEN_FLD (CEN_MBA_MBACALFIR_MASK_RECOVERABLE_ERROR, 0);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_NONRECOVERABLE_ERROR, 1);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_REFRESH_OVERRUN, 2);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_WAT__ERROR, 3);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_RCD_PARITY_ERROR_0, 4);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_DDR0_CAL_TIMEOUT_ERR, 5);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_DDR1_CAL_TIMEOUT_ERR, 6);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_RCD_PARITY_ERROR_1, 7);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_MBX_TO_PAR_ERROR, 8);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_WRD_UE, 9);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_WRD_CE, 10);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_MAINT_UE, 11);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_MAINT_CE, 12);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_DDR_CAL_RESET_TIMEOUT, 13);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_WRQ_DATA_CE, 14);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_WRQ_DATA_UE, 15);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_WRQ_DATA_SUE, 16);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_WRQ_RRQ_HANG_ERR, 17);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_SM_1HOT_ERR, 18);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_WRD_SCOM_ERROR, 19);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_RHMR_PRIM_REACHED_MAX, 20);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_RHMR_SEC_REACHED_MAX, 21);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_RHMR_SEC_ALREADY_FULL, 22);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_RESERVED_23, 23);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_INTERNAL_SCOM_ERROR, 24);
CEN_FLD (CEN_MBA_MBACALFIR_MASK_INTERNAL_SCOM_ERROR_COPY, 25);

CEN_FLD (CEN_MBA_MBASIRACT0_ACTION_0, 0);
CEN_FLD (CEN_MBA_MBASIRACT0_ACTION_0_LEN, 6);

CEN_FLD (CEN_MBA_MBASIRACT1_ACTION_1, 0);
CEN_FLD (CEN_MBA_MBASIRACT1_ACTION_1_LEN, 6);

CEN_FLD (CEN_MBA_MBASIRMASK_SIR_MASK, 0);
CEN_FLD (CEN_MBA_MBASIRMASK_SIR_MASK_LEN, 6);

CEN_FLD (CEN_MBA_MBASIRQ_INVALID_CAL0Q_ACCESS, 0);
CEN_FLD (CEN_MBA_MBASIRQ_INVALID_CAL1Q_ACCESS, 1);
CEN_FLD (CEN_MBA_MBASIRQ_INVALID_CAL2Q_ACCESS, 2);
CEN_FLD (CEN_MBA_MBASIRQ_INVALID_CAL3Q_ACCESS, 3);
CEN_FLD (CEN_MBA_MBASIRQ_INVALID_DDR_CONFIG_REG_ACCESS, 4);
CEN_FLD (CEN_MBA_MBASIRQ_INVALID_SIR_MASK_OR_ACTION_REGISTER_ACCESS, 5);

CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_INTERVAL_TMR0_ENABLE, 0);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_TIME_BASE_TMR0, 1);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_TIME_BASE_TMR0_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_INTERVAL_COUNTER_TMR0, 3);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_INTERVAL_COUNTER_TMR0_LEN, 9);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL1_ENABLE, 12);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL1_TYPE, 13);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL1_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL1_DDR_DONE, 17);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL2_ENABLE, 18);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL2_TYPE, 19);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL2_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL2_DDR_DONE, 23);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL3_ENABLE, 24);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL3_TYPE, 25);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL3_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_CAL3_DDR_DONE, 29);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_Z_SYNC, 30);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_Z_SYNC_LEN, 9);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_TMR, 39);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_TMR_LEN, 8);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_TMR_TB, 47);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_TMR_TB_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_DDR_RESET_ENABLE, 49);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_TMR0_SINGLE_RANK, 50);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_INJECT_CAL0_PAR_ERROR, 51);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_INJECT_1HOT_SM_ERROR, 52);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_SINGLE_PORT_MODE, 53);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_CFG_CAL_SINGLE_PORT_MODE_LEN, 3);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_RESERVED_56_63, 56);
CEN_FLD (CEN_MBA_MBA_CAL0Q_CAL0Q_RESERVED_56_63_LEN, 8);

CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_INTERVAL_TMR1_ENABLE, 0);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_TIME_BASE_TMR1, 1);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_TIME_BASE_TMR1_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_INTERVAL_COUNTER_TMR1, 3);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_INTERVAL_COUNTER_TMR1_LEN, 9);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL1_ENABLE, 12);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL1_TYPE, 13);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL1_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL1_DDR_DONE, 17);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL2_ENABLE, 18);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL2_TYPE, 19);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL2_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL2_DDR_DONE, 23);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL3_ENABLE, 24);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL3_TYPE, 25);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL3_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_CAL3_DDR_DONE, 29);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_Z_SYNC, 30);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_Z_SYNC_LEN, 9);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_CFG_CAL_TMR1_SINGLE_RANK, 39);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_RESERVED_40_63, 40);
CEN_FLD (CEN_MBA_MBA_CAL1Q_CAL1Q_RESERVED_40_63_LEN, 24);

CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_INTERVAL_TMR2_ENABLE, 0);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_TIME_BASE_TMR2, 1);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_TIME_BASE_TMR2_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_INTERVAL_COUNTER_TMR2, 3);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_INTERVAL_COUNTER_TMR2_LEN, 9);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL1_ENABLE, 12);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL1_TYPE, 13);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL1_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL1_DDR_DONE, 17);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL2_ENABLE, 18);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL2_TYPE, 19);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL2_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL2_DDR_DONE, 23);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL3_ENABLE, 24);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL3_TYPE, 25);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL3_TYPE_LEN, 4);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_CAL3_DDR_DONE, 29);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_Z_SYNC, 30);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_Z_SYNC_LEN, 9);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_SINGLE_RANK, 39);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_CFG_CAL_TMR2_WAT_EVENT_ENABLE, 40);
CEN_FLD (CEN_MBA_MBA_CAL2Q_RCD_ERROR_START_DLY, 41);
CEN_FLD (CEN_MBA_MBA_CAL2Q_RCD_ERROR_START_DLY_LEN, 16);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_RESERVED_57_63, 57);
CEN_FLD (CEN_MBA_MBA_CAL2Q_CAL2Q_RESERVED_57_63_LEN, 7);

CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_INTERNAL_ZQ_TB, 0);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_INTERNAL_ZQ_TB_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_INTERNAL_ZQ_LENGTH, 2);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_INTERNAL_ZQ_LENGTH_LEN, 8);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_EXTERNAL_ZQ_TB, 10);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_EXTERNAL_ZQ_TB_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_EXTERNAL_ZQ_LENGTH, 12);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_EXTERNAL_ZQ_LENGTH_LEN, 8);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_RDCLK_SYSCLK_TB, 20);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_RDCLK_SYSCLK_TB_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_RDCLK_SYSCLK_LENGTH, 22);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_RDCLK_SYSCLK_LENGTH_LEN, 8);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_DQS_ALIGNMENT_TB, 30);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_DQS_ALIGNMENT_TB_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_DQS_ALIGNMENT_LENGTH, 32);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_DQS_ALIGNMENT_LENGTH_LEN, 8);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_MPR_READEYE_TB, 40);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_MPR_READEYE_TB_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_MPR_READEYE_LENGTH, 42);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_MPR_READEYE_LENGTH_LEN, 8);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_ALL_PERIODIC_TB, 50);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_ALL_PERIODIC_TB_LEN, 2);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_ALL_PERIODIC_LENGTH, 52);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_CFG_ALL_PERIODIC_LENGTH_LEN, 8);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_RESERVED_60_63, 60);
CEN_FLD (CEN_MBA_MBA_CAL3Q_CAL3Q_RESERVED_60_63_LEN, 4);

CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_START_DLY, 0);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_START_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_END_DLY, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_END_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_START_DLY, 12);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_START_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_END_DLY, 18);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_END_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WRDONE_DLY, 24);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WRDONE_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WRDATA_DLY, 30);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WRDATA_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RDTAG_DLY, 36);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RDTAG_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RDTAG_MBX_CYCLE, 42);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_BC4_END_DLY, 43);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RODT_BC4_END_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_BC4_END_DLY, 49);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_WODT_BC4_END_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_SYNC_RDTAG_ENABLE, 55);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_GOLDEN_DELAY_MODE, 56);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_GOLDEN_DELAY_MODE_LEN, 2);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_CFG_RESET_MISR_ON_REFR_SYNC_EN, 58);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_RESERVED_59_63, 59);
CEN_FLD (CEN_MBA_MBA_DSM0Q_DSM0Q_RESERVED_59_63_LEN, 5);

CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_PAR, 0);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_PAR_RC, 1);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_PAR_RD1, 2);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_PAR_RC_RD1, 3);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRCMD_PAR, 4);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRCMD_PAR_RC, 5);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRD_IDX_PAR, 6);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RHMR_PRIM_PE, 7);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RHMR_SEC_PE, 8);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RHMR_LRU_ERROR, 9);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRQ_HANG, 10);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RRQ_HANG, 11);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_DSM_PE, 12);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_TMR_PE, 13);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RRQ_PE, 14);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRQ_PE, 15);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_FARB_PE, 16);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_PC_PE, 17);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL0_PE, 18);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL1_PE, 19);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL2_PE, 20);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL3_PE, 21);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_DDR_IF_SM_1HOT, 22);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL_SM_1HOT, 23);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RANK_SM_1HOT, 24);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_PC_CAL_REFFSM_1HOT, 25);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_PC_CAL_PCFSM_1HOT, 26);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_FARB_CAL_RECVFSM_1HOT, 27);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_28, 28);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_29, 29);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_30, 30);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_31, 31);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_32, 32);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_SIR_CERR, 33);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RDCMD_RDCHECK, 34);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_WRD_RDCHECK, 35);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL0_INVALID_ACCESS, 36);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL1_INVALID_ACCESS, 37);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL2_INVALID_ACCESS, 38);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_CAL3_INVALID_ACCESS, 39);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_DDR_INVALID_ACCESS, 40);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_41, 41);
CEN_FLD (CEN_MBA_MBA_ERR_REPORTQ_ERR_REPORTQ_RESERVED_CERR_42, 42);

CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MISR_BLOCK, 0);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MISR_BLOCK_LEN, 16);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MISR_FEEDBACK_ENABLE, 16);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_17_23, 17);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_17_23_LEN, 7);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MAX_READS_IN_A_ROW, 24);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MAX_READS_IN_A_ROW_LEN, 7);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MAX_WRITES_IN_A_ROW, 31);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_MAX_WRITES_IN_A_ROW_LEN, 7);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_PARITY_AFTER_CMD, 38);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_RAS0, 39);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_CAS0, 40);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_RAS1, 41);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_CAS1, 42);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_PARITY_DETECT_TIME, 43);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_PARITY_DETECT_TIME_LEN, 5);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_RCD_PROTECTION_TIME, 48);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_RCD_PROTECTION_TIME_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_DISABLE_RCD_RECOVERY, 54);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_OE_ALWAYS_ON, 55);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_FLIP_PORT1_ADDR, 56);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_DISABLE_REFRESH_DURING_NOISE_WDW, 57);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_58, 58);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_INJECT_PARITY_ERR_CONSTANT, 59);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_IGNORE_RCD_PARITY_ERR, 60);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_CFG_ENABLE_RCD_RW_RETRY, 61);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_62_63, 62);
CEN_FLD (CEN_MBA_MBA_FARB0Q_FARB0Q_RESERVED_62_63_LEN, 2);

CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S0_CS, 0);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S0_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S1_CS, 6);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S1_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S2_CS, 12);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S2_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S3_CS, 18);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S3_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S4_CS, 24);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S4_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S5_CS, 30);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S5_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S6_CS, 36);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S6_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S7_CS, 42);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_M0S7_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_CS_S0_MASK, 48);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_CS_S0_MASK_LEN, 4);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_S0_DIS_SMDR, 52);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_DDR4_PARITY_ON_CID_DIS, 53);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_S0_RSV0, 54);
CEN_FLD (CEN_MBA_MBA_FARB1Q_FARB1Q_CFG_S0_RSV0_LEN, 10);

CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S0_CS, 0);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S0_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S1_CS, 6);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S1_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S2_CS, 12);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S2_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S3_CS, 18);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S3_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S4_CS, 24);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S4_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S5_CS, 30);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S5_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S6_CS, 36);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S6_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S7_CS, 42);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_M1S7_CS_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_S0_RSV1, 48);
CEN_FLD (CEN_MBA_MBA_FARB2Q_FARB2Q_CFG_S0_RSV1_LEN, 16);

CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_N_PER, 0);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_N_PER_LEN, 15);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_N_PER_CHIP, 15);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_N_PER_CHIP_LEN, 16);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_M, 31);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_M_LEN, 14);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_RAS_WEIGHT, 45);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_RAS_WEIGHT_LEN, 3);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_CAS_WEIGHT, 48);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_CAS_WEIGHT_LEN, 3);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_PER_SLOT_ENABLED, 51);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_COUNT_OTHER_DIS, 52);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_CFG_NM_CHANGE_AFTER_SYNC, 53);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_RESERVED_54_63, 54);
CEN_FLD (CEN_MBA_MBA_FARB3Q_FARB3Q_RESERVED_54_63_LEN, 10);

CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_EN, 0);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_EN_LEN, 2);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_SECONDARY_EN, 2);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_HASH_SWIZZLE_EN, 3);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_RESERVED_4_9, 4);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_RESERVED_4_9_LEN, 6);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_DECREMENT_WEIGHT, 10);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_DECREMENT_WEIGHT_LEN, 2);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_PRIMARY_DECR_INTV, 12);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_PRIMARY_DECR_INTV_LEN, 7);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_SECONDARY_DECR_INTV, 19);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_SECONDARY_DECR_INTV_LEN, 7);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_CFG_RHMR_SIM_EN, 26);
CEN_FLD (CEN_MBA_MBA_FARB4Q_EMERGENCY_N, 27);
CEN_FLD (CEN_MBA_MBA_FARB4Q_EMERGENCY_N_LEN, 15);
CEN_FLD (CEN_MBA_MBA_FARB4Q_EMERGENCY_M, 42);
CEN_FLD (CEN_MBA_MBA_FARB4Q_EMERGENCY_M_LEN, 14);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_RESERVED_56_63, 56);
CEN_FLD (CEN_MBA_MBA_FARB4Q_FARB4Q_RESERVED_56_63_LEN, 8);

CEN_FLD (CEN_MBA_MBA_PMU0Q_PMU0Q_READ_COUNT, 0);
CEN_FLD (CEN_MBA_MBA_PMU0Q_PMU0Q_READ_COUNT_LEN, 32);
CEN_FLD (CEN_MBA_MBA_PMU0Q_PMU0Q_WRITE_COUNT, 32);
CEN_FLD (CEN_MBA_MBA_PMU0Q_PMU0Q_WRITE_COUNT_LEN, 32);

CEN_FLD (CEN_MBA_MBA_PMU1Q_PMU1Q_ACTIVATE_COUNT, 0);
CEN_FLD (CEN_MBA_MBA_PMU1Q_PMU1Q_ACTIVATE_COUNT_LEN, 32);
CEN_FLD (CEN_MBA_MBA_PMU1Q_PMU1Q_PU_COUNTS, 32);
CEN_FLD (CEN_MBA_MBA_PMU1Q_PMU1Q_PU_COUNTS_LEN, 32);

CEN_FLD (CEN_MBA_MBA_PMU2Q_PMU2Q_FRAME_COUNT, 0);
CEN_FLD (CEN_MBA_MBA_PMU2Q_PMU2Q_FRAME_COUNT_LEN, 32);

CEN_FLD (CEN_MBA_MBA_PMU3Q_PMU3Q_LOW_IDLE_THRESHOLD, 0);
CEN_FLD (CEN_MBA_MBA_PMU3Q_PMU3Q_LOW_IDLE_THRESHOLD_LEN, 16);
CEN_FLD (CEN_MBA_MBA_PMU3Q_PMU3Q_MED_IDLE_THRESHOLD, 16);
CEN_FLD (CEN_MBA_MBA_PMU3Q_PMU3Q_MED_IDLE_THRESHOLD_LEN, 16);
CEN_FLD (CEN_MBA_MBA_PMU3Q_PMU3Q_HIGH_IDLE_THRESHOLD, 32);
CEN_FLD (CEN_MBA_MBA_PMU3Q_PMU3Q_HIGH_IDLE_THRESHOLD_LEN, 32);

CEN_FLD (CEN_MBA_MBA_PMU4Q_PMU4Q_BASE_IDLE_COUNT, 0);
CEN_FLD (CEN_MBA_MBA_PMU4Q_PMU4Q_BASE_IDLE_COUNT_LEN, 32);
CEN_FLD (CEN_MBA_MBA_PMU4Q_PMU4Q_LOW_IDLE_COUNT, 32);
CEN_FLD (CEN_MBA_MBA_PMU4Q_PMU4Q_LOW_IDLE_COUNT_LEN, 32);

CEN_FLD (CEN_MBA_MBA_PMU5Q_PMU5Q_MED_IDLE_COUNT, 0);
CEN_FLD (CEN_MBA_MBA_PMU5Q_PMU5Q_MED_IDLE_COUNT_LEN, 32);
CEN_FLD (CEN_MBA_MBA_PMU5Q_PMU5Q_HIGH_IDLE_COUNT, 32);
CEN_FLD (CEN_MBA_MBA_PMU5Q_PMU5Q_HIGH_IDLE_COUNT_LEN, 32);

CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_TOTAL_GAP_COUNTS, 0);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_TOTAL_GAP_COUNTS_LEN, 18);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_SPECIFIC_GAP_COUNT, 18);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_SPECIFIC_GAP_COUNT_LEN, 18);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_GAP_LENGTH_ADDER, 36);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_GAP_LENGTH_ADDER_LEN, 3);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_SPECIFIC_GAP_CONDITION, 39);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_SPECIFIC_GAP_CONDITION_LEN, 4);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_CMD_TO_COUNT, 43);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_CMD_TO_COUNT_LEN, 18);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_COMMAND_PATTERN_TO_COUNT, 61);
CEN_FLD (CEN_MBA_MBA_PMU6Q_PMU6Q_COMMAND_PATTERN_TO_COUNT_LEN, 3);

CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_SKIP_LIMIT, 0);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_SKIP_LIMIT_LEN, 6);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_REORDER_DEPTH, 6);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_REORDER_DEPTH_LEN, 5);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_DISABLE_RD_PG_MODE, 11);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_DISABLE_FAST_PATH, 12);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR0, 13);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR0_LEN, 11);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR1, 24);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR1_LEN, 11);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR2, 35);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR2_LEN, 11);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR3, 46);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RD_IDLE_ALLOW_WR3_LEN, 11);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_CFG_RRQ_OPP_PAGE_MODE_EN, 57);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_RESERVED_58_63, 58);
CEN_FLD (CEN_MBA_MBA_RRQ0Q_RRQ0Q_RESERVED_58_63_LEN, 6);

CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RRSMSR_DLY, 0);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RRSMSR_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RRSMDR_DLY, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RRSMDR_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RRDM_DLY, 8);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RRDM_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RWSMSR_DLY, 12);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RWSMSR_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RWSMDR_DLY, 16);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RWSMDR_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RWDM_DLY, 20);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RWDM_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WRSMSR_DLY, 24);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WRSMSR_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WRSMDR_DLY, 30);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WRSMDR_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WRDM_DLY, 36);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WRDM_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WWSMSR_DLY, 40);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WWSMSR_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WWSMDR_DLY, 44);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WWSMDR_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WWDM_DLY, 48);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WWDM_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RROP_DLY, 52);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_RROP_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WWOP_DLY, 56);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_WWOP_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_TRRD, 60);
CEN_FLD (CEN_MBA_MBA_TMR0Q_TMR0Q_TRRD_LEN, 4);

CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TRAP, 0);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TRAP_LEN, 7);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TWAP, 7);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TWAP_LEN, 7);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TFAW, 14);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_TFAW_LEN, 6);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_RRSBG_DLY, 20);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_RRSBG_DLY_LEN, 4);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_WRSBG_DLY, 24);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_WRSBG_DLY_LEN, 5);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_DDR4_CL_INTL_DIS, 29);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_ACTREF, 30);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_CFG_ACTREF_LEN, 5);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_RESERVED_35_47, 35);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_RESERVED_35_47_LEN, 13);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_RWSMSR_MSB, 48);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_RWSMDR_MSB, 49);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_RWDM_MSB, 50);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_RESERVED_51_63, 51);
CEN_FLD (CEN_MBA_MBA_TMR1Q_TMR1Q_RESERVED_51_63_LEN, 13);

CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRITE_HW_MARK, 0);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRITE_HW_MARK_LEN, 5);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_FIFO_MODE, 5);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_DISABLE_WR_PG_MODE, 6);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_ENTRY0_HP_DLY, 7);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_ENTRY0_HP_DLY_LEN, 12);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_FLUSH_WR_RANK, 19);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_ENABLE_NON_HP_WR, 20);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR, 21);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_ENTRY0_MIN_FOR_RRQ_IDLE_WR_LEN, 12);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_RRQ_IDLE_LOW_WATERMARK, 33);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_RRQ_IDLE_LOW_WATERMARK_LEN, 5);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_SKIP_LIMIT, 38);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_SKIP_LIMIT_LEN, 6);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_CLN_HP_ENABLE, 44);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_HANG_THRESHOLD, 45);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_WRQ_HANG_THRESHOLD_LEN, 8);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_RRQ_HANG_THRESHOLD, 53);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_CFG_RRQ_HANG_THRESHOLD_LEN, 8);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_RESERVED_61_63, 61);
CEN_FLD (CEN_MBA_MBA_WRQ0Q_WRQ0Q_RESERVED_61_63_LEN, 3);

CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFRESH_ENABLE, 0);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFRESH_INTERVAL_TIMEBASE_SELECT, 1);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFRESH_INTERVAL_TIMEBASE_SELECT_LEN, 2);
CEN_FLD (CEN_MBA_MBAREF0Q_RESERVED_3, 3);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFRESH_PRIORITY_THRESHOLD, 4);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFRESH_PRIORITY_THRESHOLD_LEN, 4);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFRESH_INTERVAL, 8);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFRESH_INTERVAL_LEN, 11);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFRESH_RESET_INTERVAL, 19);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFRESH_RESET_INTERVAL_LEN, 11);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_TRFC, 30);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_TRFC_LEN, 10);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFR_TSV_STACK, 40);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFR_TSV_STACK_LEN, 10);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFR_CHECK_INTERVAL, 50);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_REFR_CHECK_INTERVAL_LEN, 11);
CEN_FLD (CEN_MBA_MBAREF0Q_CFG_TRFC_STACK_GATE_ALL_REF, 61);
CEN_FLD (CEN_MBA_MBAREF0Q_RESERVED_62_63, 62);
CEN_FLD (CEN_MBA_MBAREF0Q_RESERVED_62_63_LEN, 2);

CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK0_PRIM_CKE, 0);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK0_PRIM_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK1_PRIM_CKE, 4);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK1_PRIM_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK2_PRIM_CKE, 8);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK2_PRIM_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK3_PRIM_CKE, 12);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK3_PRIM_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK4_PRIM_CKE, 16);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK4_PRIM_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK5_PRIM_CKE, 20);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK5_PRIM_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK6_PRIM_CKE, 24);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK6_PRIM_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK7_PRIM_CKE, 28);
CEN_FLD (CEN_MBA_MBAREF1Q_CFG_MRNK7_PRIM_CKE_LEN, 4);

CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_LP_DYN_WAIT_ENABLE, 0);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_HP_RANK_BIAS_ENABLE, 1);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_HP_RANK_BLOCK_ENABLE, 2);
CEN_FLD (CEN_MBA_MBAREFAQ_RESERVED_3, 3);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_PUP_THRESHOLD, 4);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_PUP_THRESHOLD_LEN, 4);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ1_COEF, 8);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ1_COEF_LEN, 3);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ2_COEF, 11);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ2_COEF_LEN, 3);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ3_COEF, 14);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ3_COEF_LEN, 3);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ4_COEF, 17);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ4_COEF_LEN, 3);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ5_COEF, 20);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ5_COEF_LEN, 3);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ6_COEF, 23);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REFRESH_BLQ_EQ6_COEF_LEN, 3);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_RRQ_REF_HINT_DLY, 26);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_RRQ_REF_HINT_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_ASSERT_REFRESH_BLOCK_DLY, 32);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_ASSERT_REFRESH_BLOCK_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_FORCE_HP_REF_REQ_DLY, 38);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_FORCE_HP_REF_REQ_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REF_BLOCK_STOP_DLY, 44);
CEN_FLD (CEN_MBA_MBAREFAQ_CFG_REF_BLOCK_STOP_DLY_LEN, 6);
CEN_FLD (CEN_MBA_MBAREFAQ_MODE_HP_SUB_CNT, 50);
CEN_FLD (CEN_MBA_MBAREFAQ_MODE_HP_SUB_CNT_LEN, 2);
CEN_FLD (CEN_MBA_MBAREFAQ_MODE_LP_SUB_CNT, 52);
CEN_FLD (CEN_MBA_MBAREFAQ_MODE_LP_SUB_CNT_LEN, 2);
CEN_FLD (CEN_MBA_MBAREFAQ_RESERVED_54_63, 54);
CEN_FLD (CEN_MBA_MBAREFAQ_RESERVED_54_63_LEN, 10);

CEN_FLD (CEN_MBA_MBARPC0Q_CFG_LP2_ENTRY_REQ, 0);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_LP2_STATE, 1);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_ENABLE, 2);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_MIN_MAX_DOMAINS, 3);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_LEN, 3);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_PUP_AVAIL, 6);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_PUP_AVAIL_LEN, 5);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_PDN_PUP, 11);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_PDN_PUP_LEN, 5);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_PUP_PDN, 16);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_PUP_PDN_LEN, 5);
CEN_FLD (CEN_MBA_MBARPC0Q_RESERVED_21, 21);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_ENABLE, 22);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_TIME, 23);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_TIME_LEN, 10);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_ENABLE, 33);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME, 34);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_PUP_AFTER_ACTIVATE_WAIT_TIME_LEN, 8);
CEN_FLD (CEN_MBA_MBARPC0Q_CFG_FORCE_SPARE_PUP, 42);
CEN_FLD (CEN_MBA_MBARPC0Q_MODE_MIN_DOMAIN_REDUCTION_CNT_REFR_INT, 43);
CEN_FLD (CEN_MBA_MBARPC0Q_MODE_EMER_MIN_MAX_DOMAIN, 44);
CEN_FLD (CEN_MBA_MBARPC0Q_MODE_EMER_MIN_MAX_DOMAIN_LEN, 3);
CEN_FLD (CEN_MBA_MBARPC0Q_RESERVED_47_63, 47);
CEN_FLD (CEN_MBA_MBARPC0Q_RESERVED_47_63_LEN, 17);

CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK0_RD_CKE, 0);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK0_RD_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK1_RD_CKE, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK1_RD_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK2_RD_CKE, 8);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK2_RD_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK3_RD_CKE, 12);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK3_RD_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK4_RD_CKE, 16);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK4_RD_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK5_RD_CKE, 20);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK5_RD_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK6_RD_CKE, 24);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK6_RD_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK7_RD_CKE, 28);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK7_RD_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK0_WR_CKE, 32);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK0_WR_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK1_WR_CKE, 36);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK1_WR_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK2_WR_CKE, 40);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK2_WR_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK3_WR_CKE, 44);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK3_WR_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK4_WR_CKE, 48);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK4_WR_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK5_WR_CKE, 52);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK5_WR_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK6_WR_CKE, 56);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK6_WR_CKE_LEN, 4);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK7_WR_CKE, 60);
CEN_FLD (CEN_MBA_MBARPC1Q_CFG_MRNK7_WR_CKE_LEN, 4);

CEN_FLD (CEN_TCN_SYNC_CONFIG_ISLE_XSTOP_MASK_B, 0);
CEN_FLD (CEN_TCN_SYNC_CONFIG_PCB_XSTOP_MASK_B, 1);
CEN_FLD (CEN_TCN_SYNC_CONFIG_CLKSTP_EN, 2);
CEN_FLD (CEN_TCN_SYNC_CONFIG_EDRAM_XSTOP_MASK_B, 3);
CEN_FLD (CEN_TCN_SYNC_CONFIG_PLL_XSTOP_MASK_B, 4);
CEN_FLD (CEN_TCN_SYNC_CONFIG_LOCAL_XSTOP_MASK_B, 5);
CEN_FLD (CEN_TCN_SYNC_CONFIG_DISABLE_PCB_ITR, 6);
CEN_FLD (CEN_TCN_SYNC_CONFIG_USE_FOR_SCAN, 7);
CEN_FLD (CEN_TCN_SYNC_CONFIG_KEEP_EDRAM_ON_XSTOP, 8);
CEN_FLD (CEN_TCN_SYNC_CONFIG_TRIGGER_OPCG_ON_XSTOP, 9);
CEN_FLD (CEN_TCN_SYNC_CONFIG_SEL_EXT_OPCG_TRIGGER, 10);
CEN_FLD (CEN_TCN_SYNC_CONFIG_LISTEN_TO_PULSE, 11);
CEN_FLD (CEN_TCN_SYNC_CONFIG_CLK_START_ENABLE, 12);
CEN_FLD (CEN_TCN_SYNC_CONFIG_CLK_STOP_ENABLE, 13);
CEN_FLD (CEN_TCN_SYNC_CONFIG_CHIP_PROTECTION_ENABLE, 14);
CEN_FLD (CEN_TCN_SYNC_CONFIG_SPARE15, 15);
CEN_FLD (CEN_TCN_SYNC_CONFIG_SPARE16, 16);
CEN_FLD (CEN_TCN_SYNC_CONFIG_SPARE17, 17);
CEN_FLD (CEN_TCN_SYNC_CONFIG_SPARE18, 18);
CEN_FLD (CEN_TCN_SYNC_CONFIG_SPARE19, 19);
CEN_FLD (CEN_TCN_SYNC_CONFIG_SPARE20, 20);

CEN_FLD (CEN_TCN_PHASE_SHADOW_COUNT_Q, 0);
CEN_FLD (CEN_TCN_PHASE_SHADOW_COUNT_Q_LEN, 6);

CEN_FLD (CEN_TCN_OPCG_REG0_RUNN_MODE, 0);
CEN_FLD (CEN_TCN_OPCG_REG0_GO, 1);
CEN_FLD (CEN_TCN_OPCG_REG0_RUN_SCAN0, 2);
CEN_FLD (CEN_TCN_OPCG_REG0_SCAN0_MODE, 3);
CEN_FLD (CEN_TCN_OPCG_REG0_SCAN_RATIO, 4);
CEN_FLD (CEN_TCN_OPCG_REG0_SCAN_RATIO_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG0_INOP_FORCE_SG, 9);
CEN_FLD (CEN_TCN_OPCG_REG0_INOP_ALIGN, 10);
CEN_FLD (CEN_TCN_OPCG_REG0_INOP_ALIGN_LEN, 4);
CEN_FLD (CEN_TCN_OPCG_REG0_INOP_WAIT, 14);
CEN_FLD (CEN_TCN_OPCG_REG0_INOP_WAIT_LEN, 7);
CEN_FLD (CEN_TCN_OPCG_REG0_SNOP_ALIGN, 21);
CEN_FLD (CEN_TCN_OPCG_REG0_SNOP_ALIGN_LEN, 4);
CEN_FLD (CEN_TCN_OPCG_REG0_SNOP_WAIT, 25);
CEN_FLD (CEN_TCN_OPCG_REG0_SNOP_WAIT_LEN, 3);
CEN_FLD (CEN_TCN_OPCG_REG0_ENOP_ALIGN, 28);
CEN_FLD (CEN_TCN_OPCG_REG0_ENOP_ALIGN_LEN, 4);
CEN_FLD (CEN_TCN_OPCG_REG0_ENOP_WAIT, 32);
CEN_FLD (CEN_TCN_OPCG_REG0_ENOP_WAIT_LEN, 3);
CEN_FLD (CEN_TCN_OPCG_REG0_ENOP_FORCE_SG, 35);
CEN_FLD (CEN_TCN_OPCG_REG0_LOOP_COUNT, 36);
CEN_FLD (CEN_TCN_OPCG_REG0_LOOP_COUNT_LEN, 28);

CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_COUNT, 0);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_COUNT_LEN, 4);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ01_01F, 4);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ01_01F_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ02_02F, 9);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ02_02F_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ03_03F, 14);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ03_03F_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ04_04F, 19);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ04_04F_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ05_05F, 24);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ05_05F_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ06_06F, 29);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ06_06F_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ07_07F, 34);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ07_07F_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ08_08F, 39);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ08_08F_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ09_01FBY2, 44);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ09_01FBY2_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ10_02FBY2, 49);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ10_02FBY2_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ11_03FBY2, 54);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ11_03FBY2_LEN, 5);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ12_04FBY2, 59);
CEN_FLD (CEN_TCN_OPCG_REG1_FUNC_CAPT_SEQ12_04FBY2_LEN, 5);

CEN_FLD (CEN_TCN_OPCG_REG2_SCAN_COUNT, 0);
CEN_FLD (CEN_TCN_OPCG_REG2_SCAN_COUNT_LEN, 12);
CEN_FLD (CEN_TCN_OPCG_REG2_MISR_A_VAL, 12);
CEN_FLD (CEN_TCN_OPCG_REG2_MISR_A_VAL_LEN, 12);
CEN_FLD (CEN_TCN_OPCG_REG2_MISR_B_VAL, 24);
CEN_FLD (CEN_TCN_OPCG_REG2_MISR_B_VAL_LEN, 12);
CEN_FLD (CEN_TCN_OPCG_REG2_MISR_INIT_WAIT, 36);
CEN_FLD (CEN_TCN_OPCG_REG2_MISR_INIT_WAIT_LEN, 12);
CEN_FLD (CEN_TCN_OPCG_REG2_SUPPRESS_EVEN_CLK, 48);
CEN_FLD (CEN_TCN_OPCG_REG2_PAD_VALUE, 49);
CEN_FLD (CEN_TCN_OPCG_REG2_PAD_VALUE_LEN, 3);
CEN_FLD (CEN_TCN_OPCG_REG2_USE_F_AND_FDIV2, 52);
CEN_FLD (CEN_TCN_OPCG_REG2_USE_ARY_CLK_DURING_FILL, 53);
CEN_FLD (CEN_TCN_OPCG_REG2_SG_HIGH_DURING_FILL, 54);
CEN_FLD (CEN_TCN_OPCG_REG2_RTIM_THOLD_FORCE, 55);
CEN_FLD (CEN_TCN_OPCG_REG2_LBIST_SKITTER_CTL, 56);
CEN_FLD (CEN_TCN_OPCG_REG2_MISR_MODE, 57);
CEN_FLD (CEN_TCN_OPCG_REG2_INFINITE_MODE, 58);
CEN_FLD (CEN_TCN_OPCG_REG2_NSL_FILL_COUNT, 59);
CEN_FLD (CEN_TCN_OPCG_REG2_NSL_FILL_COUNT_LEN, 5);

CEN_FLD (CEN_TCN_OPCG_REG3_GO2, 0);
CEN_FLD (CEN_TCN_OPCG_REG3_RUN_ON_UPDATE_DR, 1);
CEN_FLD (CEN_TCN_OPCG_REG3_RUN_ON_CAPTURE_DR, 2);
CEN_FLD (CEN_TCN_OPCG_REG3_ALIGN_SOURCE_SELECT, 3);
CEN_FLD (CEN_TCN_OPCG_REG3_ALIGN_SOURCE_SELECT_LEN, 2);
CEN_FLD (CEN_TCN_OPCG_REG3_PRPG_WEIGHTING, 5);
CEN_FLD (CEN_TCN_OPCG_REG3_PRPG_WEIGHTING_LEN, 3);
CEN_FLD (CEN_TCN_OPCG_REG3_PRPG_VALUE, 8);
CEN_FLD (CEN_TCN_OPCG_REG3_PRPG_VALUE_LEN, 12);
CEN_FLD (CEN_TCN_OPCG_REG3_EXTEND_INOPW_ENOPW, 20);
CEN_FLD (CEN_TCN_OPCG_REG3_EXTEND_SNOPW, 21);
CEN_FLD (CEN_TCN_OPCG_REG3_FORCE_SG_HIGH_DURING_SNOP, 22);
CEN_FLD (CEN_TCN_OPCG_REG3_CHKSW, 23);
CEN_FLD (CEN_TCN_OPCG_REG3_CHKSW_LEN, 9);
CEN_FLD (CEN_TCN_OPCG_REG3_PRPG_A_VAL, 32);
CEN_FLD (CEN_TCN_OPCG_REG3_PRPG_A_VAL_LEN, 12);
CEN_FLD (CEN_TCN_OPCG_REG3_PRPG_B_VAL, 44);
CEN_FLD (CEN_TCN_OPCG_REG3_PRPG_B_VAL_LEN, 12);
CEN_FLD (CEN_TCN_OPCG_REG3_PRPG_MODE, 56);
CEN_FLD (CEN_TCN_OPCG_REG3_SCAN_CLK_USE_EVEN, 57);
CEN_FLD (CEN_TCN_OPCG_REG3_SPARE3, 58);
CEN_FLD (CEN_TCN_OPCG_REG3_SPARE3_LEN, 6);

CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_CMD, 0);
CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_CMD_LEN, 2);
CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_PERV, 4);
CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_FASTUNIT0, 5);
CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_FASTUNIT1, 6);
CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_UNIT2, 7);
CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_UNIT3, 8);
CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_UNIT4, 9);
CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_UNIT5, 10);
CEN_FLD (CEN_TCN_CLK_REGION_CLOCK_PLL, 11);
CEN_FLD (CEN_TCN_CLK_REGION_SEL_THOLD_SL, 20);
CEN_FLD (CEN_TCN_CLK_REGION_SEL_THOLD_NSL, 21);
CEN_FLD (CEN_TCN_CLK_REGION_SEL_THOLD_ARY, 22);

CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CLK_VITL, 3);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CLK_PERV, 4);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CLK_FASTUNIT0, 5);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CLK_FASTUNIT1, 6);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CLK_UNIT2, 7);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CLK_UNIT3, 8);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CLK_UNIT4, 9);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CLK_UNIT5, 10);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CLK_PLL, 11);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_FUNC, 20);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CFG, 21);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CCFG_GPTR, 22);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_REGF, 23);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_LBIST, 24);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_ABIST, 25);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_REPR, 26);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_TIME, 27);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_BNDY_FARY, 28);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_FARR, 29);
CEN_FLD (CEN_TCN_SCANSELQ_SCANSEL_CMSK, 30);

CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_PERV_FUNC_SL, 0);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_PERV_FUNC_NSL, 1);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_PERV_ARY_NSL, 2);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_ODD_FUNC_SL, 3);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_EVEN_FUNC_SL, 4);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_ODD_FUNC_NSL, 5);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_EVEN_FUNC_NSL, 6);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_ODD_ARY_NSL, 7);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT0_EVEN_ARY_NSL, 8);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_ODD_FUNC_SL, 9);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_EVEN_FUNC_SL, 10);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_ODD_FUNC_NSL, 11);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_EVEN_FUNC_NSL, 12);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_ODD_ARY_NSL, 13);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_FASTUNIT1_EVEN_ARY_NSL, 14);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT2_FUNC_SL, 15);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT2_FUNC_NSL, 16);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT2_ARY_NSL, 17);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT3_FUNC_SL, 18);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT3_FUNC_NSL, 19);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT3_ARY_NSL, 20);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT4_FUNC_SL, 21);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT4_FUNC_NSL, 22);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT4_ARY_NSL, 23);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT5_FUNC_SL, 24);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT5_FUNC_NSL, 25);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_UNIT5_ARY_NSL, 26);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_PLL_FUNC_SL, 27);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_PLL_FUNC_NSL, 28);
CEN_FLD (CEN_TCN_CLOCK_STAT_STATUS_PLL_ARY_NSL, 29);

CEN_FLD (CEN_TCN_ERROR_STATUS_PCB_WRITE_NOT_ALLOWED, 0);
CEN_FLD (CEN_TCN_ERROR_STATUS_PCB_READ_NOT_ALLOWED, 1);
CEN_FLD (CEN_TCN_ERROR_STATUS_PCB_PARITY_ERR_ON_CMD, 2);
CEN_FLD (CEN_TCN_ERROR_STATUS_PCB_ADDRESS_NOT_VALID, 3);
CEN_FLD (CEN_TCN_ERROR_STATUS_PCB_PARITY_ADDR_ERR, 4);
CEN_FLD (CEN_TCN_ERROR_STATUS_PCB_PARITY_DATA_ERR, 5);
CEN_FLD (CEN_TCN_ERROR_STATUS_PCB_PROTECTED_ACCESS_INVALID, 6);
CEN_FLD (CEN_TCN_ERROR_STATUS_PCB_PARITY_SPCIF_ERR, 7);
CEN_FLD (CEN_TCN_ERROR_STATUS_PCB_WRITE_AND_OPCG, 8);
CEN_FLD (CEN_TCN_ERROR_STATUS_CLOCK_CMD_CONFLICT, 9);
CEN_FLD (CEN_TCN_ERROR_STATUS_SCAN_COLLISION, 10);
CEN_FLD (CEN_TCN_ERROR_STATUS_OPCG_TRIGGER, 11);
CEN_FLD (CEN_TCN_ERROR_STATUS_OPCG_PARITY, 12);
CEN_FLD (CEN_TCN_ERROR_STATUS_PHASE_CNT_CORRUPTED, 13);
CEN_FLD (CEN_TCN_ERROR_STATUS_CC_PAR_ERR, 14);
CEN_FLD (CEN_TCN_ERROR_STATUS_CC_PAR_ERR_LEN, 2);
CEN_FLD (CEN_TCN_ERROR_STATUS_GPIO_PAR_ERR, 16);
CEN_FLD (CEN_TCN_ERROR_STATUS_SECURITY_VIOLATION, 17);

CEN_FLD (CEN_TCN_CC_PROTECT_MODE_REG_READ_ENABLE, 0);
CEN_FLD (CEN_TCN_CC_PROTECT_MODE_REG_WRITE_ENABLE, 1);

CEN_FLD (CEN_TCN_CC_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_TCN_CC_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_TCN_CC_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_TCN_GP0_TC_UNIT_ABSTCLK_MUXSEL_DC, 0);
CEN_FLD (CEN_TCN_GP0_TC_UNIT_SYNCCLK_MUXSEL_DC, 1);
CEN_FLD (CEN_TCN_GP0_TC_GPIO_FLUSHMODE_INH_DC_OUT, 2);
CEN_FLD (CEN_TCN_GP0_TC_GPIO_FORCEALIGN, 3);
CEN_FLD (CEN_TCN_GP0_TC_GPIO_AVP_MODE_DC_OUT, 4);
CEN_FLD (CEN_TCN_GP0_NOT_USED9, 5);
CEN_FLD (CEN_TCN_GP0_TC_GPIO_CC_SCAN_DIS_DC_B_OUT, 6);
CEN_FLD (CEN_TCN_GP0_TC_SKIT_MODE_BIST_DC, 7);
CEN_FLD (CEN_TCN_GP0_TC_GPIO_LBIST_EN_DC_OUT, 8);
CEN_FLD (CEN_TCN_GP0_TC_UNIT_LBIST_AC_MODE_DC, 9);
CEN_FLD (CEN_TCN_GP0_TC_UNIT_LBIST_ARY_WRT_THRU_DC, 10);
CEN_FLD (CEN_TCN_GP0_TC_ABIST_MODE_DC, 11);
CEN_FLD (CEN_TCN_GP0_TC_GPIO_ABIST_START_TEST_DC_OUT, 12);
CEN_FLD (CEN_TCN_GP0_NOT_USED0, 13);
CEN_FLD (CEN_TCN_GP0_TC_UNIT_ATPG_EN_DC, 14);
CEN_FLD (CEN_TCN_GP0_TC_GPIO_SCAN_PROTECT_DC_OUT, 15);
CEN_FLD (CEN_TCN_GP0_NOT_USED1, 16);
CEN_FLD (CEN_TCN_GP0_NOT_USED2, 17);
CEN_FLD (CEN_TCN_GP0_NOT_USED3, 18);
CEN_FLD (CEN_TCN_GP0_TC_FENCE_EDRAM, 19);
CEN_FLD (CEN_TCN_GP0_TP_GPIO_TRACE_START, 20);
CEN_FLD (CEN_TCN_GP0_TP_GPIO_TRACE_STOP, 21);
CEN_FLD (CEN_TCN_GP0_TP_GPIO_TRACE_RESET, 22);
CEN_FLD (CEN_TCN_GP0_NOT_USED5, 23);
CEN_FLD (CEN_TCN_GP0_TC_GPIO_CLKDIV_SEL_DC, 24);
CEN_FLD (CEN_TCN_GP0_TC_GPIO_CLKDIV_SEL_DC_LEN, 2);
CEN_FLD (CEN_TCN_GP0_NOT_USED6, 26);
CEN_FLD (CEN_TCN_GP0_NOT_USED7, 27);
CEN_FLD (CEN_TCN_GP0_NOT_USED8, 28);
CEN_FLD (CEN_TCN_GP0_NOT_USED8_LEN, 4);
CEN_FLD (CEN_TCN_GP0_TC_PSRO_SEL_DC, 32);
CEN_FLD (CEN_TCN_GP0_TC_PSRO_SEL_DC_LEN, 8);
CEN_FLD (CEN_TCN_GP0_NOT_USED10, 40);
CEN_FLD (CEN_TCN_GP0_NOT_USED10_LEN, 3);
CEN_FLD (CEN_TCN_GP0_NOT_USED11, 43);
CEN_FLD (CEN_TCN_GP0_NOT_USED11_LEN, 3);
CEN_FLD (CEN_TCN_GP0_TC_PLLNSTIO_PADTEST_T_K, 46);
CEN_FLD (CEN_TCN_GP0_TC_PLLNSTIO_PADTEST_C_K, 47);
CEN_FLD (CEN_TCN_GP0_TC_UNIT_FENCE_RAM_DOUT_DC, 48);
CEN_FLD (CEN_TCN_GP0_TC_SENS0_TUNEBITS_DC, 49);
CEN_FLD (CEN_TCN_GP0_TC_SENS0_TUNEBITS_DC_LEN, 4);
CEN_FLD (CEN_TCN_GP0_TC_SENS1_TUNEBITS_DC, 53);
CEN_FLD (CEN_TCN_GP0_TC_SENS1_TUNEBITS_DC_LEN, 4);
CEN_FLD (CEN_TCN_GP0_TC_MBI_FENCE_EN_DC, 57);
CEN_FLD (CEN_TCN_GP0_NOT_USED22, 58);
CEN_FLD (CEN_TCN_GP0_NOT_USED21, 59);
CEN_FLD (CEN_TCN_GP0_TC_MASK_CC_PCB_ERR_DC, 60);
CEN_FLD (CEN_TCN_GP0_TC_MASK_CC_SCAN_OPCG_ERR_DC, 61);
CEN_FLD (CEN_TCN_GP0_TC_CC_LCC_EDGE_DELAYED_DC, 62);
CEN_FLD (CEN_TCN_GP0_TC_FENCE_PERV_DC, 63);

CEN_FLD (CEN_TCN_GP1_REFR_ABIST_DONE, 0);
CEN_FLD (CEN_TCN_GP1_MBS_ABIST_DONE, 1);
CEN_FLD (CEN_TCN_GP1_MBI_ABIST_DONE, 2);
CEN_FLD (CEN_TCN_GP1_TRA_ABIST_DONE, 3);
CEN_FLD (CEN_TCN_GP1_REFR_ABIST_DIAG, 4);
CEN_FLD (CEN_TCN_GP1_MBS_ABIST_DIAG, 5);
CEN_FLD (CEN_TCN_GP1_NOT_USED27, 6);
CEN_FLD (CEN_TCN_GP1_NOT_USED28, 7);
CEN_FLD (CEN_TCN_GP1_NOT_USED29, 8);
CEN_FLD (CEN_TCN_GP1_NOT_USED30, 9);
CEN_FLD (CEN_TCN_GP1_NOT_USED31, 10);
CEN_FLD (CEN_TCN_GP1_NOT_USED32, 11);
CEN_FLD (CEN_TCN_GP1_NOT_USED33, 12);
CEN_FLD (CEN_TCN_GP1_NOT_USED34, 13);
CEN_FLD (CEN_TCN_GP1_NOT_USED35, 14);
CEN_FLD (CEN_TCN_GP1_TC_OPCG_DONE_DC, 15);
CEN_FLD (CEN_TCN_GP1_NOT_USED36, 16);
CEN_FLD (CEN_TCN_GP1_NOT_USED37, 17);
CEN_FLD (CEN_TCN_GP1_NOT_USED38, 18);
CEN_FLD (CEN_TCN_GP1_NOT_USED39, 19);
CEN_FLD (CEN_TCN_GP1_NOT_USED40, 20);
CEN_FLD (CEN_TCN_GP1_NOT_USED41, 21);
CEN_FLD (CEN_TCN_GP1_NOT_USED42, 22);
CEN_FLD (CEN_TCN_GP1_NOT_USED43, 23);

CEN_FLD (CEN_TCN_GP2_GPIN_MASKING, 0);
CEN_FLD (CEN_TCN_GP2_GPIN_MASKING_LEN, 24);

CEN_FLD (CEN_TCN_GP4_TC_PROBE0_SEL_DC, 0);
CEN_FLD (CEN_TCN_GP4_TC_PROBE0_SEL_DC_LEN, 6);
CEN_FLD (CEN_TCN_GP4_NOT_USED44, 6);
CEN_FLD (CEN_TCN_GP4_NOT_USED44_LEN, 2);
CEN_FLD (CEN_TCN_GP4_TC_PROBE1_SEL_DC, 8);
CEN_FLD (CEN_TCN_GP4_TC_PROBE1_SEL_DC_LEN, 6);
CEN_FLD (CEN_TCN_GP4_NOT_USED45, 14);
CEN_FLD (CEN_TCN_GP4_NOT_USED45_LEN, 2);
CEN_FLD (CEN_TCN_GP4_TC_PROBE2_SEL_DC, 16);
CEN_FLD (CEN_TCN_GP4_TC_PROBE2_SEL_DC_LEN, 6);
CEN_FLD (CEN_TCN_GP4_NOT_USED46, 22);
CEN_FLD (CEN_TCN_GP4_NOT_USED46_LEN, 2);
CEN_FLD (CEN_TCN_GP4_TC_PROBE3_SEL_DC, 24);
CEN_FLD (CEN_TCN_GP4_TC_PROBE3_SEL_DC_LEN, 6);
CEN_FLD (CEN_TCN_GP4_NOT_USED47, 30);
CEN_FLD (CEN_TCN_GP4_TC_OFLOW_FEH_SEL_DC, 31);
CEN_FLD (CEN_TCN_GP4_NOT_USED48, 32);
CEN_FLD (CEN_TCN_GP4_NOT_USED49, 33);
CEN_FLD (CEN_TCN_GP4_NOT_USED50, 34);
CEN_FLD (CEN_TCN_GP4_NOT_USED51, 35);
CEN_FLD (CEN_TCN_GP4_NOT_USED52, 36);
CEN_FLD (CEN_TCN_GP4_NOT_USED53, 37);
CEN_FLD (CEN_TCN_GP4_NOT_USED54, 38);
CEN_FLD (CEN_TCN_GP4_NOT_USED55, 39);
CEN_FLD (CEN_TCN_GP4_NOT_USED56, 40);
CEN_FLD (CEN_TCN_GP4_NOT_USED57, 41);
CEN_FLD (CEN_TCN_GP4_NOT_USED58, 42);
CEN_FLD (CEN_TCN_GP4_NOT_USED59, 43);
CEN_FLD (CEN_TCN_GP4_NOT_USED60, 44);
CEN_FLD (CEN_TCN_GP4_NOT_USED61, 45);
CEN_FLD (CEN_TCN_GP4_NOT_USED62, 46);
CEN_FLD (CEN_TCN_GP4_NOT_USED63, 47);
CEN_FLD (CEN_TCN_GP4_NOT_USED64, 48);
CEN_FLD (CEN_TCN_GP4_NOT_USED65, 49);
CEN_FLD (CEN_TCN_GP4_NOT_USED66, 50);
CEN_FLD (CEN_TCN_GP4_NOT_USED67, 51);
CEN_FLD (CEN_TCN_GP4_NOT_USED68, 52);
CEN_FLD (CEN_TCN_GP4_NOT_USED69, 53);
CEN_FLD (CEN_TCN_GP4_NOT_USED70, 54);
CEN_FLD (CEN_TCN_GP4_NOT_USED71, 55);
CEN_FLD (CEN_TCN_GP4_NOT_USED72, 56);
CEN_FLD (CEN_TCN_GP4_NOT_USED73, 57);
CEN_FLD (CEN_TCN_GP4_NOT_USED74, 58);
CEN_FLD (CEN_TCN_GP4_NOT_USED75, 59);
CEN_FLD (CEN_TCN_GP4_NOT_USED76, 60);
CEN_FLD (CEN_TCN_GP4_NOT_USED77, 61);
CEN_FLD (CEN_TCN_GP4_NOT_USED78, 62);
CEN_FLD (CEN_TCN_GP4_NOT_USED79, 63);

CEN_FLD (CEN_TCN_GPIO_PROTECT_MODE_REG_READ_ENABLE, 0);
CEN_FLD (CEN_TCN_GPIO_PROTECT_MODE_REG_WRITE_ENABLE, 1);

CEN_FLD (CEN_TCN_GPIO_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_TCN_GPIO_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_TCN_GPIO_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_TCN_XFIR_IN0, 0);
CEN_FLD (CEN_TCN_XFIR_IN1, 1);
CEN_FLD (CEN_TCN_XFIR_IN2, 2);
CEN_FLD (CEN_TCN_XFIR_IN3, 3);
CEN_FLD (CEN_TCN_XFIR_IN4, 4);
CEN_FLD (CEN_TCN_XFIR_IN5, 5);
CEN_FLD (CEN_TCN_XFIR_IN6, 6);
CEN_FLD (CEN_TCN_XFIR_IN7, 7);
CEN_FLD (CEN_TCN_XFIR_IN8, 8);
CEN_FLD (CEN_TCN_XFIR_IN9, 9);
CEN_FLD (CEN_TCN_XFIR_IN10, 10);
CEN_FLD (CEN_TCN_XFIR_IN11, 11);
CEN_FLD (CEN_TCN_XFIR_IN12, 12);
CEN_FLD (CEN_TCN_XFIR_IN13, 13);
CEN_FLD (CEN_TCN_XFIR_IN14, 14);
CEN_FLD (CEN_TCN_XFIR_IN15, 15);
CEN_FLD (CEN_TCN_XFIR_IN15_LEN, 11);
CEN_FLD (CEN_TCN_XFIR_IN26, 26);

CEN_FLD (CEN_TCN_RFIR_IN0, 0);
CEN_FLD (CEN_TCN_RFIR_LFIR_RECOV_ERR, 1);
CEN_FLD (CEN_TCN_RFIR_IN, 2);
CEN_FLD (CEN_TCN_RFIR_IN_LEN, 22);

CEN_FLD (CEN_TCN_FIR_MASK_IN0, 0);
CEN_FLD (CEN_TCN_FIR_MASK_IN1, 1);
CEN_FLD (CEN_TCN_FIR_MASK_IN2, 2);
CEN_FLD (CEN_TCN_FIR_MASK_IN3, 3);
CEN_FLD (CEN_TCN_FIR_MASK_IN4, 4);
CEN_FLD (CEN_TCN_FIR_MASK_IN4_LEN, 23);

CEN_FLD (CEN_TCN_LOCAL_FIR_IN0, 0);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN1, 1);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN2, 2);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN3, 3);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN4, 4);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN5, 5);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN6, 6);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN7, 7);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN8, 8);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN9, 9);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN10, 10);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN11, 11);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN12, 12);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN13, 13);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN13_LEN, 27);
CEN_FLD (CEN_TCN_LOCAL_FIR_IN40, 40);

CEN_FLD (CEN_TCN_PSCOM_MODE_REG_ABORT_ON_PCB_ADDR_PARITY_ERROR, 0);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_ABORT_ON_PCB_WDATA_PARITY_ERROR, 1);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_P0_ERROR, 2);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_WDATA_PARITY_ERROR, 3);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_WATCHDOG_ENABLE, 4);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_SCOM_HANG_LIMIT, 5);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_SCOM_HANG_LIMIT_LEN, 2);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_FORCE_ALL_RINGS, 7);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_FSM_SELFRESET_ON_STATEVEC_PARITYERROR_ENABLE, 8);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_RESERVED_LT, 9);
CEN_FLD (CEN_TCN_PSCOM_MODE_REG_RESERVED_LT_LEN, 3);

CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_WDATA_PARITY, 0);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_ADDRESS_PARITY, 1);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_WDATA_PARITY, 2);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_P0, 3);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_RDATA_PARITY, 4);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_P0, 5);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_INTERFACE_MACHINE, 6);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_P2S_MACHINE, 7);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULCCH, 8);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN, 9);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULDCH, 10);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_WRITE_NVLD, 11);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_READ_NVLD, 12);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_ADDR_INVALID, 13);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_COMMAND_PARITY, 14);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_GENERAL_TIMEOUT, 15);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION, 16);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER, 17);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_WDATA_PARITY, 18);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_ADDRESS_PARITY, 19);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_WDATA_PARITY, 20);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_P0, 21);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_RDATA_PARITY, 22);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_P0, 23);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_INTERFACE_MACHINE, 24);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_P2S_MACHINE, 25);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULCCH, 26);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN, 27);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULDCH, 28);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_WRITE_NVLD, 29);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_READ_NVLD, 30);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_ADDR_INVALID, 31);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_COMMAND_PARITY, 32);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_GENERAL_TIMEOUT, 33);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION, 34);
CEN_FLD (CEN_TCN_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER, 35);

CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_PCB_WDATA_PARITY, 0);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_PCB_ADDRESS_PARITY, 1);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_DL_RETURN_WDATA_PARITY, 2);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_DL_RETURN_P0, 3);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_UL_RDATA_PARITY, 4);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_UL_P0, 5);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_PARITY_ON_INTERFACE_MACHINE, 6);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_PARITY_ON_P2S_MACHINE, 7);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH, 8);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN, 9);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULDCH, 10);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_MASK_PARALLEL_WRITE_NVLD, 11);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_MASK_PARALLEL_READ_NVLD, 12);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_MASK_PARALLEL_ADDR_INVALID, 13);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_PCB_COMMAND_PARITY, 14);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_GENERAL_TIMEOUT, 15);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION, 16);
CEN_FLD (CEN_TCN_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER, 17);

CEN_FLD (CEN_TCN_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR, 0);
CEN_FLD (CEN_TCN_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN, 16);
CEN_FLD (CEN_TCN_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR, 16);
CEN_FLD (CEN_TCN_ADDR_TRAP_REG_RESERVED_LAST_LT, 17);
CEN_FLD (CEN_TCN_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR, 18);
CEN_FLD (CEN_TCN_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN, 13);
CEN_FLD (CEN_TCN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY, 31);
CEN_FLD (CEN_TCN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR, 32);
CEN_FLD (CEN_TCN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION, 33);
CEN_FLD (CEN_TCN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER, 34);

CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_LOCAL_TRACE_RUN_IN, 0);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_TRACE_STATE_LAT, 1);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_TRACE_STATE_LAT_LEN, 2);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_TRACE_FREEZE, 3);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_COND3_STATE_LT, 4);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_COND3_STATE_LT_LEN, 2);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_COND5_STATE_LT, 6);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_COND5_STATE_LT_LEN, 2);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_HISTORY_CONDITION0_LT, 8);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_HISTORY_CONDITION1_LT, 9);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_HISTORY_COND2_3_EVENT, 10);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_HISTORY_COND2_TIMEOUT, 11);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_HISTORY_COND4_5_EVENT, 12);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_HISTORY_COND4_TIMEOUT, 13);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_RESERVED_TCDBG_LT, 14);
CEN_FLD (CEN_TCN_DEBUG_STATUS_REG_RESERVED_TCDBG_LT_LEN, 2);

CEN_FLD (CEN_TCN_PSCOM_WRITE_PROTECT_REG_ENABLE_SERIAL_RING, 0);
CEN_FLD (CEN_TCN_PSCOM_WRITE_PROTECT_REG_RESERVED, 1);

CEN_FLD (CEN_TCN_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_TCN_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_TCN_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_TCN_SPATTN_IN0, 0);
CEN_FLD (CEN_TCN_SPATTN_IN1, 1);
CEN_FLD (CEN_TCN_SPATTN_IN2, 2);
CEN_FLD (CEN_TCN_SPATTN_IN2_LEN, 8);

CEN_FLD (CEN_TCN_SPA_MASK_IN, 0);
CEN_FLD (CEN_TCN_SPA_MASK_IN_LEN, 10);

CEN_FLD (CEN_TCN_MODE_REG_IN0, 0);
CEN_FLD (CEN_TCN_MODE_REG_IN1, 1);
CEN_FLD (CEN_TCN_MODE_REG_IN2, 2);
CEN_FLD (CEN_TCN_MODE_REG_IN3, 3);
CEN_FLD (CEN_TCN_MODE_REG_IN4, 4);
CEN_FLD (CEN_TCN_MODE_REG_IN5, 5);
CEN_FLD (CEN_TCN_MODE_REG_IN6, 6);
CEN_FLD (CEN_TCN_MODE_REG_IN7, 7);
CEN_FLD (CEN_TCN_MODE_REG_IN8, 8);
CEN_FLD (CEN_TCN_MODE_REG_IN9, 9);
CEN_FLD (CEN_TCN_MODE_REG_IN10, 10);
CEN_FLD (CEN_TCN_MODE_REG_IN11, 11);
CEN_FLD (CEN_TCN_MODE_REG_IN, 12);
CEN_FLD (CEN_TCN_MODE_REG_IN_LEN, 4);

CEN_FLD (CEN_TCN_LOCAL_FIR_ACTION0_IN, 0);
CEN_FLD (CEN_TCN_LOCAL_FIR_ACTION0_IN_LEN, 41);

CEN_FLD (CEN_TCN_LOCAL_FIR_ACTION1_IN, 0);
CEN_FLD (CEN_TCN_LOCAL_FIR_ACTION1_IN_LEN, 41);

CEN_FLD (CEN_TCN_LOCAL_FIR_MASK_LFIR_IN, 0);
CEN_FLD (CEN_TCN_LOCAL_FIR_MASK_LFIR_IN_LEN, 41);

CEN_FLD (CEN_TCN_DTS_RESULT0_0_RESULT, 0);
CEN_FLD (CEN_TCN_DTS_RESULT0_0_RESULT_LEN, 16);
CEN_FLD (CEN_TCN_DTS_RESULT0_1_RESULT, 16);
CEN_FLD (CEN_TCN_DTS_RESULT0_1_RESULT_LEN, 16);

CEN_FLD (CEN_TCN_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE, 0);
CEN_FLD (CEN_TCN_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE_LEN, 44);
CEN_FLD (CEN_TCN_DTS_TRC_RESULT_TIMESTAMP_COUNTER_OVERFLOW_ERR, 44);
CEN_FLD (CEN_TCN_DTS_TRC_RESULT_0_RESULT, 48);
CEN_FLD (CEN_TCN_DTS_TRC_RESULT_0_RESULT_LEN, 16);

CEN_FLD (CEN_TCN_ENC_CPM_RESULT0_DTS_0_RESULT, 0);
CEN_FLD (CEN_TCN_ENC_CPM_RESULT0_DTS_0_RESULT_LEN, 16);
CEN_FLD (CEN_TCN_ENC_CPM_RESULT0_DTS_1_RESULT, 16);
CEN_FLD (CEN_TCN_ENC_CPM_RESULT0_DTS_1_RESULT_LEN, 16);


CEN_FLD (CEN_TCN_THERM_MODE_REG_DIS_CPM_BUBBLE_CORR, 0);
CEN_FLD (CEN_TCN_THERM_MODE_REG_FORCE_THRES_ACT, 1);
CEN_FLD (CEN_TCN_THERM_MODE_REG_THRES_TRIP_ENA, 2);
CEN_FLD (CEN_TCN_THERM_MODE_REG_THRES_TRIP_ENA_LEN, 3);
CEN_FLD (CEN_TCN_THERM_MODE_REG_DTS_SAMPLE_ENA, 5);
CEN_FLD (CEN_TCN_THERM_MODE_REG_SAMPLE_PULSE_CNT, 6);
CEN_FLD (CEN_TCN_THERM_MODE_REG_SAMPLE_PULSE_CNT_LEN, 4);
CEN_FLD (CEN_TCN_THERM_MODE_REG_THRES_ENA, 10);
CEN_FLD (CEN_TCN_THERM_MODE_REG_THRES_ENA_LEN, 2);
CEN_FLD (CEN_TCN_THERM_MODE_REG_DTS_TRIGGER, 12);
CEN_FLD (CEN_TCN_THERM_MODE_REG_DTS_TRIGGER_SEL, 13);
CEN_FLD (CEN_TCN_THERM_MODE_REG_UNUSED, 14);
CEN_FLD (CEN_TCN_THERM_MODE_REG_UNUSED_LEN, 2);
CEN_FLD (CEN_TCN_THERM_MODE_REG_DTS_READ_SEL, 16);
CEN_FLD (CEN_TCN_THERM_MODE_REG_DTS_READ_SEL_LEN, 4);
CEN_FLD (CEN_TCN_THERM_MODE_REG_DTS_ENABLE, 20);
CEN_FLD (CEN_TCN_THERM_MODE_REG_DTS_ENABLE_LEN, 2);
CEN_FLD (CEN_TCN_THERM_MODE_REG_CPM_ENABLE, 35);
CEN_FLD (CEN_TCN_THERM_MODE_REG_CPM_ENABLE_LEN, 2);

CEN_FLD (CEN_TCN_SKITTER_MODE_REG_HOLD_SAMPLE, 0);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_DISABLE_STICKINESS, 1);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_UNUSED1, 2);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_UNUSED1_LEN, 2);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL, 4);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_RESET_TRIG_SEL, 6);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_RESET_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_SAMPLE_GUTS, 8);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_SAMPLE_GUTS_LEN, 2);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_HOLD_SAMPLE_WITH_TRIGGER, 44);
CEN_FLD (CEN_TCN_SKITTER_MODE_REG_DATA_V_LT, 45);

CEN_FLD (CEN_TCN_SKITTER_CLKSRC_REG_SKITTER0, 0);
CEN_FLD (CEN_TCN_SKITTER_CLKSRC_REG_SKITTER0_LEN, 3);

CEN_FLD (CEN_TCN_INJECT_REG_THERM_TRIP, 0);
CEN_FLD (CEN_TCN_INJECT_REG_THERM_TRIP_LEN, 2);
CEN_FLD (CEN_TCN_INJECT_REG_THERM_MODE, 2);
CEN_FLD (CEN_TCN_INJECT_REG_THERM_MODE_LEN, 2);


CEN_FLD (CEN_TCN_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_MASK, 16);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_THERM_MODEREG_PARITY_MASK, 17);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_MASK, 18);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_MASK, 19);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_SCAN_INIT_VERSION_REG_PARITY_MASK, 20);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_VOLT_MODEREG_PARITY_MASK, 21);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_COUNT_STATE_MASK, 23);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_RUN_STATE_MASK, 24);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_THRES_STATE_MASK, 25);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_OVERFLOW_MASK, 26);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_SHIFTER_PARITY_MASK, 27);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_SHIFTER_VALID_MASK, 28);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_TIMEOUT_MASK, 29);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_F_SKITTER_READ_MASK, 30);
CEN_FLD (CEN_TCN_ERR_STATUS_REG_PCB_MASK, 31);

CEN_FLD (CEN_TCN_SKITTER_FORCE_REG_F_READ, 0);

CEN_FLD (CEN_TCN_VOLT_MODE_REG_MEASURE_ENA, 0);
CEN_FLD (CEN_TCN_VOLT_MODE_REG_TRIP_ENA, 1);
CEN_FLD (CEN_TCN_VOLT_MODE_REG_ENABLE, 2);
CEN_FLD (CEN_TCN_VOLT_MODE_REG_ENABLE_LEN, 2);




CEN_FLD (CEN_TCN_TIMESTAMP_COUNTER_READ_VALUE, 0);
CEN_FLD (CEN_TCN_TIMESTAMP_COUNTER_READ_VALUE_LEN, 44);
CEN_FLD (CEN_TCN_TIMESTAMP_COUNTER_READ_OVERFLOW_ERR, 44);

CEN_FLD (CEN_TCN_DBG_MODE_REG_GLB_BRCST, 0);
CEN_FLD (CEN_TCN_DBG_MODE_REG_GLB_BRCST_LEN, 3);
CEN_FLD (CEN_TCN_DBG_MODE_REG_TRACE_SEL, 3);
CEN_FLD (CEN_TCN_DBG_MODE_REG_TRACE_SEL_LEN, 2);
CEN_FLD (CEN_TCN_DBG_MODE_REG_TRIG_SEL, 5);
CEN_FLD (CEN_TCN_DBG_MODE_REG_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_DBG_MODE_REG_STOP_ON_XSTOP_SELECTION, 7);
CEN_FLD (CEN_TCN_DBG_MODE_REG_STOP_ON_RECOV_ERR_SELECTION, 8);
CEN_FLD (CEN_TCN_DBG_MODE_REG_STOP_ON_SPATTN_SELECTION, 9);
CEN_FLD (CEN_TCN_DBG_MODE_REG_FREEZE_SEL, 10);

CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_COND1_SEL_A, 0);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_COND1_SEL_A_LEN, 7);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_COND1_SEL_B, 7);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_COND1_SEL_B_LEN, 7);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_COND2_SEL_A, 14);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_COND2_SEL_A_LEN, 7);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_COND2_SEL_B, 21);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_COND2_SEL_B_LEN, 7);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_C1_INAROW_MODE, 28);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE1, 29);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE1, 30);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE1, 31);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT1, 32);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT1_LEN, 3);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_C2_INAROW_MODE, 35);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE2, 36);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE2, 37);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE2, 38);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT2, 39);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT2_LEN, 3);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_COND3_ENABLE_RESET, 42);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_EXACT_TO_MODE, 43);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_RESET_C2TIMER_ON_C1, 44);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_RESET_C3_ON_C0, 45);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_SLOW_TO_MODE, 46);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_EXACT_RESET_C3_ON_TO, 47);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_C1_COUNT_LT, 48);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_C1_COUNT_LT_LEN, 4);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_C2_COUNT_LT, 52);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_C2_COUNT_LT_LEN, 4);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_RESET_C3_SELECT, 56);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_RESET_C3_SELECT_LEN, 3);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_CROSS_COUPLE_SELECT_1_A, 59);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_1_CROSS_COUPLE_SELECT_1_A_LEN, 5);

CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B, 0);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN, 5);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_A, 5);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_A_LEN, 5);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_B, 10);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_B_LEN, 5);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_SP_COUNT_LT, 15);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_SP_COUNT_LT_LEN, 24);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_TO_CMP_LT_VALUE, 39);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_TO_CMP_LT_VALUE_LEN, 24);
CEN_FLD (CEN_TCN_DBG_INST1_COND_REG_2_FORCE_TEST_MODE, 63);

CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_COND1_SEL_A, 0);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_COND1_SEL_A_LEN, 7);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_COND1_SEL_B, 7);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_COND1_SEL_B_LEN, 7);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_COND2_SEL_A, 14);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_COND2_SEL_A_LEN, 7);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_COND2_SEL_B, 21);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_COND2_SEL_B_LEN, 7);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_C1_INAROW_MODE, 28);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE1, 29);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE1, 30);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE1, 31);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT1, 32);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT1_LEN, 3);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_C2_INAROW_MODE, 35);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE2, 36);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE2, 37);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE2, 38);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT2, 39);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT2_LEN, 3);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_COND3_ENABLE_RESET, 42);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_EXACT_TO_MODE, 43);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_RESET_C2TIMER_ON_C1, 44);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_RESET_C3_ON_C0, 45);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_SLOW_TO_MODE, 46);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_EXACT_RESET_C3_ON_TO, 47);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_C1_COUNT_LT, 48);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_C1_COUNT_LT_LEN, 4);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_C2_COUNT_LT, 52);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_C2_COUNT_LT_LEN, 4);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_RESET_C3_SELECT, 56);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_RESET_C3_SELECT_LEN, 3);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_CROSS_COUPLE_SELECT_1_A, 59);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_1_CROSS_COUPLE_SELECT_1_A_LEN, 5);

CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B, 0);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN, 5);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_A, 5);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_A_LEN, 5);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_B, 10);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_B_LEN, 5);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_SP_COUNT_LT, 15);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_SP_COUNT_LT_LEN, 24);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_TO_CMP_LT_VALUE, 39);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_TO_CMP_LT_VALUE_LEN, 24);
CEN_FLD (CEN_TCN_DBG_INST2_COND_REG_2_FORCE_TEST_MODE, 63);

CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST1_COND3_ENABLE, 0);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST2_COND3_ENABLE, 1);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST3_COND3_ENABLE, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST4_COND3_ENABLE, 3);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST1_SLOW_LFSR_MODE, 4);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST2_SLOW_LFSR_MODE, 5);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST3_SLOW_LFSR_MODE, 6);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST4_SLOW_LFSR_MODE, 7);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL, 8);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL, 10);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL, 12);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL, 14);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL, 16);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL, 18);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_EXT_TRIG_ON_STOP, 32);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_EXT_TRIG_ON_FREEZE, 33);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL, 34);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL_LEN, 5);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL, 39);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL_LEN, 5);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_PC_TP_TRIG_SEL, 44);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_PC_TP_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_ARM_SEL, 46);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_ARM_SEL_LEN, 4);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL, 50);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL_LEN, 4);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL, 54);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL_LEN, 4);

CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO, 0);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO, 4);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO, 6);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO, 8);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO, 10);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_WAITN, 24);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_WAITN, 25);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_WAITN, 26);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_WAITN, 27);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_WAITN, 28);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_WAITN, 29);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_BANK, 36);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_BANK, 37);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_BANK, 38);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_BANK, 39);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_BANK, 40);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_BANK, 41);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT, 48);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT_LEN, 3);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_SELECTOR, 51);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT, 52);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT_LEN, 3);
CEN_FLD (CEN_TCN_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_SELECTOR, 55);

CEN_FLD (CEN_TCN_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE, 0);
CEN_FLD (CEN_TCN_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE_LEN, 16);
CEN_FLD (CEN_TCN_DBG_TRACE_MODE_REG_2_IMM_FREEZE, 16);
CEN_FLD (CEN_TCN_DBG_TRACE_MODE_REG_2_STOP_ON_ERR, 17);
CEN_FLD (CEN_TCN_DBG_TRACE_MODE_REG_2_BANK_ON_RUNN_MATCH, 18);
CEN_FLD (CEN_TCN_DBG_TRACE_MODE_REG_2_FORCE_TEST, 19);
CEN_FLD (CEN_TCN_DBG_TRACE_MODE_REG_2_ACCUM_HIST, 20);
CEN_FLD (CEN_TCN_DBG_TRACE_MODE_REG_2_FRZ_COUNT_ON, 21);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE, 1);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE, 2);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE_LEN, 8);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_BANK_MODE, 10);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_ENH_MODE, 11);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL, 12);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL_LEN, 2);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN, 64);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_2_PATTERNA, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_2_PATTERNB, 24);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_3_PATTERNC, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_3_PATTERND, 24);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_3_PATTERND_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_4_MASKA, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_4_MASKA_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_4_MASKB, 24);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_4_MASKB_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_5_MASKC, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_5_MASKC_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_5_MASKD, 24);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_5_MASKD_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK, 1);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL, 2);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL, 4);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL, 6);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL, 8);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK, 10);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK, 14);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK, 18);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK, 22);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE, 26);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE, 27);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE, 28);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN, 4);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_HI_DATA_REG_DATA, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_HI_DATA_REG_DATA_LEN, 64);

CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_DATA, 0);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_DATA_LEN, 32);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_ADDRESS, 32);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_ADDRESS_LEN, 10);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_LAST_BANK, 42);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_LAST_BANK_LEN, 9);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_LAST_BANK_VALID, 51);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_WRITE_ON_RUN, 52);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_RUNNING, 53);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS, 54);
CEN_FLD (CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN, 10);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE, 1);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE, 2);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE_LEN, 8);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_BANK_MODE, 10);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_ENH_MODE, 11);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL, 12);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL_LEN, 2);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN, 64);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_2_PATTERNA, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_2_PATTERNB, 24);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_3_PATTERNC, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_3_PATTERND, 24);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_3_PATTERND_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_4_MASKA, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_4_MASKA_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_4_MASKB, 24);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_4_MASKB_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_5_MASKC, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_5_MASKC_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_5_MASKD, 24);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_5_MASKD_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK, 1);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL, 2);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL, 4);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL, 6);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL, 8);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK, 10);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK, 14);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK, 18);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK, 22);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE, 26);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE, 27);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE, 28);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN, 4);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_HI_DATA_REG_DATA, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_HI_DATA_REG_DATA_LEN, 64);

CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_DATA, 0);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_DATA_LEN, 32);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_ADDRESS, 32);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_ADDRESS_LEN, 10);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_LAST_BANK, 42);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_LAST_BANK_LEN, 9);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_LAST_BANK_VALID, 51);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_WRITE_ON_RUN, 52);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_RUNNING, 53);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS, 54);
CEN_FLD (CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN, 10);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE, 1);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE, 2);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE_LEN, 8);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_BANK_MODE, 10);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_ENH_MODE, 11);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL, 12);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL_LEN, 2);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN, 64);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_2_PATTERNA, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_2_PATTERNB, 24);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_3_PATTERNC, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_3_PATTERND, 24);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_3_PATTERND_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_4_MASKA, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_4_MASKA_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_4_MASKB, 24);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_4_MASKB_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_5_MASKC, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_5_MASKC_LEN, 24);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_5_MASKD, 24);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_5_MASKD_LEN, 24);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK, 1);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL, 2);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL, 4);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL, 6);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL, 8);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN, 2);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK, 10);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK, 14);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK, 18);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK, 22);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN, 4);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE, 26);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE, 27);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE, 28);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN, 4);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_HI_DATA_REG_DATA, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_HI_DATA_REG_DATA_LEN, 64);

CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_DATA, 0);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_DATA_LEN, 32);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_ADDRESS, 32);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_ADDRESS_LEN, 10);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_LAST_BANK, 42);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_LAST_BANK_LEN, 9);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_LAST_BANK_VALID, 51);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_WRITE_ON_RUN, 52);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_RUNNING, 53);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_HOLD_ADDRESS, 54);
CEN_FLD (CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN, 10);

CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_CNTL, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_CNTL_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR0, 54);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR1, 55);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR2, 56);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR3, 57);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_INJECT_FIR_ERR4, 58);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_VPROTH_CTL, 59);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0_VPROTH_CTL_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_CNTL, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_CNTL_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR0, 54);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR1, 55);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR2, 56);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR3, 57);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_INJECT_FIR_ERR4, 58);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_VPROTH_CTL, 59);
CEN_FLD (CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1_VPROTH_CTL_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P0_DISABLE_PARITY_CHECKER, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P0_RESET_ERR_RPT, 49);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P0_FORCE_ON_CLK_GATE, 50);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P0_DEBUG_BUS_SEL_LO, 51);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P0_DEBUG__BUS_SEL_HI, 52);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P0_DEBUG__BUS_SEL_HI_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P1_DISABLE_PARITY_CHECKER, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P1_RESET_ERR_RPT, 49);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P1_FORCE_ON_CLK_GATE, 50);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P1_DEBUG_BUS_SEL_LO, 51);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P1_DEBUG__BUS_SEL_HI, 52);
CEN_FLD (CEN_MBA_DDRPHY_APB_CONFIG0_P1_DEBUG__BUS_SEL_HI_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_APB_ERROR_MASK0_P0_INVALID_ADDRESS_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_ERROR_MASK0_P0_WR_PAR_ERR_MASK, 49);

CEN_FLD (CEN_MBA_DDRPHY_APB_ERROR_MASK0_P1_INVALID_ADDRESS_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_ERROR_MASK0_P1_WR_PAR_ERR_MASK, 49);

CEN_FLD (CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P0_INVALID_ADDRESS, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P0_WR_PAR_ERR, 49);

CEN_FLD (CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P1_INVALID_ADDRESS, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P1_WR_PAR_ERR, 49);

CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET0, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET1, 49);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET2, 50);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET3, 51);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET4, 52);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_SET5, 53);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_FSM_DP18, 54);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_FSM_DP18_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_REG_DP18, 59);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ERR_REG_DP18_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET0, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET1, 49);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET2, 50);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET3, 51);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET4, 52);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_SET5, 53);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_FSM_DP18, 54);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_FSM_DP18_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_REG_DP18, 59);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ERR_REG_DP18_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR1_P0_PC_ERR_STATUS0, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR1_P0_PC_ERR_STATUS0_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR1_P0_PC_INIT_CAL_ERR, 53);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR1_P0_PC_INIT_CAL_ERR_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR1_P1_PC_ERR_STATUS0, 48);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR1_P1_PC_ERR_STATUS0_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR1_P1_PC_INIT_CAL_ERR, 53);
CEN_FLD (CEN_MBA_DDRPHY_APB_FIR_ERR1_P1_PC_INIT_CAL_ERR_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P0_LOCK, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P0_LOCK_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P1_LOCK, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P1_LOCK_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_PC_BASE_CNTR0_P0_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_BASE_CNTR0_P0_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_BASE_CNTR0_P1_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_BASE_CNTR0_P1_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_BASE_CNTR1_P0_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_BASE_CNTR1_P0_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_BASE_CNTR1_P1_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_BASE_CNTR1_P1_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P0_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P0_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P1_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P1_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_CAL_TIMER_P0_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CAL_TIMER_P0_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_CAL_TIMER_P1_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CAL_TIMER_P1_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_PROTOCOL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_PROTOCOL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_DATA_MUX4_1MODE, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_SPAM_EN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_DDR4_CMD_SIG_REDUCTION, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_SYSCLK_2X_MEMINTCLKO, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_RANK_OVERRIDE, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_RANK_OVERRIDE_VALUE, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_RANK_OVERRIDE_VALUE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_LOW_LATENCY, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_DDR4_IPW_LOOP_DIS, 61);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_DDR4_VLEVEL_BANK_GROUP, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P0_ZCAL_NOT_CONT, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_PROTOCOL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_PROTOCOL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_DATA_MUX4_1MODE, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_SPAM_EN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_DDR4_CMD_SIG_REDUCTION, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_SYSCLK_2X_MEMINTCLKO, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_RANK_OVERRIDE, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_RANK_OVERRIDE_VALUE, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_RANK_OVERRIDE_VALUE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_LOW_LATENCY, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_DDR4_IPW_LOOP_DIS, 61);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_DDR4_VLEVEL_BANK_GROUP, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG0_P1_ZCAL_NOT_CONT, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_WRITE_LATENCY_OFFSET, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_WRITE_LATENCY_OFFSET_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_READ_LATENCY_OFFSET, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_READ_LATENCY_OFFSET_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_MEMCTL_CIC_FAST, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_MEMCTL_CTRN_IGNORE, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_DISABLE_MEMCTL_CAL, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_MEMORY_TYPE, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_MEMORY_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_DDR4_LATENCY_SW, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P0_RETRAIN_PERCAL_SW, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_WRITE_LATENCY_OFFSET, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_WRITE_LATENCY_OFFSET_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_READ_LATENCY_OFFSET, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_READ_LATENCY_OFFSET_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_MEMCTL_CIC_FAST, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_MEMCTL_CTRN_IGNORE, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_DISABLE_MEMCTL_CAL, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_MEMORY_TYPE, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_MEMORY_TYPE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_DDR4_LATENCY_SW, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_CONFIG1_P1_RETRAIN_PERCAL_SW, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS0_INIT_CAL_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS1_INIT_CAL_VALUE, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS2_INIT_CAL_VALUE, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS3_INIT_CAL_VALUE, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS4_INIT_CAL_VALUE, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS5_INIT_CAL_VALUE, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS6_INIT_CAL_VALUE, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P0_CS7_INIT_CAL_VALUE, 55);

CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS0_INIT_CAL_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS1_INIT_CAL_VALUE, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS2_INIT_CAL_VALUE, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS3_INIT_CAL_VALUE, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS4_INIT_CAL_VALUE, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS5_INIT_CAL_VALUE, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS6_INIT_CAL_VALUE, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_CSID_CFG_P1_CS7_INIT_CAL_VALUE, 55);

CEN_FLD (CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P0_LOCK, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P0_LOCK_LEN, 15);

CEN_FLD (CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P1_LOCK, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P1_LOCK_LEN, 15);

CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_RC_ERROR_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_WC_ERROR_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_SEQ_ERROR_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_CC_ERROR_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_APB_ERROR_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0_ERROR_MASK, 53);

CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_RC_ERROR_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_WC_ERROR_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_SEQ_ERROR_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_CC_ERROR_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_APB_ERROR_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1_ERROR_MASK, 53);

CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_RC_ERROR, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_WC_ERROR, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_SEQ_ERROR, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_CC_ERROR, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_APB_ERROR, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_ERROR, 53);

CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_RC_ERROR, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_WC_ERROR, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_SEQ_ERROR, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_CC_ERROR, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_APB_ERROR, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_ERROR, 53);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_WR_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_INITIAL_PAT_WR, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_DQS_ALIGN, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_RDCLK_ALIGN, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_READ_CTR, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_WRITE_CTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_INITIAL_COARSE_WR, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_COARSE_RD, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_CUSTOM_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_CUSTOM_WR, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ABORT_ON_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_DIGITAL_EYE, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_RANK_PAIR, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0_ENA_RANK_PAIR_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_WR_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_INITIAL_PAT_WR, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_DQS_ALIGN, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_RDCLK_ALIGN, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_READ_CTR, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_WRITE_CTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_INITIAL_COARSE_WR, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_COARSE_RD, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_CUSTOM_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_CUSTOM_WR, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ABORT_ON_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_DIGITAL_EYE, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_RANK_PAIR, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1_ENA_RANK_PAIR_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_COUNT, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_COUNT_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_CONTROL, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_CONTROL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_ALL_RANKS, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_SNOOP_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_INTERVAL, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0_REFRESH_INTERVAL_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_COUNT, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_COUNT_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_CONTROL, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_CONTROL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_ALL_RANKS, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_SNOOP_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_INTERVAL, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1_REFRESH_INTERVAL_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_WR_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_INITIAL_PAT_WRITE, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_DQS_ALIGN, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_RDCLK_ALIGN, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_READ_CTR, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_WRITE_CTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_INITIAL_COARSE_WR, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_COARSE_RD, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_CUSTOM_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_CUSTOM_WR, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_DIGITAL_EYE, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_RANK_PAIR, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ERROR_RANK_PAIR_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_WR_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_INITIAL_PAT_WRITE, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_DQS_ALIGN, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_RDCLK_ALIGN, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_READ_CTR, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_WRITE_CTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_INITIAL_COARSE_WR, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_COARSE_RD, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_CUSTOM_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_CUSTOM_WR, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_DIGITAL_EYE, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_RANK_PAIR, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ERROR_RANK_PAIR_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_WR_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_INITIAL_PAT_WRITE, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_DQS_ALIGN, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_RDCLK_ALIGN, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_READ_CTR, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_WRITE_CTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_INITIAL_COARSE_WR, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_COARSE_RD, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_CUSTOM_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_CUSTOM_WR, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0_ERROR_DIGITAL_EYE, 58);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_WR_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_INITIAL_PAT_WRITE, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_DQS_ALIGN, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_RDCLK_ALIGN, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_READ_CTR, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_WRITE_CTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_INITIAL_COARSE_WR, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_COARSE_RD, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_CUSTOM_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_CUSTOM_WR, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1_ERROR_DIGITAL_EYE, 58);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P0_COMPLETE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P0_COMPLETE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P0_PER_ABORT, 57);

CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P1_COMPLETE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P1_COMPLETE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P1_PER_ABORT, 57);

CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTP, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTP_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_PVTN_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_OVERRIDE, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_ENABLE_ZCAL, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0_RESET_ZCAL, 60);

CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_PVTP, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_PVTP_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_PVTN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_PVTN_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_OVERRIDE, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_ENABLE_ZCAL, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1_RESET_ZCAL, 60);

CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTP, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTP_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_PVTN_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P1_PVTP, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P1_PVTP_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P1_PVTN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P1_PVTN_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P0_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P0_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P1_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P1_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P0_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P0_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P1_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P1_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P0_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P0_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P1_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P1_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P0_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P0_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P1_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P1_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P0_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P0_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P1_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P1_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P0_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P0_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P1_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P1_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P0_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P0_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P1_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P1_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P0_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P0_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P1_MODE_REGISTER_0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P1_MODE_REGISTER_0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P0_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P0_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P1_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P1_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P0_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P0_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P1_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P1_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P0_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P0_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P1_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P1_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P0_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P0_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P1_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P1_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P0_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P0_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P1_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P1_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P0_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P0_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P1_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P1_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P0_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P0_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P1_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P1_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P0_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P0_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P1_MODE_REGISTER_1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P1_MODE_REGISTER_1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P0_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P0_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P1_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P1_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P0_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P0_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P1_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P1_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P0_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P0_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P1_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P1_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P0_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P0_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P1_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P1_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P0_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P0_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P1_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P1_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P0_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P0_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P1_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P1_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P0_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P0_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P1_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P1_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P0_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P0_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P1_MODE_REGISTER_2_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P1_MODE_REGISTER_2_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P0_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P0_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P1_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P1_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P0_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P0_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P1_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P1_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P0_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P0_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P1_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P1_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P0_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P0_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P1_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P1_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P0_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P0_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P1_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P1_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P0_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P0_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P1_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P1_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P0_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P0_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P1_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P1_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P0_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P0_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P1_MODE_REGISTER_3_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P1_MODE_REGISTER_3_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_RANK_PAIR, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_RANK_PAIR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_ZCAL, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_SYSCLK_ALIGN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_READ_CTR, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_RDCLK_ALIGN, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ENA_DQS_ALIGN, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_NEXT_RANK_PAIR, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_NEXT_RANK_PAIR_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_FAST_SIM_CNTR, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_START_INIT, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_START, 61);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_ABORT_ON_ERR_EN, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0_DD2_FIX_DIS, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_RANK_PAIR, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_RANK_PAIR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_ZCAL, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_SYSCLK_ALIGN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_READ_CTR, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_RDCLK_ALIGN, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ENA_DQS_ALIGN, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_NEXT_RANK_PAIR, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_NEXT_RANK_PAIR_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_FAST_SIM_CNTR, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_START_INIT, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_START, 61);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_ABORT_ON_ERR_EN, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1_DD2_FIX_DIS, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_ENA_RANK, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_ENA_RANK_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_NEXT_RANK, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_NEXT_RANK_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0_START, 59);

CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_ENA_RANK, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_ENA_RANK_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_NEXT_RANK, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_NEXT_RANK_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1_START, 59);

CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_MASTER_PD_CNTL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_ANALOG_INPUT_STAB2, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_EYEDAC_PD, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_PHYTOP_CLK_GATE, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_EXT_VREF_PD, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_RESET_STAB, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_ANALOG_OUTPUT_STAB, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_ANALOG_INPUT_STAB1, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_SYSCLK_CLK_GATE, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_DELAY_LINE_CTL_OVERRIDE, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_WR_FIFO_STAB, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_ADR_RX_PD, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_DP18_RX_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_DP18_RX_PD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_TX_TRISTATE_CNTL, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0_VCC_REG_PD, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_MASTER_PD_CNTL, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_ANALOG_INPUT_STAB2, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_EYEDAC_PD, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_PHYTOP_CLK_GATE, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_EXT_VREF_PD, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_RESET_STAB, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_ANALOG_OUTPUT_STAB, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_ANALOG_INPUT_STAB1, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_SYSCLK_CLK_GATE, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_DELAY_LINE_CTL_OVERRIDE, 57);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_WR_FIFO_STAB, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_ADR_RX_PD, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_DP18_RX_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_DP18_RX_PD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_TX_TRISTATE_CNTL, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1_VCC_REG_PD, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP0_TER, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP0_QUA, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP1_TER, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP1_QUA, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP2_TER, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP2_QUA, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP3_TER, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0_ADDR_MIRROR_RP3_QUA, 55);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP0_TER, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP0_QUA, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP1_TER, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP1_QUA, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP2_TER, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP2_QUA, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP3_TER, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1_ADDR_MIRROR_RP3_QUA, 55);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP0_PRI, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP0_SEC, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP1_PRI, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP1_SEC, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP2_PRI, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP2_SEC, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP3_PRI, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_RP3_SEC, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_GROUPING, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_GROUPING_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_A3_A4, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_A5_A6, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_A7_A8, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_A11_A13, 61);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_BA0_BA1, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P0_ADDR_MIRROR_BG0_BG1, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP0_PRI, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP0_SEC, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP1_PRI, 50);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP1_SEC, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP2_PRI, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP2_SEC, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP3_PRI, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_RP3_SEC, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_GROUPING, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_GROUPING_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_A3_A4, 58);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_A5_A6, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_A7_A8, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_A11_A13, 61);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_BA0_BA1, 62);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_GROUP_P1_ADDR_MIRROR_BG0_BG1, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PRI, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PRI_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PRI_V, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_SEC, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_SEC_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_SEC_V, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_PRI, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_PRI_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_PRI_V, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_SEC, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_SEC_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0_PAIR1_SEC_V, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PRI, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PRI_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PRI_V, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_SEC, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_SEC_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_SEC_V, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_PRI, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_PRI_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_PRI_V, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_SEC, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_SEC_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1_PAIR1_SEC_V, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_PRI, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_PRI_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_PRI_V, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_SEC, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_SEC_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR2_SEC_V, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_PRI, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_PRI_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_PRI_V, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_SEC, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_SEC_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0_PAIR3_SEC_V, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_PRI, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_PRI_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_PRI_V, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_SEC, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_SEC_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR2_SEC_V, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_PRI, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_PRI_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_PRI_V, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_SEC, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_SEC_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1_PAIR3_SEC_V, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_TER, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_TER_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_TER_V, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_QUA, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_QUA_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR0_QUA_V, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_TER, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_TER_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_TER_V, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_QUA, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_QUA_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0_PAIR1_QUA_V, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_TER, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_TER_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_TER_V, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_QUA, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_QUA_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR0_QUA_V, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_TER, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_TER_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_TER_V, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_QUA, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_QUA_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1_PAIR1_QUA_V, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_TER, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_TER_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_TER_V, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_QUA, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_QUA_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_PAIR2_QUA_V, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_TER, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_TER_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_TER_V, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_QUA, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_QUA_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0_QUA_V, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_TER, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_TER_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_TER_V, 51);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_QUA, 52);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_QUA_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_PAIR2_QUA_V, 55);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_TER, 56);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_TER_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_TER_V, 59);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_QUA, 60);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_QUA_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1_QUA_V, 63);

CEN_FLD (CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P0_PERIODIC_CAL_REQ_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P0_PERIODIC, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P0_PERIODIC_LEN, 15);

CEN_FLD (CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P1_PERIODIC_CAL_REQ_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P1_PERIODIC, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P1_PERIODIC_LEN, 15);

CEN_FLD (CEN_MBA_DDRPHY_PC_RESETS_P0_PLL_RESET, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RESETS_P0_SYSCLK_RESET, 49);

CEN_FLD (CEN_MBA_DDRPHY_PC_RESETS_P1_PLL_RESET, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_RESETS_P1_SYSCLK_RESET, 49);

CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ0DSGN, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ0D, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ0D_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ1DSGN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ1D, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0_VREFDQ1D_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ0DSGN, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ0D, 49);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ0D_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ1DSGN, 53);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ1D, 54);
CEN_FLD (CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1_VREFDQ1D_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P0_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P0_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P1_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P1_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P0_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P0_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P1_PERIODIC, 48);
CEN_FLD (CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P1_PERIODIC_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_GLOBAL_PHY_OFFSET, 48);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_GLOBAL_PHY_OFFSET_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_ADVANCE_RD_VALID, 52);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_PER_DUTY_CYCLE_SW, 53);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_PER_REPEAT_COUNT, 54);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_PER_REPEAT_COUNT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_SINGLE_BIT_MPR_RP0, 57);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_SINGLE_BIT_MPR_RP1, 58);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_SINGLE_BIT_MPR_RP2, 59);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_SINGLE_BIT_MPR_RP3, 60);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_ALIGN_ON_EVEN_CYCLES, 61);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_PERFORM_RDCLK_ALIGN, 62);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P0_STAGGERED_PATTERN, 63);

CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_GLOBAL_PHY_OFFSET, 48);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_GLOBAL_PHY_OFFSET_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_ADVANCE_RD_VALID, 52);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_PER_DUTY_CYCLE_SW, 53);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_PER_REPEAT_COUNT, 54);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_PER_REPEAT_COUNT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_SINGLE_BIT_MPR_RP0, 57);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_SINGLE_BIT_MPR_RP1, 58);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_SINGLE_BIT_MPR_RP2, 59);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_SINGLE_BIT_MPR_RP3, 60);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_ALIGN_ON_EVEN_CYCLES, 61);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_PERFORM_RDCLK_ALIGN, 62);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG0_P1_STAGGERED_PATTERN, 63);

CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG1_P0_OUTER_LOOP_CNT, 48);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG1_P0_OUTER_LOOP_CNT_LEN, 14);

CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG1_P1_OUTER_LOOP_CNT, 48);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG1_P1_OUTER_LOOP_CNT_LEN, 14);

CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P0_CONSEQ_PASS, 48);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P0_CONSEQ_PASS_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P0_BURST_WINDOW, 57);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P0_BURST_WINDOW_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P0_ALLOW_RD_FIFO_AUTO_RESET, 59);

CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P1_CONSEQ_PASS, 48);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P1_CONSEQ_PASS_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P1_BURST_WINDOW, 57);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P1_BURST_WINDOW_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG2_P1_ALLOW_RD_FIFO_AUTO_RESET, 59);

CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P0_FINE_CAL_STEP_SIZE, 48);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P0_FINE_CAL_STEP_SIZE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P0_COARSE_CAL_STEP_SIZE, 51);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P0_COARSE_CAL_STEP_SIZE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P0_DQ_SEL_QUAD, 55);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P0_DQ_SEL_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P0_DQ_SEL_LANE, 57);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P0_DQ_SEL_LANE_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P1_FINE_CAL_STEP_SIZE, 48);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P1_FINE_CAL_STEP_SIZE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P1_COARSE_CAL_STEP_SIZE, 51);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P1_COARSE_CAL_STEP_SIZE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P1_DQ_SEL_QUAD, 55);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P1_DQ_SEL_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P1_DQ_SEL_LANE, 57);
CEN_FLD (CEN_MBA_DDRPHY_RC_CONFIG3_P1_DQ_SEL_LANE_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_RC_ERROR_MASK0_P0_RD_CNTL_ERROR_MASK, 48);

CEN_FLD (CEN_MBA_DDRPHY_RC_ERROR_MASK0_P1_RD_CNTL_ERROR_MASK, 48);

CEN_FLD (CEN_MBA_DDRPHY_RC_ERROR_STATUS0_P0_RD_CNTL_ERROR, 48);

CEN_FLD (CEN_MBA_DDRPHY_RC_ERROR_STATUS0_P1_RD_CNTL_ERROR, 48);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_MPR_PATTERN_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_TWO_CYCLE_ADDR_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_MR_MASK_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_MR_MASK_EN_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_DELAYED_PAR, 54);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_LRDIMM_CONTEXT, 55);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_FORCE_RESERVED, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_HALT_ROTATION, 57);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_FORCE_MPR, 58);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_CLONE_CS_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_PAR_INVERT, 60);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_IPW_SIDEAB_SEL, 61);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_PAR_A17_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P0_CW_MIRROR, 63);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_MPR_PATTERN_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_TWO_CYCLE_ADDR_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_MR_MASK_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_MR_MASK_EN_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_DELAYED_PAR, 54);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_LRDIMM_CONTEXT, 55);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_FORCE_RESERVED, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_HALT_ROTATION, 57);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_FORCE_MPR, 58);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_CLONE_CS_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_PAR_INVERT, 60);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_IPW_SIDEAB_SEL, 61);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_PAR_A17_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_CONFIG0_P1_CW_MIRROR, 63);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P0_MULT_REQ_ERR_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P0_INVALID_REQTYPE_ERR_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P0_EARLY_REQ_ERR_MASK, 50);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P1_MULT_REQ_ERR_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P1_INVALID_REQTYPE_ERR_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P1_EARLY_REQ_ERR_MASK, 50);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_MULTIPLE_REQ_ERROR, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQTYPE_ERROR, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_EARLY_REQ_ERROR, 50);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_MULTIPLE_REQ_SOURCE, 51);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_MULTIPLE_REQ_SOURCE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQTYPE, 54);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQTYPE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQ_SOURCE, 58);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_INVALID_REQ_SOURCE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_EARLY_REQ_SOURCE, 61);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_EARLY_REQ_SOURCE_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_MULTIPLE_REQ_ERROR, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQTYPE_ERROR, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_EARLY_REQ_ERROR, 50);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_MULTIPLE_REQ_SOURCE, 51);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_MULTIPLE_REQ_SOURCE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQTYPE, 54);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQTYPE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQ_SOURCE, 58);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_INVALID_REQ_SOURCE_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_EARLY_REQ_SOURCE, 61);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_EARLY_REQ_SOURCE_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P0_ADDR2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P0_ADDR2_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P1_ADDR2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P1_ADDR2_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P0_ADDR3, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P0_ADDR3_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P1_ADDR3, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P1_ADDR3_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P0_ADDR4, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P0_ADDR4_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P1_ADDR4, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P1_ADDR4_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TMOD_CYCLES, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TMOD_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRCD_CYCLES, 52);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRCD_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRP_CYCLES, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRP_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRFC_CYCLES, 60);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0_TRFC_CYCLES_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TMOD_CYCLES, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TMOD_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRCD_CYCLES, 52);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRCD_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRP_CYCLES, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRP_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRFC_CYCLES, 60);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1_TRFC_CYCLES_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TZQINIT_CYCLES, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TZQINIT_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TZQCS_CYCLES, 52);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TZQCS_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TWLDQSEN_CYCLES, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TWLDQSEN_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TWRMRD_CYCLES, 60);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0_TWRMRD_CYCLES_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TZQINIT_CYCLES, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TZQINIT_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TZQCS_CYCLES, 52);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TZQCS_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TWLDQSEN_CYCLES, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TWLDQSEN_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TWRMRD_CYCLES, 60);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1_TWRMRD_CYCLES_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TODTLON_OFF_CYCLES, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TODTLON_OFF_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TRC_CYCLES, 52);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TRC_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TMRSC_CYCLES, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0_TMRSC_CYCLES_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TODTLON_OFF_CYCLES, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TODTLON_OFF_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TRC_CYCLES, 52);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TRC_CYCLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TMRSC_CYCLES, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1_TMRSC_CYCLES_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P0_DEF_VALUES, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P0_DEF_VALUES_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P1_DEF_VALUES, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P1_DEF_VALUES_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P0_VALUES0, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P0_VALUES0_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P0_VALUES1, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P0_VALUES1_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P1_VALUES0, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P1_VALUES0_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P1_VALUES1, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P1_VALUES1_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P0_VALUES2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P0_VALUES2_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P0_VALUES3, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P0_VALUES3_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P1_VALUES2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P1_VALUES2_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P1_VALUES3, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P1_VALUES3_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P0_VALUES4, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P0_VALUES4_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P0_VALUES5, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P0_VALUES5_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P1_VALUES4, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P1_VALUES4_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P1_VALUES5, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P1_VALUES5_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P0_VALUES6, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P0_VALUES6_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P0_VALUES7, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P0_VALUES7_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P1_VALUES6, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P1_VALUES6_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P1_VALUES7, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P1_VALUES7_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P0_VALUES0, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P0_VALUES0_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P0_VALUES1, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P0_VALUES1_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P1_VALUES0, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P1_VALUES0_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P1_VALUES1, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P1_VALUES1_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P0_VALUES2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P0_VALUES2_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P0_VALUES3, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P0_VALUES3_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P1_VALUES2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P1_VALUES2_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P1_VALUES3, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P1_VALUES3_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P0_VALUES4, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P0_VALUES4_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P0_VALUES5, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P0_VALUES5_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P1_VALUES4, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P1_VALUES4_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P1_VALUES5, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P1_VALUES5_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P0_VALUES6, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P0_VALUES6_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P0_VALUES7, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P0_VALUES7_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P1_VALUES6, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P1_VALUES6_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P1_VALUES7, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P1_VALUES7_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P0_DATA_REG0, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P0_DATA_REG0_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P1_DATA_REG0, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P1_DATA_REG0_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P0_DATA_REG1, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P0_DATA_REG1_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P1_DATA_REG1, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P1_DATA_REG1_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P0_ADDR0, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P0_ADDR0_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P1_ADDR0, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P1_ADDR0_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P0_ADDR1, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P0_ADDR1_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P1_ADDR1, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P1_ADDR1_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P0_ADDR2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P0_ADDR2_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P1_ADDR2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P1_ADDR2_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P0_ADDR3, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P0_ADDR3_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P1_ADDR3, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P1_ADDR3_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P0_ADDR4, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P0_ADDR4_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P1_ADDR4, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P1_ADDR4_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_TYPE_0_2, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_0_2, 53);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_1_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_TYPE_1_3, 57);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_1_3, 61);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0_SEL_1_3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_TYPE_0_2, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_0_2, 53);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_1_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_TYPE_1_3, 57);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_1_3, 61);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1_SEL_1_3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_TYPE_0_2, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_0_2, 53);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_1_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_TYPE_1_3, 57);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_1_3, 61);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0_SEL_1_3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_TYPE_0_2, 49);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_0_2, 53);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_1_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_TYPE_1_3, 57);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_1_3, 61);
CEN_FLD (CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1_SEL_1_3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P0_TWLO_TWLOE, 48);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P0_TWLO_TWLOE_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P0_WL_ONE_DQS_PULSE, 56);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P0_FW_WR_RD, 57);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P0_FW_WR_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P0_CUSTOM_INIT_WRITE, 63);

CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P1_TWLO_TWLOE, 48);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P1_TWLO_TWLOE_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P1_WL_ONE_DQS_PULSE, 56);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P1_FW_WR_RD, 57);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P1_FW_WR_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG0_P1_CUSTOM_INIT_WRITE, 63);

CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P0_BIG_STEP, 48);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P0_BIG_STEP_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P0_SMALL_STEP, 52);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P0_SMALL_STEP_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P0_WR_PRE_DLY, 55);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P0_WR_PRE_DLY_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P1_BIG_STEP, 48);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P1_BIG_STEP_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P1_SMALL_STEP, 52);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P1_SMALL_STEP_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P1_WR_PRE_DLY, 55);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG1_P1_WR_PRE_DLY_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P0_NUM_VALID_SAMPLES, 48);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P0_NUM_VALID_SAMPLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P0_FW_RD_WR, 52);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P0_FW_RD_WR_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P0_IPW_WR, 58);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P0_IPW_WR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P0_EN_RESET_DD2_FIX_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P0_EN_RESET_WR_DELAY_WL, 63);

CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P1_NUM_VALID_SAMPLES, 48);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P1_NUM_VALID_SAMPLES_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P1_FW_RD_WR, 52);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P1_FW_RD_WR_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P1_IPW_WR, 58);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P1_IPW_WR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P1_EN_RESET_DD2_FIX_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG2_P1_EN_RESET_WR_DELAY_WL, 63);

CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P0_DDR4_MRS_CMD_DQ_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P0_MRS_CMD_DQ_ON, 49);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P0_MRS_CMD_DQ_ON_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P0_MRS_CMD_DQ_OFF, 55);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P0_MRS_CMD_DQ_OFF_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P1_DDR4_MRS_CMD_DQ_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P1_MRS_CMD_DQ_ON, 49);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P1_MRS_CMD_DQ_ON_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P1_MRS_CMD_DQ_OFF, 55);
CEN_FLD (CEN_MBA_DDRPHY_WC_CONFIG3_P1_MRS_CMD_DQ_OFF_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_WC_ERROR_MASK0_P0_WR_CNTL_ERROR_MASK, 48);

CEN_FLD (CEN_MBA_DDRPHY_WC_ERROR_MASK0_P1_WR_CNTL_ERROR_MASK, 48);

CEN_FLD (CEN_MBA_DDRPHY_WC_ERROR_STATUS0_P0_WR_CNTL_ERROR, 48);

CEN_FLD (CEN_MBA_DDRPHY_WC_ERROR_STATUS0_P1_WR_CNTL_ERROR, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_0_01_DIR_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_0_01_DIR_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_1_01_DIR_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_1_01_DIR_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_0_01_DIR_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_0_01_DIR_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_1_01_DIR_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_1_01_DIR_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_2_23_DIR_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_2_23_DIR_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_3_23_DIR_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_3_23_DIR_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_2_23_DIR_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_2_23_DIR_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_3_23_DIR_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_3_23_DIR_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_4_DIR_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_4_DIR_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_4_DIR_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_4_DIR_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0_01_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1_01_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0_01_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1_01_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2_23_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3_23_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2_23_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3_23_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_DD2_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_TOXDRV_HIBERNATE, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL_EN, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_WL_ADVANCE_DISABLE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_DISABLE_PING_PONG, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_DELAY_PING_PONG_HALF, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ADVANCE_PING_PONG, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4_ATEST_MUX_CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_0_01_DISABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_0_01_DISABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_1_01_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_1_01_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_0_01_DISABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_0_01_DISABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_1_01_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_1_01_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_2_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_2_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_3_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_3_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_2_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_2_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_3_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_3_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_4_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_4_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_4_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_4_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_0_01_DISABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_0_01_DISABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_1_01_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_1_01_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_0_01_DISABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_0_01_DISABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_1_01_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_1_01_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_2_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_2_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_3_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_3_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_2_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_2_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_3_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_3_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_4_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_4_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_4_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_4_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_0_01_DISABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_0_01_DISABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_1_01_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_1_01_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_0_01_DISABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_0_01_DISABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_1_01_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_1_01_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_2_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_2_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_3_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_3_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_2_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_2_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_3_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_3_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_4_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_4_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_4_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_4_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_0_01_DISABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_0_01_DISABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_1_01_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_1_01_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_0_01_DISABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_0_01_DISABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_1_01_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_1_01_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_2_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_2_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_3_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_3_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_2_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_2_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_3_23_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_3_23_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_4_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_4_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_4_DISABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_4_DISABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_0_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_0_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_1_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_1_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_0_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_0_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_1_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_1_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_2_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_2_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_3_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_3_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_2_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_2_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_3_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_3_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_4_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_4_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_4_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_4_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_0_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_0_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_1_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_1_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_0_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_0_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_1_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_1_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_2_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_2_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_3_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_3_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_2_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_2_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_3_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_3_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_4_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_4_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_4_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_4_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_0_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_0_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_1_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_1_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_0_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_0_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_1_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_1_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_2_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_2_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_3_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_3_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_2_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_2_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_3_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_3_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_4_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_4_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_4_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_4_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_0_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_0_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_1_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_1_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_0_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_0_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_1_01_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_1_01_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_2_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_2_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_3_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_3_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_2_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_2_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_3_23_DISABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_3_23_DISABLE_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_4_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_4_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_4_DISABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_4_DISABLE_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_0_01_ENABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_0_01_ENABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_1_01_ENABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_1_01_ENABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_0_01_ENABLE_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_0_01_ENABLE_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_1_01_ENABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_1_01_ENABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_2_23_ENABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_2_23_ENABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_3_23_ENABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_3_23_ENABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_2_23_ENABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_2_23_ENABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_3_23_ENABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_3_23_ENABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_4_ENABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_4_ENABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_4_ENABLE_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_4_ENABLE_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_ENABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_ENABLE_16_23_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0_01_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_ENABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_ENABLE_16_23_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1_01_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_ENABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_ENABLE_16_23_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0_01_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_ENABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_ENABLE_16_23_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1_01_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_ENABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_ENABLE_16_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2_23_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_ENABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_ENABLE_16_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3_23_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_ENABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_ENABLE_16_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2_23_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_ENABLE_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_ENABLE_16_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3_23_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_ENABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_ENABLE_16_23_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_ENABLE_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_ENABLE_16_23_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_DFT_FORCE_OUTPUTS, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_DFT_PRBS7_GEN_EN, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_WRAPSEL, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_HW_VALUE, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_MRS_CMD_N0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_MRS_CMD_N1, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_MRS_CMD_N2, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4_MRS_CMD_N3, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0_01_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1_01_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0_01_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1_01_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2_23_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3_23_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2_23_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3_23_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_HS_PROBE_A, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_HS_PROBE_A_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_HS_PROBE_B, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_HS_PROBE_B_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_RD_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_WR, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4_WR_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0_01_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1_01_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0_01_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1_01_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2_23_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3_23_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2_23_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3_23_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_DIGITAL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_BUMP, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_TRIG_PERIOD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_CNTL_POL, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4_CNTL_SRC, 55);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0_01_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1_01_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0_01_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1_01_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2_23_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3_23_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2_23_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3_23_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_CHECKER_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_CHECKER_RESET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_SYNC, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_SYNC_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_ERROR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4_ERROR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_0_01_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_0_01_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_1_01_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_1_01_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_0_01_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_0_01_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_1_01_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_1_01_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_2_23_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_2_23_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_3_23_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_3_23_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_2_23_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_2_23_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_3_23_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_3_23_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_4_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_4_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_4_DQS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_4_DQS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1_01_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1_01_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1_01_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1_01_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3_23_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3_23_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3_23_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3_23_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4_ROT_CLK_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4_ROT_CLK_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4_ROT_CLK_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4_ROT_CLK_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1_01_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3_23_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N1, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N3, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4_N3_LEN, 3);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1_01_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3_23_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_DQSCLK_SELECT0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_DQSCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_RDCLK_SELECT0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_RDCLK_SELECT0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_DQSCLK_SELECT1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_DQSCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_RDCLK_SELECT1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_RDCLK_SELECT1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_DQSCLK_SELECT2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_DQSCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_RDCLK_SELECT2, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_RDCLK_SELECT2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_DQSCLK_SELECT3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_DQSCLK_SELECT3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_RDCLK_SELECT3, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4_RDCLK_SELECT3_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1_01_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1_01_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1_01_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1_01_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1_01_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1_01_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1_01_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1_01_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3_23_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3_23_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3_23_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3_23_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3_23_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3_23_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3_23_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3_23_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4_N0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4_N0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4_N1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4_N2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4_N2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4_N3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4_N3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_0_01_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_0_01_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_0_01_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_0_01_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_1_01_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_1_01_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_1_01_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_1_01_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_0_01_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_0_01_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_0_01_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_0_01_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_1_01_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_1_01_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_1_01_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_1_01_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_2_23_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_2_23_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_2_23_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_2_23_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_3_23_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_3_23_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_3_23_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_3_23_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_2_23_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_2_23_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_2_23_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_2_23_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_3_23_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_3_23_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_3_23_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_3_23_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_4_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_4_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_4_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_4_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_4_MIN_RD_EYE_SIZE, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_4_MIN_RD_EYE_SIZE_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_4_MAX_DQS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_4_MAX_DQS_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_0_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_0_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_0_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_0_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_1_01_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_1_01_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_1_01_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_1_01_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_2_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_2_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_2_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_2_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_3_23_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_3_23_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_3_23_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_3_23_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_4_ROT_N0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_4_ROT_N0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_4_ROT_N1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_4_ROT_N1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_01_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_01_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_01_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_01_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_01_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_0_01_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_01_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_01_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_01_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_01_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_01_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_1_01_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_01_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_01_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_01_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_01_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_01_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_0_01_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_01_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_01_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_01_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_01_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_01_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_1_01_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_23_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_23_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_23_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_23_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_23_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_2_23_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_23_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_23_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_23_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_23_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_23_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_3_23_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_23_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_23_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_23_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_23_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_23_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_2_23_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_23_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_23_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_23_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_23_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_23_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_3_23_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_4_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_INTERP_SIG_SLEW, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_INTERP_SIG_SLEW_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_POST_CURSOR, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_POST_CURSOR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_SLEW_CTL, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_4_SLEW_CTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_0_01_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_0_01_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_0_01_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_0_01_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_1_01_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_1_01_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_1_01_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_1_01_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_0_01_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_0_01_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_0_01_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_0_01_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_1_01_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_1_01_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_1_01_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_1_01_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_2_23_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_2_23_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_2_23_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_2_23_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_3_23_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_3_23_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_3_23_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_3_23_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_2_23_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_2_23_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_2_23_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_2_23_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_3_23_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_3_23_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_3_23_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_3_23_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_4_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_4_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_4_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_4_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_4_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_4_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_4_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_4_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_0_01_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_0_01_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_0_01_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_0_01_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_1_01_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_1_01_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_1_01_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_1_01_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_0_01_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_0_01_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_0_01_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_0_01_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_1_01_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_1_01_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_1_01_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_1_01_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_2_23_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_2_23_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_2_23_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_2_23_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_3_23_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_3_23_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_3_23_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_3_23_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_2_23_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_2_23_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_2_23_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_2_23_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_3_23_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_3_23_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_3_23_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_3_23_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_4_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_4_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_4_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_4_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_4_EN_N_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_4_EN_N_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_4_EN_N_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_4_EN_N_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_0_01_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_0_01_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_0_01_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_0_01_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_1_01_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_1_01_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_1_01_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_1_01_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_0_01_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_0_01_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_0_01_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_0_01_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_1_01_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_1_01_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_1_01_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_1_01_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_2_23_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_2_23_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_2_23_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_2_23_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_3_23_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_3_23_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_3_23_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_3_23_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_2_23_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_2_23_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_2_23_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_2_23_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_3_23_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_3_23_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_3_23_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_3_23_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_4_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_4_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_4_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_4_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_4_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_4_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_4_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_4_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_0_01_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_0_01_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_0_01_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_0_01_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_1_01_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_1_01_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_1_01_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_1_01_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_0_01_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_0_01_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_0_01_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_0_01_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_1_01_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_1_01_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_1_01_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_1_01_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_2_23_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_2_23_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_2_23_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_2_23_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_3_23_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_3_23_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_3_23_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_3_23_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_2_23_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_2_23_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_2_23_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_2_23_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_3_23_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_3_23_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_3_23_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_3_23_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_4_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_4_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_4_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_4_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_4_EN_P_WR, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_4_EN_P_WR_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_4_EN_P_WR_FFE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_4_EN_P_WR_FFE_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0_01_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1_01_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0_01_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1_01_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2_23_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3_23_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2_23_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3_23_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD00, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD00_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD01, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD01_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD02, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD02_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD03, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD03_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD04, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD04_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD05, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD05_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD06, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD06_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD07, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4_MEMINTD07_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0_01_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1_01_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0_01_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1_01_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2_23_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3_23_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2_23_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3_23_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD08, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD08_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD09, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD09_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD10, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD11, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD12, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD13, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD14, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD15, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4_MEMINTD15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0_01_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1_01_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0_01_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1_01_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2_23_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3_23_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2_23_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3_23_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD16_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD17, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD17_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD18_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD19, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD19_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD20, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD20_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD21, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD21_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD22, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD22_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD23, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4_MEMINTD23_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_TUNE_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_TUNE_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_TUNECP_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_TUNECP_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_TUNEF_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_TUNEF_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_TUNEVCO_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_TUNEVCO_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_PLLXTR_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0_01_PLLXTR_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_TUNE_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_TUNE_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_TUNECP_0_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_TUNECP_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_TUNEF_0_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_TUNEF_0_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_TUNEVCO_0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_TUNEVCO_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_PLLXTR_0, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1_01_PLLXTR_0_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_TUNE_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_TUNE_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_TUNECP_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_TUNECP_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_TUNEF_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_TUNEF_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_TUNEVCO_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_TUNEVCO_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_PLLXTR_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0_01_PLLXTR_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_TUNE_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_TUNE_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_TUNECP_0_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_TUNECP_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_TUNEF_0_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_TUNEF_0_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_TUNEVCO_0, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_TUNEVCO_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_PLLXTR_0, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1_01_PLLXTR_0_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_TUNE_0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_TUNE_0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_TUNECP_0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_TUNECP_0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_TUNEF_0_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_TUNEF_0_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_TUNEVCO_0_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_TUNEVCO_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_PLLXTR_0_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2_23_PLLXTR_0_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_TUNE_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_TUNE_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_TUNECP_0_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_TUNECP_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_TUNEF_0_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_TUNEF_0_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_TUNEVCO_0_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_TUNEVCO_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_PLLXTR_0_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3_23_PLLXTR_0_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_TUNE_0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_TUNE_0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_TUNECP_0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_TUNECP_0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_TUNEF_0_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_TUNEF_0_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_TUNEVCO_0_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_TUNEVCO_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_PLLXTR_0_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2_23_PLLXTR_0_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_TUNE_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_TUNE_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_TUNECP_0_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_TUNECP_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_TUNEF_0_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_TUNEF_0_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_TUNEVCO_0_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_TUNEVCO_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_PLLXTR_0_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3_23_PLLXTR_0_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_TUNE_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_TUNE_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_TUNECP_0_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_TUNECP_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_TUNEF_0_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_TUNEF_0_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_TUNEVCO_0_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_TUNEVCO_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_PLLXTR_0_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4_PLLXTR_0_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_TUNE_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_TUNE_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_TUNECP_0_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_TUNECP_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_TUNEF_0_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_TUNEF_0_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_TUNEVCO_0_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_TUNEVCO_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_PLLXTR_0_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4_PLLXTR_0_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_TUNETDIV_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_TUNETDIV_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_TUNEMDIV_1, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_TUNEMDIV_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_VREG_RANGE_1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_VREG_RANGE_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_VREG_VCCTUNE_1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_VREG_VCCTUNE_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0_01_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_TUNEMDIV_0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_TUNEMDIV_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_VREG_RANGE_0, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_VREG_RANGE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_VREG_VCCTUNE_0, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_VREG_VCCTUNE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1_01_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_TUNETDIV_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_TUNETDIV_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_TUNEMDIV_1, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_TUNEMDIV_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_VREG_RANGE_1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_VREG_RANGE_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_VREG_VCCTUNE_1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_VREG_VCCTUNE_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0_01_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_TUNEMDIV_0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_TUNEMDIV_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_VREG_RANGE_0, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_VREG_RANGE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_VREG_VCCTUNE_0, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_VREG_VCCTUNE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1_01_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_TUNETDIV_0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_TUNETDIV_0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_TUNEMDIV_0_1, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_TUNEMDIV_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_VREG_RANGE_0_1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_VREG_RANGE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_VREG_VCCTUNE_0_1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_VREG_VCCTUNE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2_23_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_TUNEMDIV_0_1, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_TUNEMDIV_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_VREG_RANGE_0_1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_VREG_RANGE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_VREG_VCCTUNE_0_1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_VREG_VCCTUNE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3_23_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_TUNETDIV_0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_TUNETDIV_0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_TUNEMDIV_0_1, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_TUNEMDIV_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_VREG_RANGE_0_1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_VREG_RANGE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_VREG_VCCTUNE_0_1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_VREG_VCCTUNE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2_23_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_TUNEMDIV_0_1, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_TUNEMDIV_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_VREG_RANGE_0_1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_VREG_RANGE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_VREG_VCCTUNE_0_1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_VREG_VCCTUNE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3_23_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_TUNEMDIV_0_1, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_TUNEMDIV_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_VREG_RANGE_0_1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_VREG_RANGE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_VREG_VCCTUNE_0_1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_VREG_VCCTUNE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_TUNEMDIV_0_1, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_TUNEMDIV_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_VREG_RANGE_0_1, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_VREG_RANGE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_CE0DLTVCCA, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_VREG_VCCTUNE_0_1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_VREG_VCCTUNE_0_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_CE0DLTVCC1, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_CE0DLTVCC2, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_S0INSDLYTAP, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4_S1INSDLYTAP, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0_01_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1_01_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0_01_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1_01_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2_23_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3_23_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2_23_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3_23_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_NO_EYE_DETECTED_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_LEADING_EDGE_FOUND_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_TRAILING_EDGE_FOUND_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_INCOMPLETE_CAL_N0_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_INCOMPLETE_CAL_N1_MASK, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_INCOMPLETE_CAL_N2_MASK, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_INCOMPLETE_CAL_N3_MASK, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_COARSE_PATTERN_ERR_N0_MASK, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_COARSE_PATTERN_ERR_N1_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_COARSE_PATTERN_ERR_N2_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_COARSE_PATTERN_ERR_N3_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_EYE_CLIPPING_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_NO_DQS_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_NO_LOCK_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_DRIFT_ERROR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4_MIN_EYE_MASK, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_0_01_LEADING_EDGE_NOT_FOUND_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_0_01_LEADING_EDGE_NOT_FOUND_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_1_01_LEADING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_1_01_LEADING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_0_01_LEADING_EDGE_NOT_FOUND_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_0_01_LEADING_EDGE_NOT_FOUND_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_1_01_LEADING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_1_01_LEADING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_2_23_LEADING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_2_23_LEADING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_3_23_LEADING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_3_23_LEADING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_2_23_LEADING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_2_23_LEADING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_3_23_LEADING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_3_23_LEADING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_4_LEADING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_4_LEADING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_4_LEADING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_4_LEADING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_0_01_LEADING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_0_01_LEADING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_1_01_LEADING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_1_01_LEADING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_0_01_LEADING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_0_01_LEADING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_1_01_LEADING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_1_01_LEADING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_2_23_LEADING_EDGE_NOT_FOUND_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_2_23_LEADING_EDGE_NOT_FOUND_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_3_23_LEADING_EDGE_NOT_FOUND_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_3_23_LEADING_EDGE_NOT_FOUND_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_2_23_LEADING_EDGE_NOT_FOUND_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_2_23_LEADING_EDGE_NOT_FOUND_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_3_23_LEADING_EDGE_NOT_FOUND_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_3_23_LEADING_EDGE_NOT_FOUND_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_4_LEADING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_4_LEADING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_4_LEADING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_4_LEADING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_0_01_TRAILING_EDGE_NOT_FOUND_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_0_01_TRAILING_EDGE_NOT_FOUND_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_1_01_TRAILING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_1_01_TRAILING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_0_01_TRAILING_EDGE_NOT_FOUND_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_0_01_TRAILING_EDGE_NOT_FOUND_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_1_01_TRAILING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_1_01_TRAILING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_2_23_TRAILING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_2_23_TRAILING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_3_23_TRAILING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_3_23_TRAILING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_2_23_TRAILING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_2_23_TRAILING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_3_23_TRAILING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_3_23_TRAILING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_4_TRAILING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_4_TRAILING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_4_TRAILING_EDGE_NOT_FOUND_0_15, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_4_TRAILING_EDGE_NOT_FOUND_0_15_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_0_01_TRAILING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_0_01_TRAILING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_1_01_TRAILING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_1_01_TRAILING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_0_01_TRAILING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_0_01_TRAILING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_1_01_TRAILING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_1_01_TRAILING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_2_23_TRAILING_EDGE_NOT_FOUND_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_2_23_TRAILING_EDGE_NOT_FOUND_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_3_23_TRAILING_EDGE_NOT_FOUND_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_3_23_TRAILING_EDGE_NOT_FOUND_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_2_23_TRAILING_EDGE_NOT_FOUND_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_2_23_TRAILING_EDGE_NOT_FOUND_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_3_23_TRAILING_EDGE_NOT_FOUND_16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_3_23_TRAILING_EDGE_NOT_FOUND_16_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_4_TRAILING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_4_TRAILING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_4_TRAILING_EDGE_NOT_FOUND_16_23, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_4_TRAILING_EDGE_NOT_FOUND_16_23_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0_01_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1_01_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0_01_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1_01_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2_23_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3_23_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2_23_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3_23_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_NO_EYE_DETECTED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_LEADING_EDGE_NOT_FOUND, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_TRAILING_EDGE_NOT_FOUND, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_INCOMPLETE_CAL_N0, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_INCOMPLETE_CAL_N1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_INCOMPLETE_CAL_N2, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_INCOMPLETE_CAL_N3, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_COARSE_PATTERN_ERR_N0, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_COARSE_PATTERN_ERR_N1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_COARSE_PATTERN_ERR_N2, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_COARSE_PATTERN_ERR_N3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_EYE_CLIPPING, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_NO_DQS, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_NO_LOCK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_DRIFT_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4_MIN_EYE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1_01_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3_23_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4_CLK22_SINGLE_ENDED, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_0_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_0_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_1_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_1_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_0_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_0_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_1_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_1_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_2_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_2_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_3_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_3_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_2_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_2_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_3_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_3_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_4_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_4_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_4_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_4_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_0_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_0_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_1_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_1_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_0_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_0_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_1_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_1_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_2_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_2_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_3_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_3_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_2_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_2_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_3_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_3_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_4_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_4_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_4_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_4_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_0_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_0_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_1_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_1_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_0_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_0_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_1_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_1_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_2_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_2_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_3_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_3_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_2_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_2_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_3_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_3_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_4_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_4_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_4_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_4_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_0_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_0_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_1_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_1_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_0_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_0_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_1_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_1_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_2_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_2_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_3_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_3_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_2_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_2_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_3_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_3_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_4_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_4_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_4_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_4_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_0_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_0_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_1_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_1_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_0_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_0_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_1_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_1_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_2_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_2_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_3_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_3_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_2_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_2_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_3_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_3_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_4_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_4_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_4_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_4_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_0_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_0_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_1_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_1_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_0_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_0_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_1_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_1_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_2_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_2_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_3_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_3_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_2_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_2_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_3_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_3_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_4_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_4_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_4_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_4_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_0_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_0_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_1_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_1_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_0_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_0_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_0_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_0_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_1_01_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_1_01_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_1_01_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_1_01_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_2_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_2_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_3_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_3_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_2_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_2_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_2_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_2_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_3_23_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_3_23_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_3_23_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_3_23_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_4_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_4_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_4_RD, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_4_RD_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_4_RD_DELAY7, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_4_RD_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_0_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_0_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_0_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_0_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_1_01_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_1_01_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_1_01_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_1_01_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_2_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_2_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_2_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_2_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_3_23_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_3_23_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_3_23_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_3_23_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_4_RD_DELAY0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_4_RD_DELAY0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_4_RD_DELAY1, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_4_RD_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_0_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_0_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_0_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_0_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_1_01_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_1_01_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_1_01_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_1_01_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_2_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_2_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_2_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_2_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_3_23_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_3_23_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_3_23_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_3_23_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_4_RD_DELAY2, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_4_RD_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_4_RD_DELAY3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_4_RD_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_0_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_0_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_0_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_0_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_1_01_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_1_01_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_1_01_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_1_01_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_2_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_2_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_2_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_2_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_3_23_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_3_23_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_3_23_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_3_23_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_4_RD_DELAY4, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_4_RD_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_4_RD_DELAY5, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_4_RD_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_0_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_0_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_1_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_1_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_0_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_0_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_0_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_0_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_1_01_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_1_01_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_1_01_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_1_01_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_2_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_2_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_3_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_3_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_2_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_2_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_2_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_2_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_3_23_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_3_23_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_3_23_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_3_23_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_4_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_4_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_4_RD_DELAY6, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_4_RD_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_4_RD, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_4_RD_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_0_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_0_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_0_01_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_0_01_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_1_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_1_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_1_01_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_1_01_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_0_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_0_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_0_01_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_0_01_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_1_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_1_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_1_01_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_1_01_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_2_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_2_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_2_23_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_2_23_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_3_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_3_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_3_23_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_3_23_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_2_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_2_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_2_23_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_2_23_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_3_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_3_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_3_23_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_3_23_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_4_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_4_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_4_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_4_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_4_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_4_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_4_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_4_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_0_01_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_0_01_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_0_01_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_0_01_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_1_01_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_1_01_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_1_01_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_1_01_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_0_01_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_0_01_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_0_01_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_0_01_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_1_01_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_1_01_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_1_01_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_1_01_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_2_23_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_2_23_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_2_23_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_2_23_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_3_23_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_3_23_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_3_23_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_3_23_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_2_23_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_2_23_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_2_23_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_2_23_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_3_23_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_3_23_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_3_23_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_3_23_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_4_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_4_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_4_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_4_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_4_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_4_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_4_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_4_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_0_01_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_0_01_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_0_01_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_0_01_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_1_01_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_1_01_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_1_01_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_1_01_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_0_01_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_0_01_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_0_01_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_0_01_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_1_01_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_1_01_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_1_01_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_1_01_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_2_23_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_2_23_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_2_23_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_2_23_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_3_23_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_3_23_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_3_23_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_3_23_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_2_23_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_2_23_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_2_23_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_2_23_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_3_23_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_3_23_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_3_23_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_3_23_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_4_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_4_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_4_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_4_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_4_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_4_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_4_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_4_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_0_01_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_0_01_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_0_01_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_0_01_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_1_01_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_1_01_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_1_01_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_1_01_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_0_01_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_0_01_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_0_01_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_0_01_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_1_01_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_1_01_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_1_01_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_1_01_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_2_23_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_2_23_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_2_23_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_2_23_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_3_23_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_3_23_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_3_23_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_3_23_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_2_23_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_2_23_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_2_23_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_2_23_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_3_23_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_3_23_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_3_23_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_3_23_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_4_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_4_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_4_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_4_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_4_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_4_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_4_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_4_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_0_01_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_0_01_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_0_01, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_0_01_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_1_01_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_1_01_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_1_01, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_1_01_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_0_01_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_0_01_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_0_01, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_0_01_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_1_01_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_1_01_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_1_01, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_1_01_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_2_23_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_2_23_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_2_23, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_2_23_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_3_23_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_3_23_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_3_23, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_3_23_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_2_23_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_2_23_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_2_23, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_2_23_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_3_23_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_3_23_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_3_23, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_3_23_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_4_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_4_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_4_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_4_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_4_OFFSET0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_4_OFFSET0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_4_OFFSET1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_4_OFFSET1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_0_01_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_0_01_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_0_01_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_0_01_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_1_01_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_1_01_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_1_01_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_1_01_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_0_01_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_0_01_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_0_01_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_0_01_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_1_01_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_1_01_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_1_01_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_1_01_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_2_23_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_2_23_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_2_23_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_2_23_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_3_23_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_3_23_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_3_23_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_3_23_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_2_23_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_2_23_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_2_23_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_2_23_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_3_23_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_3_23_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_3_23_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_3_23_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_4_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_4_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_4_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_4_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_4_OFFSET2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_4_OFFSET2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_4_OFFSET3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_4_OFFSET3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_0_01_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_0_01_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_0_01_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_0_01_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_1_01_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_1_01_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_1_01_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_1_01_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_0_01_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_0_01_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_0_01_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_0_01_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_1_01_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_1_01_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_1_01_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_1_01_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_2_23_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_2_23_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_2_23_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_2_23_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_3_23_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_3_23_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_3_23_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_3_23_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_2_23_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_2_23_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_2_23_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_2_23_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_3_23_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_3_23_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_3_23_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_3_23_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_4_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_4_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_4_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_4_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_4_OFFSET4, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_4_OFFSET4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_4_OFFSET5, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_4_OFFSET5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_0_01_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_0_01_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_0_01_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_0_01_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_1_01_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_1_01_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_1_01_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_1_01_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_0_01_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_0_01_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_0_01_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_0_01_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_1_01_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_1_01_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_1_01_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_1_01_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_2_23_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_2_23_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_2_23_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_2_23_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_3_23_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_3_23_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_3_23_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_3_23_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_2_23_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_2_23_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_2_23_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_2_23_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_3_23_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_3_23_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_3_23_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_3_23_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_4_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_4_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_4_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_4_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_4_OFFSET6, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_4_OFFSET6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_4_OFFSET7, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_4_OFFSET7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_0_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_0_01_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_1_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_1_01_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_0_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_0_01_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_1_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_1_01_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_2_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_2_23_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_3_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_3_23_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_2_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_2_23_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_3_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_3_23_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_4_REFERENCE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_4_REFERENCE_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_4_REFERENCE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_4_REFERENCE_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_0_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_0_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_1_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_1_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_0_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_0_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_1_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_1_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_2_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_2_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_3_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_3_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_2_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_2_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_3_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_3_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_4_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_4_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_4_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_4_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_0_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_1_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_0_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_1_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_2_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_3_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_2_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_3_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_4_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_4_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_0_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_0_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_1_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_1_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_0_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_0_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_1_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_1_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_2_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_2_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_3_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_3_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_2_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_2_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_3_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_3_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_4_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_4_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_4_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_4_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_0_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_1_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_0_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_1_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_2_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_3_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_2_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_3_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_4_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_4_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_0_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_0_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_1_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_1_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_0_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_0_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_1_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_1_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_2_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_2_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_3_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_3_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_2_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_2_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_3_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_3_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_4_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_4_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_4_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_4_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_0_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_1_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_0_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_1_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_2_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_3_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_2_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_3_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_4_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_4_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_0_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_0_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_1_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_1_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_0_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_0_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_1_01_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_1_01_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_2_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_2_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_3_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_3_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_2_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_2_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_3_23_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_3_23_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_4_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_4_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_4_RD, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_4_RD_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_0_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_1_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_0_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_0_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_1_01_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_1_01_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_2_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_3_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_2_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_2_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_3_23_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_3_23_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_4_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_4_RD, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_4_RD_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_0_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_0_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_0_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_0_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_1_01_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_1_01_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_1_01_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_1_01_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_2_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_2_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_2_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_2_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_3_23_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_3_23_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_3_23_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_3_23_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_4_RD_SIZE0, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_4_RD_SIZE0_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_4_RD_SIZE1, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_4_RD_SIZE1_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_0_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_0_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_0_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_0_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_1_01_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_1_01_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_1_01_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_1_01_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_2_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_2_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_2_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_2_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_3_23_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_3_23_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_3_23_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_3_23_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_4_RD_SIZE2, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_4_RD_SIZE2_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_4_RD_SIZE3, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_4_RD_SIZE3_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_0_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_0_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_0_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_0_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_1_01_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_1_01_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_1_01_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_1_01_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_2_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_2_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_2_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_2_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_3_23_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_3_23_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_3_23_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_3_23_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_4_RD_SIZE4, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_4_RD_SIZE4_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_4_RD_SIZE5, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_4_RD_SIZE5_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_0_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_0_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_0_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_0_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_1_01_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_1_01_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_1_01_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_1_01_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_2_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_2_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_2_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_2_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_3_23_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_3_23_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_3_23_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_3_23_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_4_RD_SIZE6, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_4_RD_SIZE6_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_4_RD_SIZE7, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_4_RD_SIZE7_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_0_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_0_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_0_01_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_0_01_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_1_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_1_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_1_01_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_1_01_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_0_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_0_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_0_01_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_0_01_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_1_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_1_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_1_01_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_1_01_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_2_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_2_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_2_23_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_2_23_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_3_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_3_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_3_23_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_3_23_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_2_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_2_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_2_23_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_2_23_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_3_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_3_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_3_23_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_3_23_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_4_REFERENCE0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_4_REFERENCE0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_4_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_4_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_4_REFERENCE0, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_4_REFERENCE0_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_4_REFERENCE1, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_4_REFERENCE1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_0_01_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_0_01_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_0_01_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_0_01_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_1_01_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_1_01_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_1_01_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_1_01_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_0_01_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_0_01_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_0_01_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_0_01_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_1_01_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_1_01_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_1_01_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_1_01_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_2_23_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_2_23_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_2_23_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_2_23_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_3_23_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_3_23_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_3_23_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_3_23_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_2_23_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_2_23_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_2_23_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_2_23_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_3_23_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_3_23_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_3_23_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_3_23_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_4_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_4_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_4_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_4_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_4_REFERENCE2, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_4_REFERENCE2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_4_REFERENCE3, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_4_REFERENCE3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_SXMCVREF_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_SXMCVREF_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0_01_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_SXMCVREF_0_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_SXMCVREF_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1_01_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_SXMCVREF_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_SXMCVREF_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0_01_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_SXMCVREF_0_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_SXMCVREF_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1_01_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_SXMCVREF_0_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_SXMCVREF_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2_23_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_SXMCVREF_0, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_SXMCVREF_0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3_23_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_SXMCVREF_0_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_SXMCVREF_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2_23_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_SXMCVREF_0, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_SXMCVREF_0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3_23_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_SXMCVREF_0_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_SXMCVREF_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_CTL_SIDE0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_CTL_SIDE0_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_CTL_SIDE1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_CTL_SIDE1_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_SXMCVREF_0_3, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_SXMCVREF_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_SXPODVREF, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_DISABLE_TERMINATION, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_READ_CENTERING_MODE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4_READ_CENTERING_MODE_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_0_01_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_0_01_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_0_01_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_1_01_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_1_01_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_1_01_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_0_01_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_0_01_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_0_01_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_1_01_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_1_01_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_1_01_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_2_23_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_2_23_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_2_23_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_3_23_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_3_23_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_3_23_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_2_23_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_2_23_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_2_23_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_3_23_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_3_23_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_3_23_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_4_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_4_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_4_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_4_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_4_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_4_BB_LOCK, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0_01_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0_01_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0_01_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0_01_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0_01_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0_01_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0_01_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0_01_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0_01_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1_01_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1_01_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1_01_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1_01_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1_01_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1_01_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1_01_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1_01_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1_01_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0_01_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0_01_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0_01_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0_01_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0_01_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0_01_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0_01_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0_01_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0_01_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1_01_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1_01_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1_01_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1_01_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1_01_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1_01_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1_01_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1_01_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1_01_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2_23_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2_23_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2_23_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2_23_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2_23_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2_23_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2_23_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2_23_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2_23_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3_23_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3_23_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3_23_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3_23_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3_23_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3_23_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3_23_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3_23_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3_23_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2_23_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2_23_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2_23_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2_23_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2_23_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2_23_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2_23_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2_23_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2_23_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3_23_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3_23_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3_23_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3_23_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3_23_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3_23_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3_23_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3_23_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3_23_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4_PHASE_CNTL_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4_CONTINUOUS_UPDATE, 61);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1_01_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3_23_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD0_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD1_CLK16, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD2_CLK16, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD3_CLK16, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD0_CLK18, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD1_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD2_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD3_CLK20, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD2_CLK22, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD3_CLK22, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_CLK16_SINGLE_ENDED, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_CLK18_SINGLE_ENDED, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_CLK20_SINGLE_ENDED, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_CLK22_SINGLE_ENDED, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD2_CLK18, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4_QUAD3_CLK18, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_0_01_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_0_01_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_1_01_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_1_01_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_0_01_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_0_01_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_1_01_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_1_01_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_2_23_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_2_23_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_3_23_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_3_23_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_2_23_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_2_23_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_3_23_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_3_23_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_4_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_4_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_4_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_4_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_01_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_01_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_01_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_01_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_01_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_01_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_01_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_01_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_01_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_01_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_01_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_01_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_01_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_01_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_01_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_01_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_01_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_01_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_01_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_01_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_01_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_01_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_01_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_01_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_01_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_01_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_01_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_01_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_01_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_01_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_01_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_01_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_23_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_23_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_23_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_23_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_23_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_23_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_23_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_23_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_23_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_23_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_23_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_23_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_23_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_23_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_23_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_23_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_23_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_23_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_23_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_23_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_23_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_23_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_23_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_23_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_23_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_23_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_23_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_23_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_23_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_23_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_23_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_23_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_BIT_CENTERED, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_BIT_CENTERED_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_SMALL_STEP_LEFT, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_BIG_STEP_RIGHT, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_MATCH_STEP_RIGHT, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_JUMP_BACK_RIGHT, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_SMALL_STEP_RIGHT, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_DONE, 58);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_0_01_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_0_01_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_1_01_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_1_01_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_0_01_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_0_01_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_1_01_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_1_01_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_2_23_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_2_23_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_3_23_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_3_23_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_2_23_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_2_23_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_3_23_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_3_23_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_4_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_4_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_4_FW_LEFT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_4_FW_LEFT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_0_01_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_0_01_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_1_01_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_1_01_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_0_01_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_0_01_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_1_01_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_1_01_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_2_23_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_2_23_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_3_23_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_3_23_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_2_23_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_2_23_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_3_23_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_3_23_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_4_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_4_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_4_FW_RIGHT_SIDE, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_4_FW_RIGHT_SIDE_LEN, 11);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0_01_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1_01_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0_01_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1_01_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2_23_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3_23_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2_23_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3_23_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_WL_ERR_CLK16, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_WL_ERR_CLK18, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_WL_ERR_CLK20, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_WL_ERR_CLK22, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_VALID_NS_BIG_L, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_INVALID_NS_SMALL_L, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_VALID_NS_BIG_R, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_INVALID_NS_BIG_R, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_VALID_NS_JUMP_BACK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_INVALID_NS_SMALL_R, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4_OFFSET_ERR, 62);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0_01_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1_01_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0_01_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1_01_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2_23_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3_23_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2_23_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3_23_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_WL_ERR_CLK16_MASK, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_WL_ERR_CLK18_MASK, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_WL_ERR_CLK20_MASK, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_ERR_CLK22_MASK, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_VALID_NS_BIG_L_MASK, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_INVALID_NS_SMALL_L_MASK, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_VALID_NS_BIG_R_MASK, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_INVALID_NS_BIG_R_MASK, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_VALID_NS_JUMP_BACK_MASK, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_INVALID_NS_SMALL_R_MASK, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_OFFSET_ERR_MASK, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4_ADVANCE_PR_VALUE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0_01_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0_01_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0_01_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0_01_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0_01_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0_01_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0_01_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0_01_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0_01_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1_01_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1_01_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1_01_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1_01_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1_01_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1_01_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1_01_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1_01_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1_01_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0_01_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0_01_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0_01_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0_01_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0_01_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0_01_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0_01_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0_01_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0_01_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1_01_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1_01_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1_01_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1_01_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1_01_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1_01_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1_01_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1_01_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1_01_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2_23_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2_23_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2_23_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2_23_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2_23_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2_23_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2_23_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2_23_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2_23_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3_23_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3_23_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3_23_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3_23_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3_23_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3_23_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3_23_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3_23_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3_23_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2_23_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2_23_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2_23_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2_23_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2_23_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2_23_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2_23_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2_23_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2_23_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3_23_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3_23_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3_23_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3_23_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3_23_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3_23_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3_23_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3_23_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3_23_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4_CLK_LEVEL, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4_CLK_LEVEL_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4_FINE_STEPPING, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4_DONE, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4_WL_ERR_CLK16, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4_WL_ERR_CLK18, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4_WL_ERR_CLK20, 54);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4_WL_ERR_CLK22, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4_ZERO_DETECTED, 56);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_0_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_0_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_1_01_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_1_01_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_2_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_2_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_3_23_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_3_23_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_4_DELAYG, 48);
CEN_FLD (CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_4_DELAYG_LEN, 10);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_QUAD0, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_QUAD0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_QUAD1, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_QUAD1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_QUAD2, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_QUAD2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_QUAD3, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4_QUAD3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_0_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_0_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_0_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_0_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_1_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_1_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_1_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_1_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_0_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_0_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_0_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_0_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_1_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_1_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_1_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_1_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_2_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_2_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_2_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_2_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_3_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_3_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_3_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_3_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_2_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_2_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_2_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_2_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_3_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_3_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_3_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_3_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_4_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_4_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_4_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_4_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_4_DESIRED_EDGE_CNTR_TARGET_HIGH, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_4_DESIRED_EDGE_CNTR_TARGET_HIGH_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_4_DESIRED_EDGE_CNTR_TARGET_LOW, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_4_DESIRED_EDGE_CNTR_TARGET_LOW_LEN, 8);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_0_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_1_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_0_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_1_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_2_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_3_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_2_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_3_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_4_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_4_DQS_ALIGN_FIX_DIS, 48);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_DYN_POWER_CNTL_EN, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_DYN_MCTERM_CNTL_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_DYN_RX_GATE_CNTL_EN, 50);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_CALGATE_ON, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_PER_CAL_UPDATE_DISABLE, 52);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_DQS_PIPE_FIX_DIS, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_DQS_PIPE_FIX_DIS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_DD2_DQS_FIX_DIS, 55);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_DL_FORCE_ON, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_BLFIFO_DIS, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_WTRFL_AVE_DIS, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_PERCAL_PWR_DIS, 59);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_LOOPBACK_FIX_EN, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_LOOPBACK_DLY12, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_DD2_WTRFL_SYNC_DIS, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4_FORCE_FIFO_CAPTURE, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_0_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_0_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_0_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_0_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_1_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_1_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_1_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_1_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_0_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_0_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_0_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_0_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_1_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_1_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_1_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_1_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_2_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_2_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_2_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_2_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_3_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_3_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_3_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_3_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_2_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_2_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_2_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_2_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_3_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_3_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_3_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_3_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_4_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_4_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_4_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_4_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_4_SYSCLK_DQSCLK_OFFSET, 49);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_4_SYSCLK_DQSCLK_OFFSET_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_4_SYSCLK_RDCLK_OFFSET, 57);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_4_SYSCLK_RDCLK_OFFSET_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_0_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_0_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_0_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_0_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_0_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_0_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_1_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_1_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_1_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_1_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_1_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_1_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_0_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_0_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_0_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_0_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_0_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_0_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_1_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_1_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_1_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_1_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_1_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_1_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_2_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_2_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_2_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_2_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_2_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_2_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_3_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_3_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_3_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_3_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_3_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_3_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_2_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_2_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_2_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_2_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_2_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_2_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_3_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_3_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_3_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_3_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_3_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_3_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_4_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_4_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_4_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_4_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_4_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_4_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_4_DQS_ALIGN_SM, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_4_DQS_ALIGN_SM_LEN, 5);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_4_DQS_ALIGN_CNTR, 53);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_4_DQS_ALIGN_CNTR_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_4_DQS_ALIGN_ITR_CNTR, 58);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_4_DQS_ALIGN_ITR_CNTR_LEN, 6);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_CALIBRATE_BIT, 48);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_CALIBRATE_BIT_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_DQS_ALIGN_QUAD, 51);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_DQS_ALIGN_QUAD_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_OPERATE_MODE, 56);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_OPERATE_MODE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_EN_DQS_OFFSET, 60);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_DQS_ALIGN_JITTER, 61);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_DIS_CLK_GATE, 62);
CEN_FLD (CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_MAX_DQS_ITER, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR0_01_0_11, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR0_01_0_11_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR0_01_12_15, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR0_01_12_15_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR1_01_0_11, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR1_01_0_11_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR1_01_12_15, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR1_01_12_15_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR0_01_0_11, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR0_01_0_11_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR0_01_12_15, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR0_01_12_15_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR1_01_0_11, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR1_01_0_11_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR1_01_12_15, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR1_01_12_15_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR2_23_0_11, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR2_23_0_11_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR2_23_12_15, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR2_23_12_15_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR3_23_0_11, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR3_23_0_11_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR3_23_12_15, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR3_23_12_15_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR2_23_0_11, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR2_23_0_11_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR2_23_12_15, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR2_23_12_15_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR3_23_0_11, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR3_23_0_11_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR3_23_12_15, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR3_23_12_15_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR0_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR0_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR0_01_DELAY1, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR0_01_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR1_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR1_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR1_01_DELAY1, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR1_01_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR0_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR0_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR0_01_DELAY1, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR0_01_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR1_01, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR1_01_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR1_01_DELAY1, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR1_01_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR2_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR2_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR2_23_DELAY1, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR2_23_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR3_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR3_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR3_23_DELAY1, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR3_23_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR2_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR2_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR2_23_DELAY1, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR2_23_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR3_23, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR3_23_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR3_23_DELAY1, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR3_23_DELAY1_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR0_01_DELAY2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR0_01_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR0_01_DELAY3, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR0_01_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR1_01_DELAY2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR1_01_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR1_01_DELAY3, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR1_01_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR0_01_DELAY2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR0_01_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR0_01_DELAY3, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR0_01_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR1_01_DELAY2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR1_01_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR1_01_DELAY3, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR1_01_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR2_23_DELAY2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR2_23_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR2_23_DELAY3, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR2_23_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR3_23_DELAY2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR3_23_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR3_23_DELAY3, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR3_23_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR2_23_DELAY2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR2_23_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR2_23_DELAY3, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR2_23_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR3_23_DELAY2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR3_23_DELAY2_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR3_23_DELAY3, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR3_23_DELAY3_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR0_01_DELAY4, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR0_01_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR0_01_DELAY5, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR0_01_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR1_01_DELAY4, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR1_01_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR1_01_DELAY5, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR1_01_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR0_01_DELAY4, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR0_01_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR0_01_DELAY5, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR0_01_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR1_01_DELAY4, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR1_01_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR1_01_DELAY5, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR1_01_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR2_23_DELAY4, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR2_23_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR2_23_DELAY5, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR2_23_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR3_23_DELAY4, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR3_23_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR3_23_DELAY5, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR3_23_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR2_23_DELAY4, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR2_23_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR2_23_DELAY5, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR2_23_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR3_23_DELAY4, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR3_23_DELAY4_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR3_23_DELAY5, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR3_23_DELAY5_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR0_01_DELAY6, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR0_01_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR0_01_DELAY7, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR0_01_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR1_01_DELAY6, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR1_01_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR1_01_DELAY7, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR1_01_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR0_01_DELAY6, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR0_01_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR0_01_DELAY7, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR0_01_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR1_01_DELAY6, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR1_01_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR1_01_DELAY7, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR1_01_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR2_23_DELAY6, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR2_23_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR2_23_DELAY7, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR2_23_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR3_23_DELAY6, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR3_23_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR3_23_DELAY7, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR3_23_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR2_23_DELAY6, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR2_23_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR2_23_DELAY7, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR2_23_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR3_23_DELAY6, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR3_23_DELAY6_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR3_23_DELAY7, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR3_23_DELAY7_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR0_01_DELAY8, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR0_01_DELAY8_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR0_01_DELAY9, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR0_01_DELAY9_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR1_01_DELAY8, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR1_01_DELAY8_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR1_01_DELAY9, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR1_01_DELAY9_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR0_01_DELAY8, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR0_01_DELAY8_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR0_01_DELAY9, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR0_01_DELAY9_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR1_01_DELAY8, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR1_01_DELAY8_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR1_01_DELAY9, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR1_01_DELAY9_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR2_23_DELAY8, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR2_23_DELAY8_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR2_23_DELAY9, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR2_23_DELAY9_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR3_23_DELAY8, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR3_23_DELAY8_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR3_23_DELAY9, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR3_23_DELAY9_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR2_23_DELAY8, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR2_23_DELAY8_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR2_23_DELAY9, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR2_23_DELAY9_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR3_23_DELAY8, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR3_23_DELAY8_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR3_23_DELAY9, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR3_23_DELAY9_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR0_01_DELAY10, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR0_01_DELAY10_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR0_01_DELAY11, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR0_01_DELAY11_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR1_01_DELAY10, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR1_01_DELAY10_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR1_01_DELAY11, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR1_01_DELAY11_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR0_01_DELAY10, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR0_01_DELAY10_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR0_01_DELAY11, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR0_01_DELAY11_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR1_01_DELAY10, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR1_01_DELAY10_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR1_01_DELAY11, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR1_01_DELAY11_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR2_23_DELAY10, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR2_23_DELAY10_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR2_23_DELAY11, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR2_23_DELAY11_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR3_23_DELAY10, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR3_23_DELAY10_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR3_23_DELAY11, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR3_23_DELAY11_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR2_23_DELAY10, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR2_23_DELAY10_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR2_23_DELAY11, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR2_23_DELAY11_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR3_23_DELAY10, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR3_23_DELAY10_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR3_23_DELAY11, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR3_23_DELAY11_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR0_01_DELAY12, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR0_01_DELAY12_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR0_01_DELAY13, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR0_01_DELAY13_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR1_01_DELAY12, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR1_01_DELAY12_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR1_01_DELAY13, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR1_01_DELAY13_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR0_01_DELAY12, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR0_01_DELAY12_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR0_01_DELAY13, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR0_01_DELAY13_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR1_01_DELAY12, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR1_01_DELAY12_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR1_01_DELAY13, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR1_01_DELAY13_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR2_23_DELAY12, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR2_23_DELAY12_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR2_23_DELAY13, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR2_23_DELAY13_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR3_23_DELAY12, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR3_23_DELAY12_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR3_23_DELAY13, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR3_23_DELAY13_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR2_23_DELAY12, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR2_23_DELAY12_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR2_23_DELAY13, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR2_23_DELAY13_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR3_23_DELAY12, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR3_23_DELAY12_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR3_23_DELAY13, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR3_23_DELAY13_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR0_01_DELAY14, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR0_01_DELAY14_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR0_01_DELAY15, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR0_01_DELAY15_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR1_01_DELAY14, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR1_01_DELAY14_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR1_01_DELAY15, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR1_01_DELAY15_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR0_01_DELAY14, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR0_01_DELAY14_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR0_01_DELAY15, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR0_01_DELAY15_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR1_01_DELAY14, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR1_01_DELAY14_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR1_01_DELAY15, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR1_01_DELAY15_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR2_23_DELAY14, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR2_23_DELAY14_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR2_23_DELAY15, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR2_23_DELAY15_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR3_23_DELAY14, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR3_23_DELAY14_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR3_23_DELAY15, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR3_23_DELAY15_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR2_23_DELAY14, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR2_23_DELAY14_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR2_23_DELAY15, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR2_23_DELAY15_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR3_23_DELAY14, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR3_23_DELAY14_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR3_23_DELAY15, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR3_23_DELAY15_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_LANE_PAIR_FAIL, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_LANE_PAIR_FAIL_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_DATA_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_MODE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_MODE_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_4TO1_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_RESET, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_GEN_EN, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_CLEAR_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_01_TEST_CHECK_EN, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_LANE_PAIR_FAIL, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_LANE_PAIR_FAIL_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_DATA_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_MODE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_MODE_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_4TO1_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_RESET, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_GEN_EN, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_CLEAR_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_01_TEST_CHECK_EN, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_LANE_PAIR_FAIL, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_LANE_PAIR_FAIL_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_DATA_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_MODE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_MODE_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_4TO1_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_RESET, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_GEN_EN, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_CLEAR_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_01_TEST_CHECK_EN, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_LANE_PAIR_FAIL, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_LANE_PAIR_FAIL_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_DATA_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_MODE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_MODE_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_4TO1_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_RESET, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_GEN_EN, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_CLEAR_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_01_TEST_CHECK_EN, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_LANE_PAIR_FAIL, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_LANE_PAIR_FAIL_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_DATA_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_MODE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_MODE_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_4TO1_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_RESET, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_GEN_EN, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_CLEAR_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_23_TEST_CHECK_EN, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_LANE_PAIR_FAIL, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_LANE_PAIR_FAIL_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_DATA_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_MODE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_MODE_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_4TO1_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_RESET, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_GEN_EN, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_CLEAR_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_23_TEST_CHECK_EN, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_LANE_PAIR_FAIL, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_LANE_PAIR_FAIL_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_DATA_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_MODE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_MODE_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_4TO1_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_RESET, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_GEN_EN, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_CLEAR_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_23_TEST_CHECK_EN, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_LANE_PAIR_FAIL, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_LANE_PAIR_FAIL_LEN, 8);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_DATA_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_MODE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_MODE_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_4TO1_MODE, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_RESET, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_GEN_EN, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_CLEAR_ERROR, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_23_TEST_CHECK_EN, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0_01_DI_ADR1, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0_01_DI_ADR2_ADR3, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0_01_DI_ADR4_ADR5, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0_01_DI_ADR6_ADR7, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0_01_DI_ADR8_ADR9, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0_01_DI_ADR10_ADR11, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0_01_DI_ADR12_ADR13, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0_01_DI_ADR14_ADR15, 55);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1_01_DI_ADR0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1_01_DI_ADR2_ADR3, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1_01_DI_ADR4_ADR5, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1_01_DI_ADR6_ADR7, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1_01_DI_ADR8_ADR9, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1_01_DI_ADR10_ADR11, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1_01_DI_ADR12_ADR13, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1_01_DI_ADR14_ADR15, 55);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0_01_DI_ADR1, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0_01_DI_ADR2_ADR3, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0_01_DI_ADR4_ADR5, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0_01_DI_ADR6_ADR7, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0_01_DI_ADR8_ADR9, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0_01_DI_ADR10_ADR11, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0_01_DI_ADR12_ADR13, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0_01_DI_ADR14_ADR15, 55);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1_01_DI_ADR0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1_01_DI_ADR2_ADR3, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1_01_DI_ADR4_ADR5, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1_01_DI_ADR6_ADR7, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1_01_DI_ADR8_ADR9, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1_01_DI_ADR10_ADR11, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1_01_DI_ADR12_ADR13, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1_01_DI_ADR14_ADR15, 55);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2_23_DI_ADR0_ADR1, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2_23_DI_ADR3, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2_23_DI_ADR4_ADR5, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2_23_DI_ADR6_ADR7, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2_23_DI_ADR8_ADR9, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2_23_DI_ADR10_ADR11, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2_23_DI_ADR12_ADR13, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2_23_DI_ADR14_ADR15, 55);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR0_ADR1, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR4_ADR5, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR6_ADR7, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR8_ADR9, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR10_ADR11, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR12_ADR13, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3_23_DI_ADR14_ADR15, 55);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2_23_DI_ADR0_ADR1, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2_23_DI_ADR3, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2_23_DI_ADR4_ADR5, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2_23_DI_ADR6_ADR7, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2_23_DI_ADR8_ADR9, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2_23_DI_ADR10_ADR11, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2_23_DI_ADR12_ADR13, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2_23_DI_ADR14_ADR15, 55);

CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3_23_DI_ADR0_ADR1, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3_23_DI_ADR2, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3_23_DI_ADR4_ADR5, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3_23_DI_ADR6_ADR7, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3_23_DI_ADR8_ADR9, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3_23_DI_ADR10_ADR11, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3_23_DI_ADR12_ADR13, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3_23_DI_ADR14_ADR15, 55);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0_01_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1_01_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0_01_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1_01_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2_23_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3_23_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2_23_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3_23_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0_01_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1_01_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0_01_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1_01_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2_23_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3_23_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2_23_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3_23_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0_01_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1_01_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0_01_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1_01_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2_23_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3_23_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2_23_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL1, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL2, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL2_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL3, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL3_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL4, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL4_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL5, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL5_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL6, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL6_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL7, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3_23_SEL7_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0_01_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1_01_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0_01_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1_01_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2_23_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3_23_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2_23_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL8, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL8_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL9, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL9_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL10, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL10_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL11, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL11_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL12, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL12_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL13, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL13_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL14, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL14_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL15, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3_23_SEL15_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_01_CTL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_01_CTL0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_01_CTL1, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_01_CTL1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_01_CTL2, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_01_CTL2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_01_CTL3, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0_01_CTL3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_01_CTL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_01_CTL0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_01_CTL1, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_01_CTL1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_01_CTL2, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_01_CTL2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_01_CTL3, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1_01_CTL3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_01_CTL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_01_CTL0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_01_CTL1, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_01_CTL1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_01_CTL2, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_01_CTL2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_01_CTL3, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0_01_CTL3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_01_CTL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_01_CTL0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_01_CTL1, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_01_CTL1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_01_CTL2, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_01_CTL2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_01_CTL3, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1_01_CTL3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_23_CTL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_23_CTL0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_23_CTL1, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_23_CTL1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_23_CTL2, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_23_CTL2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_23_CTL3, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2_23_CTL3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_23_CTL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_23_CTL0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_23_CTL1, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_23_CTL1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_23_CTL2, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_23_CTL2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_23_CTL3, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3_23_CTL3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_23_CTL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_23_CTL0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_23_CTL1, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_23_CTL1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_23_CTL2, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_23_CTL2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_23_CTL3, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2_23_CTL3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_23_CTL0, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_23_CTL0_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_23_CTL1, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_23_CTL1_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_23_CTL2, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_23_CTL2_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_23_CTL3, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3_23_CTL3_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S0_ADR0_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S0_ADR0_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S1_ADR1_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S1_ADR1_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S0_ADR0_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S0_ADR0_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S1_ADR1_TSYS, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S1_ADR1_TSYS_LEN, 7);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S0_ADR0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S0_ADR0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S1_ADR1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S1_ADR1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S0_ADR0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S0_ADR0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S1_ADR1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S1_ADR1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S0_ADR0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S0_ADR0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S1_ADR1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S1_ADR1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S0_ADR0_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S0_ADR0_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S1_ADR1_VALUE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S1_ADR1_VALUE_LEN, 16);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_FLUSH, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_TOXDRV_HIBERNATE, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_ATEST1CTL_EN, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_HS_PROBE_A_SEL, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_HS_PROBE_A_SEL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_HS_PROBE_B_SEL, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_HS_PROBE_B_SEL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_ATEST1CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_ATEST1CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_ATEST1CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0_ADR0_ATEST1CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_FLUSH, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_TOXDRV_HIBERNATE, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_ATEST1CTL_EN, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_HS_PROBE_A_SEL, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_HS_PROBE_A_SEL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_HS_PROBE_B_SEL, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_HS_PROBE_B_SEL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_ATEST1CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_ATEST1CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_ATEST1CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1_ADR1_ATEST1CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_FLUSH, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_TOXDRV_HIBERNATE, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_ATEST1CTL_EN, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_HS_PROBE_A_SEL, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_HS_PROBE_A_SEL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_HS_PROBE_B_SEL, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_HS_PROBE_B_SEL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_ATEST1CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_ATEST1CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_ATEST1CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0_ADR0_ATEST1CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_FLUSH, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_EN, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_TOXDRV_HIBERNATE, 50);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_ATEST1CTL_EN, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_HS_PROBE_A_SEL, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_HS_PROBE_A_SEL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_HS_PROBE_B_SEL, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_HS_PROBE_B_SEL_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_ATEST1CTL0, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_ATEST1CTL1, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_ATEST1CTL2, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1_ADR1_ATEST1CTL3, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_TUNE_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_TUNE_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_TUNECP_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_TUNECP_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_TUNEF_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_TUNEF_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_TUNEVCO_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_TUNEVCO_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_PLLXTR_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0_ADR0_PLLXTR_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_TUNE_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_TUNE_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_TUNECP_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_TUNECP_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_TUNEF_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_TUNEF_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_TUNEVCO_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_TUNEVCO_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_PLLXTR_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1_ADR1_PLLXTR_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_TUNE_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_TUNE_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_TUNECP_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_TUNECP_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_TUNEF_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_TUNEF_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_TUNEVCO_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_TUNEVCO_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_PLLXTR_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0_ADR0_PLLXTR_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_TUNE_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_TUNE_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_TUNECP_2, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_TUNECP_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_TUNEF_5, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_TUNEF_5_LEN, 6);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_TUNEVCO_1, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_TUNEVCO_1_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_PLLXTR_1, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1_ADR1_PLLXTR_1_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_TUNEMDIV_0, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_TUNEMDIV_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_RANGE_0, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_RANGE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_VCCTUNE_0, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_VCCTUNE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_INTERP_SIG_SLEW_0_3, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_INTERP_SIG_SLEW_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0_ADR0_ANALOG_WRAPON, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_TUNEMDIV_0, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_TUNEMDIV_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_RANGE_0, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_RANGE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_VCCTUNE_0, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_VCCTUNE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_INTERP_SIG_SLEW_0_3, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_INTERP_SIG_SLEW_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1_ADR1_ANALOG_WRAPON, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_TUNEMDIV_0, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_TUNEMDIV_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_RANGE_0, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_RANGE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_VCCTUNE_0, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_VCCTUNE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_INTERP_SIG_SLEW_0_3, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_INTERP_SIG_SLEW_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0_ADR0_ANALOG_WRAPON, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_TUNETDIV_0_2, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_TUNETDIV_0_2_LEN, 3);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_TUNEMDIV_0, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_TUNEMDIV_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_TUNEATST, 53);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_RANGE_0, 54);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_RANGE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_VCCTUNE_0, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_VCCTUNE_0_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_INTERP_SIG_SLEW_0_3, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_INTERP_SIG_SLEW_0_3_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1_ADR1_ANALOG_WRAPON, 63);

CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR0_01_LANE__0_11_PD, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR0_01_LANE__0_11_PD_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR0_01_LANE__12_15_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR0_01_LANE__12_15_PD_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR1_01_LANE__0_11_PD, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR1_01_LANE__0_11_PD_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR1_01_LANE__12_15_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR1_01_LANE__12_15_PD_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR0_01_LANE__0_11_PD, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR0_01_LANE__0_11_PD_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR0_01_LANE__12_15_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR0_01_LANE__12_15_PD_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR1_01_LANE__0_11_PD, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR1_01_LANE__0_11_PD_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR1_01_LANE__12_15_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR1_01_LANE__12_15_PD_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR2_23_LANE__0_11_PD, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR2_23_LANE__0_11_PD_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR2_23_LANE__12_15_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR2_23_LANE__12_15_PD_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR3_23_LANE__0_11_PD, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR3_23_LANE__0_11_PD_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR3_23_LANE__12_15_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR3_23_LANE__12_15_PD_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR2_23_LANE__0_11_PD, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR2_23_LANE__0_11_PD_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR2_23_LANE__12_15_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR2_23_LANE__12_15_PD_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR3_23_LANE__0_11_PD, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR3_23_LANE__0_11_PD_LEN, 12);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR3_23_LANE__12_15_PD, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR3_23_LANE__12_15_PD_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0_ADR0_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0_ADR0_START, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0_ADR0_OVERRIDE_EN, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0_ADR0_OVERRIDE, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0_ADR0_OVERRIDE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0_ADR0_TARGET_PR_OFFSET, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0_ADR0_TARGET_PR_OFFSET_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1_ADR1_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1_ADR1_START, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1_ADR1_OVERRIDE_EN, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1_ADR1_OVERRIDE, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1_ADR1_OVERRIDE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1_ADR1_TARGET_PR_OFFSET, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1_ADR1_TARGET_PR_OFFSET_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0_ADR0_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0_ADR0_START, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0_ADR0_OVERRIDE_EN, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0_ADR0_OVERRIDE, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0_ADR0_OVERRIDE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0_ADR0_TARGET_PR_OFFSET, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0_ADR0_TARGET_PR_OFFSET_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1_ADR1_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1_ADR1_START, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1_ADR1_OVERRIDE_EN, 51);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1_ADR1_OVERRIDE, 52);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1_ADR1_OVERRIDE_LEN, 4);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1_ADR1_TARGET_PR_OFFSET, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1_ADR1_TARGET_PR_OFFSET_LEN, 5);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_PHASE_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_CONTINUOUS_UPDATE, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_CE0DLTVCC, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0_ADR0_CE0DLTVCC_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_PHASE_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_CONTINUOUS_UPDATE, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_CE0DLTVCC, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1_ADR1_CE0DLTVCC_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_PHASE_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_CONTINUOUS_UPDATE, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_CE0DLTVCC, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0_ADR0_CE0DLTVCC_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_ENABLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_ROT_OVERRIDE, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_ROT_OVERRIDE_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_ROT_OVERRIDE_EN, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_PHASE_ALIGN_RESET, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_PHASE_EN, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_PHASE_DEFAULT_EN, 59);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_POS_EDGE_ALIGN, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_CONTINUOUS_UPDATE, 61);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_CE0DLTVCC, 62);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1_ADR1_CE0DLTVCC_LEN, 2);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_SLEW_LATE_SAMPLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_BB_LOCK, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_SLEW_EARLY_SAMPLE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_SLEW_DONE_STATUS, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_SLEW_DONE_STATUS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_SLEW_CNTL, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_ADR0_SLEW_CNTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_ADR1_SLEW_LATE_SAMPLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_ADR1_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_ADR1_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_ADR1_BB_LOCK, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_ADR1_SLEW_EARLY_SAMPLE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_ADR1_SLEW_DONE_STATUS, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_ADR1_SLEW_DONE_STATUS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_ADR1_SLEW_CNTL, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_ADR1_SLEW_CNTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_ADR0_SLEW_LATE_SAMPLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_ADR0_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_ADR0_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_ADR0_BB_LOCK, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_ADR0_SLEW_EARLY_SAMPLE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_ADR0_SLEW_DONE_STATUS, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_ADR0_SLEW_DONE_STATUS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_ADR0_SLEW_CNTL, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_ADR0_SLEW_CNTL_LEN, 4);

CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_ADR1_SLEW_LATE_SAMPLE, 48);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_ADR1_ROT, 49);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_ADR1_ROT_LEN, 7);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_ADR1_BB_LOCK, 56);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_ADR1_SLEW_EARLY_SAMPLE, 57);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_ADR1_SLEW_DONE_STATUS, 58);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_ADR1_SLEW_DONE_STATUS_LEN, 2);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_ADR1_SLEW_CNTL, 60);
CEN_FLD (CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_ADR1_SLEW_CNTL_LEN, 4);

CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_ACTION0_REG_DDR0, 48);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_ACTION0_REG_DDR0_LEN, 6);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_ACTION0_REG_DDR1, 56);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_ACTION0_REG_DDR1_LEN, 5);

CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_ACTION1_REG_DDR0, 48);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_ACTION1_REG_DDR0_LEN, 6);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_ACTION1_REG_DDR1, 56);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_ACTION1_REG_DDR1_LEN, 5);

CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR0_FSM_CKSTP, 48);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR0_PARITY_CKSTP, 49);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR0_CALIBRATION_ERROR, 50);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR0_FSM_ERR, 51);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR0_PARITY_ERR, 52);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR01_PARITY_ERR, 53);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR1_FSM_CKSTP, 56);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR1_PARITY_CKSTP, 57);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR1_CALIBRATION_ERROR, 58);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR1_FSM_ERR, 59);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_DDR1_PARITY_ERR, 60);

CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR0_FSM_CKSTP, 48);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR0_PARITY_CKSTP, 49);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR0_CALIBRATION_ERROR, 50);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR0_FSM_ERR, 51);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR0_PARITY_ERR, 52);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR01_PARITY_ERR, 53);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR1_FSM_CKSTP, 56);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR1_PARITY_CKSTP, 57);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR1_CALIBRATION_ERROR, 58);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR1_FSM_ERR, 59);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_REG_DDR1_PARITY_ERR, 60);

CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_WOF_REG_DDR0, 48);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_WOF_REG_DDR0_LEN, 6);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_WOF_REG_DDR1, 56);
CEN_FLD (CEN_MBA_PHY01_DDRPHY_FIR_WOF_REG_DDR1_LEN, 5);

CEN_FLD (CEN_TCM_SYNC_CONFIG_ISLE_XSTOP_MASK_B, 0);
CEN_FLD (CEN_TCM_SYNC_CONFIG_PCB_XSTOP_MASK_B, 1);
CEN_FLD (CEN_TCM_SYNC_CONFIG_CLKSTP_EN, 2);
CEN_FLD (CEN_TCM_SYNC_CONFIG_EDRAM_XSTOP_MASK_B, 3);
CEN_FLD (CEN_TCM_SYNC_CONFIG_PLL_XSTOP_MASK_B, 4);
CEN_FLD (CEN_TCM_SYNC_CONFIG_LOCAL_XSTOP_MASK_B, 5);
CEN_FLD (CEN_TCM_SYNC_CONFIG_DISABLE_PCB_ITR, 6);
CEN_FLD (CEN_TCM_SYNC_CONFIG_USE_FOR_SCAN, 7);
CEN_FLD (CEN_TCM_SYNC_CONFIG_KEEP_EDRAM_ON_XSTOP, 8);
CEN_FLD (CEN_TCM_SYNC_CONFIG_TRIGGER_OPCG_ON_XSTOP, 9);
CEN_FLD (CEN_TCM_SYNC_CONFIG_SEL_EXT_OPCG_TRIGGER, 10);
CEN_FLD (CEN_TCM_SYNC_CONFIG_LISTEN_TO_PULSE, 11);
CEN_FLD (CEN_TCM_SYNC_CONFIG_CLK_START_ENABLE, 12);
CEN_FLD (CEN_TCM_SYNC_CONFIG_CLK_STOP_ENABLE, 13);
CEN_FLD (CEN_TCM_SYNC_CONFIG_CHIP_PROTECTION_ENABLE, 14);
CEN_FLD (CEN_TCM_SYNC_CONFIG_SPARE15, 15);
CEN_FLD (CEN_TCM_SYNC_CONFIG_SPARE16, 16);
CEN_FLD (CEN_TCM_SYNC_CONFIG_SPARE17, 17);
CEN_FLD (CEN_TCM_SYNC_CONFIG_SPARE18, 18);
CEN_FLD (CEN_TCM_SYNC_CONFIG_SPARE19, 19);
CEN_FLD (CEN_TCM_SYNC_CONFIG_SPARE20, 20);

CEN_FLD (CEN_TCM_PHASE_SHADOW_COUNT_Q, 0);
CEN_FLD (CEN_TCM_PHASE_SHADOW_COUNT_Q_LEN, 6);

CEN_FLD (CEN_TCM_OPCG_REG0_RUNN_MODE, 0);
CEN_FLD (CEN_TCM_OPCG_REG0_GO, 1);
CEN_FLD (CEN_TCM_OPCG_REG0_RUN_SCAN0, 2);
CEN_FLD (CEN_TCM_OPCG_REG0_SCAN0_MODE, 3);
CEN_FLD (CEN_TCM_OPCG_REG0_SCAN_RATIO, 4);
CEN_FLD (CEN_TCM_OPCG_REG0_SCAN_RATIO_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG0_INOP_FORCE_SG, 9);
CEN_FLD (CEN_TCM_OPCG_REG0_INOP_ALIGN, 10);
CEN_FLD (CEN_TCM_OPCG_REG0_INOP_ALIGN_LEN, 4);
CEN_FLD (CEN_TCM_OPCG_REG0_INOP_WAIT, 14);
CEN_FLD (CEN_TCM_OPCG_REG0_INOP_WAIT_LEN, 7);
CEN_FLD (CEN_TCM_OPCG_REG0_SNOP_ALIGN, 21);
CEN_FLD (CEN_TCM_OPCG_REG0_SNOP_ALIGN_LEN, 4);
CEN_FLD (CEN_TCM_OPCG_REG0_SNOP_WAIT, 25);
CEN_FLD (CEN_TCM_OPCG_REG0_SNOP_WAIT_LEN, 3);
CEN_FLD (CEN_TCM_OPCG_REG0_ENOP_ALIGN, 28);
CEN_FLD (CEN_TCM_OPCG_REG0_ENOP_ALIGN_LEN, 4);
CEN_FLD (CEN_TCM_OPCG_REG0_ENOP_WAIT, 32);
CEN_FLD (CEN_TCM_OPCG_REG0_ENOP_WAIT_LEN, 3);
CEN_FLD (CEN_TCM_OPCG_REG0_ENOP_FORCE_SG, 35);
CEN_FLD (CEN_TCM_OPCG_REG0_LOOP_COUNT, 36);
CEN_FLD (CEN_TCM_OPCG_REG0_LOOP_COUNT_LEN, 28);

CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_COUNT, 0);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_COUNT_LEN, 4);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ01_01F, 4);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ01_01F_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ02_02F, 9);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ02_02F_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ03_03F, 14);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ03_03F_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ04_04F, 19);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ04_04F_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ05_05F, 24);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ05_05F_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ06_06F, 29);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ06_06F_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ07_07F, 34);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ07_07F_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ08_08F, 39);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ08_08F_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ09_01FBY2, 44);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ09_01FBY2_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ10_02FBY2, 49);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ10_02FBY2_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ11_03FBY2, 54);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ11_03FBY2_LEN, 5);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ12_04FBY2, 59);
CEN_FLD (CEN_TCM_OPCG_REG1_FUNC_CAPT_SEQ12_04FBY2_LEN, 5);

CEN_FLD (CEN_TCM_OPCG_REG2_SCAN_COUNT, 0);
CEN_FLD (CEN_TCM_OPCG_REG2_SCAN_COUNT_LEN, 12);
CEN_FLD (CEN_TCM_OPCG_REG2_MISR_A_VAL, 12);
CEN_FLD (CEN_TCM_OPCG_REG2_MISR_A_VAL_LEN, 12);
CEN_FLD (CEN_TCM_OPCG_REG2_MISR_B_VAL, 24);
CEN_FLD (CEN_TCM_OPCG_REG2_MISR_B_VAL_LEN, 12);
CEN_FLD (CEN_TCM_OPCG_REG2_MISR_INIT_WAIT, 36);
CEN_FLD (CEN_TCM_OPCG_REG2_MISR_INIT_WAIT_LEN, 12);
CEN_FLD (CEN_TCM_OPCG_REG2_SUPPRESS_EVEN_CLK, 48);
CEN_FLD (CEN_TCM_OPCG_REG2_PAD_VALUE, 49);
CEN_FLD (CEN_TCM_OPCG_REG2_PAD_VALUE_LEN, 3);
CEN_FLD (CEN_TCM_OPCG_REG2_USE_F_AND_FDIV2, 52);
CEN_FLD (CEN_TCM_OPCG_REG2_USE_ARY_CLK_DURING_FILL, 53);
CEN_FLD (CEN_TCM_OPCG_REG2_SG_HIGH_DURING_FILL, 54);
CEN_FLD (CEN_TCM_OPCG_REG2_RTIM_THOLD_FORCE, 55);
CEN_FLD (CEN_TCM_OPCG_REG2_LBIST_SKITTER_CTL, 56);
CEN_FLD (CEN_TCM_OPCG_REG2_MISR_MODE, 57);
CEN_FLD (CEN_TCM_OPCG_REG2_INFINITE_MODE, 58);
CEN_FLD (CEN_TCM_OPCG_REG2_NSL_FILL_COUNT, 59);
CEN_FLD (CEN_TCM_OPCG_REG2_NSL_FILL_COUNT_LEN, 5);

CEN_FLD (CEN_TCM_OPCG_REG3_GO2, 0);
CEN_FLD (CEN_TCM_OPCG_REG3_RUN_ON_UPDATE_DR, 1);
CEN_FLD (CEN_TCM_OPCG_REG3_RUN_ON_CAPTURE_DR, 2);
CEN_FLD (CEN_TCM_OPCG_REG3_ALIGN_SOURCE_SELECT, 3);
CEN_FLD (CEN_TCM_OPCG_REG3_ALIGN_SOURCE_SELECT_LEN, 2);
CEN_FLD (CEN_TCM_OPCG_REG3_PRPG_WEIGHTING, 5);
CEN_FLD (CEN_TCM_OPCG_REG3_PRPG_WEIGHTING_LEN, 3);
CEN_FLD (CEN_TCM_OPCG_REG3_PRPG_VALUE, 8);
CEN_FLD (CEN_TCM_OPCG_REG3_PRPG_VALUE_LEN, 12);
CEN_FLD (CEN_TCM_OPCG_REG3_EXTEND_INOPW_ENOPW, 20);
CEN_FLD (CEN_TCM_OPCG_REG3_EXTEND_SNOPW, 21);
CEN_FLD (CEN_TCM_OPCG_REG3_FORCE_SG_HIGH_DURING_SNOP, 22);
CEN_FLD (CEN_TCM_OPCG_REG3_CHKSW, 23);
CEN_FLD (CEN_TCM_OPCG_REG3_CHKSW_LEN, 9);
CEN_FLD (CEN_TCM_OPCG_REG3_PRPG_A_VAL, 32);
CEN_FLD (CEN_TCM_OPCG_REG3_PRPG_A_VAL_LEN, 12);
CEN_FLD (CEN_TCM_OPCG_REG3_PRPG_B_VAL, 44);
CEN_FLD (CEN_TCM_OPCG_REG3_PRPG_B_VAL_LEN, 12);
CEN_FLD (CEN_TCM_OPCG_REG3_PRPG_MODE, 56);
CEN_FLD (CEN_TCM_OPCG_REG3_SCAN_CLK_USE_EVEN, 57);
CEN_FLD (CEN_TCM_OPCG_REG3_SPARE3, 58);
CEN_FLD (CEN_TCM_OPCG_REG3_SPARE3_LEN, 6);

CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_CMD, 0);
CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_CMD_LEN, 2);
CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_PERV, 4);
CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_FASTUNIT0, 5);
CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_FASTUNIT1, 6);
CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_UNIT2, 7);
CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_UNIT3, 8);
CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_UNIT4, 9);
CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_UNIT5, 10);
CEN_FLD (CEN_TCM_CLK_REGION_CLOCK_PLL, 11);
CEN_FLD (CEN_TCM_CLK_REGION_SEL_THOLD_SL, 20);
CEN_FLD (CEN_TCM_CLK_REGION_SEL_THOLD_NSL, 21);
CEN_FLD (CEN_TCM_CLK_REGION_SEL_THOLD_ARY, 22);

CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CLK_VITL, 3);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CLK_PERV, 4);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CLK_FASTUNIT0, 5);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CLK_FASTUNIT1, 6);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CLK_UNIT2, 7);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CLK_UNIT3, 8);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CLK_UNIT4, 9);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CLK_UNIT5, 10);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CLK_PLL, 11);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_FUNC, 20);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CFG, 21);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CCFG_GPTR, 22);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_REGF, 23);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_LBIST, 24);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_ABIST, 25);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_REPR, 26);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_TIME, 27);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_BNDY_FARY, 28);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_FARR, 29);
CEN_FLD (CEN_TCM_SCANSELQ_SCANSEL_CMSK, 30);

CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_PERV_FUNC_SL, 0);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_PERV_FUNC_NSL, 1);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_PERV_ARY_NSL, 2);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT0_ODD_FUNC_SL, 3);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT0_EVEN_FUNC_SL, 4);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT0_ODD_FUNC_NSL, 5);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT0_EVEN_FUNC_NSL, 6);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT0_ODD_ARY_NSL, 7);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT0_EVEN_ARY_NSL, 8);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT1_ODD_FUNC_SL, 9);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT1_EVEN_FUNC_SL, 10);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT1_ODD_FUNC_NSL, 11);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT1_EVEN_FUNC_NSL, 12);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT1_ODD_ARY_NSL, 13);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_FASTUNIT1_EVEN_ARY_NSL, 14);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT2_FUNC_SL, 15);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT2_FUNC_NSL, 16);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT2_ARY_NSL, 17);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT3_FUNC_SL, 18);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT3_FUNC_NSL, 19);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT3_ARY_NSL, 20);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT4_FUNC_SL, 21);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT4_FUNC_NSL, 22);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT4_ARY_NSL, 23);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT5_FUNC_SL, 24);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT5_FUNC_NSL, 25);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_UNIT5_ARY_NSL, 26);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_PLL_FUNC_SL, 27);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_PLL_FUNC_NSL, 28);
CEN_FLD (CEN_TCM_CLOCK_STAT_STATUS_PLL_ARY_NSL, 29);

CEN_FLD (CEN_TCM_ERROR_STATUS_PCB_WRITE_NOT_ALLOWED, 0);
CEN_FLD (CEN_TCM_ERROR_STATUS_PCB_READ_NOT_ALLOWED, 1);
CEN_FLD (CEN_TCM_ERROR_STATUS_PCB_PARITY_ERR_ON_CMD, 2);
CEN_FLD (CEN_TCM_ERROR_STATUS_PCB_ADDRESS_NOT_VALID, 3);
CEN_FLD (CEN_TCM_ERROR_STATUS_PCB_PARITY_ADDR_ERR, 4);
CEN_FLD (CEN_TCM_ERROR_STATUS_PCB_PARITY_DATA_ERR, 5);
CEN_FLD (CEN_TCM_ERROR_STATUS_PCB_PROTECTED_ACCESS_INVALID, 6);
CEN_FLD (CEN_TCM_ERROR_STATUS_PCB_PARITY_SPCIF_ERR, 7);
CEN_FLD (CEN_TCM_ERROR_STATUS_PCB_WRITE_AND_OPCG, 8);
CEN_FLD (CEN_TCM_ERROR_STATUS_CLOCK_CMD_CONFLICT, 9);
CEN_FLD (CEN_TCM_ERROR_STATUS_SCAN_COLLISION, 10);
CEN_FLD (CEN_TCM_ERROR_STATUS_OPCG_TRIGGER, 11);
CEN_FLD (CEN_TCM_ERROR_STATUS_OPCG_PARITY, 12);
CEN_FLD (CEN_TCM_ERROR_STATUS_PHASE_CNT_CORRUPTED, 13);
CEN_FLD (CEN_TCM_ERROR_STATUS_CC_PAR_ERR, 14);
CEN_FLD (CEN_TCM_ERROR_STATUS_CC_PAR_ERR_LEN, 2);
CEN_FLD (CEN_TCM_ERROR_STATUS_GPIO_PAR_ERR, 16);
CEN_FLD (CEN_TCM_ERROR_STATUS_SECURITY_VIOLATION, 17);

CEN_FLD (CEN_TCM_CC_PROTECT_MODE_REG_READ_ENABLE, 0);
CEN_FLD (CEN_TCM_CC_PROTECT_MODE_REG_WRITE_ENABLE, 1);

CEN_FLD (CEN_TCM_CC_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_TCM_CC_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_TCM_CC_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_TCM_GP0_TC_UNIT_ABSTCLK_MUXSEL_DC, 0);
CEN_FLD (CEN_TCM_GP0_TC_UNIT_SYNCCLK_MUXSEL_DC, 1);
CEN_FLD (CEN_TCM_GP0_TC_GPIO_FLUSHMODE_INH_DC_OUT, 2);
CEN_FLD (CEN_TCM_GP0_TC_GPIO_FORCEALIGN, 3);
CEN_FLD (CEN_TCM_GP0_TC_GPIO_AVP_MODE_DC_OUT, 4);
CEN_FLD (CEN_TCM_GP0_TC_ASIC_CORE_FORCETOKNOWN_DC, 5);
CEN_FLD (CEN_TCM_GP0_TC_GPIO_CC_SCAN_DIS_DC_B_OUT, 6);
CEN_FLD (CEN_TCM_GP0_TC_SKIT_MODE_BIST_DC, 7);
CEN_FLD (CEN_TCM_GP0_TC_GPIO_LBIST_EN_DC_OUT, 8);
CEN_FLD (CEN_TCM_GP0_TC_UNIT_LBIST_AC_MODE_DC, 9);
CEN_FLD (CEN_TCM_GP0_TC_UNIT_LBIST_ARY_WRT_THRU_DC, 10);
CEN_FLD (CEN_TCM_GP0_TC_ABIST_MODE_DC, 11);
CEN_FLD (CEN_TCM_GP0_TC_GPIO_ABIST_START_TEST_DC_OUT, 12);
CEN_FLD (CEN_TCM_GP0_NOT_USED0, 13);
CEN_FLD (CEN_TCM_GP0_TC_UNIT_ATPG_EN_DC, 14);
CEN_FLD (CEN_TCM_GP0_TC_GPIO_SCAN_PROTECT_DC_OUT, 15);
CEN_FLD (CEN_TCM_GP0_TC_ASIC_CORE_FORCETOKNOWN2_DC, 16);
CEN_FLD (CEN_TCM_GP0_NOT_USED2, 17);
CEN_FLD (CEN_TCM_GP0_NOT_USED3, 18);
CEN_FLD (CEN_TCM_GP0_NOT_USED4, 19);
CEN_FLD (CEN_TCM_GP0_TP_GPIO_TRACE_START, 20);
CEN_FLD (CEN_TCM_GP0_TP_GPIO_TRACE_STOP, 21);
CEN_FLD (CEN_TCM_GP0_TP_GPIO_TRACE_RESET, 22);
CEN_FLD (CEN_TCM_GP0_NOT_USED5, 23);
CEN_FLD (CEN_TCM_GP0_TC_GPIO_CLKDIV_SEL_DC, 24);
CEN_FLD (CEN_TCM_GP0_TC_GPIO_CLKDIV_SEL_DC_LEN, 2);
CEN_FLD (CEN_TCM_GP0_NOT_USED6, 26);
CEN_FLD (CEN_TCM_GP0_NOT_USED7, 27);
CEN_FLD (CEN_TCM_GP0_NOT_USED8, 28);
CEN_FLD (CEN_TCM_GP0_NOT_USED8_LEN, 4);
CEN_FLD (CEN_TCM_GP0_TC_PSRO_SEL_DC, 32);
CEN_FLD (CEN_TCM_GP0_TC_PSRO_SEL_DC_LEN, 8);
CEN_FLD (CEN_TCM_GP0_NOT_USED10, 40);
CEN_FLD (CEN_TCM_GP0_NOT_USED10_LEN, 3);
CEN_FLD (CEN_TCM_GP0_NOT_USED11, 43);
CEN_FLD (CEN_TCM_GP0_NOT_USED11_LEN, 3);
CEN_FLD (CEN_TCM_GP0_TC_PLLMEMIO_PADTEST_T_K, 46);
CEN_FLD (CEN_TCM_GP0_TC_PLLMEMIO_PADTEST_C_K, 47);
CEN_FLD (CEN_TCM_GP0_NOT_USED12, 48);
CEN_FLD (CEN_TCM_GP0_NOT_USED13, 49);
CEN_FLD (CEN_TCM_GP0_NOT_USED14, 50);
CEN_FLD (CEN_TCM_GP0_NOT_USED15, 51);
CEN_FLD (CEN_TCM_GP0_NOT_USED16, 52);
CEN_FLD (CEN_TCM_GP0_NOT_USED17, 53);
CEN_FLD (CEN_TCM_GP0_NOT_USED18, 54);
CEN_FLD (CEN_TCM_GP0_NOT_USED19, 55);
CEN_FLD (CEN_TCM_GP0_NOT_USED20, 56);
CEN_FLD (CEN_TCM_GP0_NOT_USED21, 57);
CEN_FLD (CEN_TCM_GP0_NOT_USED22, 58);
CEN_FLD (CEN_TCM_GP0_NOT_USED23, 59);
CEN_FLD (CEN_TCM_GP0_TC_MASK_CC_PCB_ERR_DC, 60);
CEN_FLD (CEN_TCM_GP0_TC_MASK_CC_SCAN_OPCG_ERR_DC, 61);
CEN_FLD (CEN_TCM_GP0_TC_CC_LCC_EDGE_DELAYED_DC, 62);
CEN_FLD (CEN_TCM_GP0_TC_FENCE_PERV_DC, 63);

CEN_FLD (CEN_TCM_GP1_MEMN_ABIST_DONE, 0);
CEN_FLD (CEN_TCM_GP1_MEMS_ABIST_DONE, 1);
CEN_FLD (CEN_TCM_GP1_TRA_ABIST_DONE, 2);
CEN_FLD (CEN_TCM_GP1_NOT_USED1, 3);
CEN_FLD (CEN_TCM_GP1_NOT_USED9, 4);
CEN_FLD (CEN_TCM_GP1_NOT_USED25, 5);
CEN_FLD (CEN_TCM_GP1_NOT_USED26, 6);
CEN_FLD (CEN_TCM_GP1_NOT_USED27, 7);
CEN_FLD (CEN_TCM_GP1_NOT_USED28, 8);
CEN_FLD (CEN_TCM_GP1_NOT_USED29, 9);
CEN_FLD (CEN_TCM_GP1_NOT_USED30, 10);
CEN_FLD (CEN_TCM_GP1_NOT_USED31, 11);
CEN_FLD (CEN_TCM_GP1_NOT_USED32, 12);
CEN_FLD (CEN_TCM_GP1_NOT_USED33, 13);
CEN_FLD (CEN_TCM_GP1_NOT_USED34, 14);
CEN_FLD (CEN_TCM_GP1_TC_OPCG_DONE_DC, 15);
CEN_FLD (CEN_TCM_GP1_NOT_USED35, 16);
CEN_FLD (CEN_TCM_GP1_NOT_USED36, 17);
CEN_FLD (CEN_TCM_GP1_NOT_USED37, 18);
CEN_FLD (CEN_TCM_GP1_NOT_USED38, 19);
CEN_FLD (CEN_TCM_GP1_NOT_USED39, 20);
CEN_FLD (CEN_TCM_GP1_NOT_USED40, 21);
CEN_FLD (CEN_TCM_GP1_NOT_USED41, 22);
CEN_FLD (CEN_TCM_GP1_NOT_USED42, 23);

CEN_FLD (CEN_TCM_GP2_GPIN_MASKING, 0);
CEN_FLD (CEN_TCM_GP2_GPIN_MASKING_LEN, 24);

CEN_FLD (CEN_TCM_GP4_TC_PROBE0_SEL_DC, 0);
CEN_FLD (CEN_TCM_GP4_TC_PROBE0_SEL_DC_LEN, 6);
CEN_FLD (CEN_TCM_GP4_NOT_USED43, 6);
CEN_FLD (CEN_TCM_GP4_NOT_USED43_LEN, 2);
CEN_FLD (CEN_TCM_GP4_TC_PROBE1_SEL_DC, 8);
CEN_FLD (CEN_TCM_GP4_TC_PROBE1_SEL_DC_LEN, 6);
CEN_FLD (CEN_TCM_GP4_NOT_USED44, 14);
CEN_FLD (CEN_TCM_GP4_NOT_USED44_LEN, 2);
CEN_FLD (CEN_TCM_GP4_TC_PROBE2_SEL_DC, 16);
CEN_FLD (CEN_TCM_GP4_TC_PROBE2_SEL_DC_LEN, 6);
CEN_FLD (CEN_TCM_GP4_NOT_USED45, 22);
CEN_FLD (CEN_TCM_GP4_NOT_USED45_LEN, 2);
CEN_FLD (CEN_TCM_GP4_TC_PROBE3_SEL_DC, 24);
CEN_FLD (CEN_TCM_GP4_TC_PROBE3_SEL_DC_LEN, 6);
CEN_FLD (CEN_TCM_GP4_NOT_USED46, 30);
CEN_FLD (CEN_TCM_GP4_NOT_USED47, 31);
CEN_FLD (CEN_TCM_GP4_TC_NBTI0_RING_SEL_DC_00, 32);
CEN_FLD (CEN_TCM_GP4_TC_NBTI0_RING_SEL_DC_01, 33);
CEN_FLD (CEN_TCM_GP4_TC_NBTI0_RING_SEL_DC_02, 34);
CEN_FLD (CEN_TCM_GP4_TC_NBTI0_RING_SEL_DC_03, 35);
CEN_FLD (CEN_TCM_GP4_TC_NBTI0_HDR_ENABLE_DC_B, 36);
CEN_FLD (CEN_TCM_GP4_TC_NBTI0_ACDC_STRESS_SELECT_DC, 37);
CEN_FLD (CEN_TCM_GP4_TC_NBTI0_STRESS_DC, 38);
CEN_FLD (CEN_TCM_GP4_NOT_USED48, 39);
CEN_FLD (CEN_TCM_GP4_NOT_USED49, 40);
CEN_FLD (CEN_TCM_GP4_NOT_USED50, 41);
CEN_FLD (CEN_TCM_GP4_NOT_USED51, 42);
CEN_FLD (CEN_TCM_GP4_NOT_USED52, 43);
CEN_FLD (CEN_TCM_GP4_NOT_USED53, 44);
CEN_FLD (CEN_TCM_GP4_NOT_USED54, 45);
CEN_FLD (CEN_TCM_GP4_NOT_USED55, 46);
CEN_FLD (CEN_TCM_GP4_NOT_USED56, 47);
CEN_FLD (CEN_TCM_GP4_NOT_USED57, 48);
CEN_FLD (CEN_TCM_GP4_NOT_USED58, 49);
CEN_FLD (CEN_TCM_GP4_NOT_USED59, 50);
CEN_FLD (CEN_TCM_GP4_NOT_USED60, 51);
CEN_FLD (CEN_TCM_GP4_NOT_USED61, 52);
CEN_FLD (CEN_TCM_GP4_NOT_USED62, 53);
CEN_FLD (CEN_TCM_GP4_NOT_USED63, 54);
CEN_FLD (CEN_TCM_GP4_NOT_USED64, 55);
CEN_FLD (CEN_TCM_GP4_NOT_USED65, 56);
CEN_FLD (CEN_TCM_GP4_NOT_USED66, 57);
CEN_FLD (CEN_TCM_GP4_NOT_USED67, 58);
CEN_FLD (CEN_TCM_GP4_NOT_USED68, 59);
CEN_FLD (CEN_TCM_GP4_NOT_USED69, 60);
CEN_FLD (CEN_TCM_GP4_NOT_USED70, 61);
CEN_FLD (CEN_TCM_GP4_NOT_USED71, 62);
CEN_FLD (CEN_TCM_GP4_NOT_USED72, 63);

CEN_FLD (CEN_TCM_GPIO_PROTECT_MODE_REG_READ_ENABLE, 0);
CEN_FLD (CEN_TCM_GPIO_PROTECT_MODE_REG_WRITE_ENABLE, 1);

CEN_FLD (CEN_TCM_GPIO_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_TCM_GPIO_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_TCM_GPIO_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_TCM_XFIR_IN0, 0);
CEN_FLD (CEN_TCM_XFIR_IN1, 1);
CEN_FLD (CEN_TCM_XFIR_IN2, 2);
CEN_FLD (CEN_TCM_XFIR_IN3, 3);
CEN_FLD (CEN_TCM_XFIR_IN4, 4);
CEN_FLD (CEN_TCM_XFIR_IN5, 5);
CEN_FLD (CEN_TCM_XFIR_IN6, 6);
CEN_FLD (CEN_TCM_XFIR_IN7, 7);
CEN_FLD (CEN_TCM_XFIR_IN8, 8);
CEN_FLD (CEN_TCM_XFIR_IN9, 9);
CEN_FLD (CEN_TCM_XFIR_IN10, 10);
CEN_FLD (CEN_TCM_XFIR_IN11, 11);
CEN_FLD (CEN_TCM_XFIR_IN12, 12);
CEN_FLD (CEN_TCM_XFIR_IN13, 13);
CEN_FLD (CEN_TCM_XFIR_IN14, 14);
CEN_FLD (CEN_TCM_XFIR_IN15, 15);
CEN_FLD (CEN_TCM_XFIR_IN15_LEN, 11);
CEN_FLD (CEN_TCM_XFIR_IN26, 26);

CEN_FLD (CEN_TCM_RFIR_IN0, 0);
CEN_FLD (CEN_TCM_RFIR_LFIR_RECOV_ERR, 1);
CEN_FLD (CEN_TCM_RFIR_IN, 2);
CEN_FLD (CEN_TCM_RFIR_IN_LEN, 22);

CEN_FLD (CEN_TCM_FIR_MASK_IN0, 0);
CEN_FLD (CEN_TCM_FIR_MASK_IN1, 1);
CEN_FLD (CEN_TCM_FIR_MASK_IN2, 2);
CEN_FLD (CEN_TCM_FIR_MASK_IN3, 3);
CEN_FLD (CEN_TCM_FIR_MASK_IN4, 4);
CEN_FLD (CEN_TCM_FIR_MASK_IN4_LEN, 23);

CEN_FLD (CEN_TCM_LOCAL_FIR_IN0, 0);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN1, 1);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN2, 2);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN3, 3);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN4, 4);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN5, 5);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN6, 6);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN7, 7);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN8, 8);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN9, 9);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN10, 10);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN11, 11);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN12, 12);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN13, 13);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN14, 14);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN15, 15);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN15_LEN, 25);
CEN_FLD (CEN_TCM_LOCAL_FIR_IN40, 40);

CEN_FLD (CEN_TCM_PSCOM_MODE_REG_ABORT_ON_PCB_ADDR_PARITY_ERROR, 0);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_ABORT_ON_PCB_WDATA_PARITY_ERROR, 1);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_P0_ERROR, 2);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_WDATA_PARITY_ERROR, 3);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_WATCHDOG_ENABLE, 4);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_SCOM_HANG_LIMIT, 5);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_SCOM_HANG_LIMIT_LEN, 2);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_FORCE_ALL_RINGS, 7);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_FSM_SELFRESET_ON_STATEVEC_PARITYERROR_ENABLE, 8);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_RESERVED_LT, 9);
CEN_FLD (CEN_TCM_PSCOM_MODE_REG_RESERVED_LT_LEN, 3);

CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_WDATA_PARITY, 0);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_ADDRESS_PARITY, 1);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_WDATA_PARITY, 2);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_P0, 3);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_RDATA_PARITY, 4);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_P0, 5);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_INTERFACE_MACHINE, 6);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_P2S_MACHINE, 7);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULCCH, 8);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN, 9);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULDCH, 10);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_WRITE_NVLD, 11);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_READ_NVLD, 12);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_ADDR_INVALID, 13);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_COMMAND_PARITY, 14);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_GENERAL_TIMEOUT, 15);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION, 16);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER, 17);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_WDATA_PARITY, 18);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_ADDRESS_PARITY, 19);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_WDATA_PARITY, 20);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_P0, 21);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_RDATA_PARITY, 22);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_P0, 23);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_INTERFACE_MACHINE, 24);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_P2S_MACHINE, 25);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULCCH, 26);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN, 27);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULDCH, 28);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_WRITE_NVLD, 29);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_READ_NVLD, 30);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_ADDR_INVALID, 31);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_COMMAND_PARITY, 32);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_GENERAL_TIMEOUT, 33);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION, 34);
CEN_FLD (CEN_TCM_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER, 35);

CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_PCB_WDATA_PARITY, 0);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_PCB_ADDRESS_PARITY, 1);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_DL_RETURN_WDATA_PARITY, 2);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_DL_RETURN_P0, 3);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_UL_RDATA_PARITY, 4);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_UL_P0, 5);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_PARITY_ON_INTERFACE_MACHINE, 6);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_PARITY_ON_P2S_MACHINE, 7);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH, 8);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN, 9);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULDCH, 10);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_MASK_PARALLEL_WRITE_NVLD, 11);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_MASK_PARALLEL_READ_NVLD, 12);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_MASK_PARALLEL_ADDR_INVALID, 13);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_PCB_COMMAND_PARITY, 14);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_GENERAL_TIMEOUT, 15);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION, 16);
CEN_FLD (CEN_TCM_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER, 17);

CEN_FLD (CEN_TCM_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR, 0);
CEN_FLD (CEN_TCM_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN, 16);
CEN_FLD (CEN_TCM_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR, 16);
CEN_FLD (CEN_TCM_ADDR_TRAP_REG_RESERVED_LAST_LT, 17);
CEN_FLD (CEN_TCM_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR, 18);
CEN_FLD (CEN_TCM_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN, 13);
CEN_FLD (CEN_TCM_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY, 31);
CEN_FLD (CEN_TCM_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR, 32);
CEN_FLD (CEN_TCM_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION, 33);
CEN_FLD (CEN_TCM_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER, 34);

CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_LOCAL_TRACE_RUN_IN, 0);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_TRACE_STATE_LAT, 1);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_TRACE_STATE_LAT_LEN, 2);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_TRACE_FREEZE, 3);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_COND3_STATE_LT, 4);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_COND3_STATE_LT_LEN, 2);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_COND5_STATE_LT, 6);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_COND5_STATE_LT_LEN, 2);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_HISTORY_CONDITION0_LT, 8);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_HISTORY_CONDITION1_LT, 9);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_HISTORY_COND2_3_EVENT, 10);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_HISTORY_COND2_TIMEOUT, 11);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_HISTORY_COND4_5_EVENT, 12);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_HISTORY_COND4_TIMEOUT, 13);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_RESERVED_TCDBG_LT, 14);
CEN_FLD (CEN_TCM_DEBUG_STATUS_REG_RESERVED_TCDBG_LT_LEN, 2);

CEN_FLD (CEN_TCM_PSCOM_WRITE_PROTECT_REG_ENABLE_SERIAL_RING, 0);
CEN_FLD (CEN_TCM_PSCOM_WRITE_PROTECT_REG_RESERVED, 1);

CEN_FLD (CEN_TCM_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_TCM_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_TCM_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_TCM_SPATTN_IN0, 0);
CEN_FLD (CEN_TCM_SPATTN_IN1, 1);
CEN_FLD (CEN_TCM_SPATTN_IN2, 2);
CEN_FLD (CEN_TCM_SPATTN_IN2_LEN, 8);

CEN_FLD (CEN_TCM_SPA_MASK_IN, 0);
CEN_FLD (CEN_TCM_SPA_MASK_IN_LEN, 10);

CEN_FLD (CEN_TCM_MODE_REG_IN0, 0);
CEN_FLD (CEN_TCM_MODE_REG_IN1, 1);
CEN_FLD (CEN_TCM_MODE_REG_IN2, 2);
CEN_FLD (CEN_TCM_MODE_REG_IN3, 3);
CEN_FLD (CEN_TCM_MODE_REG_IN4, 4);
CEN_FLD (CEN_TCM_MODE_REG_IN5, 5);
CEN_FLD (CEN_TCM_MODE_REG_IN6, 6);
CEN_FLD (CEN_TCM_MODE_REG_IN7, 7);
CEN_FLD (CEN_TCM_MODE_REG_IN8, 8);
CEN_FLD (CEN_TCM_MODE_REG_IN9, 9);
CEN_FLD (CEN_TCM_MODE_REG_IN10, 10);
CEN_FLD (CEN_TCM_MODE_REG_IN11, 11);
CEN_FLD (CEN_TCM_MODE_REG_IN, 12);
CEN_FLD (CEN_TCM_MODE_REG_IN_LEN, 4);

CEN_FLD (CEN_TCM_LOCAL_FIR_ACTION0_IN, 0);
CEN_FLD (CEN_TCM_LOCAL_FIR_ACTION0_IN_LEN, 41);

CEN_FLD (CEN_TCM_LOCAL_FIR_ACTION1_IN, 0);
CEN_FLD (CEN_TCM_LOCAL_FIR_ACTION1_IN_LEN, 41);

CEN_FLD (CEN_TCM_LOCAL_FIR_MASK_LFIR_IN, 0);
CEN_FLD (CEN_TCM_LOCAL_FIR_MASK_LFIR_IN_LEN, 41);

CEN_FLD (CEN_TCM_DTS_RESULT0_0_RESULT, 0);
CEN_FLD (CEN_TCM_DTS_RESULT0_0_RESULT_LEN, 16);
CEN_FLD (CEN_TCM_DTS_RESULT0_1_RESULT, 16);
CEN_FLD (CEN_TCM_DTS_RESULT0_1_RESULT_LEN, 16);

CEN_FLD (CEN_TCM_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE, 0);
CEN_FLD (CEN_TCM_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE_LEN, 44);
CEN_FLD (CEN_TCM_DTS_TRC_RESULT_TIMESTAMP_COUNTER_OVERFLOW_ERR, 44);
CEN_FLD (CEN_TCM_DTS_TRC_RESULT_0_RESULT, 48);
CEN_FLD (CEN_TCM_DTS_TRC_RESULT_0_RESULT_LEN, 16);

CEN_FLD (CEN_TCM_ENC_CPM_RESULT0_DTS_0_RESULT, 0);
CEN_FLD (CEN_TCM_ENC_CPM_RESULT0_DTS_0_RESULT_LEN, 16);
CEN_FLD (CEN_TCM_ENC_CPM_RESULT0_DTS_1_RESULT, 16);
CEN_FLD (CEN_TCM_ENC_CPM_RESULT0_DTS_1_RESULT_LEN, 16);


CEN_FLD (CEN_TCM_THERM_MODE_REG_DIS_CPM_BUBBLE_CORR, 0);
CEN_FLD (CEN_TCM_THERM_MODE_REG_FORCE_THRES_ACT, 1);
CEN_FLD (CEN_TCM_THERM_MODE_REG_THRES_TRIP_ENA, 2);
CEN_FLD (CEN_TCM_THERM_MODE_REG_THRES_TRIP_ENA_LEN, 3);
CEN_FLD (CEN_TCM_THERM_MODE_REG_DTS_SAMPLE_ENA, 5);
CEN_FLD (CEN_TCM_THERM_MODE_REG_SAMPLE_PULSE_CNT, 6);
CEN_FLD (CEN_TCM_THERM_MODE_REG_SAMPLE_PULSE_CNT_LEN, 4);
CEN_FLD (CEN_TCM_THERM_MODE_REG_THRES_ENA, 10);
CEN_FLD (CEN_TCM_THERM_MODE_REG_THRES_ENA_LEN, 2);
CEN_FLD (CEN_TCM_THERM_MODE_REG_DTS_TRIGGER, 12);
CEN_FLD (CEN_TCM_THERM_MODE_REG_DTS_TRIGGER_SEL, 13);
CEN_FLD (CEN_TCM_THERM_MODE_REG_UNUSED, 14);
CEN_FLD (CEN_TCM_THERM_MODE_REG_UNUSED_LEN, 2);
CEN_FLD (CEN_TCM_THERM_MODE_REG_DTS_READ_SEL, 16);
CEN_FLD (CEN_TCM_THERM_MODE_REG_DTS_READ_SEL_LEN, 4);
CEN_FLD (CEN_TCM_THERM_MODE_REG_DTS_ENABLE, 20);
CEN_FLD (CEN_TCM_THERM_MODE_REG_DTS_ENABLE_LEN, 2);
CEN_FLD (CEN_TCM_THERM_MODE_REG_CPM_ENABLE, 35);
CEN_FLD (CEN_TCM_THERM_MODE_REG_CPM_ENABLE_LEN, 2);

CEN_FLD (CEN_TCM_SKITTER_MODE_REG_HOLD_SAMPLE, 0);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_DISABLE_STICKINESS, 1);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_UNUSED1, 2);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_UNUSED1_LEN, 2);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL, 4);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_RESET_TRIG_SEL, 6);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_RESET_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_SAMPLE_GUTS, 8);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_SAMPLE_GUTS_LEN, 2);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_HOLD_SAMPLE_WITH_TRIGGER, 44);
CEN_FLD (CEN_TCM_SKITTER_MODE_REG_DATA_V_LT, 45);

CEN_FLD (CEN_TCM_SKITTER_CLKSRC_REG_SKITTER0, 0);
CEN_FLD (CEN_TCM_SKITTER_CLKSRC_REG_SKITTER0_LEN, 3);

CEN_FLD (CEN_TCM_INJECT_REG_THERM_TRIP, 0);
CEN_FLD (CEN_TCM_INJECT_REG_THERM_TRIP_LEN, 2);
CEN_FLD (CEN_TCM_INJECT_REG_THERM_MODE, 2);
CEN_FLD (CEN_TCM_INJECT_REG_THERM_MODE_LEN, 2);


CEN_FLD (CEN_TCM_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_MASK, 16);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_THERM_MODEREG_PARITY_MASK, 17);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_MASK, 18);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_MASK, 19);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_SCAN_INIT_VERSION_REG_PARITY_MASK, 20);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_VOLT_MODEREG_PARITY_MASK, 21);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_COUNT_STATE_MASK, 23);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_RUN_STATE_MASK, 24);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_THRES_STATE_MASK, 25);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_OVERFLOW_MASK, 26);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_SHIFTER_PARITY_MASK, 27);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_SHIFTER_VALID_MASK, 28);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_TIMEOUT_MASK, 29);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_F_SKITTER_READ_MASK, 30);
CEN_FLD (CEN_TCM_ERR_STATUS_REG_PCB_MASK, 31);

CEN_FLD (CEN_TCM_SKITTER_FORCE_REG_F_READ, 0);

CEN_FLD (CEN_TCM_VOLT_MODE_REG_MEASURE_ENA, 0);
CEN_FLD (CEN_TCM_VOLT_MODE_REG_TRIP_ENA, 1);
CEN_FLD (CEN_TCM_VOLT_MODE_REG_ENABLE, 2);
CEN_FLD (CEN_TCM_VOLT_MODE_REG_ENABLE_LEN, 2);




CEN_FLD (CEN_TCM_TIMESTAMP_COUNTER_READ_VALUE, 0);
CEN_FLD (CEN_TCM_TIMESTAMP_COUNTER_READ_VALUE_LEN, 44);
CEN_FLD (CEN_TCM_TIMESTAMP_COUNTER_READ_OVERFLOW_ERR, 44);

CEN_FLD (CEN_TCM_DBG_MODE_REG_GLB_BRCST, 0);
CEN_FLD (CEN_TCM_DBG_MODE_REG_GLB_BRCST_LEN, 3);
CEN_FLD (CEN_TCM_DBG_MODE_REG_TRACE_SEL, 3);
CEN_FLD (CEN_TCM_DBG_MODE_REG_TRACE_SEL_LEN, 2);
CEN_FLD (CEN_TCM_DBG_MODE_REG_TRIG_SEL, 5);
CEN_FLD (CEN_TCM_DBG_MODE_REG_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_DBG_MODE_REG_STOP_ON_XSTOP_SELECTION, 7);
CEN_FLD (CEN_TCM_DBG_MODE_REG_STOP_ON_RECOV_ERR_SELECTION, 8);
CEN_FLD (CEN_TCM_DBG_MODE_REG_STOP_ON_SPATTN_SELECTION, 9);
CEN_FLD (CEN_TCM_DBG_MODE_REG_FREEZE_SEL, 10);

CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_COND1_SEL_A, 0);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_COND1_SEL_A_LEN, 7);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_COND1_SEL_B, 7);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_COND1_SEL_B_LEN, 7);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_COND2_SEL_A, 14);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_COND2_SEL_A_LEN, 7);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_COND2_SEL_B, 21);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_COND2_SEL_B_LEN, 7);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_C1_INAROW_MODE, 28);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE1, 29);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE1, 30);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE1, 31);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_X_COUPLE_SELECT1, 32);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_X_COUPLE_SELECT1_LEN, 3);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_C2_INAROW_MODE, 35);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE2, 36);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE2, 37);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE2, 38);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_X_COUPLE_SELECT2, 39);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_X_COUPLE_SELECT2_LEN, 3);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_COND3_ENABLE_RESET, 42);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_EXACT_TO_MODE, 43);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_RESET_C2TIMER_ON_C1, 44);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_RESET_C3_ON_C0, 45);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_SLOW_TO_MODE, 46);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_EXACT_RESET_C3_ON_TO, 47);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_C1_COUNT_LT, 48);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_C1_COUNT_LT_LEN, 4);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_C2_COUNT_LT, 52);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_C2_COUNT_LT_LEN, 4);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_RESET_C3_SELECT, 56);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_RESET_C3_SELECT_LEN, 3);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_CROSS_COUPLE_SELECT_1_A, 59);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_1_CROSS_COUPLE_SELECT_1_A_LEN, 5);

CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B, 0);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN, 5);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_A, 5);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_A_LEN, 5);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_B, 10);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_B_LEN, 5);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_SP_COUNT_LT, 15);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_SP_COUNT_LT_LEN, 24);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_TO_CMP_LT_VALUE, 39);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_TO_CMP_LT_VALUE_LEN, 24);
CEN_FLD (CEN_TCM_DBG_INST1_COND_REG_2_FORCE_TEST_MODE, 63);

CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_COND1_SEL_A, 0);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_COND1_SEL_A_LEN, 7);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_COND1_SEL_B, 7);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_COND1_SEL_B_LEN, 7);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_COND2_SEL_A, 14);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_COND2_SEL_A_LEN, 7);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_COND2_SEL_B, 21);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_COND2_SEL_B_LEN, 7);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_C1_INAROW_MODE, 28);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE1, 29);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE1, 30);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE1, 31);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_X_COUPLE_SELECT1, 32);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_X_COUPLE_SELECT1_LEN, 3);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_C2_INAROW_MODE, 35);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE2, 36);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE2, 37);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE2, 38);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_X_COUPLE_SELECT2, 39);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_X_COUPLE_SELECT2_LEN, 3);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_COND3_ENABLE_RESET, 42);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_EXACT_TO_MODE, 43);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_RESET_C2TIMER_ON_C1, 44);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_RESET_C3_ON_C0, 45);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_SLOW_TO_MODE, 46);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_EXACT_RESET_C3_ON_TO, 47);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_C1_COUNT_LT, 48);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_C1_COUNT_LT_LEN, 4);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_C2_COUNT_LT, 52);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_C2_COUNT_LT_LEN, 4);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_RESET_C3_SELECT, 56);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_RESET_C3_SELECT_LEN, 3);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_CROSS_COUPLE_SELECT_1_A, 59);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_1_CROSS_COUPLE_SELECT_1_A_LEN, 5);

CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B, 0);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN, 5);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_A, 5);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_A_LEN, 5);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_B, 10);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_B_LEN, 5);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_SP_COUNT_LT, 15);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_SP_COUNT_LT_LEN, 24);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_TO_CMP_LT_VALUE, 39);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_TO_CMP_LT_VALUE_LEN, 24);
CEN_FLD (CEN_TCM_DBG_INST2_COND_REG_2_FORCE_TEST_MODE, 63);

CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST1_COND3_ENABLE, 0);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST2_COND3_ENABLE, 1);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST3_COND3_ENABLE, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST4_COND3_ENABLE, 3);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST1_SLOW_LFSR_MODE, 4);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST2_SLOW_LFSR_MODE, 5);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST3_SLOW_LFSR_MODE, 6);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST4_SLOW_LFSR_MODE, 7);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL, 8);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL, 10);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL, 12);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL, 14);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL, 16);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL, 18);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_EXT_TRIG_ON_STOP, 32);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_EXT_TRIG_ON_FREEZE, 33);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL, 34);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL_LEN, 5);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL, 39);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL_LEN, 5);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_PC_TP_TRIG_SEL, 44);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_PC_TP_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_ARM_SEL, 46);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_ARM_SEL_LEN, 4);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL, 50);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL_LEN, 4);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL, 54);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL_LEN, 4);

CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO, 0);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO, 4);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO, 6);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO, 8);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO, 10);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO_LEN, 2);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_WAITN, 24);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_WAITN, 25);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_WAITN, 26);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_WAITN, 27);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_WAITN, 28);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_WAITN, 29);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_BANK, 36);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_BANK, 37);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_BANK, 38);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_BANK, 39);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_BANK, 40);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_BANK, 41);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT, 48);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT_LEN, 3);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_SELECTOR, 51);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT, 52);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT_LEN, 3);
CEN_FLD (CEN_TCM_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_SELECTOR, 55);

CEN_FLD (CEN_TCM_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE, 0);
CEN_FLD (CEN_TCM_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE_LEN, 16);
CEN_FLD (CEN_TCM_DBG_TRACE_MODE_REG_2_IMM_FREEZE, 16);
CEN_FLD (CEN_TCM_DBG_TRACE_MODE_REG_2_STOP_ON_ERR, 17);
CEN_FLD (CEN_TCM_DBG_TRACE_MODE_REG_2_BANK_ON_RUNN_MATCH, 18);
CEN_FLD (CEN_TCM_DBG_TRACE_MODE_REG_2_FORCE_TEST, 19);
CEN_FLD (CEN_TCM_DBG_TRACE_MODE_REG_2_ACCUM_HIST, 20);
CEN_FLD (CEN_TCM_DBG_TRACE_MODE_REG_2_FRZ_COUNT_ON, 21);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE, 1);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE, 2);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE_LEN, 8);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG_BANK_MODE, 10);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG_ENH_MODE, 11);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL, 12);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL_LEN, 2);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN, 64);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN, 24);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_2_PATTERNA, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN, 24);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_2_PATTERNB, 24);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN, 24);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_3_PATTERNC, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN, 24);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_3_PATTERND, 24);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_3_PATTERND_LEN, 24);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_4_MASKA, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_4_MASKA_LEN, 24);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_4_MASKB, 24);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_4_MASKB_LEN, 24);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_5_MASKC, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_5_MASKC_LEN, 24);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_5_MASKD, 24);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_5_MASKD_LEN, 24);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK, 1);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL, 2);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN, 2);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL, 4);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN, 2);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL, 6);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN, 2);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL, 8);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN, 2);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK, 10);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN, 4);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK, 14);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN, 4);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK, 18);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN, 4);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK, 22);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN, 4);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE, 26);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE, 27);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE, 28);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN, 4);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_HI_DATA_REG_DATA, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_HI_DATA_REG_DATA_LEN, 64);

CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_DATA, 0);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_DATA_LEN, 32);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_ADDRESS, 32);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_ADDRESS_LEN, 10);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_LAST_BANK, 42);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_LAST_BANK_LEN, 9);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_LAST_BANK_VALID, 51);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_WRITE_ON_RUN, 52);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_RUNNING, 53);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS, 54);
CEN_FLD (CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN, 10);

CEN_FLD (CEN_FSISCRPD_FSI_SCRATCH_PAD, 0);
CEN_FLD (CEN_FSISCRPD_FSI_SCRATCH_PAD_LEN, 32);


CEN_FLD (CEN_DATA_REGISTER_0_REG_0, 0);
CEN_FLD (CEN_DATA_REGISTER_0_REG_0_LEN, 32);

CEN_FLD (CEN_DATA_REGISTER_1_REG_1, 0);
CEN_FLD (CEN_DATA_REGISTER_1_REG_1_LEN, 32);

CEN_FLD (CEN_COMMAND_REGISTER_CMD_REG, 0);
CEN_FLD (CEN_COMMAND_REGISTER_CMD_REG_LEN, 32);





CEN_FLD (CEN_INTERRUPT_STATUS_REG, 0);
CEN_FLD (CEN_INTERRUPT_STATUS_REG_LEN, 32);

CEN_FLD (CEN_COMPLEMENT_MASK_REG, 0);
CEN_FLD (CEN_COMPLEMENT_MASK_REG_LEN, 32);

CEN_FLD (CEN_TRUE_MASK_REG, 0);
CEN_FLD (CEN_TRUE_MASK_REG_LEN, 32);

CEN_FLD (CEN_FSIGP4_TPFSI_PLLMEM_ALTREFCLK_ENABLE, 0);
CEN_FLD (CEN_FSIGP4_TPFSI_CLKSTOP_DPHY23_GRID_ENABLE, 1);
CEN_FLD (CEN_FSIGP4_TPFSI_MEMRST_B, 2);
CEN_FLD (CEN_FSIGP4_TPFSI_FORCE_MCLK_OFF, 3);
CEN_FLD (CEN_FSIGP4_TP_CHIP_DPHY_PLLRESET_B, 4);
CEN_FLD (CEN_FSIGP4_TP_CHIP_DPHY_RESET_ALL, 5);
CEN_FLD (CEN_FSIGP4_TP_CHIP_PADTEST_ENABLE, 6);
CEN_FLD (CEN_FSIGP4_TPFSI_TP_PLLMEM_ALTREFCLK_ENABLE, 7);
CEN_FLD (CEN_FSIGP4_TCN_DMI_TERM_DC, 8);
CEN_FLD (CEN_FSIGP4_TCN_DMI_TERM_DC_LEN, 2);
CEN_FLD (CEN_FSIGP4_TCM_DDR_TERM_DC, 10);
CEN_FLD (CEN_FSIGP4_TCM_DDR_TERM_DC_LEN, 2);
CEN_FLD (CEN_FSIGP4_GLBCK_RELAY_STRENGTH_DC, 12);
CEN_FLD (CEN_FSIGP4_GLBCK_RELAY_STRENGTH_DC_LEN, 4);
CEN_FLD (CEN_FSIGP4_TP_PLL_DIV_BYPASS_EN_DC, 16);
CEN_FLD (CEN_FSIGP4_GP4_UNUSED_17_20, 17);
CEN_FLD (CEN_FSIGP4_GP4_UNUSED_17_20_LEN, 4);
CEN_FLD (CEN_FSIGP4_TPFSI_ARRAY_SET_VBL_TO_VDD_DC, 21);
CEN_FLD (CEN_FSIGP4_GP4_UNUSED_22_23, 22);
CEN_FLD (CEN_FSIGP4_GP4_UNUSED_22_23_LEN, 2);
CEN_FLD (CEN_FSIGP4_TPFSI_TP_PLL_TEST_ENABLE_DC, 24);
CEN_FLD (CEN_FSIGP4_GP4_UNUSED_25_27, 25);
CEN_FLD (CEN_FSIGP4_GP4_UNUSED_25_27_LEN, 3);
CEN_FLD (CEN_FSIGP4_TP_RI_DC_B, 28);
CEN_FLD (CEN_FSIGP4_TP_DI1_DC_B, 29);
CEN_FLD (CEN_FSIGP4_GP4_UNUSED_30, 30);
CEN_FLD (CEN_FSIGP4_GP4_UNUSED_31, 31);

CEN_FLD (CEN_FSIGP3_GP3_UNUSED_0_19, 0);
CEN_FLD (CEN_FSIGP3_GP3_UNUSED_0_19_LEN, 20);
CEN_FLD (CEN_FSIGP3_USE_PIB2PCB_MUX_DC, 20);
CEN_FLD (CEN_FSIGP3_OOB_MUX_DC, 21);
CEN_FLD (CEN_FSIGP3_PCB_RESET_DC, 22);
CEN_FLD (CEN_FSIGP3_FENCE2_DC, 23);
CEN_FLD (CEN_FSIGP3_FENCE3_DC, 24);
CEN_FLD (CEN_FSIGP3_FENCE4_DC, 25);
CEN_FLD (CEN_FSIGP3_FENCE5_DC, 26);
CEN_FLD (CEN_FSIGP3_VDD2VIO_LVL_FENCE, 27);
CEN_FLD (CEN_FSIGP3_PLL_RESET_DC, 28);
CEN_FLD (CEN_FSIGP3_PLL_OUT_EN_DC, 29);
CEN_FLD (CEN_FSIGP3_GP3_UNUSED_30, 30);
CEN_FLD (CEN_FSIGP3_GLOBAL_EP_RESET_DC, 31);

CEN_FLD (CEN_FSIGP5_PROBE0_SEL_DC, 0);
CEN_FLD (CEN_FSIGP5_PROBE0_SEL_DC_LEN, 4);
CEN_FLD (CEN_FSIGP5_PROBE1_SEL_DC, 4);
CEN_FLD (CEN_FSIGP5_PROBE1_SEL_DC_LEN, 4);
CEN_FLD (CEN_FSIGP5_PROBE_MESH_SEL_DC, 8);
CEN_FLD (CEN_FSIGP5_PROBE_DRV_EN_DC, 9);
CEN_FLD (CEN_FSIGP5_BURNIN_MODE_DC, 10);
CEN_FLD (CEN_FSIGP5_GP5_UNUSED_11, 11);
CEN_FLD (CEN_FSIGP5_GP5_UNUSED_12_15, 12);
CEN_FLD (CEN_FSIGP5_GP5_UNUSED_12_15_LEN, 4);
CEN_FLD (CEN_FSIGP5_FSI_PROBE_SEL_DC, 16);
CEN_FLD (CEN_FSIGP5_FSI_PROBE_SEL_DC_LEN, 2);
CEN_FLD (CEN_FSIGP5_GP5_UNUSED_18_22, 18);
CEN_FLD (CEN_FSIGP5_GP5_UNUSED_18_22_LEN, 5);
CEN_FLD (CEN_FSIGP5_PLL_DRV_EN_DC, 23);
CEN_FLD (CEN_FSIGP5_DBG_PCB_ASYNC_EN_DC, 24);
CEN_FLD (CEN_FSIGP5_DBG_PCB_DATA_PAR_DIS_DC, 25);
CEN_FLD (CEN_FSIGP5_DBG_PCB_TYPE_PAR_DIS_DC, 26);
CEN_FLD (CEN_FSIGP5_PCB_GSD_LATCHED_MODE_DC, 27);
CEN_FLD (CEN_FSIGP5_PIB_DISABLE_PARITY_DC, 28);
CEN_FLD (CEN_FSIGP5_GPIO_PIB_TIMEOUT, 29);
CEN_FLD (CEN_FSIGP5_GPIO_PIB_TIMEOUT_LEN, 3);

CEN_FLD (CEN_FSIGP6_GP6_UNUSED_0_31, 0);
CEN_FLD (CEN_FSIGP6_GP6_UNUSED_0_31_LEN, 32);

CEN_FLD (CEN_FSIGP7_DPHYN_PROGDLY_SETTING_DC, 0);
CEN_FLD (CEN_FSIGP7_DPHYN_PROGDLY_SETTING_DC_LEN, 4);
CEN_FLD (CEN_FSIGP7_DPHYS_PROGDLY_SETTING_DC, 4);
CEN_FLD (CEN_FSIGP7_DPHYS_PROGDLY_SETTING_DC_LEN, 4);
CEN_FLD (CEN_FSIGP7_MBC_PROGDLY_SETTING_DC, 8);
CEN_FLD (CEN_FSIGP7_MBC_PROGDLY_SETTING_DC_LEN, 4);
CEN_FLD (CEN_FSIGP7_MEM_PROGDLY_SETTING_DC, 12);
CEN_FLD (CEN_FSIGP7_MEM_PROGDLY_SETTING_DC_LEN, 4);
CEN_FLD (CEN_FSIGP7_NEST_PROGDLY_SETTING_DC, 16);
CEN_FLD (CEN_FSIGP7_NEST_PROGDLY_SETTING_DC_LEN, 4);
CEN_FLD (CEN_FSIGP7_GP7_UNUSED_20_31, 20);
CEN_FLD (CEN_FSIGP7_GP7_UNUSED_20_31_LEN, 12);

CEN_FLD (CEN_GPWRP_MAGIC_COOKIE, 0);
CEN_FLD (CEN_GPWRP_MAGIC_COOKIE_LEN, 16);
CEN_FLD (CEN_GPWRP_EN_OR_DIS_WRITE_PROTECTION, 16);
CEN_FLD (CEN_GPWRP_EN_OR_DIS_WRITE_PROTECTION_LEN, 16);

CEN_FLD (CEN_SNS1LTH_SNS1_UNUSED_0_31, 0);
CEN_FLD (CEN_SNS1LTH_SNS1_UNUSED_0_31_LEN, 32);

CEN_FLD (CEN_SNS2LTH_SNS2_UNUSED_0_31, 0);
CEN_FLD (CEN_SNS2LTH_SNS2_UNUSED_0_31_LEN, 32);

CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_EN_DC, 0);
CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_PCB_EP_RESET_DC, 1);
CEN_FLD (CEN_PERV_GP3_UNUSED_2_4, 2);
CEN_FLD (CEN_PERV_GP3_UNUSED_2_4_LEN, 3);
CEN_FLD (CEN_PERV_GP3_TP_PLLNST_BYPASS_EN_DC, 5);
CEN_FLD (CEN_PERV_GP3_UNUSED_6_10, 6);
CEN_FLD (CEN_PERV_GP3_UNUSED_6_10_LEN, 5);
CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_VTL_D_MODE_DC, 11);
CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_VTL_ACT_DIS_DC, 12);
CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_VTL_MPW2_DC_B, 13);
CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_VTL_MPW1_DC_B, 14);
CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_VTL_DELAY_LCLKR_DC, 15);
CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_VTL_CLKOFF_DC, 16);
CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_PLL_BYPASS_EN_DC, 17);
CEN_FLD (CEN_PERV_GP3_TP_CHIPLET_FENCE_EN_DC, 18);
CEN_FLD (CEN_PERV_GP3_UNUSED_19_31, 19);
CEN_FLD (CEN_PERV_GP3_UNUSED_19_31_LEN, 13);

CEN_FLD (CEN_I2_DATA_REGISTER_0_REG_0, 0);
CEN_FLD (CEN_I2_DATA_REGISTER_0_REG_0_LEN, 32);

CEN_FLD (CEN_I2_DATA_REGISTER_1_REG_1, 0);
CEN_FLD (CEN_I2_DATA_REGISTER_1_REG_1_LEN, 32);

CEN_FLD (CEN_I2_COMMAND_REGISTER_CMD_REG, 0);
CEN_FLD (CEN_I2_COMMAND_REGISTER_CMD_REG_LEN, 32);





CEN_FLD (CEN_I2_INTERRUPT_STATUS_REG, 0);
CEN_FLD (CEN_I2_INTERRUPT_STATUS_REG_LEN, 32);

CEN_FLD (CEN_I2_COMPLEMENT_MASK_REG, 0);
CEN_FLD (CEN_I2_COMPLEMENT_MASK_REG_LEN, 32);

CEN_FLD (CEN_I2_TRUE_MASK_REG, 0);
CEN_FLD (CEN_I2_TRUE_MASK_REG_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_COMMAND_REGISTER_CMD_REG, 0);
CEN_FLD (CEN_FSI_SHIFT_COMMAND_REGISTER_CMD_REG_LEN, 32);


CEN_FLD (CEN_FSI_SHIFT_READ_BUFFER_REG, 0);
CEN_FLD (CEN_FSI_SHIFT_READ_BUFFER_REG_LEN, 32);



CEN_FLD (CEN_FSI_SHIFT_STATUS_4, 0);
CEN_FLD (CEN_FSI_SHIFT_STATUS_4_LEN, 32);



CEN_FLD (CEN_FSI_SHIFT_COMPLEMENT_MASK_REG, 0);
CEN_FLD (CEN_FSI_SHIFT_COMPLEMENT_MASK_REG_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_TRUE_MASK_REG, 0);
CEN_FLD (CEN_FSI_SHIFT_TRUE_MASK_REG_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_SHIFT_CONTROL_REGISTER_2_CONTROL_REGISTER, 0);
CEN_FLD (CEN_FSI_SHIFT_SHIFT_CONTROL_REGISTER_2_CONTROL_REGISTER_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_DMA_MODE_REGISTER_REG_ENABLE, 0);
CEN_FLD (CEN_FSI_SHIFT_DMA_MODE_REGISTER_REG_FIFO_SIZE_EQ_1, 1);
CEN_FLD (CEN_FSI_SHIFT_DMA_MODE_REGISTER_REG_UNUSED, 2);
CEN_FLD (CEN_FSI_SHIFT_DMA_MODE_REGISTER_REG_UNUSED_LEN, 30);

CEN_FLD (CEN_FSI_SHIFT_DMA_STAT_COMP_MASK_REGISTER_REG, 0);
CEN_FLD (CEN_FSI_SHIFT_DMA_STAT_COMP_MASK_REGISTER_REG_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_DMA_OP_BLOCKSIZE_REGISTER_OPCODE, 0);
CEN_FLD (CEN_FSI_SHIFT_DMA_OP_BLOCKSIZE_REGISTER_OPCODE_LEN, 8);
CEN_FLD (CEN_FSI_SHIFT_DMA_OP_BLOCKSIZE_REGISTER_SIZE, 8);
CEN_FLD (CEN_FSI_SHIFT_DMA_OP_BLOCKSIZE_REGISTER_SIZE_LEN, 24);

CEN_FLD (CEN_FSI_SHIFT_DMA_REM_SIZE_REGISTER_REMAINING_WORDS, 8);
CEN_FLD (CEN_FSI_SHIFT_DMA_REM_SIZE_REGISTER_REMAINING_WORDS_LEN, 24);

CEN_FLD (CEN_FSI_SHIFT_DMA_PIB_SND_BUFFER0_REGISTER_BUF0_REG_DATA0, 0);
CEN_FLD (CEN_FSI_SHIFT_DMA_PIB_SND_BUFFER0_REGISTER_BUF0_REG_DATA0_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_DMA_PIB_SND_BUFFER1_REGISTER_BUF1_REG_DATA0, 0);
CEN_FLD (CEN_FSI_SHIFT_DMA_PIB_SND_BUFFER1_REGISTER_BUF1_REG_DATA0_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_DMA_PIB_RCV_BUFFER0_REGISTER_BUF0_REG_DATA0, 0);
CEN_FLD (CEN_FSI_SHIFT_DMA_PIB_RCV_BUFFER0_REGISTER_BUF0_REG_DATA0_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_DMA_PIB_RCV_BUFFER1_REGISTER_BUF1_REG_DATA1, 0);
CEN_FLD (CEN_FSI_SHIFT_DMA_PIB_RCV_BUFFER1_REGISTER_BUF1_REG_DATA1_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_DMA_ERROR_PTR_REGISTER_REG, 0);
CEN_FLD (CEN_FSI_SHIFT_DMA_ERROR_PTR_REGISTER_REG_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_DMA_SCOM_CMD_REGISTER_REG, 0);
CEN_FLD (CEN_FSI_SHIFT_DMA_SCOM_CMD_REGISTER_REG_LEN, 32);

CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG, 0);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG, 8);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG, 12);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG, 16);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG, 20);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG, 24);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG, 28);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG, 32);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG, 36);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG, 40);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG, 44);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG, 48);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG, 52);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG, 56);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG_LEN, 4);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG, 60);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG_LEN, 4);

CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS, 0);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS_LEN, 64);

CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS, 0);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS_LEN, 64);

CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS, 0);
CEN_FLD (CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS_LEN, 64);

CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG, 0);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG, 8);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG, 12);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG, 16);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG, 20);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG, 24);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG, 28);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG, 32);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG, 36);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG, 40);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG, 44);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG, 48);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG, 52);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG, 56);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG, 60);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG_LEN, 4);

CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS, 0);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS_LEN, 64);

CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS, 0);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS_LEN, 64);

CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS, 0);
CEN_FLD (CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS_LEN, 64);


CEN_FLD (CEN_FSI_I2C_COMMAND_REGISTER_CMD_REG, 0);
CEN_FLD (CEN_FSI_I2C_COMMAND_REGISTER_CMD_REG_LEN, 32);

CEN_FLD (CEN_FSI_I2C_MODE_REGISTER_BIT_RATE_DIVISOR, 0);
CEN_FLD (CEN_FSI_I2C_MODE_REGISTER_BIT_RATE_DIVISOR_LEN, 16);
CEN_FLD (CEN_FSI_I2C_MODE_REGISTER_PORT_NUMBER, 16);
CEN_FLD (CEN_FSI_I2C_MODE_REGISTER_PORT_NUMBER_LEN, 6);
CEN_FLD (CEN_FSI_I2C_MODE_REGISTER_FGAT, 28);
CEN_FLD (CEN_FSI_I2C_MODE_REGISTER_DIAG, 29);
CEN_FLD (CEN_FSI_I2C_MODE_REGISTER_PACING_ALLOW, 30);
CEN_FLD (CEN_FSI_I2C_MODE_REGISTER_WRAP, 31);

CEN_FLD (CEN_FSI_I2C_WATER_MARK_REGISTER_WATERMARK_REG, 16);
CEN_FLD (CEN_FSI_I2C_WATER_MARK_REGISTER_WATERMARK_REG_LEN, 16);

CEN_FLD (CEN_FSI_I2C_INTERRUPT_MASK_REGISTER_INT, 16);
CEN_FLD (CEN_FSI_I2C_INTERRUPT_MASK_REGISTER_INT_LEN, 16);












CEN_FLD (CEN_GPIO_INPUT_REGISTER_READ_DATA, 0);
CEN_FLD (CEN_GPIO_INPUT_REGISTER_READ_DATA_LEN, 2);

CEN_FLD (CEN_GPIO_OUPUT_REGISTER_OUTPUT_REGISTER_READ_WRITE_DATA, 0);
CEN_FLD (CEN_GPIO_OUPUT_REGISTER_OUTPUT_REGISTER_READ_WRITE_DATA_LEN, 2);

CEN_FLD (CEN_GPIO_OUPUT_ENABLE_REGISTER_OUTPUT_ENABLE_REGISTER_READ_WRITE_DATA, 0);
CEN_FLD (CEN_GPIO_OUPUT_ENABLE_REGISTER_OUTPUT_ENABLE_REGISTER_READ_WRITE_DATA_LEN, 2);

CEN_FLD (CEN_GPIO_INTERRUPT_REGISTER_READ_DATA, 0);
CEN_FLD (CEN_GPIO_INTERRUPT_REGISTER_READ_DATA_LEN, 2);

CEN_FLD (CEN_GPIO_POLARITY_REGISTER_READ_WRITE_DATA, 0);
CEN_FLD (CEN_GPIO_POLARITY_REGISTER_READ_WRITE_DATA_LEN, 2);

CEN_FLD (CEN_GPIO_INTERRUPT_ENABLE_REGISTER_READ_WRITE_DATA, 0);
CEN_FLD (CEN_GPIO_INTERRUPT_ENABLE_REGISTER_READ_WRITE_DATA_LEN, 2);

CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG, 0);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG, 8);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG, 12);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG, 16);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG, 20);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG, 24);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG, 28);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG, 32);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG, 36);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG, 40);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG, 44);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG, 48);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG, 52);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG, 56);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG_LEN, 4);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG, 60);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG_LEN, 4);

CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS, 0);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS_LEN, 64);

CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS, 0);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS_LEN, 64);

CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS, 0);
CEN_FLD (CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS_LEN, 64);

CEN_FLD (CEN_RLDCOMP_RLDLOG_COMMAND_REGISTER_CMD_REG, 0);
CEN_FLD (CEN_RLDCOMP_RLDLOG_COMMAND_REGISTER_CMD_REG_LEN, 64);

CEN_FLD (CEN_RLDCOMP_RLDLOG_FRONTEND_REGISTER_REG, 0);
CEN_FLD (CEN_RLDCOMP_RLDLOG_FRONTEND_REGISTER_REG_LEN, 64);

CEN_FLD (CEN_RLDCOMP_RLDLOG_CMDVAL_REGISTER_REG, 0);
CEN_FLD (CEN_RLDCOMP_RLDLOG_CMDVAL_REGISTER_REG_LEN, 64);

CEN_FLD (CEN_RLDCOMP_RLDLOG_STATUS_REGISTER_REG, 0);
CEN_FLD (CEN_RLDCOMP_RLDLOG_STATUS_REGISTER_REG_LEN, 64);

CEN_FLD (CEN_RLDCOMP_RLDLOG_ECCTRAP_REGISTER_REG, 0);
CEN_FLD (CEN_RLDCOMP_RLDLOG_ECCTRAP_REGISTER_REG_LEN, 32);

CEN_FLD (CEN_RLDCOMP_RLDLOG_CONFIG_REGISTER_REG, 0);
CEN_FLD (CEN_RLDCOMP_RLDLOG_CONFIG_REGISTER_REG_LEN, 3);

CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG, 0);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG, 8);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG, 12);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG, 16);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG, 20);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG, 24);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG, 28);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG, 32);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG, 36);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG, 40);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG, 44);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG, 48);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG, 52);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG, 56);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG_LEN, 4);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG, 60);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG_LEN, 4);

CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS, 0);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS_LEN, 64);

CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS, 0);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS_LEN, 64);

CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS, 0);
CEN_FLD (CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS_LEN, 64);

CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_BIT_WITHSTART, 0);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_BIT_WITHADDR, 1);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_BIT_READCONT, 2);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_BIT_WITHSTOP, 3);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_LENGTH, 4);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_LENGTH_LEN, 4);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_ADDR, 8);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_ADDR_LEN, 7);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_BIT_RNW, 15);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_SPEED, 16);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_SPEED_LEN, 2);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_PORT_NUMBER, 18);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_PORT_NUMBER_LEN, 5);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_REG_ADDR_LEN, 23);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_REG_ADDR_LEN_LEN, 3);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_ENH_MODE, 26);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_UNUSED, 27);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_UNUSED_LEN, 5);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_DATA_1, 32);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_DATA_1_LEN, 8);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_DATA_2, 40);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_DATA_2_LEN, 8);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_DATA_3, 48);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_DATA_3_LEN, 8);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_DATA_4, 56);
CEN_FLD (CEN_I2CM_CONTROL_REGISTER_0_PIB_CNTR_REG_DATA_4_LEN, 8);


CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_ADDR_NVLD_0, 0);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_WRITE_NVLD_0, 1);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_READ_NVLD_0, 2);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_ADDR_P_ERR_0, 3);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_PAR_ERR_0, 4);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_LB_PARITY_ERROR_0, 5);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_PIB_REG_DATA_ACT, 6);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_PIB_REG_DATA_ACT_LEN, 8);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_PIB_REG_DATA_ACT_1, 14);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_PIB_REG_DATA_ACT_1_LEN, 8);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_PIB_REG_DATA_ACT_2, 22);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_PIB_REG_DATA_ACT_2_LEN, 8);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_PIB_REG_DATA_ACT_3, 30);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_PIB_REG_DATA_ACT_3_LEN, 8);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_BUSY_0, 44);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_INVALID_COMMAND_0, 45);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_PARITY_ERROR_0, 46);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_BACK_END_OVERRUN_ERROR_0, 47);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_BACK_END_ACCESS_ERROR_0, 48);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_ARBITRATION_LOST_ERROR_0, 49);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_NACK_RECEIVED_ERROR_0, 50);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_DATA_REQUEST_0, 51);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_COMMAND_COMPLETE_0, 52);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_STOP_ERROR_0, 53);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_I2C_PORT_BUSY_0, 54);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_I2C_INTERFACE_BUSY_0, 55);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_FIFO_ENTRY_COUNT_0, 56);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_0_BUS_FIFO_ENTRY_COUNT_0_LEN, 8);

CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_0, 0);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_0_LEN, 8);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_1_0, 8);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_1_0_LEN, 8);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_2_0, 16);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_2_0_LEN, 8);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_3_0, 24);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_3_0_LEN, 8);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_4_0, 32);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_4_0_LEN, 8);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_5_0, 40);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_5_0_LEN, 8);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_6_0, 48);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_6_0_LEN, 8);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_7_0, 56);
CEN_FLD (CEN_I2CM_DATA_REGISTER_0_PIB_REG_ACT_7_0_LEN, 8);

CEN_FLD (CEN_I2CM_FIFO1_REGISTER_READ_0_FIFO_BITS_READ0, 0);
CEN_FLD (CEN_I2CM_FIFO1_REGISTER_READ_0_FIFO_BITS_READ0_LEN, 8);
CEN_FLD (CEN_I2CM_FIFO1_REGISTER_READ_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_FIFO1_REGISTER_READ_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_FIFO1_REGISTER_READ_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_FIFO4_REGISTER_READ_0_FIFO_BITS_READ0, 0);
CEN_FLD (CEN_I2CM_FIFO4_REGISTER_READ_0_FIFO_BITS_READ0_LEN, 8);
CEN_FLD (CEN_I2CM_FIFO4_REGISTER_READ_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_FIFO4_REGISTER_READ_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_FIFO4_REGISTER_READ_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_WITH_START, 0);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_WITH_ADDRESS, 1);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_READ_CONTINUE, 2);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_WITH_STOP, 3);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_NOT_USED, 4);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_NOT_USED_LEN, 4);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_DEVICE_ADDRESS, 8);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_DEVICE_ADDRESS_LEN, 7);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_READ_NOT_WRITE, 15);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_LENGTH_IN_BYTES, 16);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_LENGTH_IN_BYTES_LEN, 16);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_COMMAND_REGISTER_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_MODE_REGISTER_0_BIT_RATE_DIVISOR, 0);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_BIT_RATE_DIVISOR_LEN, 8);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_PORT_NUMBER, 16);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_PORT_NUMBER_LEN, 6);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_CHKSW_I2C_BUSY, 27);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_FGAT_0, 28);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_DIAG_0, 29);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_PACING_ALLOW_0, 30);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_WRAP_0, 31);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_MODE_REGISTER_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_WATER_MARK_REGISTER_0_WATERMARK_REG, 16);
CEN_FLD (CEN_I2CM_WATER_MARK_REGISTER_0_WATERMARK_REG_LEN, 16);
CEN_FLD (CEN_I2CM_WATER_MARK_REGISTER_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_WATER_MARK_REGISTER_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_WATER_MARK_REGISTER_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_INTERRUPT_MASK_REGISTER_READ_0_INT_0, 16);
CEN_FLD (CEN_I2CM_INTERRUPT_MASK_REGISTER_READ_0_INT_0_LEN, 16);
CEN_FLD (CEN_I2CM_INTERRUPT_MASK_REGISTER_READ_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_INTERRUPT_MASK_REGISTER_READ_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_INTERRUPT_MASK_REGISTER_READ_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_INTERRUPT_MASK_REGISTER_0_INT_0, 16);
CEN_FLD (CEN_I2CM_INTERRUPT_MASK_REGISTER_0_INT_0_LEN, 16);

CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_INVALID_CMD, 0);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_LBUS_PARITY_ERROR, 1);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_BE_OV_ERROR, 2);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_BE_ACC_ERROR, 3);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_ARBITRATION_LOST_ERROR, 4);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_NACK_RECEIVED_ERROR, 5);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_DATA_REQUEST, 6);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_STOP_ERROR, 8);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_busy, 22);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_SELF_BUSY, 23);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_FIFO_ENTRY_COUNT, 28);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_FIFO_ENTRY_COUNT_LEN, 4);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_STATUS_REGISTER_ENGINE_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_RESIDUAL_FRONT_END_BACK_END_LENGTH_0_RESID_FE_LEN, 0);
CEN_FLD (CEN_I2CM_RESIDUAL_FRONT_END_BACK_END_LENGTH_0_RESID_FE_LEN_LEN, 16);
CEN_FLD (CEN_I2CM_RESIDUAL_FRONT_END_BACK_END_LENGTH_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_RESIDUAL_FRONT_END_BACK_END_LENGTH_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_RESIDUAL_FRONT_END_BACK_END_LENGTH_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_EXTENDED_STATUS_0_MSM_CURR_STATE, 11);
CEN_FLD (CEN_I2CM_EXTENDED_STATUS_0_MSM_CURR_STATE_LEN, 5);
CEN_FLD (CEN_I2CM_EXTENDED_STATUS_0_SELF_BUSY, 25);
CEN_FLD (CEN_I2CM_EXTENDED_STATUS_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_EXTENDED_STATUS_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_EXTENDED_STATUS_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_INVALID_CMD, 16);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_LBUS_PARITY_ERROR, 17);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_BE_OV_ERROR, 18);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_BE_ACC_ERROR, 19);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_ARBITRATION_LOST_ERROR, 20);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_NACK_RECEIVED_ERROR, 21);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_DATA_REQUEST, 22);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_STOP_ERROR, 24);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_INTERRUPT_COND_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_I2CM_INTERRUPTS_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_INTERRUPTS_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_INTERRUPTS_0_LBUS_PARITY_ERR1, 40);







CEN_FLD (CEN_I2CM_I2C_BUSY_REGISTER_0_PEEK_DATA1, 32);
CEN_FLD (CEN_I2CM_I2C_BUSY_REGISTER_0_PEEK_DATA1_LEN, 8);
CEN_FLD (CEN_I2CM_I2C_BUSY_REGISTER_0_LBUS_PARITY_ERR1, 40);

CEN_FLD (CEN_MCAST_GRP_0_SLAVES_REG_SLAVES_GROUP_0, 0);
CEN_FLD (CEN_MCAST_GRP_0_SLAVES_REG_SLAVES_GROUP_0_LEN, 6);

CEN_FLD (CEN_MCAST_GRP_1_SLAVES_REG_SLAVES_GROUP_1, 0);
CEN_FLD (CEN_MCAST_GRP_1_SLAVES_REG_SLAVES_GROUP_1_LEN, 6);

CEN_FLD (CEN_MCAST_GRP_2_SLAVES_REG_SLAVES_GROUP_2, 0);
CEN_FLD (CEN_MCAST_GRP_2_SLAVES_REG_SLAVES_GROUP_2_LEN, 6);

CEN_FLD (CEN_MCAST_GRP_3_SLAVES_REG_SLAVES_GROUP_3, 0);
CEN_FLD (CEN_MCAST_GRP_3_SLAVES_REG_SLAVES_GROUP_3_LEN, 6);

CEN_FLD (CEN_MCAST_GRP_4_SLAVES_REG_SLAVES_GROUP_4, 0);
CEN_FLD (CEN_MCAST_GRP_4_SLAVES_REG_SLAVES_GROUP_4_LEN, 6);

CEN_FLD (CEN_MCAST_GRP_5_SLAVES_REG_SLAVES_GROUP_5, 0);
CEN_FLD (CEN_MCAST_GRP_5_SLAVES_REG_SLAVES_GROUP_5_LEN, 6);

CEN_FLD (CEN_MCAST_GRP_6_SLAVES_REG_SLAVES_GROUP_6, 0);
CEN_FLD (CEN_MCAST_GRP_6_SLAVES_REG_SLAVES_GROUP_6_LEN, 6);

CEN_FLD (CEN_BIT_SEL_REG_2_SELECT_REGISTER_FSP2PIB, 0);
CEN_FLD (CEN_BIT_SEL_REG_2_SELECT_REGISTER_FSP2PIB_LEN, 6);

CEN_FLD (CEN_BIT_SEL_REG_3_SELECT_REGISTER_FSISHIFT, 0);
CEN_FLD (CEN_BIT_SEL_REG_3_SELECT_REGISTER_FSISHIFT_LEN, 6);


CEN_FLD (CEN_REC_ACK_REG_RECEIVE_ACKNOWLEDGE_REGISTER, 0);
CEN_FLD (CEN_REC_ACK_REG_RECEIVE_ACKNOWLEDGE_REGISTER_LEN, 64);

CEN_FLD (CEN_REC_ERR_REG0_MASTER_RESPONSE_BIT, 0);
CEN_FLD (CEN_REC_ERR_REG0_MASTER_ERROR_CODE, 1);
CEN_FLD (CEN_REC_ERR_REG0_MASTER_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE1_RESPONSE_BIT, 4);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE1_ERROR_CODE, 5);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE1_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE2_RESPONSE_BIT, 8);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE2_ERROR_CODE, 9);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE2_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE3_RESPONSE_BIT, 12);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE3_ERROR_CODE, 13);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE3_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE4_RESPONSE_BIT, 16);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE4_ERROR_CODE, 17);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE4_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE5_RESPONSE_BIT, 20);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE5_ERROR_CODE, 21);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE5_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE6_RESPONSE_BIT, 24);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE6_ERROR_CODE, 25);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE6_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE7_RESPONSE_BIT, 28);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE7_ERROR_CODE, 29);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE7_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE8_RESPONSE_BIT, 32);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE8_ERROR_CODE, 33);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE8_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE9_RESPONSE_BIT, 36);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE9_ERROR_CODE, 37);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE9_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE10_RESPONSE_BIT, 40);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE10_ERROR_CODE, 41);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE10_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE11_RESPONSE_BIT, 44);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE11_ERROR_CODE, 45);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE11_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE12_RESPONSE_BIT, 48);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE12_ERROR_CODE, 49);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE12_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE13_RESPONSE_BIT, 52);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE13_ERROR_CODE, 53);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE13_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE14_RESPONSE_BIT, 56);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE14_ERROR_CODE, 57);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE14_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE15_RESPONSE_BIT, 60);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE15_ERROR_CODE, 61);
CEN_FLD (CEN_REC_ERR_REG0_SLAVE15_ERROR_CODE_LEN, 3);

CEN_FLD (CEN_REC_ERR_REG1_SLAVE16_RESPONSE_BIT, 0);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE16_ERROR_CODE, 1);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE16_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE17_RESPONSE_BIT, 4);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE17_ERROR_CODE, 5);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE17_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE18_RESPONSE_BIT, 8);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE18_ERROR_CODE, 9);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE18_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE19_RESPONSE_BIT, 12);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE19_ERROR_CODE, 13);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE19_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE20_RESPONSE_BIT, 16);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE20_ERROR_CODE, 17);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE20_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE21_RESPONSE_BIT, 20);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE21_ERROR_CODE, 21);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE21_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE22_RESPONSE_BIT, 24);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE22_ERROR_CODE, 25);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE22_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE23_RESPONSE_BIT, 28);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE23_ERROR_CODE, 29);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE23_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE24_RESPONSE_BIT, 32);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE24_ERROR_CODE, 33);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE24_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE25_RESPONSE_BIT, 36);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE25_ERROR_CODE, 37);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE25_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE26_RESPONSE_BIT, 40);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE26_ERROR_CODE, 41);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE26_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE27_RESPONSE_BIT, 44);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE27_ERROR_CODE, 45);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE27_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE28_RESPONSE_BIT, 48);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE28_ERROR_CODE, 49);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE28_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE29_RESPONSE_BIT, 52);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE29_ERROR_CODE, 53);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE29_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE30_RESPONSE_BIT, 56);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE30_ERROR_CODE, 57);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE30_ERROR_CODE_LEN, 3);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE31_RESPONSE_BIT, 60);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE31_ERROR_CODE, 61);
CEN_FLD (CEN_REC_ERR_REG1_SLAVE31_ERROR_CODE_LEN, 3);

CEN_FLD (CEN_MCAST_COMP_REG_MULTICAST_COMPARE_REGISTER, 0);
CEN_FLD (CEN_MCAST_COMP_REG_MULTICAST_COMPARE_REGISTER_LEN, 2);

CEN_FLD (CEN_MCAST_COMP_VAL_REG_MULTICAST_COMPARE_VALUE_REGISTER, 0);
CEN_FLD (CEN_MCAST_COMP_VAL_REG_MULTICAST_COMPARE_VALUE_REGISTER_LEN, 64);

CEN_FLD (CEN_MCAST_COMP_MASK_REG_MULTICAST_COMPARE_REGISTER, 0);
CEN_FLD (CEN_MCAST_COMP_MASK_REG_MULTICAST_COMPARE_REGISTER_LEN, 64);

CEN_FLD (CEN_FIRST_REPLY_REG_REGISTER, 0);
CEN_FLD (CEN_FIRST_REPLY_REG_REGISTER_LEN, 6);

CEN_FLD (CEN_TIMEOUT_REG_REGISTER, 0);
CEN_FLD (CEN_TIMEOUT_REG_REGISTER_LEN, 8);

CEN_FLD (CEN_INTERRUPT_TYPE_REG_ATTENTION, 0);
CEN_FLD (CEN_INTERRUPT_TYPE_REG_RECOVERABLE_ERROR, 1);
CEN_FLD (CEN_INTERRUPT_TYPE_REG_CHECKSTOP, 2);

CEN_FLD (CEN_ERROR_REG_TIMEOUT_ACTIVE, 0);
CEN_FLD (CEN_ERROR_REG_PARITY_ERR, 1);
CEN_FLD (CEN_ERROR_REG_BEAT_NUM_ERR, 2);
CEN_FLD (CEN_ERROR_REG_BEAT_REC_ERR, 3);
CEN_FLD (CEN_ERROR_REG_RECEIVED, 4);
CEN_FLD (CEN_ERROR_REG_RX_PCB_DATA_P_ERR, 5);
CEN_FLD (CEN_ERROR_REG_PIB_ADDR_P_ERR, 6);
CEN_FLD (CEN_ERROR_REG_PIB_DATA_P_ERR, 7);

CEN_FLD (CEN_FIRST_ERR_REG_TIMEOUT_ACTIVE, 0);
CEN_FLD (CEN_FIRST_ERR_REG_PARITY, 1);
CEN_FLD (CEN_FIRST_ERR_REG_BEAT_NUM, 2);
CEN_FLD (CEN_FIRST_ERR_REG_BEAT_REC, 3);
CEN_FLD (CEN_FIRST_ERR_REG_RECEIVED_ERROR, 4);
CEN_FLD (CEN_FIRST_ERR_REG_RX_PCB_DATA_P, 5);
CEN_FLD (CEN_FIRST_ERR_REG_PIB_ADDR_P, 6);
CEN_FLD (CEN_FIRST_ERR_REG_PIB_DATA_P, 7);

CEN_FLD (CEN_RESET_REG_PCB, 0);
CEN_FLD (CEN_RESET_REG_ENDPOINTS, 1);
CEN_FLD (CEN_RESET_REG_TIMEOUT_EN, 2);

CEN_FLD (CEN_IGNORE_PAR_REG_PARITY_REG, 0);
CEN_FLD (CEN_IGNORE_PAR_REG_DISABLE_ECC_CORRECTION, 1);
CEN_FLD (CEN_IGNORE_PAR_REG_ECC_S_BIT_ERROR, 2);

CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG, 0);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG, 8);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG, 12);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG, 16);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG, 20);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG, 24);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG, 28);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG, 32);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG, 36);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG, 40);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG, 44);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG, 48);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG, 52);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG, 56);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG_LEN, 4);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG, 60);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG_LEN, 4);

CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS, 0);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS_LEN, 64);

CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS, 0);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS_LEN, 64);

CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS, 0);
CEN_FLD (CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS_LEN, 64);

CEN_FLD (CEN_SYNC_CONFIG_ISLE_XSTOP_MASK_B, 0);
CEN_FLD (CEN_SYNC_CONFIG_PCB_XSTOP_MASK_B, 1);
CEN_FLD (CEN_SYNC_CONFIG_CLKSTP_EN, 2);
CEN_FLD (CEN_SYNC_CONFIG_EDRAM_XSTOP_MASK_B, 3);
CEN_FLD (CEN_SYNC_CONFIG_PLL_XSTOP_MASK_B, 4);
CEN_FLD (CEN_SYNC_CONFIG_LOCAL_XSTOP_MASK_B, 5);
CEN_FLD (CEN_SYNC_CONFIG_DISABLE_PCB_ITR, 6);
CEN_FLD (CEN_SYNC_CONFIG_USE_FOR_SCAN, 7);
CEN_FLD (CEN_SYNC_CONFIG_KEEP_EDRAM_ON_XSTOP, 8);
CEN_FLD (CEN_SYNC_CONFIG_TRIGGER_OPCG_ON_XSTOP, 9);
CEN_FLD (CEN_SYNC_CONFIG_SEL_EXT_OPCG_TRIGGER, 10);
CEN_FLD (CEN_SYNC_CONFIG_LISTEN_TO_PULSE, 11);
CEN_FLD (CEN_SYNC_CONFIG_CLK_START_ENABLE, 12);
CEN_FLD (CEN_SYNC_CONFIG_CLK_STOP_ENABLE, 13);
CEN_FLD (CEN_SYNC_CONFIG_CHIP_PROTECTION_ENABLE, 14);
CEN_FLD (CEN_SYNC_CONFIG_SPARE15, 15);
CEN_FLD (CEN_SYNC_CONFIG_SPARE16, 16);
CEN_FLD (CEN_SYNC_CONFIG_SPARE17, 17);
CEN_FLD (CEN_SYNC_CONFIG_SPARE18, 18);
CEN_FLD (CEN_SYNC_CONFIG_SPARE19, 19);
CEN_FLD (CEN_SYNC_CONFIG_SPARE20, 20);

CEN_FLD (CEN_PHASE_SHADOW_COUNT_Q, 0);
CEN_FLD (CEN_PHASE_SHADOW_COUNT_Q_LEN, 6);

CEN_FLD (CEN_OPCG_REG0_RUNN_MODE, 0);
CEN_FLD (CEN_OPCG_REG0_GO, 1);
CEN_FLD (CEN_OPCG_REG0_RUN_SCAN0, 2);
CEN_FLD (CEN_OPCG_REG0_SCAN0_MODE, 3);
CEN_FLD (CEN_OPCG_REG0_SCAN_RATIO, 4);
CEN_FLD (CEN_OPCG_REG0_SCAN_RATIO_LEN, 5);
CEN_FLD (CEN_OPCG_REG0_INOP_FORCE_SG, 9);
CEN_FLD (CEN_OPCG_REG0_INOP_ALIGN, 10);
CEN_FLD (CEN_OPCG_REG0_INOP_ALIGN_LEN, 4);
CEN_FLD (CEN_OPCG_REG0_INOP_WAIT, 14);
CEN_FLD (CEN_OPCG_REG0_INOP_WAIT_LEN, 7);
CEN_FLD (CEN_OPCG_REG0_SNOP_ALIGN, 21);
CEN_FLD (CEN_OPCG_REG0_SNOP_ALIGN_LEN, 4);
CEN_FLD (CEN_OPCG_REG0_SNOP_WAIT, 25);
CEN_FLD (CEN_OPCG_REG0_SNOP_WAIT_LEN, 3);
CEN_FLD (CEN_OPCG_REG0_ENOP_ALIGN, 28);
CEN_FLD (CEN_OPCG_REG0_ENOP_ALIGN_LEN, 4);
CEN_FLD (CEN_OPCG_REG0_ENOP_WAIT, 32);
CEN_FLD (CEN_OPCG_REG0_ENOP_WAIT_LEN, 3);
CEN_FLD (CEN_OPCG_REG0_ENOP_FORCE_SG, 35);
CEN_FLD (CEN_OPCG_REG0_LOOP_COUNT, 36);
CEN_FLD (CEN_OPCG_REG0_LOOP_COUNT_LEN, 28);

CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_COUNT, 0);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_COUNT_LEN, 4);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ01_01F, 4);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ01_01F_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ02_02F, 9);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ02_02F_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ03_03F, 14);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ03_03F_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ04_04F, 19);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ04_04F_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ05_05F, 24);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ05_05F_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ06_06F, 29);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ06_06F_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ07_07F, 34);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ07_07F_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ08_08F, 39);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ08_08F_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ09_01FBY2, 44);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ09_01FBY2_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ10_02FBY2, 49);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ10_02FBY2_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ11_03FBY2, 54);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ11_03FBY2_LEN, 5);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ12_04FBY2, 59);
CEN_FLD (CEN_OPCG_REG1_FUNC_CAPT_SEQ12_04FBY2_LEN, 5);

CEN_FLD (CEN_OPCG_REG2_SCAN_COUNT, 0);
CEN_FLD (CEN_OPCG_REG2_SCAN_COUNT_LEN, 12);
CEN_FLD (CEN_OPCG_REG2_MISR_A_VAL, 12);
CEN_FLD (CEN_OPCG_REG2_MISR_A_VAL_LEN, 12);
CEN_FLD (CEN_OPCG_REG2_MISR_B_VAL, 24);
CEN_FLD (CEN_OPCG_REG2_MISR_B_VAL_LEN, 12);
CEN_FLD (CEN_OPCG_REG2_MISR_INIT_WAIT, 36);
CEN_FLD (CEN_OPCG_REG2_MISR_INIT_WAIT_LEN, 12);
CEN_FLD (CEN_OPCG_REG2_SUPPRESS_EVEN_CLK, 48);
CEN_FLD (CEN_OPCG_REG2_PAD_VALUE, 49);
CEN_FLD (CEN_OPCG_REG2_PAD_VALUE_LEN, 3);
CEN_FLD (CEN_OPCG_REG2_USE_F_AND_FDIV2, 52);
CEN_FLD (CEN_OPCG_REG2_USE_ARY_CLK_DURING_FILL, 53);
CEN_FLD (CEN_OPCG_REG2_SG_HIGH_DURING_FILL, 54);
CEN_FLD (CEN_OPCG_REG2_RTIM_THOLD_FORCE, 55);
CEN_FLD (CEN_OPCG_REG2_LBIST_SKITTER_CTL, 56);
CEN_FLD (CEN_OPCG_REG2_MISR_MODE, 57);
CEN_FLD (CEN_OPCG_REG2_INFINITE_MODE, 58);
CEN_FLD (CEN_OPCG_REG2_NSL_FILL_COUNT, 59);
CEN_FLD (CEN_OPCG_REG2_NSL_FILL_COUNT_LEN, 5);

CEN_FLD (CEN_OPCG_REG3_GO2, 0);
CEN_FLD (CEN_OPCG_REG3_RUN_ON_UPDATE_DR, 1);
CEN_FLD (CEN_OPCG_REG3_RUN_ON_CAPTURE_DR, 2);
CEN_FLD (CEN_OPCG_REG3_ALIGN_SOURCE_SELECT, 3);
CEN_FLD (CEN_OPCG_REG3_ALIGN_SOURCE_SELECT_LEN, 2);
CEN_FLD (CEN_OPCG_REG3_PRPG_WEIGHTING, 5);
CEN_FLD (CEN_OPCG_REG3_PRPG_WEIGHTING_LEN, 3);
CEN_FLD (CEN_OPCG_REG3_PRPG_VALUE, 8);
CEN_FLD (CEN_OPCG_REG3_PRPG_VALUE_LEN, 12);
CEN_FLD (CEN_OPCG_REG3_EXTEND_INOPW_ENOPW, 20);
CEN_FLD (CEN_OPCG_REG3_EXTEND_SNOPW, 21);
CEN_FLD (CEN_OPCG_REG3_FORCE_SG_HIGH_DURING_SNOP, 22);
CEN_FLD (CEN_OPCG_REG3_CHKSW, 23);
CEN_FLD (CEN_OPCG_REG3_CHKSW_LEN, 9);
CEN_FLD (CEN_OPCG_REG3_PRPG_A_VAL, 32);
CEN_FLD (CEN_OPCG_REG3_PRPG_A_VAL_LEN, 12);
CEN_FLD (CEN_OPCG_REG3_PRPG_B_VAL, 44);
CEN_FLD (CEN_OPCG_REG3_PRPG_B_VAL_LEN, 12);
CEN_FLD (CEN_OPCG_REG3_PRPG_MODE, 56);
CEN_FLD (CEN_OPCG_REG3_SCAN_CLK_USE_EVEN, 57);
CEN_FLD (CEN_OPCG_REG3_AUTO_SCAN0, 58);
CEN_FLD (CEN_OPCG_REG3_SPARE3, 59);
CEN_FLD (CEN_OPCG_REG3_SPARE3_LEN, 5);

CEN_FLD (CEN_CLK_REGION_CLOCK_CMD, 0);
CEN_FLD (CEN_CLK_REGION_CLOCK_CMD_LEN, 2);
CEN_FLD (CEN_CLK_REGION_CLOCK_PERV, 4);
CEN_FLD (CEN_CLK_REGION_CLOCK_UNIT0, 5);
CEN_FLD (CEN_CLK_REGION_CLOCK_UNIT1, 6);
CEN_FLD (CEN_CLK_REGION_CLOCK_UNIT2, 7);
CEN_FLD (CEN_CLK_REGION_CLOCK_UNIT3, 8);
CEN_FLD (CEN_CLK_REGION_CLOCK_UNIT4, 9);
CEN_FLD (CEN_CLK_REGION_CLOCK_UNIT5, 10);
CEN_FLD (CEN_CLK_REGION_CLOCK_PLL, 11);
CEN_FLD (CEN_CLK_REGION_CLOCK_OSCSW, 12);
CEN_FLD (CEN_CLK_REGION_SEL_THOLD_SL, 20);
CEN_FLD (CEN_CLK_REGION_SEL_THOLD_NSL, 21);
CEN_FLD (CEN_CLK_REGION_SEL_THOLD_ARY, 22);

CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_VITL, 3);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_PERV, 4);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_UNIT0, 5);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_UNIT1, 6);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_UNIT2, 7);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_UNIT3, 8);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_UNIT4, 9);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_UNIT5, 10);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_PLL, 11);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CLK_OSCSW, 12);
CEN_FLD (CEN_SCANSELQ_SCANSEL_FUNC, 20);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CFG, 21);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CCFG_GPTR, 22);
CEN_FLD (CEN_SCANSELQ_SCANSEL_REGF, 23);
CEN_FLD (CEN_SCANSELQ_SCANSEL_LBIST, 24);
CEN_FLD (CEN_SCANSELQ_SCANSEL_ABIST, 25);
CEN_FLD (CEN_SCANSELQ_SCANSEL_REPR, 26);
CEN_FLD (CEN_SCANSELQ_SCANSEL_TIME, 27);
CEN_FLD (CEN_SCANSELQ_SCANSEL_BNDY, 28);
CEN_FLD (CEN_SCANSELQ_SCANSEL_FARR, 29);
CEN_FLD (CEN_SCANSELQ_SCANSEL_CMSK, 30);

CEN_FLD (CEN_CLOCK_STAT_STATUS_PERV_FUNC_SL, 0);
CEN_FLD (CEN_CLOCK_STAT_STATUS_PERV_FUNC_NSL, 1);
CEN_FLD (CEN_CLOCK_STAT_STATUS_PERV_ARY_NSL, 2);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT0_FUNC_SL, 3);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT0_FUNC_NSL, 4);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT0_ARY_NSL, 5);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT1_FUNC_SL, 6);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT1_FUNC_NSL, 7);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT1_ARY_NSL, 8);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT2_FUNC_SL, 9);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT2_FUNC_NSL, 10);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT2_ARY_NSL, 11);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT3_FUNC_SL, 12);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT3_FUNC_NSL, 13);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT3_ARY_NSL, 14);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT4_FUNC_SL, 15);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT4_FUNC_NSL, 16);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT4_ARY_NSL, 17);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT5_FUNC_SL, 18);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT5_FUNC_NSL, 19);
CEN_FLD (CEN_CLOCK_STAT_STATUS_UNIT5_ARY_NSL, 20);
CEN_FLD (CEN_CLOCK_STAT_STATUS_PLL_FUNC_SL, 21);
CEN_FLD (CEN_CLOCK_STAT_STATUS_PLL_FUNC_NSL, 22);
CEN_FLD (CEN_CLOCK_STAT_STATUS_PLL_ARY_NSL, 23);
CEN_FLD (CEN_CLOCK_STAT_STATUS_OSCSW_FUNC_SL, 24);
CEN_FLD (CEN_CLOCK_STAT_STATUS_OSCSW_FUNC_NSL, 25);
CEN_FLD (CEN_CLOCK_STAT_STATUS_OSCSW_ARY_NSL, 26);

CEN_FLD (CEN_ERROR_STATUS_PCB_WRITE_NOT_ALLOWED, 0);
CEN_FLD (CEN_ERROR_STATUS_PCB_READ_NOT_ALLOWED, 1);
CEN_FLD (CEN_ERROR_STATUS_PCB_PARITY_ERR_ON_CMD, 2);
CEN_FLD (CEN_ERROR_STATUS_PCB_ADDRESS_NOT_VALID, 3);
CEN_FLD (CEN_ERROR_STATUS_PCB_PARITY_ADDR_ERR, 4);
CEN_FLD (CEN_ERROR_STATUS_PCB_PARITY_DATA_ERR, 5);
CEN_FLD (CEN_ERROR_STATUS_PCB_PROTECTED_ACCESS_INVALID, 6);
CEN_FLD (CEN_ERROR_STATUS_PCB_PARITY_SPCIF_ERR, 7);
CEN_FLD (CEN_ERROR_STATUS_PCB_WRITE_AND_OPCG, 8);
CEN_FLD (CEN_ERROR_STATUS_CLOCK_CMD_CONFLICT, 9);
CEN_FLD (CEN_ERROR_STATUS_SCAN_COLLISION, 10);
CEN_FLD (CEN_ERROR_STATUS_OPCG_TRIGGER, 11);
CEN_FLD (CEN_ERROR_STATUS_OPCG_PARITY, 12);
CEN_FLD (CEN_ERROR_STATUS_PHASE_CNT_CORRUPTED, 13);
CEN_FLD (CEN_ERROR_STATUS_CC_PAR_ERR, 14);
CEN_FLD (CEN_ERROR_STATUS_CC_PAR_ERR_LEN, 2);
CEN_FLD (CEN_ERROR_STATUS_GPIO_PAR_ERR, 16);
CEN_FLD (CEN_ERROR_STATUS_SECURITY_VIOLATION, 17);

CEN_FLD (CEN_CC_PROTECT_MODE_REG_READ_ENABLE, 0);
CEN_FLD (CEN_CC_PROTECT_MODE_REG_WRITE_ENABLE, 1);

CEN_FLD (CEN_CC_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_CC_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_CC_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_GP0_NOT_USED0, 0);
CEN_FLD (CEN_GP0_NOT_USED1, 1);
CEN_FLD (CEN_GP0_TC_GPIO_FLUSHMODE_INH_DC_OUT, 2);
CEN_FLD (CEN_GP0_TC_GPIO_FORCEALIGN, 3);
CEN_FLD (CEN_GP0_TC_GPIO_AVP_MODE_DC_OUT, 4);
CEN_FLD (CEN_GP0_NOT_USED3, 5);
CEN_FLD (CEN_GP0_TC_GPIO_CC_SCAN_DIS_DC_B_OUT, 6);
CEN_FLD (CEN_GP0_NOT_USED2, 7);
CEN_FLD (CEN_GP0_TC_GPIO_LBIST_EN_DC_OUT, 8);
CEN_FLD (CEN_GP0_TC_UNIT_LBIST_AC_MODE_DC, 9);
CEN_FLD (CEN_GP0_TC_UNIT_LBIST_ARY_WRT_THRU_DC, 10);
CEN_FLD (CEN_GP0_TC_ABIST_MODE_DC, 11);
CEN_FLD (CEN_GP0_TC_GPIO_ABIST_START_TEST_DC_OUT, 12);
CEN_FLD (CEN_GP0_NOT_USED4, 13);
CEN_FLD (CEN_GP0_NOT_USED5, 14);
CEN_FLD (CEN_GP0_TC_GPIO_SCAN_PROTECT_DC_OUT, 15);
CEN_FLD (CEN_GP0_NOT_USED6, 16);
CEN_FLD (CEN_GP0_NOT_USED7, 17);
CEN_FLD (CEN_GP0_NOT_USED8, 18);
CEN_FLD (CEN_GP0_NOT_USED9, 19);
CEN_FLD (CEN_GP0_TP_GPIO_TRACE_START, 20);
CEN_FLD (CEN_GP0_TP_GPIO_TRACE_STOP, 21);
CEN_FLD (CEN_GP0_TP_GPIO_TRACE_RESET, 22);
CEN_FLD (CEN_GP0_TP_PIB_TRACE_MODE_DATA, 23);
CEN_FLD (CEN_GP0_TC_GPIO_CLKDIV_SEL_DC, 24);
CEN_FLD (CEN_GP0_TC_GPIO_CLKDIV_SEL_DC_LEN, 2);
CEN_FLD (CEN_GP0_NOT_USED10, 26);
CEN_FLD (CEN_GP0_NOT_USED11, 27);
CEN_FLD (CEN_GP0_NOT_USED12, 28);
CEN_FLD (CEN_GP0_NOT_USED12_LEN, 4);
CEN_FLD (CEN_GP0_TC_PSRO_SEL_DC, 32);
CEN_FLD (CEN_GP0_TC_PSRO_SEL_DC_LEN, 8);
CEN_FLD (CEN_GP0_NOT_USED13, 40);
CEN_FLD (CEN_GP0_NOT_USED13_LEN, 3);
CEN_FLD (CEN_GP0_NOT_USED14, 43);
CEN_FLD (CEN_GP0_NOT_USED14_LEN, 3);
CEN_FLD (CEN_GP0_TC_BSC_WRAPSEL_DC, 46);
CEN_FLD (CEN_GP0_TC_BSC_INTMODE_DC, 47);
CEN_FLD (CEN_GP0_TC_BSC_INV_DC, 48);
CEN_FLD (CEN_GP0_TC_BSC_EXTMODE_DC, 49);
CEN_FLD (CEN_GP0_NOT_USED15, 50);
CEN_FLD (CEN_GP0_NOT_USED16, 51);
CEN_FLD (CEN_GP0_NOT_USED17, 52);
CEN_FLD (CEN_GP0_NOT_USED18, 53);
CEN_FLD (CEN_GP0_NOT_USED19, 54);
CEN_FLD (CEN_GP0_NOT_USED20, 55);
CEN_FLD (CEN_GP0_NOT_USED21, 56);
CEN_FLD (CEN_GP0_NOT_USED22, 57);
CEN_FLD (CEN_GP0_NOT_USED23, 58);
CEN_FLD (CEN_GP0_NOT_USED24, 59);
CEN_FLD (CEN_GP0_TC_MASK_CC_PCB_ERR_DC, 60);
CEN_FLD (CEN_GP0_TC_MASK_CC_SCAN_OPCG_ERR_DC, 61);
CEN_FLD (CEN_GP0_NOT_USED25, 62);
CEN_FLD (CEN_GP0_TC_FENCE_PERV_DC, 63);

CEN_FLD (CEN_GP1_TRA_ABIST_DONE, 0);
CEN_FLD (CEN_GP1_NOT_USED26, 1);
CEN_FLD (CEN_GP1_NOT_USED27, 2);
CEN_FLD (CEN_GP1_NOT_USED28, 3);
CEN_FLD (CEN_GP1_NOT_USED29, 4);
CEN_FLD (CEN_GP1_NOT_USED30, 5);
CEN_FLD (CEN_GP1_NOT_USED31, 6);
CEN_FLD (CEN_GP1_NOT_USED32, 7);
CEN_FLD (CEN_GP1_NOT_USED33, 8);
CEN_FLD (CEN_GP1_NOT_USED34, 9);
CEN_FLD (CEN_GP1_NOT_USED35, 10);
CEN_FLD (CEN_GP1_NOT_USED36, 11);
CEN_FLD (CEN_GP1_NOT_USED37, 12);
CEN_FLD (CEN_GP1_NOT_USED38, 13);
CEN_FLD (CEN_GP1_NOT_USED39, 14);
CEN_FLD (CEN_GP1_TC_OPCG_DONE_DC, 15);
CEN_FLD (CEN_GP1_NOT_USED40, 16);
CEN_FLD (CEN_GP1_NOT_USED41, 17);
CEN_FLD (CEN_GP1_NOT_USED42, 18);
CEN_FLD (CEN_GP1_NOT_USED43, 19);
CEN_FLD (CEN_GP1_NOT_USED44, 20);
CEN_FLD (CEN_GP1_NOT_USED45, 21);
CEN_FLD (CEN_GP1_NOT_USED46, 22);
CEN_FLD (CEN_GP1_NOT_USED47, 23);

CEN_FLD (CEN_GP2_GPIN_MASKING, 0);
CEN_FLD (CEN_GP2_GPIN_MASKING_LEN, 24);

CEN_FLD (CEN_GP4_TC_PROBE0_SEL_DC, 0);
CEN_FLD (CEN_GP4_TC_PROBE0_SEL_DC_LEN, 6);
CEN_FLD (CEN_GP4_NOT_USED48, 6);
CEN_FLD (CEN_GP4_NOT_USED48_LEN, 2);
CEN_FLD (CEN_GP4_TC_PROBE1_SEL_DC, 8);
CEN_FLD (CEN_GP4_TC_PROBE1_SEL_DC_LEN, 6);
CEN_FLD (CEN_GP4_NOT_USED49, 14);
CEN_FLD (CEN_GP4_NOT_USED49_LEN, 2);
CEN_FLD (CEN_GP4_TC_PROBE2_SEL_DC, 16);
CEN_FLD (CEN_GP4_TC_PROBE2_SEL_DC_LEN, 6);
CEN_FLD (CEN_GP4_NOT_USED50, 22);
CEN_FLD (CEN_GP4_NOT_USED50_LEN, 2);
CEN_FLD (CEN_GP4_TC_PROBE3_SEL_DC, 24);
CEN_FLD (CEN_GP4_TC_PROBE3_SEL_DC_LEN, 6);
CEN_FLD (CEN_GP4_NOT_USED51, 30);
CEN_FLD (CEN_GP4_NOT_USED52, 31);
CEN_FLD (CEN_GP4_NOT_USED53, 32);
CEN_FLD (CEN_GP4_NOT_USED54, 33);
CEN_FLD (CEN_GP4_NOT_USED55, 34);
CEN_FLD (CEN_GP4_NOT_USED56, 35);
CEN_FLD (CEN_GP4_NOT_USED57, 36);
CEN_FLD (CEN_GP4_NOT_USED58, 37);
CEN_FLD (CEN_GP4_NOT_USED59, 38);
CEN_FLD (CEN_GP4_NOT_USED60, 39);
CEN_FLD (CEN_GP4_NOT_USED61, 40);
CEN_FLD (CEN_GP4_NOT_USED62, 41);
CEN_FLD (CEN_GP4_NOT_USED63, 42);
CEN_FLD (CEN_GP4_NOT_USED64, 43);
CEN_FLD (CEN_GP4_NOT_USED65, 44);
CEN_FLD (CEN_GP4_NOT_USED66, 45);
CEN_FLD (CEN_GP4_NOT_USED67, 46);
CEN_FLD (CEN_GP4_NOT_USED68, 47);
CEN_FLD (CEN_GP4_NOT_USED69, 48);
CEN_FLD (CEN_GP4_NOT_USED70, 49);
CEN_FLD (CEN_GP4_NOT_USED71, 50);
CEN_FLD (CEN_GP4_NOT_USED72, 51);
CEN_FLD (CEN_GP4_NOT_USED73, 52);
CEN_FLD (CEN_GP4_NOT_USED74, 53);
CEN_FLD (CEN_GP4_NOT_USED75, 54);
CEN_FLD (CEN_GP4_NOT_USED76, 55);
CEN_FLD (CEN_GP4_NOT_USED77, 56);
CEN_FLD (CEN_GP4_NOT_USED78, 57);
CEN_FLD (CEN_GP4_NOT_USED79, 58);
CEN_FLD (CEN_GP4_NOT_USED80, 59);
CEN_FLD (CEN_GP4_NOT_USED81, 60);
CEN_FLD (CEN_GP4_NOT_USED82, 61);
CEN_FLD (CEN_GP4_NOT_USED83, 62);
CEN_FLD (CEN_GP4_NOT_USED84, 63);

CEN_FLD (CEN_GPIO_PROTECT_MODE_REG_READ_ENABLE, 0);
CEN_FLD (CEN_GPIO_PROTECT_MODE_REG_WRITE_ENABLE, 1);

CEN_FLD (CEN_GPIO_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_GPIO_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_GPIO_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_XFIR_IN0, 0);
CEN_FLD (CEN_XFIR_IN1, 1);
CEN_FLD (CEN_XFIR_IN2, 2);
CEN_FLD (CEN_XFIR_IN3, 3);
CEN_FLD (CEN_XFIR_IN4, 4);
CEN_FLD (CEN_XFIR_IN4_LEN, 22);
CEN_FLD (CEN_XFIR_IN26, 26);

CEN_FLD (CEN_RFIR_IN0, 0);
CEN_FLD (CEN_RFIR_LFIR_RECOV_ERR, 1);
CEN_FLD (CEN_RFIR_IN, 2);
CEN_FLD (CEN_RFIR_IN_LEN, 22);

CEN_FLD (CEN_FIR_MASK_IN0, 0);
CEN_FLD (CEN_FIR_MASK_IN1, 1);
CEN_FLD (CEN_FIR_MASK_IN2, 2);
CEN_FLD (CEN_FIR_MASK_IN3, 3);
CEN_FLD (CEN_FIR_MASK_IN4, 4);
CEN_FLD (CEN_FIR_MASK_IN4_LEN, 23);

CEN_FLD (CEN_LOCAL_FIR_IN0, 0);
CEN_FLD (CEN_LOCAL_FIR_IN1, 1);
CEN_FLD (CEN_LOCAL_FIR_IN2, 2);
CEN_FLD (CEN_LOCAL_FIR_IN3, 3);
CEN_FLD (CEN_LOCAL_FIR_IN4, 4);
CEN_FLD (CEN_LOCAL_FIR_IN5, 5);
CEN_FLD (CEN_LOCAL_FIR_IN6, 6);
CEN_FLD (CEN_LOCAL_FIR_IN7, 7);
CEN_FLD (CEN_LOCAL_FIR_IN8, 8);
CEN_FLD (CEN_LOCAL_FIR_IN9, 9);
CEN_FLD (CEN_LOCAL_FIR_IN10, 10);
CEN_FLD (CEN_LOCAL_FIR_IN11, 11);
CEN_FLD (CEN_LOCAL_FIR_IN12, 12);
CEN_FLD (CEN_LOCAL_FIR_IN13, 13);
CEN_FLD (CEN_LOCAL_FIR_IN13_LEN, 2);
CEN_FLD (CEN_LOCAL_FIR_IN15, 15);
CEN_FLD (CEN_LOCAL_FIR_IN16, 16);
CEN_FLD (CEN_LOCAL_FIR_IN16_LEN, 3);
CEN_FLD (CEN_LOCAL_FIR_IN19, 19);
CEN_FLD (CEN_LOCAL_FIR_IN20, 20);
CEN_FLD (CEN_LOCAL_FIR_IN21, 21);
CEN_FLD (CEN_LOCAL_FIR_IN21_LEN, 19);
CEN_FLD (CEN_LOCAL_FIR_IN40, 40);

CEN_FLD (CEN_DBG_MODE_REG_GLB_BRCST, 0);
CEN_FLD (CEN_DBG_MODE_REG_GLB_BRCST_LEN, 3);
CEN_FLD (CEN_DBG_MODE_REG_TRACE_SEL, 3);
CEN_FLD (CEN_DBG_MODE_REG_TRACE_SEL_LEN, 2);
CEN_FLD (CEN_DBG_MODE_REG_TRIG_SEL, 5);
CEN_FLD (CEN_DBG_MODE_REG_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_DBG_MODE_REG_STOP_ON_XSTOP_SELECTION, 7);
CEN_FLD (CEN_DBG_MODE_REG_STOP_ON_RECOV_ERR_SELECTION, 8);
CEN_FLD (CEN_DBG_MODE_REG_STOP_ON_SPATTN_SELECTION, 9);
CEN_FLD (CEN_DBG_MODE_REG_FREEZE_SEL, 10);

CEN_FLD (CEN_DBG_INST1_COND_REG_1_COND1_SEL_A, 0);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_COND1_SEL_A_LEN, 7);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_COND1_SEL_B, 7);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_COND1_SEL_B_LEN, 7);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_COND2_SEL_A, 14);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_COND2_SEL_A_LEN, 7);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_COND2_SEL_B, 21);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_COND2_SEL_B_LEN, 7);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_C1_INAROW_MODE, 28);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE1, 29);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE1, 30);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE1, 31);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT1, 32);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT1_LEN, 3);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_C2_INAROW_MODE, 35);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE2, 36);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE2, 37);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE2, 38);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT2, 39);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_X_COUPLE_SELECT2_LEN, 3);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_COND3_ENABLE_RESET, 42);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_EXACT_TO_MODE, 43);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_RESET_C2TIMER_ON_C1, 44);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_RESET_C3_ON_C0, 45);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_SLOW_TO_MODE, 46);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_EXACT_RESET_C3_ON_TO, 47);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_C1_COUNT_LT, 48);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_C1_COUNT_LT_LEN, 4);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_C2_COUNT_LT, 52);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_C2_COUNT_LT_LEN, 4);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_RESET_C3_SELECT, 56);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_RESET_C3_SELECT_LEN, 3);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_CROSS_COUPLE_SELECT_1_A, 59);
CEN_FLD (CEN_DBG_INST1_COND_REG_1_CROSS_COUPLE_SELECT_1_A_LEN, 5);

CEN_FLD (CEN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B, 0);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN, 5);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_A, 5);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_A_LEN, 5);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_B, 10);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_2_B_LEN, 5);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_SP_COUNT_LT, 15);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_SP_COUNT_LT_LEN, 24);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_TO_CMP_LT_VALUE, 39);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_TO_CMP_LT_VALUE_LEN, 24);
CEN_FLD (CEN_DBG_INST1_COND_REG_2_FORCE_TEST_MODE, 63);

CEN_FLD (CEN_DBG_INST2_COND_REG_1_COND1_SEL_A, 0);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_COND1_SEL_A_LEN, 7);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_COND1_SEL_B, 7);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_COND1_SEL_B_LEN, 7);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_COND2_SEL_A, 14);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_COND2_SEL_A_LEN, 7);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_COND2_SEL_B, 21);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_COND2_SEL_B_LEN, 7);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_C1_INAROW_MODE, 28);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE1, 29);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE1, 30);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE1, 31);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT1, 32);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT1_LEN, 3);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_C2_INAROW_MODE, 35);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE2, 36);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE2, 37);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE2, 38);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT2, 39);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_X_COUPLE_SELECT2_LEN, 3);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_COND3_ENABLE_RESET, 42);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_EXACT_TO_MODE, 43);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_RESET_C2TIMER_ON_C1, 44);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_RESET_C3_ON_C0, 45);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_SLOW_TO_MODE, 46);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_EXACT_RESET_C3_ON_TO, 47);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_C1_COUNT_LT, 48);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_C1_COUNT_LT_LEN, 4);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_C2_COUNT_LT, 52);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_C2_COUNT_LT_LEN, 4);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_RESET_C3_SELECT, 56);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_RESET_C3_SELECT_LEN, 3);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_CROSS_COUPLE_SELECT_1_A, 59);
CEN_FLD (CEN_DBG_INST2_COND_REG_1_CROSS_COUPLE_SELECT_1_A_LEN, 5);

CEN_FLD (CEN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B, 0);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN, 5);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_A, 5);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_A_LEN, 5);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_B, 10);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_2_B_LEN, 5);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_SP_COUNT_LT, 15);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_SP_COUNT_LT_LEN, 24);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_TO_CMP_LT_VALUE, 39);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_TO_CMP_LT_VALUE_LEN, 24);
CEN_FLD (CEN_DBG_INST2_COND_REG_2_FORCE_TEST_MODE, 63);

CEN_FLD (CEN_DBG_TRACE_REG_0_INST1_COND3_ENABLE, 0);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST2_COND3_ENABLE, 1);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST3_COND3_ENABLE, 2);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST4_COND3_ENABLE, 3);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST1_SLOW_LFSR_MODE, 4);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST2_SLOW_LFSR_MODE, 5);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST3_SLOW_LFSR_MODE, 6);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST4_SLOW_LFSR_MODE, 7);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL, 8);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL, 10);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL, 12);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL, 14);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL, 16);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL, 18);
CEN_FLD (CEN_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_0_EXT_TRIG_ON_STOP, 32);
CEN_FLD (CEN_DBG_TRACE_REG_0_EXT_TRIG_ON_FREEZE, 33);
CEN_FLD (CEN_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL, 34);
CEN_FLD (CEN_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL_LEN, 5);
CEN_FLD (CEN_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL, 39);
CEN_FLD (CEN_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL_LEN, 5);
CEN_FLD (CEN_DBG_TRACE_REG_0_PC_TP_TRIG_SEL, 44);
CEN_FLD (CEN_DBG_TRACE_REG_0_PC_TP_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_0_ARM_SEL, 46);
CEN_FLD (CEN_DBG_TRACE_REG_0_ARM_SEL_LEN, 4);
CEN_FLD (CEN_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL, 50);
CEN_FLD (CEN_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL_LEN, 4);
CEN_FLD (CEN_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL, 54);
CEN_FLD (CEN_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL_LEN, 4);

CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO, 0);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO, 2);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO, 4);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO, 6);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO, 8);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO, 10);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO_LEN, 2);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_WAITN, 24);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_WAITN, 25);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_WAITN, 26);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_WAITN, 27);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_WAITN, 28);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_WAITN, 29);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_BANK, 36);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_BANK, 37);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_BANK, 38);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_BANK, 39);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_BANK, 40);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_BANK, 41);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT, 48);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT_LEN, 3);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_SELECTOR, 51);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT, 52);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT_LEN, 3);
CEN_FLD (CEN_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_SELECTOR, 55);

CEN_FLD (CEN_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE, 0);
CEN_FLD (CEN_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE_LEN, 16);
CEN_FLD (CEN_DBG_TRACE_MODE_REG_2_IMM_FREEZE, 16);
CEN_FLD (CEN_DBG_TRACE_MODE_REG_2_STOP_ON_ERR, 17);
CEN_FLD (CEN_DBG_TRACE_MODE_REG_2_BANK_ON_RUNN_MATCH, 18);
CEN_FLD (CEN_DBG_TRACE_MODE_REG_2_FORCE_TEST, 19);
CEN_FLD (CEN_DBG_TRACE_MODE_REG_2_ACCUM_HIST, 20);
CEN_FLD (CEN_DBG_TRACE_MODE_REG_2_FRZ_COUNT_ON, 21);

CEN_FLD (CEN_DTS_RESULT0_0_RESULT, 0);
CEN_FLD (CEN_DTS_RESULT0_0_RESULT_LEN, 16);
CEN_FLD (CEN_DTS_RESULT0_1_RESULT, 16);
CEN_FLD (CEN_DTS_RESULT0_1_RESULT_LEN, 16);

CEN_FLD (CEN_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE, 0);
CEN_FLD (CEN_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE_LEN, 44);
CEN_FLD (CEN_DTS_TRC_RESULT_TIMESTAMP_COUNTER_OVERFLOW_ERR, 44);
CEN_FLD (CEN_DTS_TRC_RESULT_0_RESULT, 48);
CEN_FLD (CEN_DTS_TRC_RESULT_0_RESULT_LEN, 16);

CEN_FLD (CEN_ENC_CPM_RESULT0_DTS_0_RESULT, 0);
CEN_FLD (CEN_ENC_CPM_RESULT0_DTS_0_RESULT_LEN, 16);
CEN_FLD (CEN_ENC_CPM_RESULT0_DTS_1_RESULT, 16);
CEN_FLD (CEN_ENC_CPM_RESULT0_DTS_1_RESULT_LEN, 16);


CEN_FLD (CEN_THERM_MODE_REG_DIS_CPM_BUBBLE_CORR, 0);
CEN_FLD (CEN_THERM_MODE_REG_FORCE_THRES_ACT, 1);
CEN_FLD (CEN_THERM_MODE_REG_THRES_TRIP_ENA, 2);
CEN_FLD (CEN_THERM_MODE_REG_THRES_TRIP_ENA_LEN, 3);
CEN_FLD (CEN_THERM_MODE_REG_DTS_SAMPLE_ENA, 5);
CEN_FLD (CEN_THERM_MODE_REG_SAMPLE_PULSE_CNT, 6);
CEN_FLD (CEN_THERM_MODE_REG_SAMPLE_PULSE_CNT_LEN, 4);
CEN_FLD (CEN_THERM_MODE_REG_THRES_ENA, 10);
CEN_FLD (CEN_THERM_MODE_REG_THRES_ENA_LEN, 2);
CEN_FLD (CEN_THERM_MODE_REG_DTS_TRIGGER, 12);
CEN_FLD (CEN_THERM_MODE_REG_DTS_TRIGGER_SEL, 13);
CEN_FLD (CEN_THERM_MODE_REG_UNUSED, 14);
CEN_FLD (CEN_THERM_MODE_REG_UNUSED_LEN, 2);
CEN_FLD (CEN_THERM_MODE_REG_DTS_READ_SEL, 16);
CEN_FLD (CEN_THERM_MODE_REG_DTS_READ_SEL_LEN, 4);
CEN_FLD (CEN_THERM_MODE_REG_DTS_ENABLE, 20);
CEN_FLD (CEN_THERM_MODE_REG_DTS_ENABLE_LEN, 2);
CEN_FLD (CEN_THERM_MODE_REG_CPM_ENABLE, 35);
CEN_FLD (CEN_THERM_MODE_REG_CPM_ENABLE_LEN, 2);

CEN_FLD (CEN_SKITTER_MODE_REG_HOLD_SAMPLE, 0);
CEN_FLD (CEN_SKITTER_MODE_REG_DISABLE_STICKINESS, 1);
CEN_FLD (CEN_SKITTER_MODE_REG_UNUSED1, 2);
CEN_FLD (CEN_SKITTER_MODE_REG_UNUSED1_LEN, 2);
CEN_FLD (CEN_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL, 4);
CEN_FLD (CEN_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL_LEN, 2);
CEN_FLD (CEN_SKITTER_MODE_REG_RESET_TRIG_SEL, 6);
CEN_FLD (CEN_SKITTER_MODE_REG_RESET_TRIG_SEL_LEN, 2);
CEN_FLD (CEN_SKITTER_MODE_REG_SAMPLE_GUTS, 8);
CEN_FLD (CEN_SKITTER_MODE_REG_SAMPLE_GUTS_LEN, 2);
CEN_FLD (CEN_SKITTER_MODE_REG_HOLD_SAMPLE_WITH_TRIGGER, 44);
CEN_FLD (CEN_SKITTER_MODE_REG_DATA_V_LT, 45);

CEN_FLD (CEN_SKITTER_CLKSRC_REG_SKITTER0, 0);
CEN_FLD (CEN_SKITTER_CLKSRC_REG_SKITTER0_LEN, 3);

CEN_FLD (CEN_INJECT_REG_THERM_TRIP, 0);
CEN_FLD (CEN_INJECT_REG_THERM_TRIP_LEN, 2);
CEN_FLD (CEN_INJECT_REG_THERM_MODE, 2);
CEN_FLD (CEN_INJECT_REG_THERM_MODE_LEN, 2);


CEN_FLD (CEN_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_MASK, 16);
CEN_FLD (CEN_ERR_STATUS_REG_THERM_MODEREG_PARITY_MASK, 17);
CEN_FLD (CEN_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_MASK, 18);
CEN_FLD (CEN_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_MASK, 19);
CEN_FLD (CEN_ERR_STATUS_REG_SCAN_INIT_VERSION_REG_PARITY_MASK, 20);
CEN_FLD (CEN_ERR_STATUS_REG_VOLT_MODEREG_PARITY_MASK, 21);
CEN_FLD (CEN_ERR_STATUS_REG_COUNT_STATE_MASK, 23);
CEN_FLD (CEN_ERR_STATUS_REG_RUN_STATE_MASK, 24);
CEN_FLD (CEN_ERR_STATUS_REG_THRES_STATE_MASK, 25);
CEN_FLD (CEN_ERR_STATUS_REG_OVERFLOW_MASK, 26);
CEN_FLD (CEN_ERR_STATUS_REG_SHIFTER_PARITY_MASK, 27);
CEN_FLD (CEN_ERR_STATUS_REG_SHIFTER_VALID_MASK, 28);
CEN_FLD (CEN_ERR_STATUS_REG_TIMEOUT_MASK, 29);
CEN_FLD (CEN_ERR_STATUS_REG_F_SKITTER_READ_MASK, 30);
CEN_FLD (CEN_ERR_STATUS_REG_PCB_MASK, 31);

CEN_FLD (CEN_SKITTER_FORCE_REG_F_READ, 0);

CEN_FLD (CEN_VOLT_MODE_REG_MEASURE_ENA, 0);
CEN_FLD (CEN_VOLT_MODE_REG_TRIP_ENA, 1);
CEN_FLD (CEN_VOLT_MODE_REG_ENABLE, 2);
CEN_FLD (CEN_VOLT_MODE_REG_ENABLE_LEN, 2);




CEN_FLD (CEN_TIMESTAMP_COUNTER_READ_VALUE, 0);
CEN_FLD (CEN_TIMESTAMP_COUNTER_READ_VALUE_LEN, 44);
CEN_FLD (CEN_TIMESTAMP_COUNTER_READ_OVERFLOW_ERR, 44);

CEN_FLD (CEN_SPATTN_IN0, 0);
CEN_FLD (CEN_SPATTN_IN1, 1);
CEN_FLD (CEN_SPATTN_IN2, 2);
CEN_FLD (CEN_SPATTN_IN2_LEN, 8);

CEN_FLD (CEN_SPA_MASK_IN, 0);
CEN_FLD (CEN_SPA_MASK_IN_LEN, 10);

CEN_FLD (CEN_MODE_REG_IN0, 0);
CEN_FLD (CEN_MODE_REG_IN1, 1);
CEN_FLD (CEN_MODE_REG_IN2, 2);
CEN_FLD (CEN_MODE_REG_IN3, 3);
CEN_FLD (CEN_MODE_REG_IN4, 4);
CEN_FLD (CEN_MODE_REG_IN5, 5);
CEN_FLD (CEN_MODE_REG_IN6, 6);
CEN_FLD (CEN_MODE_REG_IN7, 7);
CEN_FLD (CEN_MODE_REG_IN8, 8);
CEN_FLD (CEN_MODE_REG_IN9, 9);
CEN_FLD (CEN_MODE_REG_IN10, 10);
CEN_FLD (CEN_MODE_REG_IN11, 11);
CEN_FLD (CEN_MODE_REG_IN, 12);
CEN_FLD (CEN_MODE_REG_IN_LEN, 4);

CEN_FLD (CEN_LOCAL_FIR_ACTION0_IN, 0);
CEN_FLD (CEN_LOCAL_FIR_ACTION0_IN_LEN, 41);

CEN_FLD (CEN_LOCAL_FIR_ACTION1_IN, 0);
CEN_FLD (CEN_LOCAL_FIR_ACTION1_IN_LEN, 41);

CEN_FLD (CEN_LOCAL_FIR_MASK_LFIR_IN, 0);
CEN_FLD (CEN_LOCAL_FIR_MASK_LFIR_IN_LEN, 41);

CEN_FLD (CEN_PSCOM_MODE_REG_ABORT_ON_PCB_ADDR_PARITY_ERROR, 0);
CEN_FLD (CEN_PSCOM_MODE_REG_ABORT_ON_PCB_WDATA_PARITY_ERROR, 1);
CEN_FLD (CEN_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_P0_ERROR, 2);
CEN_FLD (CEN_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_WDATA_PARITY_ERROR, 3);
CEN_FLD (CEN_PSCOM_MODE_REG_WATCHDOG_ENABLE, 4);
CEN_FLD (CEN_PSCOM_MODE_REG_SCOM_HANG_LIMIT, 5);
CEN_FLD (CEN_PSCOM_MODE_REG_SCOM_HANG_LIMIT_LEN, 2);
CEN_FLD (CEN_PSCOM_MODE_REG_FORCE_ALL_RINGS, 7);
CEN_FLD (CEN_PSCOM_MODE_REG_FSM_SELFRESET_ON_STATEVEC_PARITYERROR_ENABLE, 8);
CEN_FLD (CEN_PSCOM_MODE_REG_RESERVED_LT, 9);
CEN_FLD (CEN_PSCOM_MODE_REG_RESERVED_LT_LEN, 3);

CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_WDATA_PARITY, 0);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_ADDRESS_PARITY, 1);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_WDATA_PARITY, 2);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_P0, 3);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_RDATA_PARITY, 4);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_P0, 5);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_INTERFACE_MACHINE, 6);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_P2S_MACHINE, 7);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULCCH, 8);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN, 9);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULDCH, 10);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_WRITE_NVLD, 11);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_READ_NVLD, 12);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_ADDR_INVALID, 13);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_COMMAND_PARITY, 14);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_GENERAL_TIMEOUT, 15);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION, 16);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER, 17);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_WDATA_PARITY, 18);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_ADDRESS_PARITY, 19);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_WDATA_PARITY, 20);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_P0, 21);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_RDATA_PARITY, 22);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_P0, 23);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_INTERFACE_MACHINE, 24);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_P2S_MACHINE, 25);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULCCH, 26);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN, 27);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULDCH, 28);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_WRITE_NVLD, 29);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_READ_NVLD, 30);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_ADDR_INVALID, 31);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_COMMAND_PARITY, 32);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_GENERAL_TIMEOUT, 33);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION, 34);
CEN_FLD (CEN_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER, 35);

CEN_FLD (CEN_PSCOM_ERROR_MASK_PCB_WDATA_PARITY, 0);
CEN_FLD (CEN_PSCOM_ERROR_MASK_PCB_ADDRESS_PARITY, 1);
CEN_FLD (CEN_PSCOM_ERROR_MASK_DL_RETURN_WDATA_PARITY, 2);
CEN_FLD (CEN_PSCOM_ERROR_MASK_DL_RETURN_P0, 3);
CEN_FLD (CEN_PSCOM_ERROR_MASK_UL_RDATA_PARITY, 4);
CEN_FLD (CEN_PSCOM_ERROR_MASK_UL_P0, 5);
CEN_FLD (CEN_PSCOM_ERROR_MASK_PARITY_ON_INTERFACE_MACHINE, 6);
CEN_FLD (CEN_PSCOM_ERROR_MASK_PARITY_ON_P2S_MACHINE, 7);
CEN_FLD (CEN_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH, 8);
CEN_FLD (CEN_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN, 9);
CEN_FLD (CEN_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULDCH, 10);
CEN_FLD (CEN_PSCOM_ERROR_MASK_MASK_PARALLEL_WRITE_NVLD, 11);
CEN_FLD (CEN_PSCOM_ERROR_MASK_MASK_PARALLEL_READ_NVLD, 12);
CEN_FLD (CEN_PSCOM_ERROR_MASK_MASK_PARALLEL_ADDR_INVALID, 13);
CEN_FLD (CEN_PSCOM_ERROR_MASK_PCB_COMMAND_PARITY, 14);
CEN_FLD (CEN_PSCOM_ERROR_MASK_GENERAL_TIMEOUT, 15);
CEN_FLD (CEN_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION, 16);
CEN_FLD (CEN_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER, 17);

CEN_FLD (CEN_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR, 0);
CEN_FLD (CEN_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN, 16);
CEN_FLD (CEN_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR, 16);
CEN_FLD (CEN_ADDR_TRAP_REG_RESERVED_LAST_LT, 17);
CEN_FLD (CEN_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR, 18);
CEN_FLD (CEN_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN, 13);
CEN_FLD (CEN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY, 31);
CEN_FLD (CEN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR, 32);
CEN_FLD (CEN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION, 33);
CEN_FLD (CEN_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER, 34);

CEN_FLD (CEN_DEBUG_STATUS_REG_LOCAL_TRACE_RUN_IN, 0);
CEN_FLD (CEN_DEBUG_STATUS_REG_TRACE_STATE_LAT, 1);
CEN_FLD (CEN_DEBUG_STATUS_REG_TRACE_STATE_LAT_LEN, 2);
CEN_FLD (CEN_DEBUG_STATUS_REG_TRACE_FREEZE, 3);
CEN_FLD (CEN_DEBUG_STATUS_REG_COND3_STATE_LT, 4);
CEN_FLD (CEN_DEBUG_STATUS_REG_COND3_STATE_LT_LEN, 2);
CEN_FLD (CEN_DEBUG_STATUS_REG_COND5_STATE_LT, 6);
CEN_FLD (CEN_DEBUG_STATUS_REG_COND5_STATE_LT_LEN, 2);
CEN_FLD (CEN_DEBUG_STATUS_REG_HISTORY_CONDITION0_LT, 8);
CEN_FLD (CEN_DEBUG_STATUS_REG_HISTORY_CONDITION1_LT, 9);
CEN_FLD (CEN_DEBUG_STATUS_REG_HISTORY_COND2_3_EVENT, 10);
CEN_FLD (CEN_DEBUG_STATUS_REG_HISTORY_COND2_TIMEOUT, 11);
CEN_FLD (CEN_DEBUG_STATUS_REG_HISTORY_COND4_5_EVENT, 12);
CEN_FLD (CEN_DEBUG_STATUS_REG_HISTORY_COND4_TIMEOUT, 13);
CEN_FLD (CEN_DEBUG_STATUS_REG_RESERVED_TCDBG_LT, 14);
CEN_FLD (CEN_DEBUG_STATUS_REG_RESERVED_TCDBG_LT_LEN, 2);

CEN_FLD (CEN_PSCOM_WRITE_PROTECT_REG_ENABLE_SERIAL_RING, 0);
CEN_FLD (CEN_PSCOM_WRITE_PROTECT_REG_RESERVED, 1);

CEN_FLD (CEN_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE, 1);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE, 2);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRCTRL_CONFIG_EXTENDED_STORE_ON_TRIG_MODE_LEN, 8);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRCTRL_CONFIG_BANK_MODE, 10);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRCTRL_CONFIG_ENH_MODE, 11);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL, 12);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRCTRL_CONFIG_LCL_CLK_GATE_CTRL_LEN, 2);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN, 64);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN, 24);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_2_PATTERNA, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN, 24);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_2_PATTERNB, 24);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN, 24);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_3_PATTERNC, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN, 24);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_3_PATTERND, 24);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_3_PATTERND_LEN, 24);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_4_MASKA, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_4_MASKA_LEN, 24);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_4_MASKB, 24);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_4_MASKB_LEN, 24);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_5_MASKC, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_5_MASKC_LEN, 24);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_5_MASKD, 24);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_5_MASKD_LEN, 24);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK, 1);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL, 2);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN, 2);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL, 4);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN, 2);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL, 6);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN, 2);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL, 8);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN, 2);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK, 10);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN, 4);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK, 14);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN, 4);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK, 18);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN, 4);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK, 22);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN, 4);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE, 26);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE, 27);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE, 28);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN, 4);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_HI_DATA_REG_DATA, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_HI_DATA_REG_DATA_LEN, 64);

CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_DATA, 0);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_DATA_LEN, 32);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_ADDRESS, 32);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_ADDRESS_LEN, 10);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_LAST_BANK, 42);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_LAST_BANK_LEN, 9);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_LAST_BANK_VALID, 51);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_WRITE_ON_RUN, 52);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_RUNNING, 53);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_HOLD_ADDRESS, 54);
CEN_FLD (CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN, 10);

CEN_FLD (CEN_FMU_MODE_REG_TOD_CNTR_REF, 0);
CEN_FLD (CEN_FMU_MODE_REG_TOD_CNTR_REF_LEN, 16);
CEN_FLD (CEN_FMU_MODE_REG_POWER_UP_CNTR_REF, 17);
CEN_FLD (CEN_FMU_MODE_REG_POWER_UP_CNTR_REF_LEN, 3);

CEN_FLD (CEN_FMU_OSC_CNTR1_REG_RESULT_AVAILABLE, 3);
CEN_FLD (CEN_FMU_OSC_CNTR1_REG_PULSE1_CNTR, 4);
CEN_FLD (CEN_FMU_OSC_CNTR1_REG_PULSE1_CNTR_LEN, 24);

CEN_FLD (CEN_FMU_PULSE_GEN_REG_INT_ENA, 0);
CEN_FLD (CEN_FMU_PULSE_GEN_REG_INT_CNTR_REF, 2);
CEN_FLD (CEN_FMU_PULSE_GEN_REG_INT_CNTR_REF_LEN, 10);

CEN_FLD (CEN_FMU_OSC_CNTR2_REG_RESULT_AVAILABLE, 3);
CEN_FLD (CEN_FMU_OSC_CNTR2_REG_PULSE2_CNTR, 4);
CEN_FLD (CEN_FMU_OSC_CNTR2_REG_PULSE2_CNTR_LEN, 24);


CEN_FLD (CEN_HOST_MASK_REG_IPOLL_X, 0);
CEN_FLD (CEN_HOST_MASK_REG_IPOLL_R, 1);
CEN_FLD (CEN_HOST_MASK_REG_IPOLL_A, 2);
CEN_FLD (CEN_HOST_MASK_REG_IPOLL_H, 3);
CEN_FLD (CEN_HOST_MASK_REG_ERROR_X, 4);
CEN_FLD (CEN_HOST_MASK_REG_ERROR_R, 5);
CEN_FLD (CEN_HOST_MASK_REG_ERROR_A, 6);
CEN_FLD (CEN_HOST_MASK_REG_ERROR_H, 7);


CEN_FLD (CEN_OSCERR_HOLD_CP, 0);
CEN_FLD (CEN_OSCERR_HOLD_CP_LEN, 4);
CEN_FLD (CEN_OSCERR_HOLD_MEM, 4);
CEN_FLD (CEN_OSCERR_HOLD_MEM_LEN, 4);
CEN_FLD (CEN_OSCERR_HOLD_GX, 8);
CEN_FLD (CEN_OSCERR_HOLD_GX_LEN, 4);
CEN_FLD (CEN_OSCERR_HOLD_CPLITE, 12);
CEN_FLD (CEN_OSCERR_HOLD_CPLITE_LEN, 4);

CEN_FLD (CEN_OSCERR_MASK_CP, 0);
CEN_FLD (CEN_OSCERR_MASK_CP_LEN, 4);
CEN_FLD (CEN_OSCERR_MASK_MEM, 4);
CEN_FLD (CEN_OSCERR_MASK_MEM_LEN, 4);
CEN_FLD (CEN_OSCERR_MASK_GX, 8);
CEN_FLD (CEN_OSCERR_MASK_GX_LEN, 4);
CEN_FLD (CEN_OSCERR_MASK_CPLITE, 12);
CEN_FLD (CEN_OSCERR_MASK_CPLITE_LEN, 4);

CEN_FLD (CEN_OSCERR_MCODE_IN, 0);
CEN_FLD (CEN_OSCERR_MCODE_IN_LEN, 4);

CEN_FLD (CEN_INTERRUPT1_REG_INTERRUPT1, 0);
CEN_FLD (CEN_INTERRUPT1_REG_INTERRUPT1_LEN, 32);

CEN_FLD (CEN_INTERRUPT2_REG_INTERRUPT2, 0);
CEN_FLD (CEN_INTERRUPT2_REG_INTERRUPT2_LEN, 32);

CEN_FLD (CEN_INTERRUPT3_REG_INTERRUPT3, 0);
CEN_FLD (CEN_INTERRUPT3_REG_INTERRUPT3_LEN, 32);

CEN_FLD (CEN_INTERRUPT4_REG_INTERRUPT4, 0);
CEN_FLD (CEN_INTERRUPT4_REG_INTERRUPT4_LEN, 32);

CEN_FLD (CEN_INTERRUPT_TYPE_MASK_REG_GP, 0);
CEN_FLD (CEN_INTERRUPT_TYPE_MASK_REG_CC, 1);
CEN_FLD (CEN_INTERRUPT_TYPE_MASK_REG_UNUSED2, 2);
CEN_FLD (CEN_INTERRUPT_TYPE_MASK_REG_UNUSED3, 3);

CEN_FLD (CEN_INTERRUPT_CONF_REG_GP, 0);
CEN_FLD (CEN_INTERRUPT_CONF_REG_CC, 1);
CEN_FLD (CEN_INTERRUPT_CONF_REG_UNUSED2, 2);
CEN_FLD (CEN_INTERRUPT_CONF_REG_UNUSED3, 3);

CEN_FLD (CEN_INTERRUPT_HOLD_REG_HOLD, 0);
CEN_FLD (CEN_INTERRUPT_HOLD_REG_HOLD_LEN, 26);


CEN_FLD (CEN_PCBSLPERV_MULTICAST_GROUP_1_MULTICAST1, 3);
CEN_FLD (CEN_PCBSLPERV_MULTICAST_GROUP_1_MULTICAST1_LEN, 3);

CEN_FLD (CEN_PCBSLPERV_MULTICAST_GROUP_2_MULTICAST2, 3);
CEN_FLD (CEN_PCBSLPERV_MULTICAST_GROUP_2_MULTICAST2_LEN, 3);

CEN_FLD (CEN_PCBSLPERV_MULTICAST_GROUP_3_MULTICAST3, 3);
CEN_FLD (CEN_PCBSLPERV_MULTICAST_GROUP_3_MULTICAST3_LEN, 3);

CEN_FLD (CEN_PCBSLPERV_MULTICAST_GROUP_4_MULTICAST4, 3);
CEN_FLD (CEN_PCBSLPERV_MULTICAST_GROUP_4_MULTICAST4_LEN, 3);



CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CE, 0);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CHIPLET_ERRORS, 1);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CHIPLET_ERRORS_LEN, 3);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_PARITY, 4);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_DATA_BUFFER, 5);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_ADDR_BUFFER, 6);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_PCB_FSM, 7);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CL_FSM, 8);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_INT_RX_FSM, 9);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_INT_TX_FSM, 10);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_INT_TYPE, 11);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CL_DATA, 12);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_INFO, 13);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_UNUSED_0, 14);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CHIPLET_ATOMIC_LOCK, 15);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_PCB_INTERFACE, 16);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CHIPLET_OFFLINE, 17);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CHIPLET_GRID_SKITTER, 18);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_GP3_PARITY, 19);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_ADDRESS_PARITY, 20);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_TIMEOUT_PARITY, 21);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CONFIG_PARITY, 22);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_CLK_ADJ_PARITY, 23);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_DIV_PARITY, 24);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_PLL_UNLOCK, 25);
CEN_FLD (CEN_PCBSLPERV_ERROR_REG_PLL_UNLOCK_LEN, 4);

CEN_FLD (CEN_PCBSLPERV_GP3_REG_CHIPLET_ENABLE, 0);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_PCB_EP_RESET, 1);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_TP_CPLT_PRV_CLKOFF_DC, 3);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_NCLK_NODIV, 5);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_VITAL_SCAN, 6);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_VITAL_SCAN_IN, 7);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_D_MODE, 11);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_ACT_DIS, 12);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_MPW2, 13);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_MPW1, 14);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_DELAY_LCLKR, 15);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_VITAL_THOLD, 16);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_FENCE2_EN, 17);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_FENCE_EN, 18);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_RESCLK_FLUSH, 22);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_RESCLK_OVERRIDE_VALUE, 23);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_DPHY_PLL, 24);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_TP_FENCE_PCB, 26);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_FSYNC_ENABLE, 27);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_L3_EDRAM_ENABLE, 28);
CEN_FLD (CEN_PCBSLPERV_GP3_REG_PGENABLE, 31);


CEN_FLD (CEN_PCBSLPERV_CLK_ADJ_SET_REG, 0);
CEN_FLD (CEN_PCBSLPERV_CLK_ADJ_SET_REG_LEN, 32);


CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_0_REG_0, 0);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_0_REG_0_LEN, 6);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_0_REG_SUPPRESS_0, 6);

CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_1_REG_1, 0);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_1_REG_1_LEN, 6);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_1_REG_SUPPRESS_1, 6);

CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_2_REG_2, 0);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_2_REG_2_LEN, 6);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_2_REG_SUPPRESS_2, 6);

CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_3_REG_3, 0);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_3_REG_3_LEN, 6);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_3_REG_SUPPRESS_3, 6);

CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_4_REG_4, 0);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_4_REG_4_LEN, 6);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_4_REG_SUPPRESS_4, 6);

CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_5_REG_5, 0);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_5_REG_5_LEN, 6);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_5_REG_SUPPRESS_5, 6);

CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_6_REG_6, 0);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_6_REG_6_LEN, 6);
CEN_FLD (CEN_PCBSLPERV_HANG_PULSE_6_REG_SUPPRESS_6, 6);

CEN_FLD (CEN_PCBSLPERV_PRE_COUNTER_REG_COUNTER, 0);
CEN_FLD (CEN_PCBSLPERV_PRE_COUNTER_REG_COUNTER_LEN, 8);

CEN_FLD (CEN_PCBSLPERV_SLAVE_CONFIG_REG_CFG_DISABLE_PERV_THOLD_CHECK, 0);
CEN_FLD (CEN_PCBSLPERV_SLAVE_CONFIG_REG_CFG_DISABLE_MALF_PULSE_GEN, 1);
CEN_FLD (CEN_PCBSLPERV_SLAVE_CONFIG_REG_CFG_STOP_HANG_CNT_SYS_XSTP, 2);
CEN_FLD (CEN_PCBSLPERV_SLAVE_CONFIG_REG_CFG_DISABLE_CL_ATOMIC_LOCK, 3);
CEN_FLD (CEN_PCBSLPERV_SLAVE_CONFIG_REG_CFG_DISABLE_HEARTBEAT, 4);
CEN_FLD (CEN_PCBSLPERV_SLAVE_CONFIG_REG_ERROR_MASK, 8);
CEN_FLD (CEN_PCBSLPERV_SLAVE_CONFIG_REG_ERROR_MASK_LEN, 5);

CEN_FLD (CEN_PCBSLPERV_HEARTBEAT_REG_DEAD, 0);





CEN_FLD (CEN_PCBSLPERV_PROTECT_MODE_REG_READ_ENABLE, 0);
CEN_FLD (CEN_PCBSLPERV_PROTECT_MODE_REG_WRITE_ENABLE, 1);

CEN_FLD (CEN_PCBSLPERV_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_PCBSLPERV_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_PCBSLPERV_ATOMIC_LOCK_REG_ID_LEN, 4);


CEN_FLD (CEN_PCBSLNEST_MULTICAST_GROUP_1_MULTICAST1, 3);
CEN_FLD (CEN_PCBSLNEST_MULTICAST_GROUP_1_MULTICAST1_LEN, 3);

CEN_FLD (CEN_PCBSLNEST_MULTICAST_GROUP_2_MULTICAST2, 3);
CEN_FLD (CEN_PCBSLNEST_MULTICAST_GROUP_2_MULTICAST2_LEN, 3);

CEN_FLD (CEN_PCBSLNEST_MULTICAST_GROUP_3_MULTICAST3, 3);
CEN_FLD (CEN_PCBSLNEST_MULTICAST_GROUP_3_MULTICAST3_LEN, 3);

CEN_FLD (CEN_PCBSLNEST_MULTICAST_GROUP_4_MULTICAST4, 3);
CEN_FLD (CEN_PCBSLNEST_MULTICAST_GROUP_4_MULTICAST4_LEN, 3);



CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CE, 0);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CHIPLET_ERRORS, 1);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CHIPLET_ERRORS_LEN, 3);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_PARITY, 4);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_DATA_BUFFER, 5);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_ADDR_BUFFER, 6);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_PCB_FSM, 7);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CL_FSM, 8);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_INT_RX_FSM, 9);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_INT_TX_FSM, 10);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_INT_TYPE, 11);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CL_DATA, 12);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_INFO, 13);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_UNUSED_0, 14);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CHIPLET_ATOMIC_LOCK, 15);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_PCB_INTERFACE, 16);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CHIPLET_OFFLINE, 17);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CHIPLET_GRID_SKITTER, 18);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_GP3_PARITY, 19);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_ADDRESS_PARITY, 20);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_TIMEOUT_PARITY, 21);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CONFIG_PARITY, 22);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_CLK_ADJ_PARITY, 23);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_DIV_PARITY, 24);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_PLL_UNLOCK, 25);
CEN_FLD (CEN_PCBSLNEST_ERROR_REG_PLL_UNLOCK_LEN, 4);

CEN_FLD (CEN_PCBSLNEST_GP3_REG_CHIPLET_ENABLE, 0);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_PCB_EP_RESET, 1);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_TP_CPLT_PRV_CLKOFF_DC, 3);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_NCLK_NODIV, 5);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_VITAL_SCAN, 6);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_VITAL_SCAN_IN, 7);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_D_MODE, 11);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_ACT_DIS, 12);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_MPW2, 13);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_MPW1, 14);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_DELAY_LCLKR, 15);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_VITAL_THOLD, 16);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_FENCE2_EN, 17);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_FENCE_EN, 18);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_RESCLK_FLUSH, 22);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_RESCLK_OVERRIDE_VALUE, 23);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_DPHY_PLL, 24);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_TP_FENCE_PCB, 26);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_FSYNC_ENABLE, 27);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_L3_EDRAM_ENABLE, 28);
CEN_FLD (CEN_PCBSLNEST_GP3_REG_PGENABLE, 31);


CEN_FLD (CEN_PCBSLNEST_CLK_ADJ_SET_REG, 0);
CEN_FLD (CEN_PCBSLNEST_CLK_ADJ_SET_REG_LEN, 32);


CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_0_REG_0, 0);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_0_REG_0_LEN, 6);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_0_REG_SUPPRESS_0, 6);

CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_1_REG_1, 0);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_1_REG_1_LEN, 6);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_1_REG_SUPPRESS_1, 6);

CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_2_REG_2, 0);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_2_REG_2_LEN, 6);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_2_REG_SUPPRESS_2, 6);

CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_3_REG_3, 0);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_3_REG_3_LEN, 6);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_3_REG_SUPPRESS_3, 6);

CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_4_REG_4, 0);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_4_REG_4_LEN, 6);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_4_REG_SUPPRESS_4, 6);

CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_5_REG_5, 0);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_5_REG_5_LEN, 6);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_5_REG_SUPPRESS_5, 6);

CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_6_REG_6, 0);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_6_REG_6_LEN, 6);
CEN_FLD (CEN_PCBSLNEST_HANG_PULSE_6_REG_SUPPRESS_6, 6);

CEN_FLD (CEN_PCBSLNEST_PRE_COUNTER_REG_COUNTER, 0);
CEN_FLD (CEN_PCBSLNEST_PRE_COUNTER_REG_COUNTER_LEN, 8);

CEN_FLD (CEN_PCBSLNEST_SLAVE_CONFIG_REG_CFG_DISABLE_PERV_THOLD_CHECK, 0);
CEN_FLD (CEN_PCBSLNEST_SLAVE_CONFIG_REG_CFG_DISABLE_MALF_PULSE_GEN, 1);
CEN_FLD (CEN_PCBSLNEST_SLAVE_CONFIG_REG_CFG_STOP_HANG_CNT_SYS_XSTP, 2);
CEN_FLD (CEN_PCBSLNEST_SLAVE_CONFIG_REG_CFG_DISABLE_CL_ATOMIC_LOCK, 3);
CEN_FLD (CEN_PCBSLNEST_SLAVE_CONFIG_REG_CFG_DISABLE_HEARTBEAT, 4);
CEN_FLD (CEN_PCBSLNEST_SLAVE_CONFIG_REG_ERROR_MASK, 8);
CEN_FLD (CEN_PCBSLNEST_SLAVE_CONFIG_REG_ERROR_MASK_LEN, 5);

CEN_FLD (CEN_PCBSLNEST_HEARTBEAT_REG_DEAD, 0);





CEN_FLD (CEN_PCBSLNEST_PROTECT_MODE_REG_READ_ENABLE, 0);
CEN_FLD (CEN_PCBSLNEST_PROTECT_MODE_REG_WRITE_ENABLE, 1);

CEN_FLD (CEN_PCBSLNEST_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_PCBSLNEST_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_PCBSLNEST_ATOMIC_LOCK_REG_ID_LEN, 4);


CEN_FLD (CEN_PCBSLMEM_MULTICAST_GROUP_1_MULTICAST1, 3);
CEN_FLD (CEN_PCBSLMEM_MULTICAST_GROUP_1_MULTICAST1_LEN, 3);

CEN_FLD (CEN_PCBSLMEM_MULTICAST_GROUP_2_MULTICAST2, 3);
CEN_FLD (CEN_PCBSLMEM_MULTICAST_GROUP_2_MULTICAST2_LEN, 3);

CEN_FLD (CEN_PCBSLMEM_MULTICAST_GROUP_3_MULTICAST3, 3);
CEN_FLD (CEN_PCBSLMEM_MULTICAST_GROUP_3_MULTICAST3_LEN, 3);

CEN_FLD (CEN_PCBSLMEM_MULTICAST_GROUP_4_MULTICAST4, 3);
CEN_FLD (CEN_PCBSLMEM_MULTICAST_GROUP_4_MULTICAST4_LEN, 3);



CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CE, 0);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CHIPLET_ERRORS, 1);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CHIPLET_ERRORS_LEN, 3);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_PARITY, 4);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_DATA_BUFFER, 5);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_ADDR_BUFFER, 6);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_PCB_FSM, 7);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CL_FSM, 8);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_INT_RX_FSM, 9);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_INT_TX_FSM, 10);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_INT_TYPE, 11);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CL_DATA, 12);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_INFO, 13);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_UNUSED_0, 14);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CHIPLET_ATOMIC_LOCK, 15);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_PCB_INTERFACE, 16);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CHIPLET_OFFLINE, 17);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CHIPLET_GRID_SKITTER, 18);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_GP3_PARITY, 19);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_ADDRESS_PARITY, 20);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_TIMEOUT_PARITY, 21);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CONFIG_PARITY, 22);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_CLK_ADJ_PARITY, 23);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_DIV_PARITY, 24);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_PLL_UNLOCK, 25);
CEN_FLD (CEN_PCBSLMEM_ERROR_REG_PLL_UNLOCK_LEN, 4);

CEN_FLD (CEN_PCBSLMEM_GP3_REG_CHIPLET_ENABLE, 0);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_PCB_EP_RESET, 1);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_TP_CPLT_PRV_CLKOFF_DC, 3);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_NCLK_NODIV, 5);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_VITAL_SCAN, 6);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_VITAL_SCAN_IN, 7);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_D_MODE, 11);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_ACT_DIS, 12);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_MPW2, 13);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_MPW1, 14);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_DELAY_LCLKR, 15);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_VITAL_THOLD, 16);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_FENCE2_EN, 17);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_FENCE_EN, 18);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_RESCLK_FLUSH, 22);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_RESCLK_OVERRIDE_VALUE, 23);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_DPHY_PLL, 24);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_TP_FENCE_PCB, 26);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_FSYNC_ENABLE, 27);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_L3_EDRAM_ENABLE, 28);
CEN_FLD (CEN_PCBSLMEM_GP3_REG_PGENABLE, 31);


CEN_FLD (CEN_PCBSLMEM_CLK_ADJ_SET_REG, 0);
CEN_FLD (CEN_PCBSLMEM_CLK_ADJ_SET_REG_LEN, 32);


CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_0_REG_0, 0);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_0_REG_0_LEN, 6);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_0_REG_SUPPRESS_0, 6);

CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_1_REG_1, 0);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_1_REG_1_LEN, 6);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_1_REG_SUPPRESS_1, 6);

CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_2_REG_2, 0);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_2_REG_2_LEN, 6);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_2_REG_SUPPRESS_2, 6);

CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_3_REG_3, 0);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_3_REG_3_LEN, 6);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_3_REG_SUPPRESS_3, 6);

CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_4_REG_4, 0);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_4_REG_4_LEN, 6);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_4_REG_SUPPRESS_4, 6);

CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_5_REG_5, 0);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_5_REG_5_LEN, 6);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_5_REG_SUPPRESS_5, 6);

CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_6_REG_6, 0);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_6_REG_6_LEN, 6);
CEN_FLD (CEN_PCBSLMEM_HANG_PULSE_6_REG_SUPPRESS_6, 6);

CEN_FLD (CEN_PCBSLMEM_PRE_COUNTER_REG_COUNTER, 0);
CEN_FLD (CEN_PCBSLMEM_PRE_COUNTER_REG_COUNTER_LEN, 8);

CEN_FLD (CEN_PCBSLMEM_SLAVE_CONFIG_REG_CFG_DISABLE_PERV_THOLD_CHECK, 0);
CEN_FLD (CEN_PCBSLMEM_SLAVE_CONFIG_REG_CFG_DISABLE_MALF_PULSE_GEN, 1);
CEN_FLD (CEN_PCBSLMEM_SLAVE_CONFIG_REG_CFG_STOP_HANG_CNT_SYS_XSTP, 2);
CEN_FLD (CEN_PCBSLMEM_SLAVE_CONFIG_REG_CFG_DISABLE_CL_ATOMIC_LOCK, 3);
CEN_FLD (CEN_PCBSLMEM_SLAVE_CONFIG_REG_CFG_DISABLE_HEARTBEAT, 4);
CEN_FLD (CEN_PCBSLMEM_SLAVE_CONFIG_REG_ERROR_MASK, 8);
CEN_FLD (CEN_PCBSLMEM_SLAVE_CONFIG_REG_ERROR_MASK_LEN, 5);

CEN_FLD (CEN_PCBSLMEM_HEARTBEAT_REG_DEAD, 0);





CEN_FLD (CEN_PCBSLMEM_PROTECT_MODE_REG_READ_ENABLE, 0);
CEN_FLD (CEN_PCBSLMEM_PROTECT_MODE_REG_WRITE_ENABLE, 1);

CEN_FLD (CEN_PCBSLMEM_ATOMIC_LOCK_REG_ENABLE, 0);
CEN_FLD (CEN_PCBSLMEM_ATOMIC_LOCK_REG_ID, 1);
CEN_FLD (CEN_PCBSLMEM_ATOMIC_LOCK_REG_ID_LEN, 4);

CEN_FLD (CEN_OTPROM0_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM0_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM0_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM1_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM1_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM2_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM2_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM3_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM3_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM4_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM4_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM5_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM5_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM6_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM6_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM7_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM7_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM8_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM8_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART0_REGISTER_PART_0, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART0_REGISTER_PART_0_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART1_REGISTER_PART_1, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART1_REGISTER_PART_1_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART2_REGISTER_PART_2, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART2_REGISTER_PART_2_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART3_REGISTER_PART_3, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART3_REGISTER_PART_3_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART4_REGISTER_PART_4, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART4_REGISTER_PART_4_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART5_REGISTER_PART_5, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART5_REGISTER_PART_5_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART6_REGISTER_PART_6, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART6_REGISTER_PART_6_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART7_REGISTER_PART_7, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART7_REGISTER_PART_7_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART8_REGISTER_PART_8, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART8_REGISTER_PART_8_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART9_REGISTER_PART_9, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART9_REGISTER_PART_9_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART10_REGISTER_PART_10, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART10_REGISTER_PART_10_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART11_REGISTER_PART_11, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART11_REGISTER_PART_11_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART12_REGISTER_PART_12, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART12_REGISTER_PART_12_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART13_REGISTER_PART_13, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART13_REGISTER_PART_13_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART14_REGISTER_PART_14, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART14_REGISTER_PART_14_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART15_REGISTER_PART_15, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART15_REGISTER_PART_15_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART16_REGISTER_PART_16, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART16_REGISTER_PART_16_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART17_REGISTER_PART_17, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART17_REGISTER_PART_17_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART18_REGISTER_PART_18, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART18_REGISTER_PART_18_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART19_REGISTER_PART_19, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART19_REGISTER_PART_19_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART20_REGISTER_PART_20, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART20_REGISTER_PART_20_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART21_REGISTER_PART_21, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART21_REGISTER_PART_21_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART22_REGISTER_PART_22, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART22_REGISTER_PART_22_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART23_REGISTER_PART_23, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART23_REGISTER_PART_23_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART24_REGISTER_PART_24, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART24_REGISTER_PART_24_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART25_REGISTER_PART_25, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART25_REGISTER_PART_25_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART26_REGISTER_PART_26, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART26_REGISTER_PART_26_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART27_REGISTER_PART_27, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART27_REGISTER_PART_27_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART28_REGISTER_PART_28, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART28_REGISTER_PART_28_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART29_REGISTER_PART_29, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART29_REGISTER_PART_29_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART30_REGISTER_PART_30, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART30_REGISTER_PART_30_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART31_REGISTER_PART_31, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART31_REGISTER_PART_31_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART32_REGISTER_PART_32, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART32_REGISTER_PART_32_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART33_REGISTER_PART_33, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART33_REGISTER_PART_33_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART34_REGISTER_PART_34, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART34_REGISTER_PART_34_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART35_REGISTER_PART_35, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART35_REGISTER_PART_35_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART36_REGISTER_PART_36, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART36_REGISTER_PART_36_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART37_REGISTER_PART_37, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART37_REGISTER_PART_37_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART38_REGISTER_PART_38, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART38_REGISTER_PART_38_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART39_REGISTER_PART_39, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART39_REGISTER_PART_39_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART40_REGISTER_PART_40, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART40_REGISTER_PART_40_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART41_REGISTER_PART_41, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART41_REGISTER_PART_41_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART42_REGISTER_PART_42, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART42_REGISTER_PART_42_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART43_REGISTER_PART_43, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART43_REGISTER_PART_43_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART44_REGISTER_PART_44, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART44_REGISTER_PART_44_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART45_REGISTER_PART_45, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART45_REGISTER_PART_45_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART46_REGISTER_PART_46, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART46_REGISTER_PART_46_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART47_REGISTER_PART_47, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART47_REGISTER_PART_47_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART48_REGISTER_PART_48, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART48_REGISTER_PART_48_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART49_REGISTER_PART_49, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART49_REGISTER_PART_49_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART50_REGISTER_PART_50, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART50_REGISTER_PART_50_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART51_REGISTER_PART_51, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART51_REGISTER_PART_51_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART52_REGISTER_PART_52, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART52_REGISTER_PART_52_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART53_REGISTER_PART_53, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART53_REGISTER_PART_53_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART54_REGISTER_PART_54, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART54_REGISTER_PART_54_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART55_REGISTER_PART_55, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART55_REGISTER_PART_55_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART56_REGISTER_PART_56, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART56_REGISTER_PART_56_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART57_REGISTER_PART_57, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART57_REGISTER_PART_57_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART58_REGISTER_PART_58, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART58_REGISTER_PART_58_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART59_REGISTER_PART_59, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART59_REGISTER_PART_59_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART60_REGISTER_PART_60, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART60_REGISTER_PART_60_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART61_REGISTER_PART_61, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART61_REGISTER_PART_61_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART62_REGISTER_PART_62, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART62_REGISTER_PART_62_LEN, 64);

CEN_FLD (CEN_OTPROM9_ECID_PART63_REGISTER_PART_63, 0);
CEN_FLD (CEN_OTPROM9_ECID_PART63_REGISTER_PART_63_LEN, 64);

CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_BYPMODE, 0);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_BYPMODE_LEN, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_BYPASS, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_CHARMODE, 4);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_CHARMODE_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_CP_TUNE, 6);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_CP_TUNE_LEN, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_DUTY_ADJ, 9);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_DUTY_ADJ_LEN, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_FBKMODE, 12);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_IREF_TUNE, 13);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_IREF_TUNE_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_JIT_CNTL, 15);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_JIT_CNTL_LEN, 20);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_LOCK_TUNE, 35);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_LOCK_TUNE_LEN, 11);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_MULT, 46);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_MULT_LEN, 9);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_OUTSEL, 55);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_OUTSEL_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_PHASEDET_TUNE, 57);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_PHASEDET_TUNE_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_FBKSEL, 59);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_RANGEA, 60);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL0_RANGEA_LEN, 4);

CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_RANGEB, 0);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_RANGEB_LEN, 4);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_REFDIV, 4);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_A2D_TUNE_0_TO_1, 5);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_A2D_TUNE_0_TO_1_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_A2D_TUNE_2_TO_6, 7);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_A2D_TUNE_2_TO_6_LEN, 5);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_ANALOGOUT_TUNE, 12);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_ANALOGOUT_TUNE_LEN, 6);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_VREG_TUNE, 18);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_VREG_TUNE_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_CTST_TUNE, 20);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_LOCK_SEL, 21);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TST_MODE_EN, 22);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TSTMODE_NCAP_LT, 23);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TSTMODE_IREF_LT, 24);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TSTMODE_DT_LT, 25);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TSTMODE_AOUT_LT, 26);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TSTMODE_VCOCMP_LT, 27);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TSTMODE_CTST_LT, 28);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TSTMODE_VCO_SEL, 29);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_CPHASE, 30);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_E_MODE_ENABLE, 31);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TUNE, 32);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_TUNE_LEN, 31);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL1_OUTA_DISABLE, 63);

CEN_FLD (CEN_PLLMEM_PLL_CNTRL2_OUTB_DISABLE, 0);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL2_VCODIV, 1);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL2_VCODIV_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL2_DIGTESTOUT, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL2_RESET, 4);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL2_SPARE, 5);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL2_SPARE_LEN, 3);

CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_BYPMODE, 0);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_BYPMODE_LEN, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_BYPASS, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_CHARMODE, 4);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_CHARMODE_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_CP_TUNE, 6);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_CP_TUNE_LEN, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_DUTY_ADJ, 9);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_DUTY_ADJ_LEN, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_FBKMODE, 12);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_IREF_TUNE, 13);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_IREF_TUNE_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_JIT_CNTL, 15);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_JIT_CNTL_LEN, 20);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_LOCK_TUNE, 35);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_LOCK_TUNE_LEN, 11);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_MULT, 46);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_MULT_LEN, 9);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_OUTSEL, 55);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_OUTSEL_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_PHASEDET_TUNE, 57);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_PHASEDET_TUNE_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_FBKSEL, 59);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_RANGEA, 60);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP0_SHADOW_RANGEA_LEN, 4);

CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_RANGEB, 0);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_RANGEB_LEN, 4);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_REFDIV, 4);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_A2D_TUNE_0_TO_1, 5);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_A2D_TUNE_0_TO_1_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_A2D_TUNE_2_TO_6, 7);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_A2D_TUNE_2_TO_6_LEN, 5);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_ANALOGOUT_TUNE, 12);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_ANALOGOUT_TUNE_LEN, 6);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_VREG_TUNE, 18);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_VREG_TUNE_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_CTST_TUNE, 20);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_LOCK_SEL, 21);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TST_MODE_EN, 22);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TSTMODE_NCAP_LT, 23);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TSTMODE_IREF_LT, 24);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TSTMODE_DT_LT, 25);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TSTMODE_AOUT_LT, 26);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TSTMODE_VCOCMP_LT, 27);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TSTMODE_CTST_LT, 28);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TSTMODE_VCO_SEL, 29);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_CPHASE, 30);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_E_MODE_ENABLE, 31);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TUNE, 32);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_TUNE_LEN, 31);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP1_SHADOW_OUTA_DISABLE, 63);

CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP2_SHADOW_OUTB_DISABLE, 0);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP2_SHADOW_VCODIV, 1);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP2_SHADOW_VCODIV_LEN, 2);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP2_SHADOW_DIGTESTOUT, 3);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP2_SHADOW_RESET, 4);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP2_SHADOW_SPARE, 5);
CEN_FLD (CEN_PLLMEM_PLL_CNTRL_SETUP2_SHADOW_SPARE_LEN, 3);

CEN_FLD (CEN_SCAC_ACTIONMASK_ACTIONMASK, 0);
CEN_FLD (CEN_SCAC_ACTIONMASK_ACTIONMASK_LEN, 35);

CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP0, 0);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP0_LEN, 4);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP1, 4);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP1_LEN, 4);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP2, 8);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP2_LEN, 4);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP3, 12);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP3_LEN, 4);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP4, 16);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP4_LEN, 4);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP5, 20);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP5_LEN, 4);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP6, 24);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP6_LEN, 4);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP7, 28);
CEN_FLD (CEN_SCAC_ADDRMAP_SENSORMAP7_LEN, 4);

CEN_FLD (CEN_SCAC_CONFIG_MASTERENABLE, 0);
CEN_FLD (CEN_SCAC_CONFIG_SYNCSELECT, 1);
CEN_FLD (CEN_SCAC_CONFIG_EDGETYPE, 2);
CEN_FLD (CEN_SCAC_CONFIG_EXPANSION0, 3);
CEN_FLD (CEN_SCAC_CONFIG_EXPANSION0_LEN, 5);
CEN_FLD (CEN_SCAC_CONFIG_EXPANSION1, 8);
CEN_FLD (CEN_SCAC_CONFIG_EXPANSION1_LEN, 3);
CEN_FLD (CEN_SCAC_CONFIG_INTERVALTIMER, 11);
CEN_FLD (CEN_SCAC_CONFIG_INTERVALTIMER_LEN, 5);
CEN_FLD (CEN_SCAC_CONFIG_STALLTHRESHOLD, 16);
CEN_FLD (CEN_SCAC_CONFIG_STALLTHRESHOLD_LEN, 8);
CEN_FLD (CEN_SCAC_CONFIG_ERRRESET, 24);
CEN_FLD (CEN_SCAC_CONFIG_REGPARINJ, 25);
CEN_FLD (CEN_SCAC_CONFIG_SMINJ, 26);

CEN_FLD (CEN_SCAC_DATA0_3_CRITTRIP0, 0);
CEN_FLD (CEN_SCAC_DATA0_3_ABOVETRIP0, 1);
CEN_FLD (CEN_SCAC_DATA0_3_BELOWTRIP0, 2);
CEN_FLD (CEN_SCAC_DATA0_3_SIGNBIT0, 3);
CEN_FLD (CEN_SCAC_DATA0_3_TEMPERATURE0, 4);
CEN_FLD (CEN_SCAC_DATA0_3_TEMPERATURE0_LEN, 10);
CEN_FLD (CEN_SCAC_DATA0_3_STATUS0, 14);
CEN_FLD (CEN_SCAC_DATA0_3_STATUS0_LEN, 2);
CEN_FLD (CEN_SCAC_DATA0_3_CRITTRIP1, 16);
CEN_FLD (CEN_SCAC_DATA0_3_ABOVETRIP1, 17);
CEN_FLD (CEN_SCAC_DATA0_3_BELOWTRIP1, 18);
CEN_FLD (CEN_SCAC_DATA0_3_SIGNBIT1, 19);
CEN_FLD (CEN_SCAC_DATA0_3_TEMPERATURE1, 20);
CEN_FLD (CEN_SCAC_DATA0_3_TEMPERATURE1_LEN, 10);
CEN_FLD (CEN_SCAC_DATA0_3_STATUS1, 30);
CEN_FLD (CEN_SCAC_DATA0_3_STATUS1_LEN, 2);
CEN_FLD (CEN_SCAC_DATA0_3_CRITTRIP2, 32);
CEN_FLD (CEN_SCAC_DATA0_3_ABOVETRIP2, 33);
CEN_FLD (CEN_SCAC_DATA0_3_BELOWTRIP2, 34);
CEN_FLD (CEN_SCAC_DATA0_3_SIGNBIT2, 35);
CEN_FLD (CEN_SCAC_DATA0_3_TEMPERATURE2, 36);
CEN_FLD (CEN_SCAC_DATA0_3_TEMPERATURE2_LEN, 10);
CEN_FLD (CEN_SCAC_DATA0_3_STATUS2, 46);
CEN_FLD (CEN_SCAC_DATA0_3_STATUS2_LEN, 2);
CEN_FLD (CEN_SCAC_DATA0_3_CRITTRIP3, 48);
CEN_FLD (CEN_SCAC_DATA0_3_ABOVETRIP3, 49);
CEN_FLD (CEN_SCAC_DATA0_3_BELOWTRIP3, 50);
CEN_FLD (CEN_SCAC_DATA0_3_SIGNBIT3, 51);
CEN_FLD (CEN_SCAC_DATA0_3_TEMPERATURE3, 52);
CEN_FLD (CEN_SCAC_DATA0_3_TEMPERATURE3_LEN, 10);
CEN_FLD (CEN_SCAC_DATA0_3_STATUS3, 62);
CEN_FLD (CEN_SCAC_DATA0_3_STATUS3_LEN, 2);

CEN_FLD (CEN_SCAC_DATA4_7_CRITTRIP4, 0);
CEN_FLD (CEN_SCAC_DATA4_7_ALARMTRIP4, 1);
CEN_FLD (CEN_SCAC_DATA4_7_BELOWTRIP4, 2);
CEN_FLD (CEN_SCAC_DATA4_7_SIGNBIT4, 3);
CEN_FLD (CEN_SCAC_DATA4_7_TEMPERATURE4, 4);
CEN_FLD (CEN_SCAC_DATA4_7_TEMPERATURE4_LEN, 10);
CEN_FLD (CEN_SCAC_DATA4_7_STATUS4, 14);
CEN_FLD (CEN_SCAC_DATA4_7_STATUS4_LEN, 2);
CEN_FLD (CEN_SCAC_DATA4_7_CRITTRIP5, 16);
CEN_FLD (CEN_SCAC_DATA4_7_ALARMTRIP5, 17);
CEN_FLD (CEN_SCAC_DATA4_7_BELOWTRIP5, 18);
CEN_FLD (CEN_SCAC_DATA4_7_SIGNBIT5, 19);
CEN_FLD (CEN_SCAC_DATA4_7_TEMPERATURE5, 20);
CEN_FLD (CEN_SCAC_DATA4_7_TEMPERATURE5_LEN, 10);
CEN_FLD (CEN_SCAC_DATA4_7_STATUS5, 30);
CEN_FLD (CEN_SCAC_DATA4_7_STATUS5_LEN, 2);
CEN_FLD (CEN_SCAC_DATA4_7_CRITTRIP6, 32);
CEN_FLD (CEN_SCAC_DATA4_7_ALARMTRIP6, 33);
CEN_FLD (CEN_SCAC_DATA4_7_BELOWTRIP6, 34);
CEN_FLD (CEN_SCAC_DATA4_7_SIGNBIT6, 35);
CEN_FLD (CEN_SCAC_DATA4_7_TEMPERATURE6, 36);
CEN_FLD (CEN_SCAC_DATA4_7_TEMPERATURE6_LEN, 10);
CEN_FLD (CEN_SCAC_DATA4_7_STATUS6, 46);
CEN_FLD (CEN_SCAC_DATA4_7_STATUS6_LEN, 2);
CEN_FLD (CEN_SCAC_DATA4_7_CRITTRIP7, 48);
CEN_FLD (CEN_SCAC_DATA4_7_ALARMTRIP7, 49);
CEN_FLD (CEN_SCAC_DATA4_7_BELOWTRIP7, 50);
CEN_FLD (CEN_SCAC_DATA4_7_SIGNBIT7, 51);
CEN_FLD (CEN_SCAC_DATA4_7_TEMPERATURE7, 52);
CEN_FLD (CEN_SCAC_DATA4_7_TEMPERATURE7_LEN, 10);
CEN_FLD (CEN_SCAC_DATA4_7_STATUS7, 62);
CEN_FLD (CEN_SCAC_DATA4_7_STATUS7_LEN, 2);

CEN_FLD (CEN_SCAC_ENABLE_ENABLESENSOR0, 0);
CEN_FLD (CEN_SCAC_ENABLE_ENABLESENSOR1, 1);
CEN_FLD (CEN_SCAC_ENABLE_ENABLESENSOR2, 2);
CEN_FLD (CEN_SCAC_ENABLE_ENABLESENSOR3, 3);
CEN_FLD (CEN_SCAC_ENABLE_ENABLESENSOR4, 4);
CEN_FLD (CEN_SCAC_ENABLE_ENABLESENSOR5, 5);
CEN_FLD (CEN_SCAC_ENABLE_ENABLESENSOR6, 6);
CEN_FLD (CEN_SCAC_ENABLE_ENABLESENSOR7, 7);

CEN_FLD (CEN_SCAC_ERRRPT_ACTIONMASK_PE_HOLD_OUT, 0);
CEN_FLD (CEN_SCAC_ERRRPT_ADDRMAP_PE_HOLD_OUT, 1);
CEN_FLD (CEN_SCAC_ERRRPT_CONFIG_PE_HOLD_OUT, 2);
CEN_FLD (CEN_SCAC_ERRRPT_DATA0_3_PE_HOLD_OUT, 3);
CEN_FLD (CEN_SCAC_ERRRPT_DATA_7_PE_HOLD_OUT, 4);
CEN_FLD (CEN_SCAC_ERRRPT_ENABLE_PE_HOLD_OUT, 5);
CEN_FLD (CEN_SCAC_ERRRPT_I2CMCTRL_PE_HOLD_OUT, 6);
CEN_FLD (CEN_SCAC_ERRRPT_MSM_HOLD_OUT, 7);
CEN_FLD (CEN_SCAC_ERRRPT_PGSM_HOLD_OUT, 8);
CEN_FLD (CEN_SCAC_ERRRPT_PIBTARGET_PE_HOLD_OUT, 9);

CEN_FLD (CEN_SCAC_FIRACTION0_FIRACTION0, 0);
CEN_FLD (CEN_SCAC_FIRACTION0_FIRACTION0_LEN, 37);

CEN_FLD (CEN_SCAC_FIRACTION1_FIRACTION1, 0);
CEN_FLD (CEN_SCAC_FIRACTION1_FIRACTION1_LEN, 37);

CEN_FLD (CEN_SCAC_FIRMASK_FIRMASK, 0);
CEN_FLD (CEN_SCAC_FIRMASK_FIRMASK_LEN, 37);

CEN_FLD (CEN_SCAC_FIRWOF_FIRWOF, 0);
CEN_FLD (CEN_SCAC_FIRWOF_FIRWOF_LEN, 37);

CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CCMD, 0);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CCMD_LEN, 8);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CSEGMENT, 8);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CSEGMENT_LEN, 4);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_SPARE1, 12);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_SPARE1_LEN, 3);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CRNW, 15);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CSPEED, 16);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CSPEED_LEN, 2);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CPORT, 18);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CPORT_LEN, 5);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CADRLEN, 23);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CADRLEN_LEN, 2);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CENHANCED, 25);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_CTRLOFFSET, 26);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_CTRLOFFSET_LEN, 2);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_STATOFFSET, 28);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_STATOFFSET_LEN, 2);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_RESETOFFSET, 30);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_RESETOFFSET_LEN, 2);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CFIFODATA, 32);
CEN_FLD (CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL_I2CFIFODATA_LEN, 32);

CEN_FLD (CEN_SCAC_LFIR_I2CMINVADDR, 0);
CEN_FLD (CEN_SCAC_LFIR_I2CMINVWRITE, 1);
CEN_FLD (CEN_SCAC_LFIR_I2CMINVREAD, 2);
CEN_FLD (CEN_SCAC_LFIR_I2CMAPAR, 3);
CEN_FLD (CEN_SCAC_LFIR_I2CMPAR, 4);
CEN_FLD (CEN_SCAC_LFIR_I2CMLBPAR, 5);
CEN_FLD (CEN_SCAC_LFIR_EXPANSION, 6);
CEN_FLD (CEN_SCAC_LFIR_EXPANSION_LEN, 4);
CEN_FLD (CEN_SCAC_LFIR_I2CMINVCMD, 10);
CEN_FLD (CEN_SCAC_LFIR_I2CMPERR, 11);
CEN_FLD (CEN_SCAC_LFIR_I2CMOVERRUN, 12);
CEN_FLD (CEN_SCAC_LFIR_I2CMACCESS, 13);
CEN_FLD (CEN_SCAC_LFIR_I2CMARB, 14);
CEN_FLD (CEN_SCAC_LFIR_I2CMNACK, 15);
CEN_FLD (CEN_SCAC_LFIR_I2CMSTOP, 16);
CEN_FLD (CEN_SCAC_LFIR_LOCALPIB1, 17);
CEN_FLD (CEN_SCAC_LFIR_LOCALPIB2, 18);
CEN_FLD (CEN_SCAC_LFIR_LOCALPIB3, 19);
CEN_FLD (CEN_SCAC_LFIR_LOCALPIB4, 20);
CEN_FLD (CEN_SCAC_LFIR_LOCALPIB5, 21);
CEN_FLD (CEN_SCAC_LFIR_LOCALPIB6, 22);
CEN_FLD (CEN_SCAC_LFIR_LOCALPIB7, 23);
CEN_FLD (CEN_SCAC_LFIR_STALLERROR, 24);
CEN_FLD (CEN_SCAC_LFIR_REGPARERR, 25);
CEN_FLD (CEN_SCAC_LFIR_REGPARERRX, 26);
CEN_FLD (CEN_SCAC_LFIR_RESERVED_27_31, 27);
CEN_FLD (CEN_SCAC_LFIR_RESERVED_27_31_LEN, 5);
CEN_FLD (CEN_SCAC_LFIR_SMERR, 32);
CEN_FLD (CEN_SCAC_LFIR_REGACCERR, 33);
CEN_FLD (CEN_SCAC_LFIR_RESETERR, 34);
CEN_FLD (CEN_SCAC_LFIR_INTERNAL_SCOM_ERROR, 35);
CEN_FLD (CEN_SCAC_LFIR_INTERNAL_SCOM_ERROR_CLONE, 36);

CEN_FLD (CEN_SCAC_PIBTARGET_PRIMARYBASE, 0);
CEN_FLD (CEN_SCAC_PIBTARGET_PRIMARYBASE_LEN, 32);
CEN_FLD (CEN_SCAC_PIBTARGET_SPAREBASE, 32);
CEN_FLD (CEN_SCAC_PIBTARGET_SPAREBASE_LEN, 32);

CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG, 0);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE0_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE1_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG, 8);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE2_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG, 12);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE3_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG, 16);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE4_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG, 20);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE5_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG, 24);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE6_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG, 28);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE7_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG, 32);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE8_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG, 36);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE9_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG, 40);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE10_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG, 44);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE11_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG, 48);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE12_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG, 52);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE13_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG, 56);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE14_REG_LEN, 4);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG, 60);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_PCB_SLAVE15_REG_LEN, 4);

CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS, 0);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_PCB_SLAVE_GROUP1_REGS_LEN, 64);

CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS, 0);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_PCB_SLAVE_GROUP2_REGS_LEN, 64);

CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS, 0);
CEN_FLD (CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_PCB_SLAVE_GROUP3_REGS_LEN, 64);

CEN_FLD (CEN_FBNAMC_CFG_FBN_ADDR_MASK, 0);
CEN_FLD (CEN_FBNAMC_CFG_FBN_ADDR_MASK_LEN, 40);

CEN_FLD (CEN_FBNBAC_CFG_FBN_ADDR_BASE, 0);
CEN_FLD (CEN_FBNBAC_CFG_FBN_ADDR_BASE_LEN, 40);

CEN_FLD (CEN_FBNCNTL_FBIST_START, 0);
CEN_FLD (CEN_FBNCNTL_FBIST_STOP, 1);
CEN_FLD (CEN_FBNCNTL_RESERVED_2_4, 2);
CEN_FLD (CEN_FBNCNTL_RESERVED_2_4_LEN, 3);
CEN_FLD (CEN_FBNCNTL_FBIST_MODE, 5);
CEN_FLD (CEN_FBNCNTL_FBIST_CONT, 6);
CEN_FLD (CEN_FBNCNTL_FBIST_STEP, 7);

CEN_FLD (CEN_FBNCSPCR_CFG_FBN_CMD_SPC, 0);
CEN_FLD (CEN_FBNCSPCR_CFG_FBN_CMD_SPC_LEN, 8);
CEN_FLD (CEN_FBNCSPCR_CFG_FBN_CMD_SPC_SEED, 8);
CEN_FLD (CEN_FBNCSPCR_CFG_FBN_CMD_SPC_SEED_LEN, 8);

CEN_FLD (CEN_FBNDCM0_CFG_FBN_DATA_CMP_MASK0, 0);
CEN_FLD (CEN_FBNDCM0_CFG_FBN_DATA_CMP_MASK0_LEN, 64);

CEN_FLD (CEN_FBNDCM1_CFG_FBN_DATA_CMP_MASK1, 0);
CEN_FLD (CEN_FBNDCM1_CFG_FBN_DATA_CMP_MASK1_LEN, 64);

CEN_FLD (CEN_FBNDCM10_CFG_FBN_DATA_CMP_MASK10, 0);
CEN_FLD (CEN_FBNDCM10_CFG_FBN_DATA_CMP_MASK10_LEN, 64);

CEN_FLD (CEN_FBNDCM11_CFG_FBN_DATA_CMP_MASK11, 0);
CEN_FLD (CEN_FBNDCM11_CFG_FBN_DATA_CMP_MASK11_LEN, 64);

CEN_FLD (CEN_FBNDCM12_CFG_FBN_DATA_CMP_MASK12, 0);
CEN_FLD (CEN_FBNDCM12_CFG_FBN_DATA_CMP_MASK12_LEN, 64);

CEN_FLD (CEN_FBNDCM13_CFG_FBN_DATA_CMP_MASK13, 0);
CEN_FLD (CEN_FBNDCM13_CFG_FBN_DATA_CMP_MASK13_LEN, 64);

CEN_FLD (CEN_FBNDCM14_CFG_FBN_DATA_CMP_MASK14, 0);
CEN_FLD (CEN_FBNDCM14_CFG_FBN_DATA_CMP_MASK14_LEN, 64);

CEN_FLD (CEN_FBNDCM15_CFG_FBN_DATA_CMP_MASK15, 0);
CEN_FLD (CEN_FBNDCM15_CFG_FBN_DATA_CMP_MASK15_LEN, 64);

CEN_FLD (CEN_FBNDCM2_CFG_FBN_DATA_CMP_MASK2, 0);
CEN_FLD (CEN_FBNDCM2_CFG_FBN_DATA_CMP_MASK2_LEN, 64);

CEN_FLD (CEN_FBNDCM3_CFG_FBN_DATA_CMP_MASK3, 0);
CEN_FLD (CEN_FBNDCM3_CFG_FBN_DATA_CMP_MASK3_LEN, 64);

CEN_FLD (CEN_FBNDCM4_CFG_FBN_DATA_CMP_MASK4, 0);
CEN_FLD (CEN_FBNDCM4_CFG_FBN_DATA_CMP_MASK4_LEN, 64);

CEN_FLD (CEN_FBNDCM5_CFG_FBN_DATA_CMP_MASK5, 0);
CEN_FLD (CEN_FBNDCM5_CFG_FBN_DATA_CMP_MASK5_LEN, 64);

CEN_FLD (CEN_FBNDCM6_CFG_FBN_DATA_CMP_MASK6, 0);
CEN_FLD (CEN_FBNDCM6_CFG_FBN_DATA_CMP_MASK6_LEN, 64);

CEN_FLD (CEN_FBNDCM7_CFG_FBN_DATA_CMP_MASK7, 0);
CEN_FLD (CEN_FBNDCM7_CFG_FBN_DATA_CMP_MASK7_LEN, 64);

CEN_FLD (CEN_FBNDCM8_CFG_FBN_DATA_CMP_MASK8, 0);
CEN_FLD (CEN_FBNDCM8_CFG_FBN_DATA_CMP_MASK8_LEN, 64);

CEN_FLD (CEN_FBNDCM9_CFG_FBN_DATA_CMP_MASK9, 0);
CEN_FLD (CEN_FBNDCM9_CFG_FBN_DATA_CMP_MASK9_LEN, 64);

CEN_FLD (CEN_FBNDCR_CFG_FBN_DATA_INV, 0);
CEN_FLD (CEN_FBNDCR_CFG_FBN_DATA_INV_LEN, 16);

CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR0, 0);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR0_LEN, 8);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR1, 8);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR1_LEN, 8);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR2, 16);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR2_LEN, 8);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR3, 24);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR3_LEN, 8);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR4, 32);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR4_LEN, 8);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR5, 40);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR5_LEN, 8);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR6, 48);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR6_LEN, 8);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR7, 56);
CEN_FLD (CEN_FBNDMEC0_FBN_ERR_CNTR7_LEN, 8);

CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR8, 0);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR8_LEN, 8);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR9, 8);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR9_LEN, 8);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR10, 16);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR10_LEN, 8);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR11, 24);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR11_LEN, 8);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR12, 32);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR12_LEN, 8);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR13, 40);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR13_LEN, 8);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR14, 48);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR14_LEN, 8);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR15, 56);
CEN_FLD (CEN_FBNDMEC1_FBN_ERR_CNTR15_LEN, 8);

CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR16, 0);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR16_LEN, 8);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR17, 8);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR17_LEN, 8);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR18, 16);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR18_LEN, 8);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR19, 24);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR19_LEN, 8);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR20, 32);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR20_LEN, 8);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR21, 40);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR21_LEN, 8);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR22, 48);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR22_LEN, 8);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR23, 56);
CEN_FLD (CEN_FBNDMEC2_FBN_ERR_CNTR23_LEN, 8);

CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR24, 0);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR24_LEN, 8);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR25, 8);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR25_LEN, 8);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR26, 16);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR26_LEN, 8);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR27, 24);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR27_LEN, 8);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR28, 32);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR28_LEN, 8);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR29, 40);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR29_LEN, 8);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR30, 48);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR30_LEN, 8);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR31, 56);
CEN_FLD (CEN_FBNDMEC3_FBN_ERR_CNTR31_LEN, 8);

CEN_FLD (CEN_FBNEA_CFG_FBN_ERR_ADDR, 0);
CEN_FLD (CEN_FBNEA_CFG_FBN_ERR_ADDR_LEN, 40);

CEN_FLD (CEN_FBNEAC_CFG_FBN_ADDR_END, 0);
CEN_FLD (CEN_FBNEAC_CFG_FBN_ADDR_END_LEN, 40);

CEN_FLD (CEN_FBNED0_FBN_DATA_EXP0, 0);
CEN_FLD (CEN_FBNED0_FBN_DATA_EXP0_LEN, 64);

CEN_FLD (CEN_FBNED1_FBN_DATA_EXP1, 0);
CEN_FLD (CEN_FBNED1_FBN_DATA_EXP1_LEN, 64);

CEN_FLD (CEN_FBNED10_FBN_DATA_EXP10, 0);
CEN_FLD (CEN_FBNED10_FBN_DATA_EXP10_LEN, 64);

CEN_FLD (CEN_FBNED11_FBN_DATA_EXP11, 0);
CEN_FLD (CEN_FBNED11_FBN_DATA_EXP11_LEN, 64);

CEN_FLD (CEN_FBNED12_FBN_DATA_EXP12, 0);
CEN_FLD (CEN_FBNED12_FBN_DATA_EXP12_LEN, 64);

CEN_FLD (CEN_FBNED13_FBN_DATA_EXP13, 0);
CEN_FLD (CEN_FBNED13_FBN_DATA_EXP13_LEN, 64);

CEN_FLD (CEN_FBNED14_FBN_DATA_EXP14, 0);
CEN_FLD (CEN_FBNED14_FBN_DATA_EXP14_LEN, 64);

CEN_FLD (CEN_FBNED15_FBN_DATA_EXP15, 0);
CEN_FLD (CEN_FBNED15_FBN_DATA_EXP15_LEN, 64);

CEN_FLD (CEN_FBNED2_FBN_DATA_EXP2, 0);
CEN_FLD (CEN_FBNED2_FBN_DATA_EXP2_LEN, 64);

CEN_FLD (CEN_FBNED3_FBN_DATA_EXP3, 0);
CEN_FLD (CEN_FBNED3_FBN_DATA_EXP3_LEN, 64);

CEN_FLD (CEN_FBNED4_FBN_DATA_EXP4, 0);
CEN_FLD (CEN_FBNED4_FBN_DATA_EXP4_LEN, 64);

CEN_FLD (CEN_FBNED5_FBN_DATA_EXP5, 0);
CEN_FLD (CEN_FBNED5_FBN_DATA_EXP5_LEN, 64);

CEN_FLD (CEN_FBNED6_FBN_DATA_EXP6, 0);
CEN_FLD (CEN_FBNED6_FBN_DATA_EXP6_LEN, 64);

CEN_FLD (CEN_FBNED7_FBN_DATA_EXP7, 0);
CEN_FLD (CEN_FBNED7_FBN_DATA_EXP7_LEN, 64);

CEN_FLD (CEN_FBNED8_FBN_DATA_EXP8, 0);
CEN_FLD (CEN_FBNED8_FBN_DATA_EXP8_LEN, 64);

CEN_FLD (CEN_FBNED9_FBN_DATA_EXP9, 0);
CEN_FLD (CEN_FBNED9_FBN_DATA_EXP9_LEN, 64);

CEN_FLD (CEN_FBNEIR_FBN_ERR_CMD_TAG, 0);
CEN_FLD (CEN_FBNEIR_FBN_ERR_CMD_TAG_LEN, 8);
CEN_FLD (CEN_FBNEIR_FBN_ERR_DATA_PAT, 8);
CEN_FLD (CEN_FBNEIR_FBN_ERR_DATA_PAT_LEN, 8);

CEN_FLD (CEN_FBNEMS_RESERVED_0, 0);
CEN_FLD (CEN_FBNEMS_RESERVED_1, 1);
CEN_FLD (CEN_FBNEMS_FBIST_IP, 2);
CEN_FLD (CEN_FBNEMS_FBIST_DONE, 3);
CEN_FLD (CEN_FBNEMS_FBIST_FAIL, 4);
CEN_FLD (CEN_FBNEMS_RESERVED_5_31, 5);
CEN_FLD (CEN_FBNEMS_RESERVED_5_31_LEN, 27);

CEN_FLD (CEN_FBNHPC_CFG_FBN_ERR_HANG_PULSE, 0);
CEN_FLD (CEN_FBNHPC_CFG_FBN_ERR_HANG_PULSE_LEN, 24);
CEN_FLD (CEN_FBNHPC_CFG_FBN_ERR_HANG_DIS, 24);

CEN_FLD (CEN_FBNM0_FBN_DS_DATA_MISR, 0);
CEN_FLD (CEN_FBNM0_FBN_DS_DATA_MISR_LEN, 12);
CEN_FLD (CEN_FBNM0_FBN_DS_CMD_MISR, 12);
CEN_FLD (CEN_FBNM0_FBN_DS_CMD_MISR_LEN, 24);
CEN_FLD (CEN_FBNM0_FBN_US_DATA_MISR, 36);
CEN_FLD (CEN_FBNM0_FBN_US_DATA_MISR_LEN, 12);

CEN_FLD (CEN_FBNM1_FBN_US_CMD_MISR, 0);
CEN_FLD (CEN_FBNM1_FBN_US_CMD_MISR_LEN, 24);
CEN_FLD (CEN_FBNM1_FBN_DS_ADDR_MISR, 24);
CEN_FLD (CEN_FBNM1_FBN_DS_ADDR_MISR_LEN, 36);

CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0, 0);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_LEN, 4);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_CRSP, 4);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_AMODE, 6);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_DPAT, 8);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_EXORD, 12);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_IB_FLIP, 13);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_INV, 14);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD0_VLD, 15);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1, 16);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_LEN, 4);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_CRSP, 20);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_AMODE, 22);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_DPAT, 24);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_EXORD, 28);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_RES, 29);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_INV, 30);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD1_VLD, 31);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2, 32);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_LEN, 4);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_CRSP, 36);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_AMODE, 38);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_DPAT, 40);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_EXORD, 44);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_RES, 45);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_INV, 46);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD2_VLD, 47);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3, 48);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_LEN, 4);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_CRSP, 52);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_AMODE, 54);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_DPAT, 56);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_EXORD, 60);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_RES, 61);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_INV, 62);
CEN_FLD (CEN_FBNMR0_CFG_FBN_CMD3_VLD, 63);

CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4, 0);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_LEN, 4);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_CRSP, 4);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_AMODE, 6);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_DPAT, 8);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_EXORD, 12);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_RES, 13);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_INV, 14);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD4_VLD, 15);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5, 16);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_LEN, 4);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_CRSP, 20);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_AMODE, 22);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_DPAT, 24);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_EXORD, 28);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_RES, 29);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_INV, 30);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD5_VLD, 31);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6, 32);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_LEN, 4);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_CRSP, 36);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_AMODE, 38);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_DPAT, 40);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_EXORD, 44);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_RES, 45);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_INV, 46);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD6_VLD, 47);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7, 48);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_LEN, 4);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_CRSP, 52);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_AMODE, 54);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_DPAT, 56);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_EXORD, 60);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_RES, 61);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_INV, 62);
CEN_FLD (CEN_FBNMR1_CFG_FBN_CMD7_VLD, 63);

CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8, 0);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_LEN, 4);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_CRSP, 4);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_AMODE, 6);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_DPAT, 8);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_EXORD, 12);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_RES, 13);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_INV, 14);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD8_VLD, 15);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9, 16);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_LEN, 4);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_CRSP, 20);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_AMODE, 22);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_DPAT, 24);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_EXORD, 28);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_RES, 29);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_INV, 30);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD9_VLD, 31);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10, 32);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_LEN, 4);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_CRSP, 36);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_AMODE, 38);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_DPAT, 40);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_EXORD, 44);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_RES, 45);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_INV, 46);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD10_VLD, 47);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11, 48);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_LEN, 4);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_CRSP, 52);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_AMODE, 54);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_DPAT, 56);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_EXORD, 60);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_RES, 61);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_INV, 62);
CEN_FLD (CEN_FBNMR2_CFG_FBN_CMD11_VLD, 63);

CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12, 0);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_LEN, 4);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_CRSP, 4);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_AMODE, 6);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_DPAT, 8);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_EXORD, 12);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_RES, 13);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_INV, 14);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD12_VLD, 15);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13, 16);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_LEN, 4);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_CRSP, 20);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_AMODE, 22);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_DPAT, 24);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_EXORD, 28);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_RES, 29);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_INV, 30);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD13_VLD, 31);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14, 32);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_LEN, 4);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_CRSP, 36);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_AMODE, 38);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_DPAT, 40);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_EXORD, 44);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_RES, 45);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_INV, 46);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD14_VLD, 47);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15, 48);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_LEN, 4);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_CRSP, 52);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_AMODE, 54);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_DPAT, 56);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_EXORD, 60);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_RES, 61);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_INV, 62);
CEN_FLD (CEN_FBNMR3_CFG_FBN_CMD15_VLD, 63);

CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16, 0);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_LEN, 4);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_CRSP, 4);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_AMODE, 6);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_DPAT, 8);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_EXORD, 12);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_RES, 13);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_INV, 14);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD16_VLD, 15);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17, 16);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_LEN, 4);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_CRSP, 20);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_AMODE, 22);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_DPAT, 24);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_EXORD, 28);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_RES, 29);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_INV, 30);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD17_VLD, 31);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18, 32);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_LEN, 4);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_CRSP, 36);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_AMODE, 38);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_DPAT, 40);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_EXORD, 44);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_RES, 45);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_INV, 46);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD18_VLD, 47);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19, 48);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_LEN, 4);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_CRSP, 52);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_AMODE, 54);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_DPAT, 56);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_EXORD, 60);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_RES, 61);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_INV, 62);
CEN_FLD (CEN_FBNMR4_CFG_FBN_CMD19_VLD, 63);

CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20, 0);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_LEN, 4);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_CRSP, 4);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_AMODE, 6);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_DPAT, 8);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_EXORD, 12);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_RES, 13);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_INV, 14);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD20_VLD, 15);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21, 16);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_LEN, 4);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_CRSP, 20);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_AMODE, 22);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_DPAT, 24);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_EXORD, 28);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_RES, 29);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_INV, 30);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD21_VLD, 31);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22, 32);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_LEN, 4);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_CRSP, 36);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_AMODE, 38);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_DPAT, 40);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_EXORD, 44);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_RES, 45);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_INV, 46);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD22_VLD, 47);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23, 48);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_LEN, 4);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_CRSP, 52);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_AMODE, 54);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_DPAT, 56);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_EXORD, 60);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_RES, 61);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_INV, 62);
CEN_FLD (CEN_FBNMR5_CFG_FBN_CMD23_VLD, 63);

CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24, 0);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_LEN, 4);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_CRSP, 4);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_AMODE, 6);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_DPAT, 8);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_EXORD, 12);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_RES, 13);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_INV, 14);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD24_VLD, 15);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25, 16);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_LEN, 4);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_CRSP, 20);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_AMODE, 22);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_DPAT, 24);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_EXORD, 28);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_RES, 29);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_INV, 30);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD25_VLD, 31);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26, 32);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_LEN, 4);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_CRSP, 36);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_AMODE, 38);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_DPAT, 40);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_EXORD, 44);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_RES, 45);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_INV, 46);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD26_VLD, 47);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27, 48);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_LEN, 4);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_CRSP, 52);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_AMODE, 54);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_DPAT, 56);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_EXORD, 60);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_RES, 61);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_INV, 62);
CEN_FLD (CEN_FBNMR6_CFG_FBN_CMD27_VLD, 63);

CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28, 0);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_LEN, 4);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_CRSP, 4);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_AMODE, 6);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_DPAT, 8);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_EXORD, 12);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_RES, 13);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_INV, 14);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD28_VLD, 15);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29, 16);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_LEN, 4);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_CRSP, 20);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_AMODE, 22);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_DPAT, 24);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_EXORD, 28);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_RES, 29);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_INV, 30);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD29_VLD, 31);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30, 32);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_LEN, 4);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_CRSP, 36);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_AMODE, 38);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_DPAT, 40);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_EXORD, 44);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_RES, 45);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_INV, 46);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD30_VLD, 47);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31, 48);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_LEN, 4);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_CRSP, 52);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_CRSP_LEN, 2);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_AMODE, 54);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_AMODE_LEN, 2);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_DPAT, 56);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_DPAT_LEN, 4);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_EXORD, 60);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_RES, 61);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_INV, 62);
CEN_FLD (CEN_FBNMR7_CFG_FBN_CMD31_VLD, 63);

CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_MRANK0, 0);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_MRANK0_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_MRANK1, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_MRANK1_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_MRANK2, 8);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_MRANK2_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_SRANK0, 12);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_SRANK0_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_SRANK1, 16);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_SRANK1_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_SRANK2, 20);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_SRANK2_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BANK0, 24);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BANK0_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BANK1, 28);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BANK1_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BANK2, 32);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BANK2_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BG0, 36);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BG0_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BG1, 40);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_BG1_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_ROW14, 44);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_ROW14_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_ROW15, 48);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_ROW15_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_ROW16, 52);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_ROW16_LEN, 4);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_MBA, 56);
CEN_FLD (CEN_FBNPAM0_CFG_FBN_AMAP_MBA_LEN, 4);

CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL3, 0);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL3_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL4, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL4_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL5, 8);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL5_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL6, 12);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL6_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL7, 16);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL7_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL8, 20);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL8_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL9, 24);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL9_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL10, 28);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL10_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL11, 32);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL11_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL12, 36);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL12_LEN, 4);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL13, 40);
CEN_FLD (CEN_FBNPAM1_CFG_FBN_AMAP_COL13_LEN, 4);

CEN_FLD (CEN_FBNPARM0_CFG_FBN_MODE, 0);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_SYS_TYPE, 1);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_MBA_CHK, 2);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_CMD_SEQ, 3);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_CONT_RUN, 4);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_STOP_ON_ERR, 5);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_STOP_ON_ADDR, 6);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_TST_LEN_TYPE, 7);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_ADDR_CHK, 8);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_CMD_SPC, 9);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_DP_TAG_LOC, 10);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_MEM_TYPE, 11);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_DS_CRC, 12);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_US_CRC, 13);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_DS_CMD_LOC, 14);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_DS_CMD_LOC_LEN, 2);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_RST_KEEPER, 16);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_CACHELINE_CHK, 17);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_2N_ADDR, 18);
CEN_FLD (CEN_FBNPARM0_CFG_FBN_MBSXCRQ5, 19);

CEN_FLD (CEN_FBNRAER_CFG_FBN_ADDR_RND_END, 0);
CEN_FLD (CEN_FBNRAER_CFG_FBN_ADDR_RND_END_LEN, 33);

CEN_FLD (CEN_FBNRAG_CFG_FBN_ADDR_RND_LFSRM, 0);
CEN_FLD (CEN_FBNRAG_CFG_FBN_ADDR_RND_LFSRM_LEN, 33);
CEN_FLD (CEN_FBNRAG_CFG_FBN_ADDR_RND_FW, 33);
CEN_FLD (CEN_FBNRAG_CFG_FBN_ADDR_RND_FW_LEN, 6);
CEN_FLD (CEN_FBNRAG_CFG_FBN_ADDR_RND_RES, 39);
CEN_FLD (CEN_FBNRAG_CFG_FBN_ADDR_RND_RES_LEN, 9);

CEN_FLD (CEN_FBNRAMR_CFG_FBN_ADDR_RND_MASK, 0);
CEN_FLD (CEN_FBNRAMR_CFG_FBN_ADDR_RND_MASK_LEN, 40);

CEN_FLD (CEN_FBNRASR_CFG_FBN_ADDR_RND_START, 0);
CEN_FLD (CEN_FBNRASR_CFG_FBN_ADDR_RND_START_LEN, 33);

CEN_FLD (CEN_FBNRCCR_CFG_FBN_RCCR_RESERVED0, 0);
CEN_FLD (CEN_FBNRCCR_CFG_FBN_RCCR_RESERVED0_LEN, 8);
CEN_FLD (CEN_FBNRCCR_CFG_FBN_CMD_LOC_SEED, 8);
CEN_FLD (CEN_FBNRCCR_CFG_FBN_CMD_LOC_SEED_LEN, 8);
CEN_FLD (CEN_FBNRCCR_CFG_FBN_CMD_CHK_SEED, 16);
CEN_FLD (CEN_FBNRCCR_CFG_FBN_CMD_CHK_SEED_LEN, 8);

CEN_FLD (CEN_FBNRCSR_CFG_FBN_CMD_GEN_SEED, 0);
CEN_FLD (CEN_FBNRCSR_CFG_FBN_CMD_GEN_SEED_LEN, 8);
CEN_FLD (CEN_FBNRCSR_CFG_FBN_CMD_SEL_SEED, 8);
CEN_FLD (CEN_FBNRCSR_CFG_FBN_CMD_SEL_SEED_LEN, 8);
CEN_FLD (CEN_FBNRCSR_CFG_FBN_DATA_PAT_SEED, 16);
CEN_FLD (CEN_FBNRCSR_CFG_FBN_DATA_PAT_SEED_LEN, 8);

CEN_FLD (CEN_FBNRD0_FBN_DATA_RX0, 0);
CEN_FLD (CEN_FBNRD0_FBN_DATA_RX0_LEN, 64);

CEN_FLD (CEN_FBNRD1_FBN_DATA_RX1, 0);
CEN_FLD (CEN_FBNRD1_FBN_DATA_RX1_LEN, 64);

CEN_FLD (CEN_FBNRD10_FBN_DATA_RX10, 0);
CEN_FLD (CEN_FBNRD10_FBN_DATA_RX10_LEN, 64);

CEN_FLD (CEN_FBNRD11_FBN_DATA_RX11, 0);
CEN_FLD (CEN_FBNRD11_FBN_DATA_RX11_LEN, 64);

CEN_FLD (CEN_FBNRD12_FBN_DATA_RX12, 0);
CEN_FLD (CEN_FBNRD12_FBN_DATA_RX12_LEN, 64);

CEN_FLD (CEN_FBNRD13_FBN_DATA_RX13, 0);
CEN_FLD (CEN_FBNRD13_FBN_DATA_RX13_LEN, 64);

CEN_FLD (CEN_FBNRD14_FBN_DATA_RX14, 0);
CEN_FLD (CEN_FBNRD14_FBN_DATA_RX14_LEN, 64);

CEN_FLD (CEN_FBNRD15_FBN_DATA_RX15, 0);
CEN_FLD (CEN_FBNRD15_FBN_DATA_RX15_LEN, 64);

CEN_FLD (CEN_FBNRD2_FBN_DATA_RX2, 0);
CEN_FLD (CEN_FBNRD2_FBN_DATA_RX2_LEN, 64);

CEN_FLD (CEN_FBNRD3_FBN_DATA_RX3, 0);
CEN_FLD (CEN_FBNRD3_FBN_DATA_RX3_LEN, 64);

CEN_FLD (CEN_FBNRD4_FBN_DATA_RX4, 0);
CEN_FLD (CEN_FBNRD4_FBN_DATA_RX4_LEN, 64);

CEN_FLD (CEN_FBNRD5_FBN_DATA_RX5, 0);
CEN_FLD (CEN_FBNRD5_FBN_DATA_RX5_LEN, 64);

CEN_FLD (CEN_FBNRD6_FBN_DATA_RX6, 0);
CEN_FLD (CEN_FBNRD6_FBN_DATA_RX6_LEN, 64);

CEN_FLD (CEN_FBNRD7_FBN_DATA_RX7, 0);
CEN_FLD (CEN_FBNRD7_FBN_DATA_RX7_LEN, 64);

CEN_FLD (CEN_FBNRD8_FBN_DATA_RX8, 0);
CEN_FLD (CEN_FBNRD8_FBN_DATA_RX8_LEN, 64);

CEN_FLD (CEN_FBNRD9_FBN_DATA_RX9, 0);
CEN_FLD (CEN_FBNRD9_FBN_DATA_RX9_LEN, 64);

CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED0, 0);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED0_LEN, 8);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED1, 8);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED1_LEN, 8);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED2, 16);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED2_LEN, 8);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED3, 24);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED3_LEN, 8);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED4, 32);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED4_LEN, 8);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED5, 40);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED5_LEN, 8);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED6, 48);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED6_LEN, 8);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED7, 56);
CEN_FLD (CEN_FBNRDSR0_CFG_FBN_DATA_RND_SEED7_LEN, 8);

CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEED8, 0);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEED8_LEN, 8);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEED9, 8);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEED9_LEN, 8);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDA, 16);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDA_LEN, 8);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDB, 24);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDB_LEN, 8);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDC, 32);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDC_LEN, 8);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDD, 40);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDD_LEN, 8);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDE, 48);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDE_LEN, 8);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDF, 56);
CEN_FLD (CEN_FBNRDSR1_CFG_FBN_DATA_RND_SEEDF_LEN, 8);

CEN_FLD (CEN_FBNRMWC_CFG_FBN_RMW_FUNC, 0);
CEN_FLD (CEN_FBNRMWC_CFG_FBN_RMW_FUNC_LEN, 4);
CEN_FLD (CEN_FBNRMWC_RESERVED_4, 4);
CEN_FLD (CEN_FBNRMWC_CFG_FBN_RMW_TSZ, 5);
CEN_FLD (CEN_FBNRMWC_CFG_FBN_RMW_TSZ_LEN, 7);
CEN_FLD (CEN_FBNRMWC_RESERVED_12, 12);
CEN_FLD (CEN_FBNRMWC_CFG_FBN_RMW_ADDR, 13);
CEN_FLD (CEN_FBNRMWC_CFG_FBN_RMW_ADDR_LEN, 7);

CEN_FLD (CEN_FBNRTCTR_FBN_RUN_CNT, 0);
CEN_FLD (CEN_FBNRTCTR_FBN_RUN_CNT_LEN, 40);

CEN_FLD (CEN_FBNSAC_CFG_FBN_ADDR_START, 0);
CEN_FLD (CEN_FBNSAC_CFG_FBN_ADDR_START_LEN, 40);

CEN_FLD (CEN_FBNTT_CFG_FBN_TEST_TIME, 0);
CEN_FLD (CEN_FBNTT_CFG_FBN_TEST_TIME_LEN, 40);

CEN_FLD (CEN_FBNUD0_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD0_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD1_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD1_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD10_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD10_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD11_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD11_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD12_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD12_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD13_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD13_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD14_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD14_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD15_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD15_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD2_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD2_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD3_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD3_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD4_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD4_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD5_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD5_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD6_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD6_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD7_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD7_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD8_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD8_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBNUD9_CFG_FBN_DATA_USR_N, 0);
CEN_FLD (CEN_FBNUD9_CFG_FBN_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBN_FIR_ACTION0_REG_SCOM_UE, 0);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_USCHK_1HOT, 1);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_USCHK_DATA_DROP, 2);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_DGEN_1HOT, 3);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_CMD_1HOT, 4);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_CMD_EARLY_RESPONSE, 5);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_FBIST_FAIL, 6);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_CMD_HANG, 7);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_US_CRC_ERR, 8);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_RESERVED_9_14, 9);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_RESERVED_9_14_LEN, 6);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_FBN_FIR_ACTION0_REG_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_FBN_FIR_ACTION1_REG_SCOM_UE, 0);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_USCHK_1HOT, 1);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_USCHK_DATA_DROP, 2);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_DGEN_1HOT, 3);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_CMD_1HOT, 4);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_CMD_EARLY_RESPONSE, 5);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_FBIST_FAIL, 6);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_CMD_HANG, 7);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_US_CRC_ERR, 8);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_RESERVED_9_14, 9);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_RESERVED_9_14_LEN, 6);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_FBN_FIR_ACTION1_REG_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_FBN_FIR_MASK_REG_SCOM_UE, 0);
CEN_FLD (CEN_FBN_FIR_MASK_REG_USCHK_1HOT, 1);
CEN_FLD (CEN_FBN_FIR_MASK_REG_USCHK_DATA_DROP, 2);
CEN_FLD (CEN_FBN_FIR_MASK_REG_DGEN_1HOT, 3);
CEN_FLD (CEN_FBN_FIR_MASK_REG_CMD_1HOT, 4);
CEN_FLD (CEN_FBN_FIR_MASK_REG_CMD_EARLY_RESPONSE, 5);
CEN_FLD (CEN_FBN_FIR_MASK_REG_FBIST_FAIL, 6);
CEN_FLD (CEN_FBN_FIR_MASK_REG_CMD_HANG, 7);
CEN_FLD (CEN_FBN_FIR_MASK_REG_US_CRC_ERR, 8);
CEN_FLD (CEN_FBN_FIR_MASK_REG_RESERVED_9_14, 9);
CEN_FLD (CEN_FBN_FIR_MASK_REG_RESERVED_9_14_LEN, 6);
CEN_FLD (CEN_FBN_FIR_MASK_REG_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_FBN_FIR_MASK_REG_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_FBN_FIR_REG_SCOM_UE, 0);
CEN_FLD (CEN_FBN_FIR_REG_USCHK_1HOT, 1);
CEN_FLD (CEN_FBN_FIR_REG_USCHK_DATA_DROP, 2);
CEN_FLD (CEN_FBN_FIR_REG_DGEN_1HOT, 3);
CEN_FLD (CEN_FBN_FIR_REG_CMD_1HOT, 4);
CEN_FLD (CEN_FBN_FIR_REG_CMD_EARLY_RESPONSE, 5);
CEN_FLD (CEN_FBN_FIR_REG_FBIST_FAIL, 6);
CEN_FLD (CEN_FBN_FIR_REG_CMD_HANG, 7);
CEN_FLD (CEN_FBN_FIR_REG_US_CRC_ERR, 8);
CEN_FLD (CEN_FBN_FIR_REG_RESERVED_9_14, 9);
CEN_FLD (CEN_FBN_FIR_REG_RESERVED_9_14_LEN, 6);
CEN_FLD (CEN_FBN_FIR_REG_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_FBN_FIR_REG_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_FBMCRCR_CFG_FBM_CMD_CHK_TAG, 0);
CEN_FLD (CEN_FBMCRCR_CFG_FBM_CMD_CHK_TAG_LEN, 8);

CEN_FLD (CEN_FBMDCM0_CFG_FBM_DATA_CMP_MASK0, 0);
CEN_FLD (CEN_FBMDCM0_CFG_FBM_DATA_CMP_MASK0_LEN, 64);

CEN_FLD (CEN_FBMDCM1_CFG_FBM_DATA_CMP_MASK1, 0);
CEN_FLD (CEN_FBMDCM1_CFG_FBM_DATA_CMP_MASK1_LEN, 64);

CEN_FLD (CEN_FBMDCM10_CFG_FBM_DATA_CMP_MASK10, 0);
CEN_FLD (CEN_FBMDCM10_CFG_FBM_DATA_CMP_MASK10_LEN, 64);

CEN_FLD (CEN_FBMDCM11_CFG_FBM_DATA_CMP_MASK11, 0);
CEN_FLD (CEN_FBMDCM11_CFG_FBM_DATA_CMP_MASK11_LEN, 64);

CEN_FLD (CEN_FBMDCM12_CFG_FBM_DATA_CMP_MASK12, 0);
CEN_FLD (CEN_FBMDCM12_CFG_FBM_DATA_CMP_MASK12_LEN, 64);

CEN_FLD (CEN_FBMDCM13_CFG_FBM_DATA_CMP_MASK13, 0);
CEN_FLD (CEN_FBMDCM13_CFG_FBM_DATA_CMP_MASK13_LEN, 64);

CEN_FLD (CEN_FBMDCM14_CFG_FBM_DATA_CMP_MASK14, 0);
CEN_FLD (CEN_FBMDCM14_CFG_FBM_DATA_CMP_MASK14_LEN, 64);

CEN_FLD (CEN_FBMDCM15_CFG_FBM_DATA_CMP_MASK15, 0);
CEN_FLD (CEN_FBMDCM15_CFG_FBM_DATA_CMP_MASK15_LEN, 64);

CEN_FLD (CEN_FBMDCM2_CFG_FBM_DATA_CMP_MASK2, 0);
CEN_FLD (CEN_FBMDCM2_CFG_FBM_DATA_CMP_MASK2_LEN, 64);

CEN_FLD (CEN_FBMDCM3_CFG_FBM_DATA_CMP_MASK3, 0);
CEN_FLD (CEN_FBMDCM3_CFG_FBM_DATA_CMP_MASK3_LEN, 64);

CEN_FLD (CEN_FBMDCM4_CFG_FBM_DATA_CMP_MASK4, 0);
CEN_FLD (CEN_FBMDCM4_CFG_FBM_DATA_CMP_MASK4_LEN, 64);

CEN_FLD (CEN_FBMDCM5_CFG_FBM_DATA_CMP_MASK5, 0);
CEN_FLD (CEN_FBMDCM5_CFG_FBM_DATA_CMP_MASK5_LEN, 64);

CEN_FLD (CEN_FBMDCM6_CFG_FBM_DATA_CMP_MASK6, 0);
CEN_FLD (CEN_FBMDCM6_CFG_FBM_DATA_CMP_MASK6_LEN, 64);

CEN_FLD (CEN_FBMDCM7_CFG_FBM_DATA_CMP_MASK7, 0);
CEN_FLD (CEN_FBMDCM7_CFG_FBM_DATA_CMP_MASK7_LEN, 64);

CEN_FLD (CEN_FBMDCM8_CFG_FBM_DATA_CMP_MASK8, 0);
CEN_FLD (CEN_FBMDCM8_CFG_FBM_DATA_CMP_MASK8_LEN, 64);

CEN_FLD (CEN_FBMDCM9_CFG_FBM_DATA_CMP_MASK9, 0);
CEN_FLD (CEN_FBMDCM9_CFG_FBM_DATA_CMP_MASK9_LEN, 64);

CEN_FLD (CEN_FBMDCR_CFG_FBM_DATA_INV, 0);
CEN_FLD (CEN_FBMDCR_CFG_FBM_DATA_INV_LEN, 16);

CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR0, 0);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR0_LEN, 8);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR1, 8);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR1_LEN, 8);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR2, 16);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR2_LEN, 8);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR3, 24);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR3_LEN, 8);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR4, 32);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR4_LEN, 8);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR5, 40);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR5_LEN, 8);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR6, 48);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR6_LEN, 8);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR7, 56);
CEN_FLD (CEN_FBMDMEC0_FBM_ERR_CNTR7_LEN, 8);

CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR8, 0);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR8_LEN, 8);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR9, 8);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR9_LEN, 8);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR10, 16);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR10_LEN, 8);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR11, 24);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR11_LEN, 8);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR12, 32);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR12_LEN, 8);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR13, 40);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR13_LEN, 8);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR14, 48);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR14_LEN, 8);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR15, 56);
CEN_FLD (CEN_FBMDMEC1_FBM_ERR_CNTR15_LEN, 8);

CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR16, 0);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR16_LEN, 8);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR17, 8);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR17_LEN, 8);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR18, 16);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR18_LEN, 8);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR19, 24);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR19_LEN, 8);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR20, 32);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR20_LEN, 8);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR21, 40);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR21_LEN, 8);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR22, 48);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR22_LEN, 8);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR23, 56);
CEN_FLD (CEN_FBMDMEC2_FBM_ERR_CNTR23_LEN, 8);

CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR24, 0);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR24_LEN, 8);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR25, 8);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR25_LEN, 8);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR26, 16);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR26_LEN, 8);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR27, 24);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR27_LEN, 8);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR28, 32);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR28_LEN, 8);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR29, 40);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR29_LEN, 8);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR30, 48);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR30_LEN, 8);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR31, 56);
CEN_FLD (CEN_FBMDMEC3_FBM_ERR_CNTR31_LEN, 8);

CEN_FLD (CEN_FBMEA_CFG_FBM_ERR_ADDR, 0);
CEN_FLD (CEN_FBMEA_CFG_FBM_ERR_ADDR_LEN, 64);

CEN_FLD (CEN_FBMED0_FBM_DATA_EXP0, 0);
CEN_FLD (CEN_FBMED0_FBM_DATA_EXP0_LEN, 64);

CEN_FLD (CEN_FBMED1_FBM_DATA_EXP1, 0);
CEN_FLD (CEN_FBMED1_FBM_DATA_EXP1_LEN, 64);

CEN_FLD (CEN_FBMED10_FBM_DATA_EXP10, 0);
CEN_FLD (CEN_FBMED10_FBM_DATA_EXP10_LEN, 64);

CEN_FLD (CEN_FBMED11_FBM_DATA_EXP11, 0);
CEN_FLD (CEN_FBMED11_FBM_DATA_EXP11_LEN, 64);

CEN_FLD (CEN_FBMED12_FBM_DATA_EXP12, 0);
CEN_FLD (CEN_FBMED12_FBM_DATA_EXP12_LEN, 64);

CEN_FLD (CEN_FBMED13_FBM_DATA_EXP13, 0);
CEN_FLD (CEN_FBMED13_FBM_DATA_EXP13_LEN, 64);

CEN_FLD (CEN_FBMED14_FBM_DATA_EXP14, 0);
CEN_FLD (CEN_FBMED14_FBM_DATA_EXP14_LEN, 64);

CEN_FLD (CEN_FBMED15_FBM_DATA_EXP15, 0);
CEN_FLD (CEN_FBMED15_FBM_DATA_EXP15_LEN, 64);

CEN_FLD (CEN_FBMED2_FBM_DATA_EXP2, 0);
CEN_FLD (CEN_FBMED2_FBM_DATA_EXP2_LEN, 64);

CEN_FLD (CEN_FBMED3_FBM_DATA_EXP3, 0);
CEN_FLD (CEN_FBMED3_FBM_DATA_EXP3_LEN, 64);

CEN_FLD (CEN_FBMED4_FBM_DATA_EXP4, 0);
CEN_FLD (CEN_FBMED4_FBM_DATA_EXP4_LEN, 64);

CEN_FLD (CEN_FBMED5_FBM_DATA_EXP5, 0);
CEN_FLD (CEN_FBMED5_FBM_DATA_EXP5_LEN, 64);

CEN_FLD (CEN_FBMED6_FBM_DATA_EXP6, 0);
CEN_FLD (CEN_FBMED6_FBM_DATA_EXP6_LEN, 64);

CEN_FLD (CEN_FBMED7_FBM_DATA_EXP7, 0);
CEN_FLD (CEN_FBMED7_FBM_DATA_EXP7_LEN, 64);

CEN_FLD (CEN_FBMED8_FBM_DATA_EXP8, 0);
CEN_FLD (CEN_FBMED8_FBM_DATA_EXP8_LEN, 64);

CEN_FLD (CEN_FBMED9_FBM_DATA_EXP9, 0);
CEN_FLD (CEN_FBMED9_FBM_DATA_EXP9_LEN, 64);

CEN_FLD (CEN_FBMEIR_FBM_ERR_CMD_TAG, 0);
CEN_FLD (CEN_FBMEIR_FBM_ERR_CMD_TAG_LEN, 8);
CEN_FLD (CEN_FBMEIR_FBM_ERR_DATA_PAT, 8);
CEN_FLD (CEN_FBMEIR_FBM_ERR_DATA_PAT_LEN, 8);

CEN_FLD (CEN_FBMM0_FBM_DS_DATA_MISR, 0);
CEN_FLD (CEN_FBMM0_FBM_DS_DATA_MISR_LEN, 12);
CEN_FLD (CEN_FBMM0_FBM_DS_CMD_MISR, 12);
CEN_FLD (CEN_FBMM0_FBM_DS_CMD_MISR_LEN, 8);
CEN_FLD (CEN_FBMM0_FBM_DS_ADDR_MISR, 20);
CEN_FLD (CEN_FBMM0_FBM_DS_ADDR_MISR_LEN, 36);

CEN_FLD (CEN_FBMM1_FBM_US_DATA_MISR0, 0);
CEN_FLD (CEN_FBMM1_FBM_US_DATA_MISR0_LEN, 12);
CEN_FLD (CEN_FBMM1_FBM_US_DATA_MISR1, 12);
CEN_FLD (CEN_FBMM1_FBM_US_DATA_MISR1_LEN, 12);
CEN_FLD (CEN_FBMM1_FBM_US_DATA_MISR2, 24);
CEN_FLD (CEN_FBMM1_FBM_US_DATA_MISR2_LEN, 12);
CEN_FLD (CEN_FBMM1_FBM_US_DATA_MISR3, 36);
CEN_FLD (CEN_FBMM1_FBM_US_DATA_MISR3_LEN, 12);

CEN_FLD (CEN_FBMMC0_CFG_FBM_M0S0, 0);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M0S0_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M0S1, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M0S1_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M0S2, 8);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M0S2_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M0S3, 12);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M0S3_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M1S0, 16);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M1S0_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M1S1, 20);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M1S1_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M1S2, 24);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M1S2_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M1S3, 28);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M1S3_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M2S0, 32);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M2S0_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M3S0, 36);
CEN_FLD (CEN_FBMMC0_CFG_FBM_M3S0_LEN, 4);
CEN_FLD (CEN_FBMMC0_CFG_FBM_MEM_TYPE, 40);
CEN_FLD (CEN_FBMMC0_CFG_FBM_MEM_TYPE_LEN, 4);

CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0, 0);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_LEN, 4);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_CRSP, 4);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_AMODE, 6);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_DPAT, 8);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_EXORD, 12);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_RES, 13);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_INV, 14);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD0_VLD, 15);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1, 16);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_LEN, 4);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_CRSP, 20);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_AMODE, 22);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_DPAT, 24);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_EXORD, 28);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_RES, 29);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_INV, 30);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD1_VLD, 31);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2, 32);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_LEN, 4);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_CRSP, 36);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_AMODE, 38);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_DPAT, 40);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_EXORD, 44);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_RES, 45);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_INV, 46);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD2_VLD, 47);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3, 48);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_LEN, 4);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_CRSP, 52);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_AMODE, 54);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_DPAT, 56);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_EXORD, 60);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_RES, 61);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_INV, 62);
CEN_FLD (CEN_FBMMR0_CFG_FBM_CMD3_VLD, 63);

CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4, 0);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_LEN, 4);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_CRSP, 4);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_AMODE, 6);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_DPAT, 8);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_EXORD, 12);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_RES, 13);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_INV, 14);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD4_VLD, 15);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5, 16);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_LEN, 4);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_CRSP, 20);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_AMODE, 22);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_DPAT, 24);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_EXORD, 28);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_RES, 29);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_INV, 30);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD5_VLD, 31);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6, 32);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_LEN, 4);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_CRSP, 36);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_AMODE, 38);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_DPAT, 40);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_EXORD, 44);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_RES, 45);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_INV, 46);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD6_VLD, 47);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7, 48);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_LEN, 4);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_CRSP, 52);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_AMODE, 54);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_DPAT, 56);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_EXORD, 60);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_RES, 61);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_INV, 62);
CEN_FLD (CEN_FBMMR1_CFG_FBM_CMD7_VLD, 63);

CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8, 0);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_LEN, 4);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_CRSP, 4);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_AMODE, 6);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_DPAT, 8);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_EXORD, 12);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_RES, 13);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_INV, 14);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD8_VLD, 15);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9, 16);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_LEN, 4);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_CRSP, 20);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_AMODE, 22);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_DPAT, 24);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_EXORD, 28);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_RES, 29);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_INV, 30);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD9_VLD, 31);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10, 32);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_LEN, 4);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_CRSP, 36);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_AMODE, 38);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_DPAT, 40);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_EXORD, 44);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_RES, 45);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_INV, 46);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD10_VLD, 47);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11, 48);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_LEN, 4);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_CRSP, 52);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_AMODE, 54);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_DPAT, 56);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_EXORD, 60);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_RES, 61);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_INV, 62);
CEN_FLD (CEN_FBMMR2_CFG_FBM_CMD11_VLD, 63);

CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12, 0);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_LEN, 4);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_CRSP, 4);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_AMODE, 6);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_DPAT, 8);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_EXORD, 12);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_RES, 13);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_INV, 14);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD12_VLD, 15);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13, 16);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_LEN, 4);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_CRSP, 20);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_AMODE, 22);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_DPAT, 24);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_EXORD, 28);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_RES, 29);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_INV, 30);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD13_VLD, 31);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14, 32);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_LEN, 4);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_CRSP, 36);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_AMODE, 38);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_DPAT, 40);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_EXORD, 44);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_RES, 45);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_INV, 46);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD14_VLD, 47);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15, 48);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_LEN, 4);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_CRSP, 52);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_AMODE, 54);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_DPAT, 56);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_EXORD, 60);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_RES, 61);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_INV, 62);
CEN_FLD (CEN_FBMMR3_CFG_FBM_CMD15_VLD, 63);

CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16, 0);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_LEN, 4);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_CRSP, 4);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_AMODE, 6);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_DPAT, 8);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_EXORD, 12);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_RES, 13);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_INV, 14);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD16_VLD, 15);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17, 16);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_LEN, 4);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_CRSP, 20);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_AMODE, 22);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_DPAT, 24);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_EXORD, 28);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_RES, 29);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_INV, 30);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD17_VLD, 31);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18, 32);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_LEN, 4);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_CRSP, 36);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_AMODE, 38);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_DPAT, 40);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_EXORD, 44);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_RES, 45);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_INV, 46);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD18_VLD, 47);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19, 48);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_LEN, 4);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_CRSP, 52);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_AMODE, 54);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_DPAT, 56);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_EXORD, 60);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_RES, 61);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_INV, 62);
CEN_FLD (CEN_FBMMR4_CFG_FBM_CMD19_VLD, 63);

CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20, 0);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_LEN, 4);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_CRSP, 4);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_AMODE, 6);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_DPAT, 8);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_EXORD, 12);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_RES, 13);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_INV, 14);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD20_VLD, 15);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21, 16);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_LEN, 4);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_CRSP, 20);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_AMODE, 22);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_DPAT, 24);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_EXORD, 28);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_RES, 29);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_INV, 30);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD21_VLD, 31);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22, 32);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_LEN, 4);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_CRSP, 36);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_AMODE, 38);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_DPAT, 40);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_EXORD, 44);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_RES, 45);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_INV, 46);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD22_VLD, 47);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23, 48);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_LEN, 4);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_CRSP, 52);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_AMODE, 54);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_DPAT, 56);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_EXORD, 60);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_RES, 61);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_INV, 62);
CEN_FLD (CEN_FBMMR5_CFG_FBM_CMD23_VLD, 63);

CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24, 0);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_LEN, 4);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_CRSP, 4);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_AMODE, 6);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_DPAT, 8);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_EXORD, 12);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_RES, 13);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_INV, 14);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD24_VLD, 15);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25, 16);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_LEN, 4);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_CRSP, 20);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_AMODE, 22);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_DPAT, 24);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_EXORD, 28);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_RES, 29);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_INV, 30);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD25_VLD, 31);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26, 32);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_LEN, 4);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_CRSP, 36);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_AMODE, 38);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_DPAT, 40);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_EXORD, 44);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_RES, 45);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_INV, 46);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD26_VLD, 47);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27, 48);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_LEN, 4);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_CRSP, 52);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_AMODE, 54);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_DPAT, 56);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_EXORD, 60);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_RES, 61);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_INV, 62);
CEN_FLD (CEN_FBMMR6_CFG_FBM_CMD27_VLD, 63);

CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28, 0);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_LEN, 4);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_CRSP, 4);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_AMODE, 6);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_DPAT, 8);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_EXORD, 12);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_RES, 13);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_INV, 14);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD28_VLD, 15);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29, 16);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_LEN, 4);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_CRSP, 20);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_AMODE, 22);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_DPAT, 24);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_EXORD, 28);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_RES, 29);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_INV, 30);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD29_VLD, 31);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30, 32);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_LEN, 4);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_CRSP, 36);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_AMODE, 38);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_DPAT, 40);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_EXORD, 44);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_RES, 45);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_INV, 46);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD30_VLD, 47);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31, 48);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_LEN, 4);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_CRSP, 52);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_CRSP_LEN, 2);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_AMODE, 54);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_AMODE_LEN, 2);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_DPAT, 56);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_DPAT_LEN, 4);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_EXORD, 60);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_RES, 61);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_INV, 62);
CEN_FLD (CEN_FBMMR7_CFG_FBM_CMD31_VLD, 63);

CEN_FLD (CEN_FBMPARM0_CFG_FBM_MODE, 0);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_SYS_TYPE, 1);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_MBA_CHK, 2);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_US_MUX_SEL, 3);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_DDR_MODE_OVRD, 4);
CEN_FLD (CEN_FBMPARM0_RESERVED_5_7, 5);
CEN_FLD (CEN_FBMPARM0_RESERVED_5_7_LEN, 3);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_ADDR_CHK, 8);
CEN_FLD (CEN_FBMPARM0_RESERVED_9, 9);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_DP_TAG_LOC, 10);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_DDR4, 11);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_DS_CRC, 12);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_US_CRC, 13);
CEN_FLD (CEN_FBMPARM0_RESERVED_14_15, 14);
CEN_FLD (CEN_FBMPARM0_RESERVED_14_15_LEN, 2);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_RST_KEEPER, 16);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_CACHELINE_CHK, 17);
CEN_FLD (CEN_FBMPARM0_CFG_FBM_2N_ADDR, 18);
CEN_FLD (CEN_FBMPARM0_CFG_FBN_MBSXCRQ5, 19);

CEN_FLD (CEN_FBMRD0_FBM_DATA_RX0, 0);
CEN_FLD (CEN_FBMRD0_FBM_DATA_RX0_LEN, 64);

CEN_FLD (CEN_FBMRD1_FBM_DATA_RX1, 0);
CEN_FLD (CEN_FBMRD1_FBM_DATA_RX1_LEN, 64);

CEN_FLD (CEN_FBMRD10_FBM_DATA_RX10, 0);
CEN_FLD (CEN_FBMRD10_FBM_DATA_RX10_LEN, 64);

CEN_FLD (CEN_FBMRD11_FBM_DATA_RX11, 0);
CEN_FLD (CEN_FBMRD11_FBM_DATA_RX11_LEN, 64);

CEN_FLD (CEN_FBMRD12_FBM_DATA_RX12, 0);
CEN_FLD (CEN_FBMRD12_FBM_DATA_RX12_LEN, 64);

CEN_FLD (CEN_FBMRD13_FBM_DATA_RX13, 0);
CEN_FLD (CEN_FBMRD13_FBM_DATA_RX13_LEN, 64);

CEN_FLD (CEN_FBMRD14_FBM_DATA_RX14, 0);
CEN_FLD (CEN_FBMRD14_FBM_DATA_RX14_LEN, 64);

CEN_FLD (CEN_FBMRD15_FBM_DATA_RX15, 0);
CEN_FLD (CEN_FBMRD15_FBM_DATA_RX15_LEN, 64);

CEN_FLD (CEN_FBMRD2_FBM_DATA_RX2, 0);
CEN_FLD (CEN_FBMRD2_FBM_DATA_RX2_LEN, 64);

CEN_FLD (CEN_FBMRD3_FBM_DATA_RX3, 0);
CEN_FLD (CEN_FBMRD3_FBM_DATA_RX3_LEN, 64);

CEN_FLD (CEN_FBMRD4_FBM_DATA_RX4, 0);
CEN_FLD (CEN_FBMRD4_FBM_DATA_RX4_LEN, 64);

CEN_FLD (CEN_FBMRD5_FBM_DATA_RX5, 0);
CEN_FLD (CEN_FBMRD5_FBM_DATA_RX5_LEN, 64);

CEN_FLD (CEN_FBMRD6_FBM_DATA_RX6, 0);
CEN_FLD (CEN_FBMRD6_FBM_DATA_RX6_LEN, 64);

CEN_FLD (CEN_FBMRD7_FBM_DATA_RX7, 0);
CEN_FLD (CEN_FBMRD7_FBM_DATA_RX7_LEN, 64);

CEN_FLD (CEN_FBMRD8_FBM_DATA_RX8, 0);
CEN_FLD (CEN_FBMRD8_FBM_DATA_RX8_LEN, 64);

CEN_FLD (CEN_FBMRD9_FBM_DATA_RX9, 0);
CEN_FLD (CEN_FBMRD9_FBM_DATA_RX9_LEN, 64);

CEN_FLD (CEN_FBMRDDR_CFG_FBM_DATA_RD_DLY, 0);
CEN_FLD (CEN_FBMRDDR_CFG_FBM_DATA_RD_DLY_LEN, 8);

CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED0, 0);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED0_LEN, 8);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED1, 8);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED1_LEN, 8);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED2, 16);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED2_LEN, 8);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED3, 24);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED3_LEN, 8);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED4, 32);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED4_LEN, 8);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED5, 40);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED5_LEN, 8);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED6, 48);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED6_LEN, 8);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED7, 56);
CEN_FLD (CEN_FBMRDSR0_CFG_FBM_DATA_RND_SEED7_LEN, 8);

CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEED8, 0);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEED8_LEN, 8);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEED9, 8);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEED9_LEN, 8);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDA, 16);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDA_LEN, 8);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDB, 24);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDB_LEN, 8);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDC, 32);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDC_LEN, 8);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDD, 40);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDD_LEN, 8);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDE, 48);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDE_LEN, 8);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDF, 56);
CEN_FLD (CEN_FBMRDSR1_CFG_FBM_DATA_RND_SEEDF_LEN, 8);

CEN_FLD (CEN_FBMRMWC_CFG_FBM_RMW_FUNC, 0);
CEN_FLD (CEN_FBMRMWC_CFG_FBM_RMW_FUNC_LEN, 4);
CEN_FLD (CEN_FBMRMWC_RESERVED_4, 4);
CEN_FLD (CEN_FBMRMWC_CFG_FBM_RMW_TSZ, 5);
CEN_FLD (CEN_FBMRMWC_CFG_FBM_RMW_TSZ_LEN, 7);
CEN_FLD (CEN_FBMRMWC_RESERVED_12, 12);
CEN_FLD (CEN_FBMRMWC_CFG_FBM_RMW_ADDR, 13);
CEN_FLD (CEN_FBMRMWC_CFG_FBM_RMW_ADDR_LEN, 7);

CEN_FLD (CEN_FBMUD0_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD0_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD1_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD1_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD10_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD10_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD11_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD11_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD12_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD12_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD13_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD13_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD14_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD14_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD15_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD15_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD2_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD2_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD3_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD3_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD4_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD4_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD5_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD5_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD6_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD6_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD7_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD7_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD8_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD8_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBMUD9_CFG_FBM_DATA_USR_N, 0);
CEN_FLD (CEN_FBMUD9_CFG_FBM_DATA_USR_N_LEN, 64);

CEN_FLD (CEN_FBM_FIR_ACTION0_REG_SCOM_UE, 0);
CEN_FLD (CEN_FBM_FIR_ACTION0_REG_CMD_CHK_1HOT, 1);
CEN_FLD (CEN_FBM_FIR_ACTION0_REG_DS_DATA_DROP, 2);
CEN_FLD (CEN_FBM_FIR_ACTION0_REG_DGEN_1HOT, 3);
CEN_FLD (CEN_FBM_FIR_ACTION0_REG_DGEN_RD_DATA_DROP, 4);
CEN_FLD (CEN_FBM_FIR_ACTION0_REG_RESERVED_5_14, 5);
CEN_FLD (CEN_FBM_FIR_ACTION0_REG_RESERVED_5_14_LEN, 10);
CEN_FLD (CEN_FBM_FIR_ACTION0_REG_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_FBM_FIR_ACTION0_REG_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_FBM_FIR_ACTION1_REG_SCOM_UE, 0);
CEN_FLD (CEN_FBM_FIR_ACTION1_REG_CMD_CHK_1HOT, 1);
CEN_FLD (CEN_FBM_FIR_ACTION1_REG_DS_DATA_DROP, 2);
CEN_FLD (CEN_FBM_FIR_ACTION1_REG_DGEN_1HOT, 3);
CEN_FLD (CEN_FBM_FIR_ACTION1_REG_DGEN_RD_DATA_DROP, 4);
CEN_FLD (CEN_FBM_FIR_ACTION1_REG_RESERVED_5_14, 5);
CEN_FLD (CEN_FBM_FIR_ACTION1_REG_RESERVED_5_14_LEN, 10);
CEN_FLD (CEN_FBM_FIR_ACTION1_REG_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_FBM_FIR_ACTION1_REG_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_FBM_FIR_MASK_REG_SCOM_UE, 0);
CEN_FLD (CEN_FBM_FIR_MASK_REG_CMD_CHK_1HOT, 1);
CEN_FLD (CEN_FBM_FIR_MASK_REG_DS_DATA_DROP, 2);
CEN_FLD (CEN_FBM_FIR_MASK_REG_DGEN_1HOT, 3);
CEN_FLD (CEN_FBM_FIR_MASK_REG_DGEN_RD_DATA_DROP, 4);
CEN_FLD (CEN_FBM_FIR_MASK_REG_RESERVED_5_14, 5);
CEN_FLD (CEN_FBM_FIR_MASK_REG_RESERVED_5_14_LEN, 10);
CEN_FLD (CEN_FBM_FIR_MASK_REG_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_FBM_FIR_MASK_REG_INTERNAL_SCOM_ERROR_CLONE, 16);

CEN_FLD (CEN_FBM_FIR_REG_SCOM_UE, 0);
CEN_FLD (CEN_FBM_FIR_REG_CMD_CHK_1HOT, 1);
CEN_FLD (CEN_FBM_FIR_REG_DS_DATA_DROP, 2);
CEN_FLD (CEN_FBM_FIR_REG_DGEN_1HOT, 3);
CEN_FLD (CEN_FBM_FIR_REG_DGEN_RD_DATA_DROP, 4);
CEN_FLD (CEN_FBM_FIR_REG_RESERVED_5_14, 5);
CEN_FLD (CEN_FBM_FIR_REG_RESERVED_5_14_LEN, 10);
CEN_FLD (CEN_FBM_FIR_REG_INTERNAL_SCOM_ERROR, 15);
CEN_FLD (CEN_FBM_FIR_REG_INTERNAL_SCOM_ERROR_CLONE, 16);
#endif
