/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* $Source: import/chips/p9/common/include/p9n2_quad_scom_addresses_fld.H $ */
/*                                                                        */
/* OpenPOWER HCODE Project                                                */
/*                                                                        */
/* COPYRIGHT 2017                                                         */
/* [+] International Business Machines Corp.                              */
/*                                                                        */
/*                                                                        */
/* Licensed under the Apache License, Version 2.0 (the "License");        */
/* you may not use this file except in compliance with the License.       */
/* You may obtain a copy of the License at                                */
/*                                                                        */
/*     http://www.apache.org/licenses/LICENSE-2.0                         */
/*                                                                        */
/* Unless required by applicable law or agreed to in writing, software    */
/* distributed under the License is distributed on an "AS IS" BASIS,      */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
/* implied. See the License for the specific language governing           */
/* permissions and limitations under the License.                         */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
///
/// @file p9_quad_scom_addresses_fld.H
/// @brief  Defines constants for scom addresses
///
// *HWP HWP Owner: Ben Gass <bgass@us.ibm.com>
// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
// *HWP Team: SOA
// *HWP Level: 3
// *HWP Consumed by: FSP:HB:HS:OCC:SBE:CME:SGPE:PGPE:FPPE:IPPE


#ifndef __P9N2_QUAD_SCOM_ADDRESSES_FLD_H
#define __P9N2_QUAD_SCOM_ADDRESSES_FLD_H

#include <stdint.h>

static const uint8_t P9N2_EQ_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR = 0   ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN = 16  ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR = 16  ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_RESERVED_LAST_LT                       = 17  ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR = 18  ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN = 13  ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY = 31  ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR = 32  ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION = 33  ;
static const uint8_t P9N2_EQ_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER = 34  ;

static const uint8_t P9N2_EX_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR = 0   ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN = 16  ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR = 16  ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_RESERVED_LAST_LT                       = 17  ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR = 18  ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN = 13  ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY = 31  ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR = 32  ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION = 33  ;
static const uint8_t P9N2_EX_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER = 34  ;

static const uint8_t P9N2_C_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR = 0   ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_PCB_ADDRESS_OF_LAST_TRANSACTION_WITH_ERROR_LEN = 16  ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_PCB_READ_NOTWRITE_OF_LAST_TRANSACTION_WITH_ERROR = 16  ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_RESERVED_LAST_LT                        = 17  ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR = 18  ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SERIAL2PARALLEL_STATE_MACHINE_AT_TIME_OF_ERROR_LEN = 13  ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_RETURN_PARITY = 31  ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_WRITE_PARITY_ERROR = 32  ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_ACCESS_VIOLATION = 33  ;
static const uint8_t P9N2_C_ADDR_TRAP_REG_SATELLITE_ACKNOWLEDGE_BIT_INVALID_REGISTER = 34  ;

static const uint8_t P9N2_EQ_ASSIST_INTERRUPT_REG_ATTN                            = 0   ;
static const uint8_t P9N2_EQ_ASSIST_INTERRUPT_REG_RECOV                           = 1   ;
static const uint8_t P9N2_EQ_ASSIST_INTERRUPT_REG_XSTOP                           = 2   ;

static const uint8_t P9N2_EX_ASSIST_INTERRUPT_REG_ATTN                            = 0   ;
static const uint8_t P9N2_EX_ASSIST_INTERRUPT_REG_RECOV                           = 1   ;
static const uint8_t P9N2_EX_ASSIST_INTERRUPT_REG_XSTOP                           = 2   ;

static const uint8_t P9N2_C_ASSIST_INTERRUPT_REG_ATTN                             = 0   ;
static const uint8_t P9N2_C_ASSIST_INTERRUPT_REG_RECOV                            = 1   ;
static const uint8_t P9N2_C_ASSIST_INTERRUPT_REG_XSTOP                            = 2   ;

static const uint8_t P9N2_EQ_ATOMIC_LOCK_MASK_LATCH_REG_MASK                      = 0   ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN                  = 16  ;

static const uint8_t P9N2_EX_ATOMIC_LOCK_MASK_LATCH_REG_MASK                      = 0   ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN                  = 16  ;

static const uint8_t P9N2_C_ATOMIC_LOCK_MASK_LATCH_REG_MASK                       = 0   ;
static const uint8_t P9N2_C_ATOMIC_LOCK_MASK_LATCH_REG_MASK_LEN                   = 16  ;

static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ENABLE                               = 0   ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ID                                   = 1   ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ID_LEN                               = 4   ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ACTIVITY                             = 8   ;
static const uint8_t P9N2_EQ_ATOMIC_LOCK_REG_ACTIVITY_LEN                         = 8   ;

static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ENABLE                               = 0   ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ID                                   = 1   ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ID_LEN                               = 4   ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ACTIVITY                             = 8   ;
static const uint8_t P9N2_EX_ATOMIC_LOCK_REG_ACTIVITY_LEN                         = 8   ;

static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ENABLE                                = 0   ;
static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ID                                    = 1   ;
static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ID_LEN                                = 4   ;
static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ACTIVITY                              = 8   ;
static const uint8_t P9N2_C_ATOMIC_LOCK_REG_ACTIVITY_LEN                          = 8   ;

static const uint8_t P9N2_EQ_ATTN_INTERRUPT_REG_ATTN                              = 0   ;

static const uint8_t P9N2_EX_ATTN_INTERRUPT_REG_ATTN                              = 0   ;

static const uint8_t P9N2_C_ATTN_INTERRUPT_REG_ATTN                               = 0   ;

static const uint8_t P9N2_EQ_BIST_TC_START_TEST_DC                                = 0   ;
static const uint8_t P9N2_EQ_BIST_TC_SRAM_ABIST_MODE_DC                           = 1   ;
static const uint8_t P9N2_EQ_BIST_TC_EDRAM_ABIST_MODE_DC                          = 2   ;
static const uint8_t P9N2_EQ_BIST_TC_IOBIST_MODE_DC                               = 3   ;
static const uint8_t P9N2_EQ_BIST_PERV                                            = 4   ;
static const uint8_t P9N2_EQ_BIST_UNIT1                                           = 5   ;
static const uint8_t P9N2_EQ_BIST_UNIT2                                           = 6   ;
static const uint8_t P9N2_EQ_BIST_UNIT3                                           = 7   ;
static const uint8_t P9N2_EQ_BIST_UNIT4                                           = 8   ;
static const uint8_t P9N2_EQ_BIST_UNIT5                                           = 9   ;
static const uint8_t P9N2_EQ_BIST_UNIT6                                           = 10  ;
static const uint8_t P9N2_EQ_BIST_UNIT7                                           = 11  ;
static const uint8_t P9N2_EQ_BIST_UNIT8                                           = 12  ;
static const uint8_t P9N2_EQ_BIST_UNIT9                                           = 13  ;
static const uint8_t P9N2_EQ_BIST_UNIT10                                          = 14  ;
static const uint8_t P9N2_EQ_BIST_STROBE_WINDOW_EN                                = 48  ;

static const uint8_t P9N2_EX_BIST_TC_START_TEST_DC                                = 0   ;
static const uint8_t P9N2_EX_BIST_TC_SRAM_ABIST_MODE_DC                           = 1   ;
static const uint8_t P9N2_EX_BIST_TC_EDRAM_ABIST_MODE_DC                          = 2   ;
static const uint8_t P9N2_EX_BIST_TC_IOBIST_MODE_DC                               = 3   ;
static const uint8_t P9N2_EX_BIST_PERV                                            = 4   ;
static const uint8_t P9N2_EX_BIST_UNIT1                                           = 5   ;
static const uint8_t P9N2_EX_BIST_UNIT2                                           = 6   ;
static const uint8_t P9N2_EX_BIST_UNIT3                                           = 7   ;
static const uint8_t P9N2_EX_BIST_UNIT4                                           = 8   ;
static const uint8_t P9N2_EX_BIST_UNIT5                                           = 9   ;
static const uint8_t P9N2_EX_BIST_UNIT6                                           = 10  ;
static const uint8_t P9N2_EX_BIST_UNIT7                                           = 11  ;
static const uint8_t P9N2_EX_BIST_UNIT8                                           = 12  ;
static const uint8_t P9N2_EX_BIST_UNIT9                                           = 13  ;
static const uint8_t P9N2_EX_BIST_UNIT10                                          = 14  ;
static const uint8_t P9N2_EX_BIST_STROBE_WINDOW_EN                                = 48  ;

static const uint8_t P9N2_C_BIST_TC_START_TEST_DC                                 = 0   ;
static const uint8_t P9N2_C_BIST_TC_SRAM_ABIST_MODE_DC                            = 1   ;
static const uint8_t P9N2_C_BIST_TC_EDRAM_ABIST_MODE_DC                           = 2   ;
static const uint8_t P9N2_C_BIST_TC_IOBIST_MODE_DC                                = 3   ;
static const uint8_t P9N2_C_BIST_PERV                                             = 4   ;
static const uint8_t P9N2_C_BIST_UNIT1                                            = 5   ;
static const uint8_t P9N2_C_BIST_UNIT2                                            = 6   ;
static const uint8_t P9N2_C_BIST_UNIT3                                            = 7   ;
static const uint8_t P9N2_C_BIST_UNIT4                                            = 8   ;
static const uint8_t P9N2_C_BIST_UNIT5                                            = 9   ;
static const uint8_t P9N2_C_BIST_UNIT6                                            = 10  ;
static const uint8_t P9N2_C_BIST_UNIT7                                            = 11  ;
static const uint8_t P9N2_C_BIST_UNIT8                                            = 12  ;
static const uint8_t P9N2_C_BIST_UNIT9                                            = 13  ;
static const uint8_t P9N2_C_BIST_UNIT10                                           = 14  ;
static const uint8_t P9N2_C_BIST_STROBE_WINDOW_EN                                 = 48  ;

static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ENABLE                            = 0   ;
static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ID                                = 1   ;
static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ID_LEN                            = 4   ;
static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ACTIVITY                          = 8   ;
static const uint8_t P9N2_EQ_CC_ATOMIC_LOCK_REG_ACTIVITY_LEN                      = 8   ;

static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ENABLE                            = 0   ;
static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ID                                = 1   ;
static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ID_LEN                            = 4   ;
static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ACTIVITY                          = 8   ;
static const uint8_t P9N2_EX_CC_ATOMIC_LOCK_REG_ACTIVITY_LEN                      = 8   ;

static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ENABLE                             = 0   ;
static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ID                                 = 1   ;
static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ID_LEN                             = 4   ;
static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ACTIVITY                           = 8   ;
static const uint8_t P9N2_C_CC_ATOMIC_LOCK_REG_ACTIVITY_LEN                       = 8   ;

static const uint8_t P9N2_EQ_CC_PROTECT_MODE_REG_READ_ENABLE                      = 0   ;
static const uint8_t P9N2_EQ_CC_PROTECT_MODE_REG_WRITE_ENABLE                     = 1   ;

static const uint8_t P9N2_EX_CC_PROTECT_MODE_REG_READ_ENABLE                      = 0   ;
static const uint8_t P9N2_EX_CC_PROTECT_MODE_REG_WRITE_ENABLE                     = 1   ;

static const uint8_t P9N2_C_CC_PROTECT_MODE_REG_READ_ENABLE                       = 0   ;
static const uint8_t P9N2_C_CC_PROTECT_MODE_REG_WRITE_ENABLE                      = 1   ;

static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_CMD                                 = 0   ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_CMD_LEN                             = 2   ;
static const uint8_t P9N2_EQ_CLK_REGION_SLAVE_MODE                                = 2   ;
static const uint8_t P9N2_EQ_CLK_REGION_MASTER_MODE                               = 3   ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_PERV                                = 4   ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT1                               = 5   ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT2                               = 6   ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT3                               = 7   ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT4                               = 8   ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT5                               = 9   ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT6                               = 10  ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT7                               = 11  ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT8                               = 12  ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT9                               = 13  ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_UNIT10                              = 14  ;
static const uint8_t P9N2_EQ_CLK_REGION_SEL_THOLD_SL                              = 48  ;
static const uint8_t P9N2_EQ_CLK_REGION_SEL_THOLD_NSL                             = 49  ;
static const uint8_t P9N2_EQ_CLK_REGION_SEL_THOLD_ARY                             = 50  ;
static const uint8_t P9N2_EQ_CLK_REGION_CLOCK_PULSE_USE_EVEN                      = 52  ;

static const uint8_t P9N2_EX_CLK_REGION_CLOCK_CMD                                 = 0   ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_CMD_LEN                             = 2   ;
static const uint8_t P9N2_EX_CLK_REGION_SLAVE_MODE                                = 2   ;
static const uint8_t P9N2_EX_CLK_REGION_MASTER_MODE                               = 3   ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_PERV                                = 4   ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT1                               = 5   ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT2                               = 6   ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT3                               = 7   ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT4                               = 8   ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT5                               = 9   ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT6                               = 10  ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT7                               = 11  ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT8                               = 12  ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT9                               = 13  ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_UNIT10                              = 14  ;
static const uint8_t P9N2_EX_CLK_REGION_SEL_THOLD_SL                              = 48  ;
static const uint8_t P9N2_EX_CLK_REGION_SEL_THOLD_NSL                             = 49  ;
static const uint8_t P9N2_EX_CLK_REGION_SEL_THOLD_ARY                             = 50  ;
static const uint8_t P9N2_EX_CLK_REGION_CLOCK_PULSE_USE_EVEN                      = 52  ;

static const uint8_t P9N2_C_CLK_REGION_CLOCK_CMD                                  = 0   ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_CMD_LEN                              = 2   ;
static const uint8_t P9N2_C_CLK_REGION_SLAVE_MODE                                 = 2   ;
static const uint8_t P9N2_C_CLK_REGION_MASTER_MODE                                = 3   ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_PERV                                 = 4   ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT1                                = 5   ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT2                                = 6   ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT3                                = 7   ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT4                                = 8   ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT5                                = 9   ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT6                                = 10  ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT7                                = 11  ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT8                                = 12  ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT9                                = 13  ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_UNIT10                               = 14  ;
static const uint8_t P9N2_C_CLK_REGION_SEL_THOLD_SL                               = 48  ;
static const uint8_t P9N2_C_CLK_REGION_SEL_THOLD_NSL                              = 49  ;
static const uint8_t P9N2_C_CLK_REGION_SEL_THOLD_ARY                              = 50  ;
static const uint8_t P9N2_C_CLK_REGION_CLOCK_PULSE_USE_EVEN                       = 52  ;

static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_PERV                           = 4   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT1                          = 5   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT2                          = 6   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT3                          = 7   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT4                          = 8   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT5                          = 9   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT6                          = 10  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT7                          = 11  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT8                          = 12  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT9                          = 13  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_ARY_STATUS_UNIT10                         = 14  ;

static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_PERV                           = 4   ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT1                          = 5   ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT2                          = 6   ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT3                          = 7   ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT4                          = 8   ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT5                          = 9   ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT6                          = 10  ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT7                          = 11  ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT8                          = 12  ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT9                          = 13  ;
static const uint8_t P9N2_EX_CLOCK_STAT_ARY_STATUS_UNIT10                         = 14  ;

static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_PERV                            = 4   ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT1                           = 5   ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT2                           = 6   ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT3                           = 7   ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT4                           = 8   ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT5                           = 9   ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT6                           = 10  ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT7                           = 11  ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT8                           = 12  ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT9                           = 13  ;
static const uint8_t P9N2_C_CLOCK_STAT_ARY_STATUS_UNIT10                          = 14  ;

static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_PERV                           = 4   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT1                          = 5   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT2                          = 6   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT3                          = 7   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT4                          = 8   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT5                          = 9   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT6                          = 10  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT7                          = 11  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT8                          = 12  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT9                          = 13  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_NSL_STATUS_UNIT10                         = 14  ;

static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_PERV                           = 4   ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT1                          = 5   ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT2                          = 6   ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT3                          = 7   ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT4                          = 8   ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT5                          = 9   ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT6                          = 10  ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT7                          = 11  ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT8                          = 12  ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT9                          = 13  ;
static const uint8_t P9N2_EX_CLOCK_STAT_NSL_STATUS_UNIT10                         = 14  ;

static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_PERV                            = 4   ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT1                           = 5   ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT2                           = 6   ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT3                           = 7   ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT4                           = 8   ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT5                           = 9   ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT6                           = 10  ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT7                           = 11  ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT8                           = 12  ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT9                           = 13  ;
static const uint8_t P9N2_C_CLOCK_STAT_NSL_STATUS_UNIT10                          = 14  ;

static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_PERV                            = 4   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT1                           = 5   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT2                           = 6   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT3                           = 7   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT4                           = 8   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT5                           = 9   ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT6                           = 10  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT7                           = 11  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT8                           = 12  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT9                           = 13  ;
static const uint8_t P9N2_EQ_CLOCK_STAT_SL_STATUS_UNIT10                          = 14  ;

static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_PERV                            = 4   ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT1                           = 5   ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT2                           = 6   ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT3                           = 7   ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT4                           = 8   ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT5                           = 9   ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT6                           = 10  ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT7                           = 11  ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT8                           = 12  ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT9                           = 13  ;
static const uint8_t P9N2_EX_CLOCK_STAT_SL_STATUS_UNIT10                          = 14  ;

static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_PERV                             = 4   ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT1                            = 5   ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT2                            = 6   ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT3                            = 7   ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT4                            = 8   ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT5                            = 9   ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT6                            = 10  ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT7                            = 11  ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT8                            = 12  ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT9                            = 13  ;
static const uint8_t P9N2_C_CLOCK_STAT_SL_STATUS_UNIT10                           = 14  ;

static const uint8_t P9N2_EX_CME_LCL_DBG_EN                                       = 0   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_HALT_ON_XSTOP                            = 1   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_HALT_ON_TRIG                             = 2   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_RESERVED3                                = 3   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_INTR_ADDR                             = 4   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_TRACE_EXTRA                           = 5   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_TRACE_STALL                           = 6   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_WAIT_CYCLES                           = 7   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_EN_FULL_SPEED                            = 8   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_RESERVED9                                = 9   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_TRACE_MODE_SEL                           = 10  ;
static const uint8_t P9N2_EX_CME_LCL_DBG_TRACE_MODE_SEL_LEN                       = 2   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_RESERVED12_15                            = 12  ;
static const uint8_t P9N2_EX_CME_LCL_DBG_RESERVED12_15_LEN                        = 4   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_FIR_TRIGGER                              = 16  ;
static const uint8_t P9N2_EX_CME_LCL_DBG_MIB_GPIO                                 = 17  ;
static const uint8_t P9N2_EX_CME_LCL_DBG_MIB_GPIO_LEN                             = 3   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_TRACE_DATA_SEL                           = 20  ;
static const uint8_t P9N2_EX_CME_LCL_DBG_TRACE_DATA_SEL_LEN                       = 4   ;
static const uint8_t P9N2_EX_CME_LCL_DBG_HALT_INPUT                               = 24  ;

static const uint8_t P9N2_EQ_CME_LCL_EIMR_INTERRUPT_MASK                          = 0   ;
static const uint8_t P9N2_EQ_CME_LCL_EIMR_INTERRUPT_MASK_LEN                      = 44  ;

static const uint8_t P9N2_EX_CME_LCL_EIMR_INTERRUPT_MASK                          = 0   ;
static const uint8_t P9N2_EX_CME_LCL_EIMR_INTERRUPT_MASK_LEN                      = 44  ;

static const uint8_t P9N2_EQ_CME_LCL_EINR_INTERRUPT_INPUT                         = 0   ;
static const uint8_t P9N2_EQ_CME_LCL_EINR_INTERRUPT_INPUT_LEN                     = 44  ;

static const uint8_t P9N2_EX_CME_LCL_EINR_INTERRUPT_INPUT                         = 0   ;
static const uint8_t P9N2_EX_CME_LCL_EINR_INTERRUPT_INPUT_LEN                     = 44  ;

static const uint8_t P9N2_EQ_CME_LCL_EIPR_INTERRUPT_POLARITY                      = 0   ;
static const uint8_t P9N2_EQ_CME_LCL_EIPR_INTERRUPT_POLARITY_LEN                  = 44  ;

static const uint8_t P9N2_EX_CME_LCL_EIPR_INTERRUPT_POLARITY                      = 0   ;
static const uint8_t P9N2_EX_CME_LCL_EIPR_INTERRUPT_POLARITY_LEN                  = 44  ;

static const uint8_t P9N2_EQ_CME_LCL_EISR_DEBUGGER                                = 0   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DEBUG_TRIGGER                           = 1   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_QUAD_CHECKSTOP                          = 2   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PVREF_FAIL                              = 3   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_OCC_HEARTBEAT_LOST                      = 4   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_CORE_CHECKSTOP                          = 5   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DROPOUT_DETECT                          = 6   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_INTERCME_DIRECT_IN_0                    = 7   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BCE_BUSY_HIGH                           = 8   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BCE_TIMEOUT                             = 9   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL3_C0                            = 10  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL3_C1                            = 11  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PC_INTR_PENDING_C0                      = 12  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PC_INTR_PENDING_C1                      = 13  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_SPECIAL_WAKEUP_C0                       = 14  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_SPECIAL_WAKEUP_C1                       = 15  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_REG_WAKEUP_C0                           = 16  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_REG_WAKEUP_C1                           = 17  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL2_C0                            = 18  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL2_C1                            = 19  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PC_PM_STATE_ACTIVE_C0                   = 20  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PC_PM_STATE_ACTIVE_C1                   = 21  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_L2_PURGE_DONE                           = 22  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_NCU_PURGE_DONE                          = 23  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_CHTM_PURGE_DONE_C0                      = 24  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_CHTM_PURGE_DONE_C1                      = 25  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BCE_BUSY_LOW                            = 26  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_FINAL_VDM_DATA01                        = 27  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_FINAL_VDM_DATA01_LEN                    = 2   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_COMM_RECVD                              = 29  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_COMM_SEND_ACK                           = 30  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_COMM_SEND_NACK                          = 31  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BLOCK_REG_WAKEUP_C0                     = 32  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_BLOCK_REG_WAKEUP_C1                     = 33  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PMCR_UPDATE_C0                          = 34  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_PMCR_UPDATE_C1                          = 35  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL0_C0                            = 36  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL0_C1                            = 37  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_INTERCME_DIRECT_IN_1_2                  = 38  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_INTERCME_DIRECT_IN_1_2_LEN              = 2   ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL1_C0                            = 40  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_DOORBELL1_C1                            = 41  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_RESERVED_42_43                          = 42  ;
static const uint8_t P9N2_EQ_CME_LCL_EISR_RESERVED_42_43_LEN                      = 2   ;

static const uint8_t P9N2_EX_CME_LCL_EISR_DEBUGGER                                = 0   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DEBUG_TRIGGER                           = 1   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_QUAD_CHECKSTOP                          = 2   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PVREF_FAIL                              = 3   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_OCC_HEARTBEAT_LOST                      = 4   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_CORE_CHECKSTOP                          = 5   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DROPOUT_DETECT                          = 6   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_INTERCME_DIRECT_IN_0                    = 7   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BCE_BUSY_HIGH                           = 8   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BCE_TIMEOUT                             = 9   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL3_C0                            = 10  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL3_C1                            = 11  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PC_INTR_PENDING_C0                      = 12  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PC_INTR_PENDING_C1                      = 13  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_SPECIAL_WAKEUP_C0                       = 14  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_SPECIAL_WAKEUP_C1                       = 15  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_REG_WAKEUP_C0                           = 16  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_REG_WAKEUP_C1                           = 17  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL2_C0                            = 18  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL2_C1                            = 19  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PC_PM_STATE_ACTIVE_C0                   = 20  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PC_PM_STATE_ACTIVE_C1                   = 21  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_L2_PURGE_DONE                           = 22  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_NCU_PURGE_DONE                          = 23  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_CHTM_PURGE_DONE_C0                      = 24  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_CHTM_PURGE_DONE_C1                      = 25  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BCE_BUSY_LOW                            = 26  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_FINAL_VDM_DATA01                        = 27  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_FINAL_VDM_DATA01_LEN                    = 2   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_COMM_RECVD                              = 29  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_COMM_SEND_ACK                           = 30  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_COMM_SEND_NACK                          = 31  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BLOCK_REG_WAKEUP_C0                     = 32  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_BLOCK_REG_WAKEUP_C1                     = 33  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PMCR_UPDATE_C0                          = 34  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_PMCR_UPDATE_C1                          = 35  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL0_C0                            = 36  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL0_C1                            = 37  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_INTERCME_DIRECT_IN_1_2                  = 38  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_INTERCME_DIRECT_IN_1_2_LEN              = 2   ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL1_C0                            = 40  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_DOORBELL1_C1                            = 41  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_RESERVED_42_43                          = 42  ;
static const uint8_t P9N2_EX_CME_LCL_EISR_RESERVED_42_43_LEN                      = 2   ;

static const uint8_t P9N2_EQ_CME_LCL_EISTR_INTERRUPT_STATUS                       = 0   ;
static const uint8_t P9N2_EQ_CME_LCL_EISTR_INTERRUPT_STATUS_LEN                   = 44  ;

static const uint8_t P9N2_EX_CME_LCL_EISTR_INTERRUPT_STATUS                       = 0   ;
static const uint8_t P9N2_EX_CME_LCL_EISTR_INTERRUPT_STATUS_LEN                   = 44  ;

static const uint8_t P9N2_EQ_CME_LCL_EITR_INTERRUPT_TYPE                          = 0   ;
static const uint8_t P9N2_EQ_CME_LCL_EITR_INTERRUPT_TYPE_LEN                      = 44  ;

static const uint8_t P9N2_EX_CME_LCL_EITR_INTERRUPT_TYPE                          = 0   ;
static const uint8_t P9N2_EX_CME_LCL_EITR_INTERRUPT_TYPE_LEN                      = 44  ;

static const uint8_t P9N2_EX_CME_LCL_ICCR_COMM_ACK                                = 0   ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_COMM_NACK                               = 1   ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_ICRR_INTERCME_DIRECT_OUT                = 5   ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_ICRR_INTERCME_DIRECT_OUT_LEN            = 3   ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_ICRR_INTERCME_DIRECT_IN                 = 9   ;
static const uint8_t P9N2_EX_CME_LCL_ICCR_ICRR_INTERCME_DIRECT_IN_LEN             = 3   ;

static const uint8_t P9N2_EQ_CME_LCL_ICRR_COMM_RECV                               = 0   ;
static const uint8_t P9N2_EQ_CME_LCL_ICRR_COMM_RECV_LEN                           = 32  ;

static const uint8_t P9N2_EX_CME_LCL_ICRR_COMM_RECV                               = 0   ;
static const uint8_t P9N2_EX_CME_LCL_ICRR_COMM_RECV_LEN                           = 32  ;

static const uint8_t P9N2_EX_CME_LCL_ICSR_COMM_SEND                               = 0   ;
static const uint8_t P9N2_EX_CME_LCL_ICSR_COMM_SEND_LEN                           = 32  ;

static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T0                          = 0   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T0_LEN                      = 6   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T1                          = 8   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T1_LEN                      = 6   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T2                          = 16  ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T2_LEN                      = 6   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T3                          = 24  ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_PECE_C_N_T3_LEN                      = 6   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_USE_PECE                             = 32  ;
static const uint8_t P9N2_EX_CME_LCL_PECESR0_USE_PECE_LEN                         = 4   ;

static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T0                          = 0   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T0_LEN                      = 6   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T1                          = 8   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T1_LEN                      = 6   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T2                          = 16  ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T2_LEN                      = 6   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T3                          = 24  ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_PECE_C_N_T3_LEN                      = 6   ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_USE_PECE                             = 32  ;
static const uint8_t P9N2_EX_CME_LCL_PECESR1_USE_PECE_LEN                         = 4   ;

static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_ENTRY_ACK_C0_ACTUAL                  = 0   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_ENTRY_ACK_C1_ACTUAL                  = 1   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_BLOCK_INTERRUPTS_C0_ACTUAL           = 2   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_BLOCK_INTERRUPTS_C1_ACTUAL           = 3   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_EXIT_C0_ACTUAL                       = 4   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_EXIT_C1_ACTUAL                       = 5   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_6_8                            = 6   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_6_8_LEN                        = 3   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_FUSED_CORE_MODE                         = 9   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCBMUX_GRANT_C0                         = 10  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCBMUX_GRANT_C1                         = 11  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_0123_C0                     = 12  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_0123_C0_LEN                 = 4   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_SPECIAL_WAKEUP_DONE_C0_ACTUAL           = 16  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_SPECIAL_WAKEUP_DONE_C1_ACTUAL           = 17  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_18_19                          = 18  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_18_19_LEN                      = 2   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C0              = 20  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C0_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C1              = 24  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C1_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_28_29                          = 28  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_RESERVED_28_29_LEN                      = 2   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_L2_INTF_QUIESCE_DONE_LVL_0_1            = 30  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_L2_INTF_QUIESCE_DONE_LVL_0_1_LEN        = 2   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_UNMASKED_ATTN_C0                     = 32  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_UNMASKED_ATTN_C1                     = 33  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_ACTIVE_C0                      = 34  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_ACTIVE_C1                      = 35  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_C0                             = 36  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_C0_LEN                         = 4   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_C1                             = 40  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_C1_LEN                         = 4   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_ALL_HV_C0                      = 44  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PM_STATE_ALL_HV_C1                      = 45  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_INSTR_RUNNING_C0                     = 46  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_INSTR_RUNNING_C1                     = 47  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_NON_HV_RUNNING_C0                    = 48  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_NON_HV_RUNNING_C0_LEN                = 4   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_NON_HV_RUNNING_C1                    = 52  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PC_NON_HV_RUNNING_C1_LEN                = 4   ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_ALLOW_REG_WAKEUP_C0                     = 56  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_ALLOW_REG_WAKEUP_C1                     = 57  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_9_C0                        = 58  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_9_C1                        = 59  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_0123_C1                     = 60  ;
static const uint8_t P9N2_EQ_CME_LCL_SISR_PCB_RSP_OOB_0123_C1_LEN                 = 4   ;

static const uint8_t P9N2_EX_CME_LCL_SISR_PM_ENTRY_ACK_C0_ACTUAL                  = 0   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_ENTRY_ACK_C1_ACTUAL                  = 1   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_BLOCK_INTERRUPTS_C0_ACTUAL           = 2   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_BLOCK_INTERRUPTS_C1_ACTUAL           = 3   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_EXIT_C0_ACTUAL                       = 4   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_EXIT_C1_ACTUAL                       = 5   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_6_8                            = 6   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_6_8_LEN                        = 3   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_FUSED_CORE_MODE                         = 9   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCBMUX_GRANT_C0                         = 10  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCBMUX_GRANT_C1                         = 11  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_0123_C0                     = 12  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_0123_C0_LEN                 = 4   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_SPECIAL_WAKEUP_DONE_C0_ACTUAL           = 16  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_SPECIAL_WAKEUP_DONE_C1_ACTUAL           = 17  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_18_19                          = 18  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_18_19_LEN                      = 2   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C0              = 20  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C0_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C1              = 24  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_THREAD_INSTR_RUNNING_C1_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_28_29                          = 28  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_RESERVED_28_29_LEN                      = 2   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_L2_INTF_QUIESCE_DONE_LVL_0_1            = 30  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_L2_INTF_QUIESCE_DONE_LVL_0_1_LEN        = 2   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_UNMASKED_ATTN_C0                     = 32  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_UNMASKED_ATTN_C1                     = 33  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_ACTIVE_C0                      = 34  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_ACTIVE_C1                      = 35  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_C0                             = 36  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_C0_LEN                         = 4   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_C1                             = 40  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_C1_LEN                         = 4   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_ALL_HV_C0                      = 44  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PM_STATE_ALL_HV_C1                      = 45  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_INSTR_RUNNING_C0                     = 46  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_INSTR_RUNNING_C1                     = 47  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_NON_HV_RUNNING_C0                    = 48  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_NON_HV_RUNNING_C0_LEN                = 4   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_NON_HV_RUNNING_C1                    = 52  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PC_NON_HV_RUNNING_C1_LEN                = 4   ;
static const uint8_t P9N2_EX_CME_LCL_SISR_ALLOW_REG_WAKEUP_C0                     = 56  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_ALLOW_REG_WAKEUP_C1                     = 57  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_9_C0                        = 58  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_9_C1                        = 59  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_0123_C1                     = 60  ;
static const uint8_t P9N2_EX_CME_LCL_SISR_PCB_RSP_OOB_0123_C1_LEN                 = 4   ;

static const uint8_t P9N2_EX_CME_LCL_TSEL_FIT_SEL                                 = 0   ;
static const uint8_t P9N2_EX_CME_LCL_TSEL_FIT_SEL_LEN                             = 4   ;
static const uint8_t P9N2_EX_CME_LCL_TSEL_WATCHDOG_SEL                            = 4   ;
static const uint8_t P9N2_EX_CME_LCL_TSEL_WATCHDOG_SEL_LEN                        = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_AFSR_INST_CYCLE_SAMPLE                      = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_AFSR_INST_CYCLE_SAMPLE_LEN                  = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_AFSR_AVG_CYCLE_SAMPLE                       = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_AFSR_AVG_CYCLE_SAMPLE_LEN                   = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_AFSR_SAMPLE_VALID                           = 63  ;

static const uint8_t P9N2_EX_CME_SCOM_AFSR_INST_CYCLE_SAMPLE                      = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_AFSR_INST_CYCLE_SAMPLE_LEN                  = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_AFSR_AVG_CYCLE_SAMPLE                       = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_AFSR_AVG_CYCLE_SAMPLE_LEN                   = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_AFSR_SAMPLE_VALID                           = 63  ;

static const uint8_t P9N2_EQ_CME_SCOM_AFTR_MAX_CYCLE_SAMPLE                       = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_AFTR_MAX_CYCLE_SAMPLE_LEN                   = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_AFTR_MIN_CYCLE_SAMPLE                       = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_AFTR_MIN_CYCLE_SAMPLE_LEN                   = 20  ;

static const uint8_t P9N2_EX_CME_SCOM_AFTR_MAX_CYCLE_SAMPLE                       = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_AFTR_MAX_CYCLE_SAMPLE_LEN                   = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_AFTR_MIN_CYCLE_SAMPLE                       = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_AFTR_MIN_CYCLE_SAMPLE_LEN                   = 20  ;

static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_BASE                                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_BASE_LEN                            = 36  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_RD_SCOPE                            = 57  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_RD_SCOPE_LEN                        = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_WR_SCOPE                            = 59  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_VG_TARGET_SEL                       = 60  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_SIZE                                = 61  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR0_SIZE_LEN                            = 3   ;

static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_BASE                                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_BASE_LEN                            = 36  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_RD_SCOPE                            = 57  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_RD_SCOPE_LEN                        = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_WR_SCOPE                            = 59  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_VG_TARGET_SEL                       = 60  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_SIZE                                = 61  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR0_SIZE_LEN                            = 3   ;

static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_BASE                                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_BASE_LEN                            = 36  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_RD_SCOPE                            = 57  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_RD_SCOPE_LEN                        = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_WR_SCOPE                            = 59  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_VG_TARGET_SEL                       = 60  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_SIZE                                = 61  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCEBAR1_SIZE_LEN                            = 3   ;

static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_BASE                                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_BASE_LEN                            = 36  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_RD_SCOPE                            = 57  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_RD_SCOPE_LEN                        = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_WR_SCOPE                            = 59  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_VG_TARGET_SEL                       = 60  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_SIZE                                = 61  ;
static const uint8_t P9N2_EX_CME_SCOM_BCEBAR1_SIZE_LEN                            = 3   ;

static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_BUSY                                 = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_ERROR                                = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_RNW                                  = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_BARSEL                               = 5   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_PRIORITY                             = 6   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_INJECT_ERR                           = 7   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_TYPE                                 = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_TYPE_LEN                             = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_NUM_BLOCKS                           = 17  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_NUM_BLOCKS_LEN                       = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_SBASE                                = 28  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_SBASE_LEN                            = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_MBASE                                = 42  ;
static const uint8_t P9N2_EQ_CME_SCOM_BCECSR_MBASE_LEN                            = 22  ;

static const uint8_t P9N2_EX_CME_SCOM_BCECSR_BUSY                                 = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_ERROR                                = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_RNW                                  = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_BARSEL                               = 5   ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_PRIORITY                             = 6   ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_INJECT_ERR                           = 7   ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_TYPE                                 = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_TYPE_LEN                             = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_NUM_BLOCKS                           = 17  ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_NUM_BLOCKS_LEN                       = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_SBASE                                = 28  ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_SBASE_LEN                            = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_MBASE                                = 42  ;
static const uint8_t P9N2_EX_CME_SCOM_BCECSR_MBASE_LEN                            = 22  ;

static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C0_DROPOUT_EVENT_COUNT                = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C0_DROPOUT_EVENT_COUNT_LEN            = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C0_DROPOUT_INAROW_COUNT               = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C0_DROPOUT_INAROW_COUNT_LEN           = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C1_DROPOUT_EVENT_COUNT                = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C1_DROPOUT_EVENT_COUNT_LEN            = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C1_DROPOUT_INAROW_COUNT               = 56  ;
static const uint8_t P9N2_EQ_CME_SCOM_CIDSR_C1_DROPOUT_INAROW_COUNT_LEN           = 8   ;

static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C0_DROPOUT_EVENT_COUNT                = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C0_DROPOUT_EVENT_COUNT_LEN            = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C0_DROPOUT_INAROW_COUNT               = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C0_DROPOUT_INAROW_COUNT_LEN           = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C1_DROPOUT_EVENT_COUNT                = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C1_DROPOUT_EVENT_COUNT_LEN            = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C1_DROPOUT_INAROW_COUNT               = 56  ;
static const uint8_t P9N2_EX_CME_SCOM_CIDSR_C1_DROPOUT_INAROW_COUNT_LEN           = 8   ;

static const uint8_t P9N2_EQ_CME_SCOM_EIIR_DEBUGGER                               = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_DEBUG_TRIGGER                          = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_BCE_TIMEOUT                            = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_PC_INTR_PENDING_C0                     = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_PC_INTR_PENDING_C1                     = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_SPECIAL_WAKEUP_C0                      = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_SPECIAL_WAKEUP_C1                      = 15  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_REG_WAKEUP_C0                          = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_REG_WAKEUP_C1                          = 17  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_PC_PM_STATE_ACTIVE_C0                  = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_PC_PM_STATE_ACTIVE_C1                  = 21  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_L2_PURGE_DONE                          = 22  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_NCU_PURGE_DONE                         = 23  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_CHTM_PURGE_DONE_C0                     = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_EIIR_CHTM_PURGE_DONE_C1                     = 25  ;

static const uint8_t P9N2_EX_CME_SCOM_EIIR_DEBUGGER                               = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_DEBUG_TRIGGER                          = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_BCE_TIMEOUT                            = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_PC_INTR_PENDING_C0                     = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_PC_INTR_PENDING_C1                     = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_SPECIAL_WAKEUP_C0                      = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_SPECIAL_WAKEUP_C1                      = 15  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_REG_WAKEUP_C0                          = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_REG_WAKEUP_C1                          = 17  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_PC_PM_STATE_ACTIVE_C0                  = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_PC_PM_STATE_ACTIVE_C1                  = 21  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_L2_PURGE_DONE                          = 22  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_NCU_PURGE_DONE                         = 23  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_CHTM_PURGE_DONE_C0                     = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_EIIR_CHTM_PURGE_DONE_C1                     = 25  ;

static const uint8_t P9N2_EQ_CME_SCOM_FLAGS_DATA                                  = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_FLAGS_DATA_LEN                              = 32  ;

static const uint8_t P9N2_EX_CME_SCOM_FLAGS_DATA                                  = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_FLAGS_DATA_LEN                              = 32  ;

static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_EVENT_THRESHOLD                = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_EVENT_THRESHOLD_LEN            = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_INAROW_THRESHOLD               = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_INAROW_THRESHOLD_LEN           = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_TIMER_MODE                     = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_CHAR_MODE                      = 33  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SIBLING_CORE_DROPOUT_ENABLE            = 34  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SIBLING_CORE_DROPOUT_ENABLE_LEN        = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_CORE_DROPOUT_ENABLE                    = 36  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_CORE_DROPOUT_ENABLE_LEN                = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_CACHE_DROPOUT_ENABLE                   = 38  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SPARE                                  = 39  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_NOTIFY_ENABLE                  = 40  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SPARE41_43                             = 41  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_SPARE41_43_LEN                         = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_SAMPLE_RATE                    = 59  ;
static const uint8_t P9N2_EQ_CME_SCOM_IDCR_DROPOUT_SAMPLE_RATE_LEN                = 5   ;

static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_EVENT_THRESHOLD                = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_EVENT_THRESHOLD_LEN            = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_INAROW_THRESHOLD               = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_INAROW_THRESHOLD_LEN           = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_TIMER_MODE                     = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_CHAR_MODE                      = 33  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SIBLING_CORE_DROPOUT_ENABLE            = 34  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SIBLING_CORE_DROPOUT_ENABLE_LEN        = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_CORE_DROPOUT_ENABLE                    = 36  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_CORE_DROPOUT_ENABLE_LEN                = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_CACHE_DROPOUT_ENABLE                   = 38  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SPARE                                  = 39  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_NOTIFY_ENABLE                  = 40  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SPARE41_43                             = 41  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_SPARE41_43_LEN                         = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_SAMPLE_RATE                    = 59  ;
static const uint8_t P9N2_EX_CME_SCOM_IDCR_DROPOUT_SAMPLE_RATE_LEN                = 5   ;

static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_INTERNAL_ERROR                     = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_EXTERNAL_ERROR                     = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_PROGRESS_ERROR                     = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_BREAKPOINT_ERROR                   = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_WATCHDOG                           = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_HALTED                             = 5   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_PPE_DEBUG_TRIGGER                      = 6   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SRAM_UE                                = 7   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SRAM_CE                                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SRAM_SCRUB_ERR                         = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_BCE_ERROR                              = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SPARE11                                = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SPARE12                                = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_C0_IVRM_DROPOUT                        = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_C1_IVRM_DROPOUT                        = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_CACHE_IVRM_DROPOUT                     = 15  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_EXTREME_DROOP_ERR                      = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_LARGE_DROOP_ERR                        = 17  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_SMALL_DROOP_ERR                        = 18  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_UNEXPECTED_DROOP_ENCODE                = 19  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_FIR_PARITY_ERR_DUP                     = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIR_FIR_PARITY_ERR                         = 21  ;

static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_INTERNAL_ERROR                     = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_EXTERNAL_ERROR                     = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_PROGRESS_ERROR                     = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_BREAKPOINT_ERROR                   = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_WATCHDOG                           = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_HALTED                             = 5   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_PPE_DEBUG_TRIGGER                      = 6   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SRAM_UE                                = 7   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SRAM_CE                                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SRAM_SCRUB_ERR                         = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_BCE_ERROR                              = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SPARE11                                = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SPARE12                                = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_C0_IVRM_DROPOUT                        = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_C1_IVRM_DROPOUT                        = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_CACHE_IVRM_DROPOUT                     = 15  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_EXTREME_DROOP_ERR                      = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_LARGE_DROOP_ERR                        = 17  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_SMALL_DROOP_ERR                        = 18  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_UNEXPECTED_DROOP_ENCODE                = 19  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_FIR_PARITY_ERR_DUP                     = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_LFIR_FIR_PARITY_ERR                         = 21  ;

static const uint8_t P9N2_EQ_CME_SCOM_LFIRACT0_FIR_ACTION0                        = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIRACT0_FIR_ACTION0_LEN                    = 22  ;

static const uint8_t P9N2_EX_CME_SCOM_LFIRACT0_FIR_ACTION0                        = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIRACT0_FIR_ACTION0_LEN                    = 22  ;

static const uint8_t P9N2_EQ_CME_SCOM_LFIRACT1_FIR_ACTION1                        = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIRACT1_FIR_ACTION1_LEN                    = 22  ;

static const uint8_t P9N2_EX_CME_SCOM_LFIRACT1_FIR_ACTION1                        = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIRACT1_FIR_ACTION1_LEN                    = 22  ;

static const uint8_t P9N2_EQ_CME_SCOM_LFIRMASK_FIR_MASK                           = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_LFIRMASK_FIR_MASK_LEN                       = 22  ;

static const uint8_t P9N2_EX_CME_SCOM_LFIRMASK_FIR_MASK                           = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_LFIRMASK_FIR_MASK_LEN                       = 22  ;

static const uint8_t P9N2_EQ_CME_SCOM_LMCR_PMCR_OVERRIDE_EN                       = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_PSCR_OVERRIDE_EN                       = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_PMSR_OVERRIDE_EN                       = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_BCECSR_OVERRIDE_EN                     = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_IDR_LCL_SAMPLE_EN                      = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_VDM_LCL_SAMPLE_EN                      = 5   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_FREQ_LCL_SAMPLE_EN                     = 6   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_LOCK_PCB_ON_ERR                        = 7   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_QUEUED_WR_EN                           = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_QUEUED_RD_EN                           = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_MASK_PURGE_INTERFACE                   = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_AUTO_BLOCK_REG_WAKEUP_DISABLE          = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_C0_AUTO_SPECIAL_WAKEUP_DISABLE         = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_C1_AUTO_SPECIAL_WAKEUP_DISABLE         = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_C0_HALTED_STOP_OVERRIDE_DISABLE        = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_C1_HALTED_STOP_OVERRIDE_DISABLE        = 15  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_STOP_OVERRIDE_MODE                     = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_STOP_ACTIVE_MASK                       = 17  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_AUTO_STOP1_DISABLE                     = 18  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_STOP1_ACTIVE_ENABLE                    = 19  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_FENCE_EISR                             = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_PC_DISABLE_DROOP                       = 21  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_BLOCK_PM_EXIT_DISABLE                  = 22  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SPARE_23                               = 23  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_AVG_FREQ_TSEL                          = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_AVG_FREQ_TSEL_LEN                      = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SPARE_28_31                            = 28  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SPARE_28_31_LEN                        = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_RESET_IMPRECISE_QERR                   = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SET_ECC_INJECT_ERR                     = 33  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_SPARE_34                               = 34  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_OOB_ERR_DISABLE                        = 35  ;
static const uint8_t P9N2_EQ_CME_SCOM_LMCR_OOB_ERR_DISABLE_LEN                    = 5   ;

static const uint8_t P9N2_EX_CME_SCOM_LMCR_PMCR_OVERRIDE_EN                       = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_PSCR_OVERRIDE_EN                       = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_PMSR_OVERRIDE_EN                       = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_BCECSR_OVERRIDE_EN                     = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_IDR_LCL_SAMPLE_EN                      = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_VDM_LCL_SAMPLE_EN                      = 5   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_FREQ_LCL_SAMPLE_EN                     = 6   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_LOCK_PCB_ON_ERR                        = 7   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_QUEUED_WR_EN                           = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_QUEUED_RD_EN                           = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_MASK_PURGE_INTERFACE                   = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_AUTO_BLOCK_REG_WAKEUP_DISABLE          = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_C0_AUTO_SPECIAL_WAKEUP_DISABLE         = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_C1_AUTO_SPECIAL_WAKEUP_DISABLE         = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_C0_HALTED_STOP_OVERRIDE_DISABLE        = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_C1_HALTED_STOP_OVERRIDE_DISABLE        = 15  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_STOP_OVERRIDE_MODE                     = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_STOP_ACTIVE_MASK                       = 17  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_AUTO_STOP1_DISABLE                     = 18  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_STOP1_ACTIVE_ENABLE                    = 19  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_FENCE_EISR                             = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_PC_DISABLE_DROOP                       = 21  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_BLOCK_PM_EXIT_DISABLE                  = 22  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SPARE_23                               = 23  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_AVG_FREQ_TSEL                          = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_AVG_FREQ_TSEL_LEN                      = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SPARE_28_31                            = 28  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SPARE_28_31_LEN                        = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_RESET_IMPRECISE_QERR                   = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SET_ECC_INJECT_ERR                     = 33  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_SPARE_34                               = 34  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_OOB_ERR_DISABLE                        = 35  ;
static const uint8_t P9N2_EX_CME_SCOM_LMCR_OOB_ERR_DISABLE_LEN                    = 5   ;

static const uint8_t P9N2_EQ_CME_SCOM_PMCRS0_DATA                                 = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PMCRS0_DATA_LEN                             = 64  ;

static const uint8_t P9N2_EX_CME_SCOM_PMCRS0_DATA                                 = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PMCRS0_DATA_LEN                             = 64  ;

static const uint8_t P9N2_EQ_CME_SCOM_PMCRS1_DATA                                 = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PMCRS1_DATA_LEN                             = 64  ;

static const uint8_t P9N2_EX_CME_SCOM_PMCRS1_DATA                                 = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PMCRS1_DATA_LEN                             = 64  ;

static const uint8_t P9N2_EQ_CME_SCOM_PMSRS0_DATA                                 = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PMSRS0_DATA_LEN                             = 64  ;

static const uint8_t P9N2_EX_CME_SCOM_PMSRS0_DATA                                 = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PMSRS0_DATA_LEN                             = 64  ;

static const uint8_t P9N2_EQ_CME_SCOM_PMSRS1_DATA                                 = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PMSRS1_DATA_LEN                             = 64  ;

static const uint8_t P9N2_EX_CME_SCOM_PMSRS1_DATA                                 = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PMSRS1_DATA_LEN                             = 64  ;

static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_SPARE0                              = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS00_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_SPARE0                              = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS00_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_SPARE0                              = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS01_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_SPARE0                              = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS01_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_SPARE0                              = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS02_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_SPARE0                              = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS02_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_SPARE0                              = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS03_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_SPARE0                              = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS03_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_SPARE0                              = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS10_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_SPARE0                              = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS10_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_SPARE0                              = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS11_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_SPARE0                              = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS11_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_SPARE0                              = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS12_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_SPARE0                              = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS12_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_SPARE0                              = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_PSCRS13_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_SPARE0                              = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_OS_STATUS_DISABLE_A_N               = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_STATE_LOSS_ENABLE_A_N               = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_EXIT_CRITERION_A_N                  = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_POWER_SAVING_LIMIT_A_N              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_POWER_SAVING_LIMIT_A_N_LEN          = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_HYP_VIRT_EXIT_ENABLE                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_EXT_EBB_EXIT_ENABLE                 = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_EXT_RESUME_EXIT_ENABLE              = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_EXT_EXIT_ENABLE                     = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_DEC_EXIT_ENABLE                     = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_HMI_EXIT_ENABLE                     = 13  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_LEVEL_TRANSITION_RATE_A_N           = 14  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_LEVEL_TRANSITION_RATE_A_N_LEN       = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_MAX_PROMOTE_LEVEL_A_N               = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_MAX_PROMOTE_LEVEL_A_N_LEN           = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_STOP_REQUEST_LEVEL_A_N              = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_PSCRS13_STOP_REQUEST_LEVEL_A_N_LEN          = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_QFMR_TIMEBASE                               = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_QFMR_TIMEBASE_LEN                           = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_QFMR_CYCLES                                 = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_QFMR_CYCLES_LEN                             = 32  ;

static const uint8_t P9N2_EX_CME_SCOM_QFMR_TIMEBASE                               = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_QFMR_TIMEBASE_LEN                           = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_QFMR_CYCLES                                 = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_QFMR_CYCLES_LEN                             = 32  ;

static const uint8_t P9N2_EQ_CME_SCOM_QIDSR_CACHE_DROPOUT_EVENT_COUNT             = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_QIDSR_CACHE_DROPOUT_EVENT_COUNT_LEN         = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_QIDSR_CACHE_DROPOUT_INAROW_COUNT            = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_QIDSR_CACHE_DROPOUT_INAROW_COUNT_LEN        = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_QIDSR_DROPOUT_SAMPLE                        = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_QIDSR_DROPOUT_SAMPLE_LEN                    = 3   ;

static const uint8_t P9N2_EX_CME_SCOM_QIDSR_CACHE_DROPOUT_EVENT_COUNT             = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_QIDSR_CACHE_DROPOUT_EVENT_COUNT_LEN         = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_QIDSR_CACHE_DROPOUT_INAROW_COUNT            = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_QIDSR_CACHE_DROPOUT_INAROW_COUNT_LEN        = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_QIDSR_DROPOUT_SAMPLE                        = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_QIDSR_DROPOUT_SAMPLE_LEN                    = 3   ;

static const uint8_t P9N2_EQ_CME_SCOM_SICR_PM_ENTRY_ACK_C0                        = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PM_ENTRY_ACK_C1                        = 1   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PM_BLOCK_INTERRUPTS_C0                 = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PM_BLOCK_INTERRUPTS_C1                 = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PM_EXIT_C0                             = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PM_EXIT_C1                             = 5   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PCC_CORE_INTF_QUIESCE_C0               = 6   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PCC_CORE_INTF_QUIESCE_C1               = 7   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_L2_CORE_INTF_QUIESCE_C0                = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_L2_CORE_INTF_QUIESCE_C1                = 9   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PCBMUX_REQ_C0                          = 10  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PCBMUX_REQ_C1                          = 11  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_RESERVED_12_15                         = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_RESERVED_12_15_LEN                     = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_SPECIAL_WKUP_DONE_C0                   = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_SPECIAL_WKUP_DONE_C1                   = 17  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_L2_PURGE                               = 18  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_L2_PURGE_ABORT                         = 19  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PC_THROTTLE_REQ                        = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_NCU_TLBIE_QUIESCE                      = 21  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_NCU_PURGE                              = 22  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_NCU_PURGE_ABORT                        = 23  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_CHTM_PURGE_C0                          = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_CHTM_PURGE_C1                          = 25  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_HMI_REQUEST_C0                         = 26  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_HMI_REQUEST_C1                         = 27  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PPM_SPARE_OUT_C0                       = 28  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_PPM_SPARE_OUT_C1                       = 29  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_RESERVED_30_31                         = 30  ;
static const uint8_t P9N2_EQ_CME_SCOM_SICR_RESERVED_30_31_LEN                     = 2   ;

static const uint8_t P9N2_EX_CME_SCOM_SICR_PM_ENTRY_ACK_C0                        = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PM_ENTRY_ACK_C1                        = 1   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PM_BLOCK_INTERRUPTS_C0                 = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PM_BLOCK_INTERRUPTS_C1                 = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PM_EXIT_C0                             = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PM_EXIT_C1                             = 5   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PCC_CORE_INTF_QUIESCE_C0               = 6   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PCC_CORE_INTF_QUIESCE_C1               = 7   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_L2_CORE_INTF_QUIESCE_C0                = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_L2_CORE_INTF_QUIESCE_C1                = 9   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PCBMUX_REQ_C0                          = 10  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PCBMUX_REQ_C1                          = 11  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_RESERVED_12_15                         = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_RESERVED_12_15_LEN                     = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_SPECIAL_WKUP_DONE_C0                   = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_SPECIAL_WKUP_DONE_C1                   = 17  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_L2_PURGE                               = 18  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_L2_PURGE_ABORT                         = 19  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PC_THROTTLE_REQ                        = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_NCU_TLBIE_QUIESCE                      = 21  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_NCU_PURGE                              = 22  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_NCU_PURGE_ABORT                        = 23  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_CHTM_PURGE_C0                          = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_CHTM_PURGE_C1                          = 25  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_HMI_REQUEST_C0                         = 26  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_HMI_REQUEST_C1                         = 27  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PPM_SPARE_OUT_C0                       = 28  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_PPM_SPARE_OUT_C1                       = 29  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_RESERVED_30_31                         = 30  ;
static const uint8_t P9N2_EX_CME_SCOM_SICR_RESERVED_30_31_LEN                     = 2   ;

static const uint8_t P9N2_EQ_CME_SCOM_SRTCH0_DATA                                 = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_SRTCH0_DATA_LEN                             = 32  ;

static const uint8_t P9N2_EX_CME_SCOM_SRTCH0_DATA                                 = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_SRTCH0_DATA_LEN                             = 32  ;

static const uint8_t P9N2_EQ_CME_SCOM_SRTCH1_DATA                                 = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_SRTCH1_DATA_LEN                             = 32  ;

static const uint8_t P9N2_EX_CME_SCOM_SRTCH1_DATA                                 = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_SRTCH1_DATA_LEN                             = 32  ;

static const uint8_t P9N2_EQ_CME_SCOM_VCCR_SMALL_EVENT_THRESHOLD                  = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_SMALL_EVENT_THRESHOLD_LEN              = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_LARGE_EVENT_THRESHOLD                  = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_LARGE_EVENT_THRESHOLD_LEN              = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_EXTREME_EVENT_THRESHOLD                = 28  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_EXTREME_EVENT_THRESHOLD_LEN            = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_DROOP_PROFILE_TYPE                     = 36  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_DROOP_PROFILE_TYPE_LEN                 = 2   ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_DROOP_TIMER_MODE                       = 38  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_DROOP_CHAR_MODE                        = 39  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_DROOP_NOTIFY_ENABLE                    = 40  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_SPARE41_43                             = 41  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_SPARE41_43_LEN                         = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_DROOP_SAMPLE_RATE                      = 59  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCCR_DROOP_SAMPLE_RATE_LEN                  = 5   ;

static const uint8_t P9N2_EX_CME_SCOM_VCCR_SMALL_EVENT_THRESHOLD                  = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_SMALL_EVENT_THRESHOLD_LEN              = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_LARGE_EVENT_THRESHOLD                  = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_LARGE_EVENT_THRESHOLD_LEN              = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_EXTREME_EVENT_THRESHOLD                = 28  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_EXTREME_EVENT_THRESHOLD_LEN            = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_DROOP_PROFILE_TYPE                     = 36  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_DROOP_PROFILE_TYPE_LEN                 = 2   ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_DROOP_TIMER_MODE                       = 38  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_DROOP_CHAR_MODE                        = 39  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_DROOP_NOTIFY_ENABLE                    = 40  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_SPARE41_43                             = 41  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_SPARE41_43_LEN                         = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_DROOP_SAMPLE_RATE                      = 59  ;
static const uint8_t P9N2_EX_CME_SCOM_VCCR_DROOP_SAMPLE_RATE_LEN                  = 5   ;

static const uint8_t P9N2_EQ_CME_SCOM_VCTR_VDM_EXTREME_DROOP_THRESHOLD            = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_VCTR_VDM_EXTREME_DROOP_THRESHOLD_LEN        = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCTR_VDM_LARGE_DROOP_THRESHOLD              = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCTR_VDM_LARGE_DROOP_THRESHOLD_LEN          = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCTR_VDM_SMALL_DROOP_THRESHOLD              = 40  ;
static const uint8_t P9N2_EQ_CME_SCOM_VCTR_VDM_SMALL_DROOP_THRESHOLD_LEN          = 24  ;

static const uint8_t P9N2_EX_CME_SCOM_VCTR_VDM_EXTREME_DROOP_THRESHOLD            = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_VCTR_VDM_EXTREME_DROOP_THRESHOLD_LEN        = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VCTR_VDM_LARGE_DROOP_THRESHOLD              = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VCTR_VDM_LARGE_DROOP_THRESHOLD_LEN          = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_VCTR_VDM_SMALL_DROOP_THRESHOLD              = 40  ;
static const uint8_t P9N2_EX_CME_SCOM_VCTR_VDM_SMALL_DROOP_THRESHOLD_LEN          = 24  ;

static const uint8_t P9N2_EQ_CME_SCOM_VDCR_VDM_EXTREME_DROOP_CTR                  = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDCR_VDM_EXTREME_DROOP_CTR_LEN              = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDCR_VDM_LARGE_DROOP_CTR                    = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDCR_VDM_LARGE_DROOP_CTR_LEN                = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDCR_VDM_SMALL_DROOP_CTR                    = 40  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDCR_VDM_SMALL_DROOP_CTR_LEN                = 24  ;

static const uint8_t P9N2_EX_CME_SCOM_VDCR_VDM_EXTREME_DROOP_CTR                  = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_VDCR_VDM_EXTREME_DROOP_CTR_LEN              = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VDCR_VDM_LARGE_DROOP_CTR                    = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VDCR_VDM_LARGE_DROOP_CTR_LEN                = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_VDCR_VDM_SMALL_DROOP_CTR                    = 40  ;
static const uint8_t P9N2_EX_CME_SCOM_VDCR_VDM_SMALL_DROOP_CTR_LEN                = 24  ;

static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_VDM_CONTROL_SUMMARY            = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_VDM_CONTROL_SUMMARY_LEN        = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CACHE_VDM_DATA                 = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CACHE_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CORE0_VDM_DATA                 = 8   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CORE0_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CORE1_VDM_DATA                 = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CORE1_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CORE2_VDM_DATA                 = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CORE2_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CORE3_VDM_DATA                 = 20  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_INSTANT_CORE3_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_VDM_CONTROL_SUMMARY             = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_VDM_CONTROL_SUMMARY_LEN         = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CACHE_VDM_DATA                  = 36  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CACHE_VDM_DATA_LEN              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CORE0_VDM_DATA                  = 40  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CORE0_VDM_DATA_LEN              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CORE1_VDM_DATA                  = 44  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CORE1_VDM_DATA_LEN              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CORE2_VDM_DATA                  = 48  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CORE2_VDM_DATA_LEN              = 4   ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CORE3_VDM_DATA                  = 52  ;
static const uint8_t P9N2_EQ_CME_SCOM_VDSR_STICKY_CORE3_VDM_DATA_LEN              = 4   ;

static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_VDM_CONTROL_SUMMARY            = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_VDM_CONTROL_SUMMARY_LEN        = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CACHE_VDM_DATA                 = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CACHE_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CORE0_VDM_DATA                 = 8   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CORE0_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CORE1_VDM_DATA                 = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CORE1_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CORE2_VDM_DATA                 = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CORE2_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CORE3_VDM_DATA                 = 20  ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_INSTANT_CORE3_VDM_DATA_LEN             = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_VDM_CONTROL_SUMMARY             = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_VDM_CONTROL_SUMMARY_LEN         = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CACHE_VDM_DATA                  = 36  ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CACHE_VDM_DATA_LEN              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CORE0_VDM_DATA                  = 40  ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CORE0_VDM_DATA_LEN              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CORE1_VDM_DATA                  = 44  ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CORE1_VDM_DATA_LEN              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CORE2_VDM_DATA                  = 48  ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CORE2_VDM_DATA_LEN              = 4   ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CORE3_VDM_DATA                  = 52  ;
static const uint8_t P9N2_EX_CME_SCOM_VDSR_STICKY_CORE3_VDM_DATA_LEN              = 4   ;

static const uint8_t P9N2_EQ_CME_SCOM_VECR_TOTAL_DROOP_EVENT_CTR                  = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_VECR_TOTAL_DROOP_EVENT_CTR_LEN              = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VECR_SMALL_EVENT_PROFILE_CTR                = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VECR_SMALL_EVENT_PROFILE_CTR_LEN            = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VECR_LARGER_DROOP_EVENT_CTR                 = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_VECR_LARGER_DROOP_EVENT_CTR_LEN             = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_VECR_LARGE_EVENT_PROFILE_CTR                = 44  ;
static const uint8_t P9N2_EQ_CME_SCOM_VECR_LARGE_EVENT_PROFILE_CTR_LEN            = 12  ;
static const uint8_t P9N2_EQ_CME_SCOM_VECR_EXTREME_DROOP_EVENT_CTR                = 56  ;
static const uint8_t P9N2_EQ_CME_SCOM_VECR_EXTREME_DROOP_EVENT_CTR_LEN            = 8   ;

static const uint8_t P9N2_EX_CME_SCOM_VECR_TOTAL_DROOP_EVENT_CTR                  = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_VECR_TOTAL_DROOP_EVENT_CTR_LEN              = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VECR_SMALL_EVENT_PROFILE_CTR                = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VECR_SMALL_EVENT_PROFILE_CTR_LEN            = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VECR_LARGER_DROOP_EVENT_CTR                 = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_VECR_LARGER_DROOP_EVENT_CTR_LEN             = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_VECR_LARGE_EVENT_PROFILE_CTR                = 44  ;
static const uint8_t P9N2_EX_CME_SCOM_VECR_LARGE_EVENT_PROFILE_CTR_LEN            = 12  ;
static const uint8_t P9N2_EX_CME_SCOM_VECR_EXTREME_DROOP_EVENT_CTR                = 56  ;
static const uint8_t P9N2_EX_CME_SCOM_VECR_EXTREME_DROOP_EVENT_CTR_LEN            = 8   ;

static const uint8_t P9N2_EQ_CME_SCOM_VNCR_VDM_NO_DROOP_CTR                       = 16  ;
static const uint8_t P9N2_EQ_CME_SCOM_VNCR_VDM_NO_DROOP_CTR_LEN                   = 24  ;
static const uint8_t P9N2_EQ_CME_SCOM_VNCR_VDM_OVERVOLT_CTR                       = 40  ;
static const uint8_t P9N2_EQ_CME_SCOM_VNCR_VDM_OVERVOLT_CTR_LEN                   = 24  ;

static const uint8_t P9N2_EX_CME_SCOM_VNCR_VDM_NO_DROOP_CTR                       = 16  ;
static const uint8_t P9N2_EX_CME_SCOM_VNCR_VDM_NO_DROOP_CTR_LEN                   = 24  ;
static const uint8_t P9N2_EX_CME_SCOM_VNCR_VDM_OVERVOLT_CTR                       = 40  ;
static const uint8_t P9N2_EX_CME_SCOM_VNCR_VDM_OVERVOLT_CTR_LEN                   = 24  ;

static const uint8_t P9N2_EQ_CME_SCOM_XIPCBMD0_PCBM_DATA                          = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_XIPCBMD0_PCBM_DATA_LEN                      = 27  ;

static const uint8_t P9N2_EX_CME_SCOM_XIPCBMD0_PCBM_DATA                          = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_XIPCBMD0_PCBM_DATA_LEN                      = 27  ;

static const uint8_t P9N2_EQ_CME_SCOM_XIPCBMD1_PCBM_DATA                          = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_XIPCBMD1_PCBM_DATA_LEN                      = 27  ;

static const uint8_t P9N2_EX_CME_SCOM_XIPCBMD1_PCBM_DATA                          = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_XIPCBMD1_PCBM_DATA_LEN                      = 27  ;

static const uint8_t P9N2_EQ_CME_SCOM_XIPCBMI0_PCBM_INFO                          = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_XIPCBMI0_PCBM_INFO_LEN                      = 7   ;

static const uint8_t P9N2_EX_CME_SCOM_XIPCBMI0_PCBM_INFO                          = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_XIPCBMI0_PCBM_INFO_LEN                      = 7   ;

static const uint8_t P9N2_EQ_CME_SCOM_XIPCBMI1_PCBM_INFO                          = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_XIPCBMI1_PCBM_INFO_LEN                      = 7   ;

static const uint8_t P9N2_EX_CME_SCOM_XIPCBMI1_PCBM_INFO                          = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_XIPCBMI1_PCBM_INFO_LEN                      = 7   ;

static const uint8_t P9N2_EQ_CME_SCOM_XIPCBQ0_PCBQ_N_INFO                         = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_XIPCBQ0_PCBQ_N_INFO_LEN                     = 26  ;

static const uint8_t P9N2_EX_CME_SCOM_XIPCBQ0_PCBQ_N_INFO                         = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_XIPCBQ0_PCBQ_N_INFO_LEN                     = 26  ;

static const uint8_t P9N2_EQ_CME_SCOM_XIPCBQ1_PCBQ_N_INFO                         = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_XIPCBQ1_PCBQ_N_INFO_LEN                     = 26  ;

static const uint8_t P9N2_EX_CME_SCOM_XIPCBQ1_PCBQ_N_INFO                         = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_XIPCBQ1_PCBQ_N_INFO_LEN                     = 26  ;

static const uint8_t P9N2_EQ_CME_SCOM_XISIB_PIB_ADDR                              = 0   ;
static const uint8_t P9N2_EQ_CME_SCOM_XISIB_PIB_ADDR_LEN                          = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_XISIB_PIB_R_NW                              = 32  ;
static const uint8_t P9N2_EQ_CME_SCOM_XISIB_PIB_BUSY                              = 33  ;
static const uint8_t P9N2_EQ_CME_SCOM_XISIB_PIB_IMPRECISE_ERROR_PENDING           = 34  ;
static const uint8_t P9N2_EQ_CME_SCOM_XISIB_PIB_RSP_INFO                          = 49  ;
static const uint8_t P9N2_EQ_CME_SCOM_XISIB_PIB_RSP_INFO_LEN                      = 3   ;
static const uint8_t P9N2_EQ_CME_SCOM_XISIB_PIB_IFETCH_PENDING                    = 62  ;
static const uint8_t P9N2_EQ_CME_SCOM_XISIB_PIB_DATAOP_PENDING                    = 63  ;

static const uint8_t P9N2_EX_CME_SCOM_XISIB_PIB_ADDR                              = 0   ;
static const uint8_t P9N2_EX_CME_SCOM_XISIB_PIB_ADDR_LEN                          = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_XISIB_PIB_R_NW                              = 32  ;
static const uint8_t P9N2_EX_CME_SCOM_XISIB_PIB_BUSY                              = 33  ;
static const uint8_t P9N2_EX_CME_SCOM_XISIB_PIB_IMPRECISE_ERROR_PENDING           = 34  ;
static const uint8_t P9N2_EX_CME_SCOM_XISIB_PIB_RSP_INFO                          = 49  ;
static const uint8_t P9N2_EX_CME_SCOM_XISIB_PIB_RSP_INFO_LEN                      = 3   ;
static const uint8_t P9N2_EX_CME_SCOM_XISIB_PIB_IFETCH_PENDING                    = 62  ;
static const uint8_t P9N2_EX_CME_SCOM_XISIB_PIB_DATAOP_PENDING                    = 63  ;

static const uint8_t P9N2_EQ_CONTROL_REG_RESET_TRIP_HISTORY                       = 0   ;
static const uint8_t P9N2_EQ_CONTROL_REG_RESET_SAMPLE_PULSE_CNT                   = 1   ;
static const uint8_t P9N2_EQ_CONTROL_REG_F_RESET_CPM_RD                           = 2   ;
static const uint8_t P9N2_EQ_CONTROL_REG_F_RESET_CPM_WR                           = 3   ;
static const uint8_t P9N2_EQ_CONTROL_REG_RESET_SAMPLE_DTS                         = 4   ;
static const uint8_t P9N2_EQ_CONTROL_REG_FORCE_SAMPLE_DTS                         = 5   ;
static const uint8_t P9N2_EQ_CONTROL_REG_FORCE_SAMPLE_DTS_INTERRUPTIBLE           = 6   ;
static const uint8_t P9N2_EQ_CONTROL_REG_FORCE_RESET_THRES_L1RESULTS              = 7   ;
static const uint8_t P9N2_EQ_CONTROL_REG_FORCE_RESET_THRES_L2RESULTS              = 8   ;
static const uint8_t P9N2_EQ_CONTROL_REG_FORCE_RESET_THRES_L3RESULTS              = 9   ;
static const uint8_t P9N2_EQ_CONTROL_REG_FORCE_MEASURE_VOLT_INTERRUPTIBLE         = 10  ;
static const uint8_t P9N2_EQ_CONTROL_REG_FORCE_RESET_MEASURE_VOLT                 = 11  ;
static const uint8_t P9N2_EQ_CONTROL_REG_FORCE_SHIFT_SENSOR                       = 12  ;

static const uint8_t P9N2_EX_CONTROL_REG_RESET_TRIP_HISTORY                       = 0   ;
static const uint8_t P9N2_EX_CONTROL_REG_RESET_SAMPLE_PULSE_CNT                   = 1   ;
static const uint8_t P9N2_EX_CONTROL_REG_F_RESET_CPM_RD                           = 2   ;
static const uint8_t P9N2_EX_CONTROL_REG_F_RESET_CPM_WR                           = 3   ;
static const uint8_t P9N2_EX_CONTROL_REG_RESET_SAMPLE_DTS                         = 4   ;
static const uint8_t P9N2_EX_CONTROL_REG_FORCE_SAMPLE_DTS                         = 5   ;
static const uint8_t P9N2_EX_CONTROL_REG_FORCE_SAMPLE_DTS_INTERRUPTIBLE           = 6   ;
static const uint8_t P9N2_EX_CONTROL_REG_FORCE_RESET_THRES_L1RESULTS              = 7   ;
static const uint8_t P9N2_EX_CONTROL_REG_FORCE_RESET_THRES_L2RESULTS              = 8   ;
static const uint8_t P9N2_EX_CONTROL_REG_FORCE_RESET_THRES_L3RESULTS              = 9   ;
static const uint8_t P9N2_EX_CONTROL_REG_FORCE_MEASURE_VOLT_INTERRUPTIBLE         = 10  ;
static const uint8_t P9N2_EX_CONTROL_REG_FORCE_RESET_MEASURE_VOLT                 = 11  ;
static const uint8_t P9N2_EX_CONTROL_REG_FORCE_SHIFT_SENSOR                       = 12  ;

static const uint8_t P9N2_C_CONTROL_REG_RESET_TRIP_HISTORY                        = 0   ;
static const uint8_t P9N2_C_CONTROL_REG_RESET_SAMPLE_PULSE_CNT                    = 1   ;
static const uint8_t P9N2_C_CONTROL_REG_F_RESET_CPM_RD                            = 2   ;
static const uint8_t P9N2_C_CONTROL_REG_F_RESET_CPM_WR                            = 3   ;
static const uint8_t P9N2_C_CONTROL_REG_RESET_SAMPLE_DTS                          = 4   ;
static const uint8_t P9N2_C_CONTROL_REG_FORCE_SAMPLE_DTS                          = 5   ;
static const uint8_t P9N2_C_CONTROL_REG_FORCE_SAMPLE_DTS_INTERRUPTIBLE            = 6   ;
static const uint8_t P9N2_C_CONTROL_REG_FORCE_RESET_THRES_L1RESULTS               = 7   ;
static const uint8_t P9N2_C_CONTROL_REG_FORCE_RESET_THRES_L2RESULTS               = 8   ;
static const uint8_t P9N2_C_CONTROL_REG_FORCE_RESET_THRES_L3RESULTS               = 9   ;
static const uint8_t P9N2_C_CONTROL_REG_FORCE_MEASURE_VOLT_INTERRUPTIBLE          = 10  ;
static const uint8_t P9N2_C_CONTROL_REG_FORCE_RESET_MEASURE_VOLT                  = 11  ;
static const uint8_t P9N2_C_CONTROL_REG_FORCE_SHIFT_SENSOR                        = 12  ;

static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_IF_SRAM_REC_ERROR             = 0   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_TC_FIR_XSTOP_ERROR            = 1   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_IF_RFILE_REC_ERROR            = 2   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_IF_RFILE_XSTOP_ERROR          = 3   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_IF_LOG_REC_ERROR              = 4   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_IF_LOG_XSTOP_ERROR            = 5   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_6                      = 6   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_7                      = 7   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_RECOV_XSTOP_ERROR          = 8   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_RFILE_REC_ERROR            = 9   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_RFILE_XSTOP_ERROR          = 10  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_LOG_REC_ERROR              = 11  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_LOG_XSTOP_ERROR            = 12  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_NOT_MT_CI_REC_ERROR        = 13  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_MCHK_AND_ME_EQ_0_ERROR     = 14  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_L2_UE_ERROR                = 15  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_L2_UE_OVER_THRES_ERROR     = 16  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_CI_UE_ERROR                = 17  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_18                     = 18  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_19                     = 19  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_SD_SYS_XSTOP_ERROR            = 20  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_21                     = 21  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_22                     = 22  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_23                     = 23  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_VS_LOG_REC_ERROR              = 24  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_VS_LOG_XSTOP_ERROR            = 25  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_RECOV_IN_MAINT_ERROR       = 26  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_VS_DU_LOG_REC_ERROR           = 27  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_SYS_XSTOP_ERROR            = 28  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_SRAM_PARITY_ERROR          = 29  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_SETDELETE_ERROR            = 30  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_RFILE_REC_ERROR            = 31  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_RFILE_XSTOP_ERROR          = 32  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_TLB_MULTIHIT_ERROR         = 33  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_SLB_MULTIHIT_ERROR         = 34  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_DERAT_MULTIHIT_ERROR       = 35  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_FWD_PROGRESS_ERROR         = 36  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_LOG_REC_ERROR              = 37  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_LOG_XSTOP_ERROR            = 38  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_39                     = 39  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_40                     = 40  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_LS_SYS_XSTOP_ERROR            = 41  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_42                     = 42  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_THREAD_HANG_REC_ERROR      = 43  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_44                     = 44  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_LOG_XSTOP_ERROR            = 45  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_46                     = 46  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_TFAC_XSTOP_ERROR           = 47  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_HYP_RES_ERROR              = 48  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_49                     = 49  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_50                     = 50  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_51                     = 51  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_HANG_RECOVERY_FAILED       = 52  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_HANG_DETECT_ERROR          = 53  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_UNUSED_54                     = 54  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_NEST_HANG_DETECT_ERROR     = 55  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_OTHER_CHIPLET_REC_ERROR    = 56  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_OTHER_CHIPLET_XSTOP_ERROR  = 57  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_OTHER_CHIPLET_SYS_XSTOP_ERROR = 58  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_SCOM_ERROR                 = 59  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_XSTOP_ON_DBG_TRIGGER_ERROR = 60  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_FW_INJ_REC_ERROR           = 61  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_FW_INJ_XSTOP_ERROR         = 62  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION0_ACTION_PC_PHYP_XSTOP_ERROR           = 63  ;

static const uint8_t P9N2_C_CORE_ACTION0_ACTION_IF_SRAM_REC_ERROR                 = 0   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_TC_FIR_XSTOP_ERROR                = 1   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_IF_RFILE_REC_ERROR                = 2   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_IF_RFILE_XSTOP_ERROR              = 3   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_IF_LOG_REC_ERROR                  = 4   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_IF_LOG_XSTOP_ERROR                = 5   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_6                          = 6   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_7                          = 7   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_RECOV_XSTOP_ERROR              = 8   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_RFILE_REC_ERROR                = 9   ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_RFILE_XSTOP_ERROR              = 10  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_LOG_REC_ERROR                  = 11  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_LOG_XSTOP_ERROR                = 12  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_NOT_MT_CI_REC_ERROR            = 13  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_MCHK_AND_ME_EQ_0_ERROR         = 14  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_L2_UE_ERROR                    = 15  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_L2_UE_OVER_THRES_ERROR         = 16  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_CI_UE_ERROR                    = 17  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_18                         = 18  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_19                         = 19  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_SD_SYS_XSTOP_ERROR                = 20  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_21                         = 21  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_22                         = 22  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_23                         = 23  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_VS_LOG_REC_ERROR                  = 24  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_VS_LOG_XSTOP_ERROR                = 25  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_RECOV_IN_MAINT_ERROR           = 26  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_VS_DU_LOG_REC_ERROR               = 27  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_SYS_XSTOP_ERROR                = 28  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_SRAM_PARITY_ERROR              = 29  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_SETDELETE_ERROR                = 30  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_RFILE_REC_ERROR                = 31  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_RFILE_XSTOP_ERROR              = 32  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_TLB_MULTIHIT_ERROR             = 33  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_SLB_MULTIHIT_ERROR             = 34  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_DERAT_MULTIHIT_ERROR           = 35  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_FWD_PROGRESS_ERROR             = 36  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_LOG_REC_ERROR                  = 37  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_LOG_XSTOP_ERROR                = 38  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_39                         = 39  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_40                         = 40  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_LS_SYS_XSTOP_ERROR                = 41  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_42                         = 42  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_THREAD_HANG_REC_ERROR          = 43  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_44                         = 44  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_LOG_XSTOP_ERROR                = 45  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_46                         = 46  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_TFAC_XSTOP_ERROR               = 47  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_HYP_RES_ERROR                  = 48  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_49                         = 49  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_50                         = 50  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_51                         = 51  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_HANG_RECOVERY_FAILED           = 52  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_HANG_DETECT_ERROR              = 53  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_UNUSED_54                         = 54  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_NEST_HANG_DETECT_ERROR         = 55  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_OTHER_CHIPLET_REC_ERROR        = 56  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_OTHER_CHIPLET_XSTOP_ERROR      = 57  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_OTHER_CHIPLET_SYS_XSTOP_ERROR  = 58  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_SCOM_ERROR                     = 59  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_XSTOP_ON_DBG_TRIGGER_ERROR     = 60  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_FW_INJ_REC_ERROR               = 61  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_FW_INJ_XSTOP_ERROR             = 62  ;
static const uint8_t P9N2_C_CORE_ACTION0_ACTION_PC_PHYP_XSTOP_ERROR               = 63  ;

static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_IF_SRAM_REC_ERROR             = 0   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_TC_FIR_XSTOP_ERROR            = 1   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_IF_RFILE_REC_ERROR            = 2   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_IF_RFILE_XSTOP_ERROR          = 3   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_IF_LOG_REC_ERROR              = 4   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_IF_LOG_XSTOP_ERROR            = 5   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_6                      = 6   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_7                      = 7   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_RECOV_XSTOP_ERROR          = 8   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_RFILE_REC_ERROR            = 9   ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_RFILE_XSTOP_ERROR          = 10  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_LOG_REC_ERROR              = 11  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_LOG_XSTOP_ERROR            = 12  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_NOT_MT_CI_REC_ERROR        = 13  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_MCHK_AND_ME_EQ_0_ERROR     = 14  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_L2_UE_ERROR                = 15  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_L2_UE_OVER_THRES_ERROR     = 16  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_CI_UE_ERROR                = 17  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_18                     = 18  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_19                     = 19  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_SD_SYS_XSTOP_ERROR            = 20  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_21                     = 21  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_22                     = 22  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_23                     = 23  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_VS_LOG_REC_ERROR              = 24  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_VS_LOG_XSTOP_ERROR            = 25  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_RECOV_IN_MAINT_ERROR       = 26  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_VS_DU_LOG_REC_ERROR           = 27  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_SYS_XSTOP_ERROR            = 28  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_SRAM_PARITY_ERROR          = 29  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_SETDELETE_ERROR            = 30  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_RFILE_REC_ERROR            = 31  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_RFILE_XSTOP_ERROR          = 32  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_TLB_MULTIHIT_ERROR         = 33  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_SLB_MULTIHIT_ERROR         = 34  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_DERAT_MULTIHIT_ERROR       = 35  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_FWD_PROGRESS_ERROR         = 36  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_LOG_REC_ERROR              = 37  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_LOG_XSTOP_ERROR            = 38  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_39                     = 39  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_40                     = 40  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_LS_SYS_XSTOP_ERROR            = 41  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_42                     = 42  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_THREAD_HANG_REC_ERROR      = 43  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_44                     = 44  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_LOG_XSTOP_ERROR            = 45  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_46                     = 46  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_TFAC_XSTOP_ERROR           = 47  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_HYP_RES_ERROR              = 48  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_49                     = 49  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_50                     = 50  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_51                     = 51  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_HANG_RECOVERY_FAILED       = 52  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_HANG_DETECT_ERROR          = 53  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_UNUSED_54                     = 54  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_NEST_HANG_DETECT_ERROR     = 55  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_OTHER_CHIPLET_REC_ERROR    = 56  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_OTHER_CHIPLET_XSTOP_ERROR  = 57  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_OTHER_CHIPLET_SYS_XSTOP_ERROR = 58  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_SCOM_ERROR                 = 59  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_XSTOP_ON_DBG_TRIGGER_ERROR = 60  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_FW_INJ_REC_ERROR           = 61  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_FW_INJ_XSTOP_ERROR         = 62  ;
static const uint8_t P9N2_EX_L2_CORE_ACTION1_ACTION_PC_PHYP_XSTOP_ERROR           = 63  ;

static const uint8_t P9N2_C_CORE_ACTION1_ACTION_IF_SRAM_REC_ERROR                 = 0   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_TC_FIR_XSTOP_ERROR                = 1   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_IF_RFILE_REC_ERROR                = 2   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_IF_RFILE_XSTOP_ERROR              = 3   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_IF_LOG_REC_ERROR                  = 4   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_IF_LOG_XSTOP_ERROR                = 5   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_6                          = 6   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_7                          = 7   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_RECOV_XSTOP_ERROR              = 8   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_RFILE_REC_ERROR                = 9   ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_RFILE_XSTOP_ERROR              = 10  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_LOG_REC_ERROR                  = 11  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_LOG_XSTOP_ERROR                = 12  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_NOT_MT_CI_REC_ERROR            = 13  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_MCHK_AND_ME_EQ_0_ERROR         = 14  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_L2_UE_ERROR                    = 15  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_L2_UE_OVER_THRES_ERROR         = 16  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_CI_UE_ERROR                    = 17  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_18                         = 18  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_19                         = 19  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_SD_SYS_XSTOP_ERROR                = 20  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_21                         = 21  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_22                         = 22  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_23                         = 23  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_VS_LOG_REC_ERROR                  = 24  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_VS_LOG_XSTOP_ERROR                = 25  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_RECOV_IN_MAINT_ERROR           = 26  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_VS_DU_LOG_REC_ERROR               = 27  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_SYS_XSTOP_ERROR                = 28  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_SRAM_PARITY_ERROR              = 29  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_SETDELETE_ERROR                = 30  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_RFILE_REC_ERROR                = 31  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_RFILE_XSTOP_ERROR              = 32  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_TLB_MULTIHIT_ERROR             = 33  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_SLB_MULTIHIT_ERROR             = 34  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_DERAT_MULTIHIT_ERROR           = 35  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_FWD_PROGRESS_ERROR             = 36  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_LOG_REC_ERROR                  = 37  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_LOG_XSTOP_ERROR                = 38  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_39                         = 39  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_40                         = 40  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_LS_SYS_XSTOP_ERROR                = 41  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_42                         = 42  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_THREAD_HANG_REC_ERROR          = 43  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_44                         = 44  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_LOG_XSTOP_ERROR                = 45  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_46                         = 46  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_TFAC_XSTOP_ERROR               = 47  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_HYP_RES_ERROR                  = 48  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_49                         = 49  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_50                         = 50  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_51                         = 51  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_HANG_RECOVERY_FAILED           = 52  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_HANG_DETECT_ERROR              = 53  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_UNUSED_54                         = 54  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_NEST_HANG_DETECT_ERROR         = 55  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_OTHER_CHIPLET_REC_ERROR        = 56  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_OTHER_CHIPLET_XSTOP_ERROR      = 57  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_OTHER_CHIPLET_SYS_XSTOP_ERROR  = 58  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_SCOM_ERROR                     = 59  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_XSTOP_ON_DBG_TRIGGER_ERROR     = 60  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_FW_INJ_REC_ERROR               = 61  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_FW_INJ_XSTOP_ERROR             = 62  ;
static const uint8_t P9N2_C_CORE_ACTION1_ACTION_PC_PHYP_XSTOP_ERROR               = 63  ;

static const uint8_t P9N2_EX_L2_CORE_FIR_IF_SRAM_REC_ERROR                        = 0   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_TC_XSTOP_ERROR                           = 1   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_IF_RFILE_REC_ERROR                       = 2   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_IF_RFILE_XSTOP_ERROR                     = 3   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_IF_LOG_REC_ERROR                         = 4   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_IF_LOG_XSTOP_ERROR                       = 5   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_6                                 = 6   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_7                                 = 7   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_RECOV_XSTOP_ERROR                     = 8   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_RFILE_REC_ERROR                       = 9   ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_RFILE_XSTOP_ERROR                     = 10  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_LOG_REC_ERROR                         = 11  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_LOG_XSTOP_ERROR                       = 12  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_NOT_MT_CI_REC_ERROR                   = 13  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_MCHK_AND_ME_EQ_0_ERROR                = 14  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_L2_UE_ERROR                           = 15  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_L2_UE_OVER_THRES_ERROR                = 16  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_CI_UE_ERROR                           = 17  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_18                                = 18  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_19                                = 19  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_SD_SYS_XSTOP_ERROR                       = 20  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_21                                = 21  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_22                                = 22  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_23                                = 23  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_VS_LOG_REC_ERROR                         = 24  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_VS_LOG_XSTOP_ERROR                       = 25  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_RECOV_IN_MAINT_ERROR                  = 26  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_VS_DU_LOG_REC_ERROR                      = 27  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_SYS_XSTOP_ERROR                       = 28  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_SRAM_PARITY_ERROR                     = 29  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_SETDELETE_ERROR                       = 30  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_RFILE_REC_ERROR                       = 31  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_RFILE_XSTOP_ERROR                     = 32  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_TLB_MULTIHIT_ERROR                    = 33  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_SLB_MULTIHIT_ERROR                    = 34  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_DERAT_MULTIHIT_ERROR                  = 35  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_FWD_PROGRESS_ERROR                    = 36  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_LOG_REC_ERROR                         = 37  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_LOG_XSTOP_ERROR                       = 38  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_39                                = 39  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_40                                = 40  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_LS_SYS_XSTOP_ERROR                       = 41  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_42                                = 42  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_THREAD_HANG_REC_ERROR                 = 43  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_44                                = 44  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_LOG_XSTOP_ERROR                       = 45  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_46                                = 46  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_TFAC_XSTOP_ERROR                      = 47  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_HYP_RES_ERROR                         = 48  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_49                                = 49  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_50                                = 50  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_51                                = 51  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_HANG_RECOVERY_FAILED                  = 52  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_HANG_DETECT_ERROR                     = 53  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_UNUSED_54                                = 54  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_NEST_HANG_DETECT_ERROR                = 55  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_OTHER_CHIPLET_REC_ERROR               = 56  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_OTHER_CHIPLET_XSTOP_ERROR             = 57  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_OTHER_CHIPLET_SYS_XSTOP_ERROR         = 58  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_SCOM_ERROR                            = 59  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_XSTOP_ON_DBG_TRIGGER_ERROR            = 60  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_FW_INJ_REC_ERROR                      = 61  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_FW_INJ_XSTOP_ERROR                    = 62  ;
static const uint8_t P9N2_EX_L2_CORE_FIR_PC_PHYP_XSTOP_ERROR                      = 63  ;

static const uint8_t P9N2_C_CORE_FIR_IF_SRAM_REC_ERROR                            = 0   ;
static const uint8_t P9N2_C_CORE_FIR_TC_XSTOP_ERROR                               = 1   ;
static const uint8_t P9N2_C_CORE_FIR_IF_RFILE_REC_ERROR                           = 2   ;
static const uint8_t P9N2_C_CORE_FIR_IF_RFILE_XSTOP_ERROR                         = 3   ;
static const uint8_t P9N2_C_CORE_FIR_IF_LOG_REC_ERROR                             = 4   ;
static const uint8_t P9N2_C_CORE_FIR_IF_LOG_XSTOP_ERROR                           = 5   ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_6                                     = 6   ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_7                                     = 7   ;
static const uint8_t P9N2_C_CORE_FIR_PC_RECOV_XSTOP_ERROR                         = 8   ;
static const uint8_t P9N2_C_CORE_FIR_SD_RFILE_REC_ERROR                           = 9   ;
static const uint8_t P9N2_C_CORE_FIR_SD_RFILE_XSTOP_ERROR                         = 10  ;
static const uint8_t P9N2_C_CORE_FIR_SD_LOG_REC_ERROR                             = 11  ;
static const uint8_t P9N2_C_CORE_FIR_SD_LOG_XSTOP_ERROR                           = 12  ;
static const uint8_t P9N2_C_CORE_FIR_SD_NOT_MT_CI_REC_ERROR                       = 13  ;
static const uint8_t P9N2_C_CORE_FIR_SD_MCHK_AND_ME_EQ_0_ERROR                    = 14  ;
static const uint8_t P9N2_C_CORE_FIR_SD_L2_UE_ERROR                               = 15  ;
static const uint8_t P9N2_C_CORE_FIR_SD_L2_UE_OVER_THRES_ERROR                    = 16  ;
static const uint8_t P9N2_C_CORE_FIR_SD_CI_UE_ERROR                               = 17  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_18                                    = 18  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_19                                    = 19  ;
static const uint8_t P9N2_C_CORE_FIR_SD_SYS_XSTOP_ERROR                           = 20  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_21                                    = 21  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_22                                    = 22  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_23                                    = 23  ;
static const uint8_t P9N2_C_CORE_FIR_VS_LOG_REC_ERROR                             = 24  ;
static const uint8_t P9N2_C_CORE_FIR_VS_LOG_XSTOP_ERROR                           = 25  ;
static const uint8_t P9N2_C_CORE_FIR_PC_RECOV_IN_MAINT_ERROR                      = 26  ;
static const uint8_t P9N2_C_CORE_FIR_VS_DU_LOG_REC_ERROR                          = 27  ;
static const uint8_t P9N2_C_CORE_FIR_PC_SYS_XSTOP_ERROR                           = 28  ;
static const uint8_t P9N2_C_CORE_FIR_LS_SRAM_PARITY_ERROR                         = 29  ;
static const uint8_t P9N2_C_CORE_FIR_LS_SETDELETE_ERROR                           = 30  ;
static const uint8_t P9N2_C_CORE_FIR_LS_RFILE_REC_ERROR                           = 31  ;
static const uint8_t P9N2_C_CORE_FIR_LS_RFILE_XSTOP_ERROR                         = 32  ;
static const uint8_t P9N2_C_CORE_FIR_LS_TLB_MULTIHIT_ERROR                        = 33  ;
static const uint8_t P9N2_C_CORE_FIR_LS_SLB_MULTIHIT_ERROR                        = 34  ;
static const uint8_t P9N2_C_CORE_FIR_LS_DERAT_MULTIHIT_ERROR                      = 35  ;
static const uint8_t P9N2_C_CORE_FIR_PC_FWD_PROGRESS_ERROR                        = 36  ;
static const uint8_t P9N2_C_CORE_FIR_LS_LOG_REC_ERROR                             = 37  ;
static const uint8_t P9N2_C_CORE_FIR_LS_LOG_XSTOP_ERROR                           = 38  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_39                                    = 39  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_40                                    = 40  ;
static const uint8_t P9N2_C_CORE_FIR_LS_SYS_XSTOP_ERROR                           = 41  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_42                                    = 42  ;
static const uint8_t P9N2_C_CORE_FIR_PC_THREAD_HANG_REC_ERROR                     = 43  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_44                                    = 44  ;
static const uint8_t P9N2_C_CORE_FIR_PC_LOG_XSTOP_ERROR                           = 45  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_46                                    = 46  ;
static const uint8_t P9N2_C_CORE_FIR_PC_TFAC_XSTOP_ERROR                          = 47  ;
static const uint8_t P9N2_C_CORE_FIR_PC_HYP_RES_ERROR                             = 48  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_49                                    = 49  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_50                                    = 50  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_51                                    = 51  ;
static const uint8_t P9N2_C_CORE_FIR_PC_HANG_RECOVERY_FAILED                      = 52  ;
static const uint8_t P9N2_C_CORE_FIR_PC_HANG_DETECT_ERROR                         = 53  ;
static const uint8_t P9N2_C_CORE_FIR_UNUSED_54                                    = 54  ;
static const uint8_t P9N2_C_CORE_FIR_PC_NEST_HANG_DETECT_ERROR                    = 55  ;
static const uint8_t P9N2_C_CORE_FIR_PC_OTHER_CHIPLET_REC_ERROR                   = 56  ;
static const uint8_t P9N2_C_CORE_FIR_PC_OTHER_CHIPLET_XSTOP_ERROR                 = 57  ;
static const uint8_t P9N2_C_CORE_FIR_PC_OTHER_CHIPLET_SYS_XSTOP_ERROR             = 58  ;
static const uint8_t P9N2_C_CORE_FIR_PC_SCOM_ERROR                                = 59  ;
static const uint8_t P9N2_C_CORE_FIR_PC_XSTOP_ON_DBG_TRIGGER_ERROR                = 60  ;
static const uint8_t P9N2_C_CORE_FIR_PC_FW_INJ_REC_ERROR                          = 61  ;
static const uint8_t P9N2_C_CORE_FIR_PC_FW_INJ_XSTOP_ERROR                        = 62  ;
static const uint8_t P9N2_C_CORE_FIR_PC_PHYP_XSTOP_ERROR                          = 63  ;

static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_IF_SRAM_REC_ERROR               = 0   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_TC_FIR_XSTOP_ERROR              = 1   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_IF_RFILE_REC_ERROR              = 2   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_IF_RFILE_XSTOP_ERROR            = 3   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_IF_LOG_REC_ERROR                = 4   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_IF_LOG_XSTOP_ERROR              = 5   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_6                        = 6   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_7                        = 7   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_RECOV_XSTOP_ERROR            = 8   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_RFILE_REC_ERROR              = 9   ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_RFILE_XSTOP_ERROR            = 10  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_LOG_REC_ERROR                = 11  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_LOG_XSTOP_ERROR              = 12  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_NOT_MT_CI_REC_ERROR          = 13  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_MCHK_AND_ME_EQ_0_ERROR       = 14  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_L2_UE_ERROR                  = 15  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_L2_UE_OVER_THRES_ERROR       = 16  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_CI_UE_ERROR                  = 17  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_18                       = 18  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_19                       = 19  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_SD_SYS_XSTOP_ERROR              = 20  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_21                       = 21  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_22                       = 22  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_23                       = 23  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_VS_LOG_REC_ERROR                = 24  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_VS_LOG_XSTOP_ERROR              = 25  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_RECOV_IN_MAINT_ERROR         = 26  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_VS_DU_LOG_REC_ERROR             = 27  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_SYS_XSTOP_ERROR              = 28  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_SRAM_PARITY_ERROR            = 29  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_SETDELETE_ERROR              = 30  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_RFILE_REC_ERROR              = 31  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_RFILE_XSTOP_ERROR            = 32  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_TLB_MULTIHIT_ERROR           = 33  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_SLB_MULTIHIT_ERROR           = 34  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_DERAT_MULTIHIT_ERROR         = 35  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_FWD_PROGRESS_ERROR           = 36  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_LOG_REC_ERROR                = 37  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_LOG_XSTOP_ERROR              = 38  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_39                       = 39  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_40                       = 40  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_LS_SYS_XSTOP_ERROR              = 41  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_42                       = 42  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_THREAD_HANG_REC_ERROR        = 43  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_44                       = 44  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_LOG_XSTOP_ERROR              = 45  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_46                       = 46  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_TFAC_XSTOP_ERROR             = 47  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_HYP_RES_ERROR                = 48  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_49                       = 49  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_50                       = 50  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_51                       = 51  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_HANG_RECOVERY_FAILED         = 52  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_HANG_DETECT_ERROR            = 53  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_UNUSED_54                       = 54  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_NEST_HANG_DETECT_ERROR       = 55  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_OTHER_CHIPLET_REC_ERROR      = 56  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_OTHER_CHIPLET_XSTOP_ERROR    = 57  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_OTHER_CHIPLET_SYS_XSTOP_ERROR = 58  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_SCOM_ERROR                   = 59  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_XSTOP_ON_DBG_TRIGGER_ERROR   = 60  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_FW_INJ_REC_ERROR             = 61  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_FW_INJ_XSTOP_ERROR           = 62  ;
static const uint8_t P9N2_EX_L2_CORE_FIRMASK_MASK_PC_PHYP_XSTOP_ERROR             = 63  ;

static const uint8_t P9N2_C_CORE_FIRMASK_MASK_IF_SRAM_REC_ERROR                   = 0   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_TC_FIR_XSTOP_ERROR                  = 1   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_IF_RFILE_REC_ERROR                  = 2   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_IF_RFILE_XSTOP_ERROR                = 3   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_IF_LOG_REC_ERROR                    = 4   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_IF_LOG_XSTOP_ERROR                  = 5   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_6                            = 6   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_7                            = 7   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_RECOV_XSTOP_ERROR                = 8   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_RFILE_REC_ERROR                  = 9   ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_RFILE_XSTOP_ERROR                = 10  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_LOG_REC_ERROR                    = 11  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_LOG_XSTOP_ERROR                  = 12  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_NOT_MT_CI_REC_ERROR              = 13  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_MCHK_AND_ME_EQ_0_ERROR           = 14  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_L2_UE_ERROR                      = 15  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_L2_UE_OVER_THRES_ERROR           = 16  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_CI_UE_ERROR                      = 17  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_18                           = 18  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_19                           = 19  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_SD_SYS_XSTOP_ERROR                  = 20  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_21                           = 21  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_22                           = 22  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_23                           = 23  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_VS_LOG_REC_ERROR                    = 24  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_VS_LOG_XSTOP_ERROR                  = 25  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_RECOV_IN_MAINT_ERROR             = 26  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_VS_DU_LOG_REC_ERROR                 = 27  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_SYS_XSTOP_ERROR                  = 28  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_SRAM_PARITY_ERROR                = 29  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_SETDELETE_ERROR                  = 30  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_RFILE_REC_ERROR                  = 31  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_RFILE_XSTOP_ERROR                = 32  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_TLB_MULTIHIT_ERROR               = 33  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_SLB_MULTIHIT_ERROR               = 34  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_DERAT_MULTIHIT_ERROR             = 35  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_FWD_PROGRESS_ERROR               = 36  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_LOG_REC_ERROR                    = 37  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_LOG_XSTOP_ERROR                  = 38  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_39                           = 39  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_40                           = 40  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_LS_SYS_XSTOP_ERROR                  = 41  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_42                           = 42  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_THREAD_HANG_REC_ERROR            = 43  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_44                           = 44  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_LOG_XSTOP_ERROR                  = 45  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_46                           = 46  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_TFAC_XSTOP_ERROR                 = 47  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_HYP_RES_ERROR                    = 48  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_49                           = 49  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_50                           = 50  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_51                           = 51  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_HANG_RECOVERY_FAILED             = 52  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_HANG_DETECT_ERROR                = 53  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_UNUSED_54                           = 54  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_NEST_HANG_DETECT_ERROR           = 55  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_OTHER_CHIPLET_REC_ERROR          = 56  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_OTHER_CHIPLET_XSTOP_ERROR        = 57  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_OTHER_CHIPLET_SYS_XSTOP_ERROR    = 58  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_SCOM_ERROR                       = 59  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_XSTOP_ON_DBG_TRIGGER_ERROR       = 60  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_FW_INJ_REC_ERROR                 = 61  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_FW_INJ_XSTOP_ERROR               = 62  ;
static const uint8_t P9N2_C_CORE_FIRMASK_MASK_PC_PHYP_XSTOP_ERROR                 = 63  ;

static const uint8_t P9N2_EX_L2_CORE_FUSES_FP_THROTTLE_EN                         = 0   ;
static const uint8_t P9N2_EX_L2_CORE_FUSES_VMX_CRYPTO_DIS                         = 1   ;

static const uint8_t P9N2_C_CORE_FUSES_FP_THROTTLE_EN                             = 0   ;
static const uint8_t P9N2_C_CORE_FUSES_VMX_CRYPTO_DIS                             = 1   ;

static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT0_PSSCR_RL                    = 32  ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT0_PSSCR_RL_LEN                = 4   ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT1_PSSCR_RL                    = 36  ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT1_PSSCR_RL_LEN                = 4   ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT2_PSSCR_RL                    = 40  ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT2_PSSCR_RL_LEN                = 4   ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT3_PSSCR_RL                    = 44  ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT3_PSSCR_RL_LEN                = 4   ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT0_STOP_STATE                  = 56  ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT1_STOP_STATE                  = 57  ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT2_STOP_STATE                  = 58  ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_VT3_STOP_STATE                  = 59  ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_LPAR_MODE                       = 62  ;
static const uint8_t P9N2_EX_L2_CORE_THREAD_STATE_FUSED_CORE_MODE                 = 63  ;

static const uint8_t P9N2_C_CORE_THREAD_STATE_VT0_PSSCR_RL                        = 32  ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT0_PSSCR_RL_LEN                    = 4   ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT1_PSSCR_RL                        = 36  ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT1_PSSCR_RL_LEN                    = 4   ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT2_PSSCR_RL                        = 40  ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT2_PSSCR_RL_LEN                    = 4   ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT3_PSSCR_RL                        = 44  ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT3_PSSCR_RL_LEN                    = 4   ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT0_STOP_STATE                      = 56  ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT1_STOP_STATE                      = 57  ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT2_STOP_STATE                      = 58  ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_VT3_STOP_STATE                      = 59  ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_LPAR_MODE                           = 62  ;
static const uint8_t P9N2_C_CORE_THREAD_STATE_FUSED_CORE_MODE                     = 63  ;

static const uint8_t P9N2_EX_CORE_WOF_WOF_IF_SRAM_REC_ERROR                       = 0   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_TC_FIR_XSTOP_ERROR                      = 1   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_IF_RFILE_REC_ERROR                      = 2   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_IF_RFILE_XSTOP_ERROR                    = 3   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_IF_LOG_REC_ERROR                        = 4   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_IF_LOG_XSTOP_ERROR                      = 5   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_6                                = 6   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_7                                = 7   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_RECOV_XSTOP_ERROR                    = 8   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_RFILE_REC_ERROR                      = 9   ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_RFILE_XSTOP_ERROR                    = 10  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_LOG_REC_ERROR                        = 11  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_LOG_XSTOP_ERROR                      = 12  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_NOT_MT_CI_REC_ERROR                  = 13  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_MCHK_AND_ME_EQ_0_ERROR               = 14  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_L2_UE_ERROR                          = 15  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_L2_UE_OVER_THRES_ERROR               = 16  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_CI_UE_ERROR                          = 17  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_18                               = 18  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_19                               = 19  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_SD_SYS_XSTOP_ERROR                      = 20  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_21                               = 21  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_22                               = 22  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_23                               = 23  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_VS_LOG_REC_ERROR                        = 24  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_VS_LOG_XSTOP_ERROR                      = 25  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_RECOV_IN_MAINT_ERROR                 = 26  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_VS_DU_LOG_REC_ERROR                     = 27  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_SYS_XSTOP_ERROR                      = 28  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_SRAM_PARITY_ERROR                    = 29  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_SETDELETE_ERROR                      = 30  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_RFILE_REC_ERROR                      = 31  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_RFILE_XSTOP_ERROR                    = 32  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_TLB_MULTIHIT_ERROR                   = 33  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_SLB_MULTIHIT_ERROR                   = 34  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_DERAT_MULTIHIT_ERROR                 = 35  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_FWD_PROGRESS_ERROR                   = 36  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_LOG_REC_ERROR                        = 37  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_LOG_XSTOP_ERROR                      = 38  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_39                               = 39  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_40                               = 40  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_LS_SYS_XSTOP_ERROR                      = 41  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_42                               = 42  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_THREAD_HANG_REC_ERROR                = 43  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_44                               = 44  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_LOG_XSTOP_ERROR                      = 45  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_46                               = 46  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_TFAC_XSTOP_ERROR                     = 47  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_HYP_RES_ERROR                        = 48  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_49                               = 49  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_50                               = 50  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_51                               = 51  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_HANG_RECOVERY_FAILED                 = 52  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_CORE_HANG_DETECT_ERROR               = 53  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_UNUSED_54                               = 54  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_NEST_HANG_DETECT_ERROR               = 55  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_OTHER_CORE_CHIPLET_REC_ERROR         = 56  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_OTHER_CORE_CHIPLET_XSTOP_ERROR       = 57  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_OTHER_CORE_CHIPLET_SYS_XSTOP_ERROR   = 58  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_SCOM_ERROR                           = 59  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_XSTOP_ON_DBG_TRIGGER_ERROR           = 60  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_FW_INJ_REC_ERROR                     = 61  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_FW_INJ_XSTOP_ERROR                   = 62  ;
static const uint8_t P9N2_EX_CORE_WOF_WOF_PC_PHYP_XSTOP_ERROR                     = 63  ;

static const uint8_t P9N2_C_CORE_WOF_WOF_IF_SRAM_REC_ERROR                        = 0   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_TC_FIR_XSTOP_ERROR                       = 1   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_IF_RFILE_REC_ERROR                       = 2   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_IF_RFILE_XSTOP_ERROR                     = 3   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_IF_LOG_REC_ERROR                         = 4   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_IF_LOG_XSTOP_ERROR                       = 5   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_6                                 = 6   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_7                                 = 7   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_RECOV_XSTOP_ERROR                     = 8   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_RFILE_REC_ERROR                       = 9   ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_RFILE_XSTOP_ERROR                     = 10  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_LOG_REC_ERROR                         = 11  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_LOG_XSTOP_ERROR                       = 12  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_NOT_MT_CI_REC_ERROR                   = 13  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_MCHK_AND_ME_EQ_0_ERROR                = 14  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_L2_UE_ERROR                           = 15  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_L2_UE_OVER_THRES_ERROR                = 16  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_CI_UE_ERROR                           = 17  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_18                                = 18  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_19                                = 19  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_SD_SYS_XSTOP_ERROR                       = 20  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_21                                = 21  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_22                                = 22  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_23                                = 23  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_VS_LOG_REC_ERROR                         = 24  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_VS_LOG_XSTOP_ERROR                       = 25  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_RECOV_IN_MAINT_ERROR                  = 26  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_VS_DU_LOG_REC_ERROR                      = 27  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_SYS_XSTOP_ERROR                       = 28  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_SRAM_PARITY_ERROR                     = 29  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_SETDELETE_ERROR                       = 30  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_RFILE_REC_ERROR                       = 31  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_RFILE_XSTOP_ERROR                     = 32  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_TLB_MULTIHIT_ERROR                    = 33  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_SLB_MULTIHIT_ERROR                    = 34  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_DERAT_MULTIHIT_ERROR                  = 35  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_FWD_PROGRESS_ERROR                    = 36  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_LOG_REC_ERROR                         = 37  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_LOG_XSTOP_ERROR                       = 38  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_39                                = 39  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_40                                = 40  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_LS_SYS_XSTOP_ERROR                       = 41  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_42                                = 42  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_THREAD_HANG_REC_ERROR                 = 43  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_44                                = 44  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_LOG_XSTOP_ERROR                       = 45  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_46                                = 46  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_TFAC_XSTOP_ERROR                      = 47  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_HYP_RES_ERROR                         = 48  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_49                                = 49  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_50                                = 50  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_51                                = 51  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_HANG_RECOVERY_FAILED                  = 52  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_CORE_HANG_DETECT_ERROR                = 53  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_UNUSED_54                                = 54  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_NEST_HANG_DETECT_ERROR                = 55  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_OTHER_CORE_CHIPLET_REC_ERROR          = 56  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_OTHER_CORE_CHIPLET_XSTOP_ERROR        = 57  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_OTHER_CORE_CHIPLET_SYS_XSTOP_ERROR    = 58  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_SCOM_ERROR                            = 59  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_XSTOP_ON_DBG_TRIGGER_ERROR            = 60  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_FW_INJ_REC_ERROR                      = 61  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_FW_INJ_XSTOP_ERROR                    = 62  ;
static const uint8_t P9N2_C_CORE_WOF_WOF_PC_PHYP_XSTOP_ERROR                      = 63  ;

static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_MISC_PROBE0_SEL_DC                   = 0   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_MISC_PROBE0_SEL_DC_LEN               = 6   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_6C                               = 6   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_7C                               = 7   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_MISC_PROBE1_SEL_DC                   = 8   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_MISC_PROBE1_SEL_DC_LEN               = 6   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_14C                              = 14  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_15C                              = 15  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_MISC_PROBE2_SEL_DC                   = 16  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_MISC_PROBE2_SEL_DC_LEN               = 6   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_22C                              = 22  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_23C                              = 23  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_MISC_PROBE3_SEL_DC                   = 24  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_MISC_PROBE3_SEL_DC_LEN               = 6   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_30C                              = 30  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_31C                              = 31  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_CC_OFLOW_FEH_SEL_DC                  = 32  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_CC_SCAN_PROTECT_DC                   = 33  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_CC_SDIS_DC_N                         = 34  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_CC_SCAN_DIAG                         = 35  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_TEST_CONTROL_36C                 = 36  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_TEST_CONTROL_37C                 = 37  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_TEST_CONTROL_38C                 = 38  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_TEST_CONTROL_39C                 = 39  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_EPS_MASK_VITL_PCB_ERR_DC             = 40  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_CTRL_CC_MASK_VITL_SCAN_OPCG_ERR_DC        = 41  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_42C                              = 42  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_43C                              = 43  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_TC_PCB_DBG_GLB_BRCST_EN                   = 44  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_FREE_USAGE_45C                            = 45  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_FREE_USAGE_46C                            = 46  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_FREE_USAGE_47C                            = 47  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_TC_UNIT_GROUP_ID_DC                       = 48  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_TC_UNIT_GROUP_ID_DC_LEN                   = 4   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_TC_UNIT_CHIP_ID_DC                        = 52  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_TC_UNIT_CHIP_ID_DC_LEN                    = 3   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_ID_55C                           = 55  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_TC_UNIT_SYS_ID_DC                         = 56  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_TC_UNIT_SYS_ID_DC_LEN                     = 5   ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_ID_61C                           = 61  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_ID_62C                           = 62  ;
static const uint8_t P9N2_EQ_CPLT_CONF0_RESERVED_ID_63C                           = 63  ;

static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_MISC_PROBE0_SEL_DC                   = 0   ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_MISC_PROBE0_SEL_DC_LEN               = 6   ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_6C                               = 6   ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_7C                               = 7   ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_MISC_PROBE1_SEL_DC                   = 8   ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_MISC_PROBE1_SEL_DC_LEN               = 6   ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_14C                              = 14  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_15C                              = 15  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_MISC_PROBE2_SEL_DC                   = 16  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_MISC_PROBE2_SEL_DC_LEN               = 6   ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_22C                              = 22  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_23C                              = 23  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_MISC_PROBE3_SEL_DC                   = 24  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_MISC_PROBE3_SEL_DC_LEN               = 6   ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_30C                              = 30  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_31C                              = 31  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_CC_OFLOW_FEH_SEL_DC                  = 32  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_CC_SCAN_PROTECT_DC                   = 33  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_CC_SDIS_DC_N                         = 34  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_CC_SCAN_DIAG                         = 35  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_TEST_CONTROL_36C                 = 36  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_TEST_CONTROL_37C                 = 37  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_TEST_CONTROL_38C                 = 38  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_TEST_CONTROL_39C                 = 39  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_EPS_MASK_VITL_PCB_ERR_DC             = 40  ;
static const uint8_t P9N2_EX_CPLT_CONF0_CTRL_CC_MASK_VITL_SCAN_OPCG_ERR_DC        = 41  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_42C                              = 42  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_43C                              = 43  ;
static const uint8_t P9N2_EX_CPLT_CONF0_TC_PCB_DBG_GLB_BRCST_EN                   = 44  ;
static const uint8_t P9N2_EX_CPLT_CONF0_FREE_USAGE_45C                            = 45  ;
static const uint8_t P9N2_EX_CPLT_CONF0_FREE_USAGE_46C                            = 46  ;
static const uint8_t P9N2_EX_CPLT_CONF0_FREE_USAGE_47C                            = 47  ;
static const uint8_t P9N2_EX_CPLT_CONF0_TC_UNIT_GROUP_ID_DC                       = 48  ;
static const uint8_t P9N2_EX_CPLT_CONF0_TC_UNIT_GROUP_ID_DC_LEN                   = 4   ;
static const uint8_t P9N2_EX_CPLT_CONF0_TC_UNIT_CHIP_ID_DC                        = 52  ;
static const uint8_t P9N2_EX_CPLT_CONF0_TC_UNIT_CHIP_ID_DC_LEN                    = 3   ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_ID_55C                           = 55  ;
static const uint8_t P9N2_EX_CPLT_CONF0_UNUSED_56C                                = 56  ;
static const uint8_t P9N2_EX_CPLT_CONF0_UNUSED_57C                                = 57  ;
static const uint8_t P9N2_EX_CPLT_CONF0_UNUSED_58C                                = 58  ;
static const uint8_t P9N2_EX_CPLT_CONF0_UNUSED_59C                                = 59  ;
static const uint8_t P9N2_EX_CPLT_CONF0_UNUSED_60C                                = 60  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_ID_61C                           = 61  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_ID_62C                           = 62  ;
static const uint8_t P9N2_EX_CPLT_CONF0_RESERVED_ID_63C                           = 63  ;

static const uint8_t P9N2_C_CPLT_CONF0_CTRL_MISC_PROBE0_SEL_DC                    = 0   ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_MISC_PROBE0_SEL_DC_LEN                = 6   ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_6C                                = 6   ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_7C                                = 7   ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_MISC_PROBE1_SEL_DC                    = 8   ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_MISC_PROBE1_SEL_DC_LEN                = 6   ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_14C                               = 14  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_15C                               = 15  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_MISC_PROBE2_SEL_DC                    = 16  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_MISC_PROBE2_SEL_DC_LEN                = 6   ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_22C                               = 22  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_23C                               = 23  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_MISC_PROBE3_SEL_DC                    = 24  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_MISC_PROBE3_SEL_DC_LEN                = 6   ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_30C                               = 30  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_31C                               = 31  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_CC_OFLOW_FEH_SEL_DC                   = 32  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_CC_SCAN_PROTECT_DC                    = 33  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_CC_SDIS_DC_N                          = 34  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_CC_SCAN_DIAG                          = 35  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_TEST_CONTROL_36C                  = 36  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_TEST_CONTROL_37C                  = 37  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_TEST_CONTROL_38C                  = 38  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_TEST_CONTROL_39C                  = 39  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_EPS_MASK_VITL_PCB_ERR_DC              = 40  ;
static const uint8_t P9N2_C_CPLT_CONF0_CTRL_CC_MASK_VITL_SCAN_OPCG_ERR_DC         = 41  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_42C                               = 42  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_43C                               = 43  ;
static const uint8_t P9N2_C_CPLT_CONF0_TC_PCB_DBG_GLB_BRCST_EN                    = 44  ;
static const uint8_t P9N2_C_CPLT_CONF0_FREE_USAGE_45C                             = 45  ;
static const uint8_t P9N2_C_CPLT_CONF0_FREE_USAGE_46C                             = 46  ;
static const uint8_t P9N2_C_CPLT_CONF0_FREE_USAGE_47C                             = 47  ;
static const uint8_t P9N2_C_CPLT_CONF0_TC_UNIT_GROUP_ID_DC                        = 48  ;
static const uint8_t P9N2_C_CPLT_CONF0_TC_UNIT_GROUP_ID_DC_LEN                    = 4   ;
static const uint8_t P9N2_C_CPLT_CONF0_TC_UNIT_CHIP_ID_DC                         = 52  ;
static const uint8_t P9N2_C_CPLT_CONF0_TC_UNIT_CHIP_ID_DC_LEN                     = 3   ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_ID_55C                            = 55  ;
static const uint8_t P9N2_C_CPLT_CONF0_UNUSED_56C                                 = 56  ;
static const uint8_t P9N2_C_CPLT_CONF0_UNUSED_57C                                 = 57  ;
static const uint8_t P9N2_C_CPLT_CONF0_UNUSED_58C                                 = 58  ;
static const uint8_t P9N2_C_CPLT_CONF0_UNUSED_59C                                 = 59  ;
static const uint8_t P9N2_C_CPLT_CONF0_UNUSED_60C                                 = 60  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_ID_61C                            = 61  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_ID_62C                            = 62  ;
static const uint8_t P9N2_C_CPLT_CONF0_RESERVED_ID_63C                            = 63  ;

static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_EQ                      = 0   ;
static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_EQ_LEN                  = 3   ;
static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_PWR_UP                  = 3   ;
static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_PWR_UP_LEN              = 2   ;
static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_PWR_DN                  = 5   ;
static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_PWR_DN_LEN              = 2   ;
static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_L3_UP                   = 7   ;
static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_L3_UP_LEN               = 3   ;
static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_L3_DN                   = 10  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_TCEP_AMUX_VSELECT_L3_DN_LEN               = 3   ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_13D                                = 13  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_14D                                = 14  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_15D                                = 15  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_16D                                = 16  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_17D                                = 17  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_18D                                = 18  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_19D                                = 19  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_20D                                = 20  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_21D                                = 21  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_22D                                = 22  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_23D                                = 23  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_24D                                = 24  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_25D                                = 25  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_26D                                = 26  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_27D                                = 27  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_28D                                = 28  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_29D                                = 29  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_30D                                = 30  ;
static const uint8_t P9N2_EQ_CPLT_CONF1_UNUSED_31D                                = 31  ;

static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_0D                                 = 0   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_1D                                 = 1   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_2D                                 = 2   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_3D                                 = 3   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_4D                                 = 4   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_5D                                 = 5   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_6D                                 = 6   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_7D                                 = 7   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_8D                                 = 8   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_9D                                 = 9   ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_10D                                = 10  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_11D                                = 11  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_12D                                = 12  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_13D                                = 13  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_14D                                = 14  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_15D                                = 15  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_16D                                = 16  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_17D                                = 17  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_18D                                = 18  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_19D                                = 19  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_20D                                = 20  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_21D                                = 21  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_22D                                = 22  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_23D                                = 23  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_24D                                = 24  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_25D                                = 25  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_26D                                = 26  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_27D                                = 27  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_28D                                = 28  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_29D                                = 29  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_30D                                = 30  ;
static const uint8_t P9N2_EX_CPLT_CONF1_UNUSED_31D                                = 31  ;

static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_0D                                  = 0   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_1D                                  = 1   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_2D                                  = 2   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_3D                                  = 3   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_4D                                  = 4   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_5D                                  = 5   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_6D                                  = 6   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_7D                                  = 7   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_8D                                  = 8   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_9D                                  = 9   ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_10D                                 = 10  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_11D                                 = 11  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_12D                                 = 12  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_13D                                 = 13  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_14D                                 = 14  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_15D                                 = 15  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_16D                                 = 16  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_17D                                 = 17  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_18D                                 = 18  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_19D                                 = 19  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_20D                                 = 20  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_21D                                 = 21  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_22D                                 = 22  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_23D                                 = 23  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_24D                                 = 24  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_25D                                 = 25  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_26D                                 = 26  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_27D                                 = 27  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_28D                                 = 28  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_29D                                 = 29  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_30D                                 = 30  ;
static const uint8_t P9N2_C_CPLT_CONF1_UNUSED_31D                                 = 31  ;

static const uint8_t P9N2_EQ_CPLT_CTRL0_CTRL_CC_ABSTCLK_MUXSEL_DC                 = 0   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_1A                                 = 1   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC                  = 2   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_CTRL_CC_FORCE_ALIGN_DC                    = 3   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_TC_UNIT_ARY_WRT_THRU_DC                   = 4   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_TC_UNIT_AVP_MODE                          = 5   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_TC_BIT6_CHIPLET_ID_DC                     = 6   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_7A                                 = 7   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_CTRL_CC_ABIST_RECOV_DISABLE_DC            = 8   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_9A                                 = 9   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_10A                                = 10  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_11A                              = 11  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_12A                                = 12  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_TC_UNIT_DETERMINISTIC_TEST_ENABLE_DC      = 13  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_TC_UNIT_CONSTRAIN_SAFESCAN_DC             = 14  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_15A                                = 15  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_16A                                = 16  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_17A                                = 17  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_18A                              = 18  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_19A                              = 19  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_20A                                = 20  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_21A                                = 21  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_22A                                = 22  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_23A                                = 23  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_24A                                = 24  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_25A                                = 25  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_26A                                = 26  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_27A                                = 27  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_28A                                = 28  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_29A                                = 29  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_30A                                = 30  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_31A                                = 31  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_32A                                = 32  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_33A                              = 33  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_34A                              = 34  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_35A                              = 35  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_TC_OELCC_EDGE_DELAYED_DC                  = 36  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_TC_OELCC_ALIGN_FLUSH_DC                   = 37  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_38A                              = 38  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_39A                              = 39  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_CTRL_MISC_CLKDIV_SEL_DC                   = 40  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_CTRL_MISC_CLKDIV_SEL_DC_LEN               = 2   ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_42A                              = 42  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_RESERVED_43A                              = 43  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_44A                                = 44  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_UNUSED_45A                                = 45  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_CTRL_CC_SSS_CALIBRATE_DC                  = 46  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_CTRL_CC_PIN_LBIST_DC                      = 47  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_48A                            = 48  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_49A                            = 49  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_50A                            = 50  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_51A                            = 51  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_52A                            = 52  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_53A                            = 53  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_54A                            = 54  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_55A                            = 55  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_56A                            = 56  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_57A                            = 57  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_58A                            = 58  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_59A                            = 59  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_60A                            = 60  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_61A                            = 61  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_62A                            = 62  ;
static const uint8_t P9N2_EQ_CPLT_CTRL0_FREE_USAGE_63A                            = 63  ;

static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_0A                                 = 0   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_1A                                 = 1   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC                  = 2   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_CTRL_CC_FORCE_ALIGN_DC                    = 3   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_TC_UNIT_ARY_WRT_THRU_DC                   = 4   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_5A                                 = 5   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_6A                                 = 6   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_7A                                 = 7   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_CTRL_CC_ABIST_RECOV_DISABLE_DC            = 8   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_9A                                 = 9   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_10A                                = 10  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_11A                              = 11  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_TC_SKIT_MODE_BIST_DC                      = 12  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_TC_UNIT_DETERMINISTIC_TEST_ENABLE_DC      = 13  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_TC_UNIT_CONSTRAIN_SAFESCAN_DC             = 14  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_TC_UNIT_RRFA_TEST_ENABLE_DC               = 15  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_16A                                = 16  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_17A                                = 17  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_18A                              = 18  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_19A                              = 19  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_TC_PSRO_SEL_DC                            = 20  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_TC_PSRO_SEL_DC_LEN                        = 8   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_28A                                = 28  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_29A                                = 29  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_30A                                = 30  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_31A                                = 31  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_32A                                = 32  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_33A                              = 33  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_34A                              = 34  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_35A                              = 35  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_36A                                = 36  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_37A                                = 37  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_38A                              = 38  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_39A                              = 39  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_CTRL_MISC_CLKDIV_SEL_DC                   = 40  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_CTRL_MISC_CLKDIV_SEL_DC_LEN               = 2   ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_42A                              = 42  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_RESERVED_43A                              = 43  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_44A                                = 44  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_UNUSED_45A                                = 45  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_CTRL_CC_SSS_CALIBRATE_DC                  = 46  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_CTRL_CC_PIN_LBIST_DC                      = 47  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_48A                            = 48  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_49A                            = 49  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_50A                            = 50  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_51A                            = 51  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_52A                            = 52  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_53A                            = 53  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_54A                            = 54  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_55A                            = 55  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_56A                            = 56  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_57A                            = 57  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_58A                            = 58  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_59A                            = 59  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_60A                            = 60  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_61A                            = 61  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_62A                            = 62  ;
static const uint8_t P9N2_EX_CPLT_CTRL0_FREE_USAGE_63A                            = 63  ;

static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_0A                                  = 0   ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_1A                                  = 1   ;
static const uint8_t P9N2_C_CPLT_CTRL0_CTRL_CC_FLUSHMODE_INH_DC                   = 2   ;
static const uint8_t P9N2_C_CPLT_CTRL0_CTRL_CC_FORCE_ALIGN_DC                     = 3   ;
static const uint8_t P9N2_C_CPLT_CTRL0_TC_UNIT_ARY_WRT_THRU_DC                    = 4   ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_5A                                  = 5   ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_6A                                  = 6   ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_7A                                  = 7   ;
static const uint8_t P9N2_C_CPLT_CTRL0_CTRL_CC_ABIST_RECOV_DISABLE_DC             = 8   ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_9A                                  = 9   ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_10A                                 = 10  ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_11A                               = 11  ;
static const uint8_t P9N2_C_CPLT_CTRL0_TC_SKIT_MODE_BIST_DC                       = 12  ;
static const uint8_t P9N2_C_CPLT_CTRL0_TC_UNIT_DETERMINISTIC_TEST_ENABLE_DC       = 13  ;
static const uint8_t P9N2_C_CPLT_CTRL0_TC_UNIT_CONSTRAIN_SAFESCAN_DC              = 14  ;
static const uint8_t P9N2_C_CPLT_CTRL0_TC_UNIT_RRFA_TEST_ENABLE_DC                = 15  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_16A                                 = 16  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_17A                                 = 17  ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_18A                               = 18  ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_19A                               = 19  ;
static const uint8_t P9N2_C_CPLT_CTRL0_TC_PSRO_SEL_DC                             = 20  ;
static const uint8_t P9N2_C_CPLT_CTRL0_TC_PSRO_SEL_DC_LEN                         = 8   ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_28A                                 = 28  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_29A                                 = 29  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_30A                                 = 30  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_31A                                 = 31  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_32A                                 = 32  ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_33A                               = 33  ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_34A                               = 34  ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_35A                               = 35  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_36A                                 = 36  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_37A                                 = 37  ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_38A                               = 38  ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_39A                               = 39  ;
static const uint8_t P9N2_C_CPLT_CTRL0_CTRL_MISC_CLKDIV_SEL_DC                    = 40  ;
static const uint8_t P9N2_C_CPLT_CTRL0_CTRL_MISC_CLKDIV_SEL_DC_LEN                = 2   ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_42A                               = 42  ;
static const uint8_t P9N2_C_CPLT_CTRL0_RESERVED_43A                               = 43  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_44A                                 = 44  ;
static const uint8_t P9N2_C_CPLT_CTRL0_UNUSED_45A                                 = 45  ;
static const uint8_t P9N2_C_CPLT_CTRL0_CTRL_CC_SSS_CALIBRATE_DC                   = 46  ;
static const uint8_t P9N2_C_CPLT_CTRL0_CTRL_CC_PIN_LBIST_DC                       = 47  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_48A                             = 48  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_49A                             = 49  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_50A                             = 50  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_51A                             = 51  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_52A                             = 52  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_53A                             = 53  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_54A                             = 54  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_55A                             = 55  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_56A                             = 56  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_57A                             = 57  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_58A                             = 58  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_59A                             = 59  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_60A                             = 60  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_61A                             = 61  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_62A                             = 62  ;
static const uint8_t P9N2_C_CPLT_CTRL0_FREE_USAGE_63A                             = 63  ;

static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_0B                                 = 0   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_1B                                 = 1   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_2B                                 = 2   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_VITL_REGION_FENCE                      = 3   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_PERV_REGION_FENCE                      = 4   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION1_FENCE                          = 5   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION2_FENCE                          = 6   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION3_FENCE                          = 7   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION4_FENCE                          = 8   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION5_FENCE                          = 9   ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION6_FENCE                          = 10  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION7_FENCE                          = 11  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION8_FENCE                          = 12  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION9_FENCE                          = 13  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_REGION10_FENCE                         = 14  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_RESERVED                                  = 15  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_TC_UNIT_MULTICYCLE_TEST_FENCE             = 16  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_17B                                = 17  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_18B                                = 18  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_19B                                = 19  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_20B                                = 20  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_21B                                = 21  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_22B                                = 22  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_23B                                = 23  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_24B                                = 24  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_25B                                = 25  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_26B                                = 26  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_27B                                = 27  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_28B                                = 28  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_29B                                = 29  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_30B                                = 30  ;
static const uint8_t P9N2_EQ_CPLT_CTRL1_UNUSED_31B                                = 31  ;

static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_0B                                 = 0   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_1B                                 = 1   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_2B                                 = 2   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_TC_VITL_REGION_FENCE                      = 3   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_TC_PERV_REGION_FENCE                      = 4   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_TC_REGION1_FENCE                          = 5   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_TC_REGION2_FENCE                          = 6   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_7B                                 = 7   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_8B                                 = 8   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_9B                                 = 9   ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_10B                                = 10  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_11B                                = 11  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_12B                                = 12  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_13B                                = 13  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_14B                                = 14  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_RESERVED                                  = 15  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_TC_UNIT_MULTICYCLE_TEST_FENCE             = 16  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_17B                                = 17  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_18B                                = 18  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_19B                                = 19  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_20B                                = 20  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_21B                                = 21  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_22B                                = 22  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_23B                                = 23  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_24B                                = 24  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_25B                                = 25  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_26B                                = 26  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_27B                                = 27  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_28B                                = 28  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_29B                                = 29  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_30B                                = 30  ;
static const uint8_t P9N2_EX_CPLT_CTRL1_UNUSED_31B                                = 31  ;

static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_0B                                  = 0   ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_1B                                  = 1   ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_2B                                  = 2   ;
static const uint8_t P9N2_C_CPLT_CTRL1_TC_VITL_REGION_FENCE                       = 3   ;
static const uint8_t P9N2_C_CPLT_CTRL1_TC_PERV_REGION_FENCE                       = 4   ;
static const uint8_t P9N2_C_CPLT_CTRL1_TC_REGION1_FENCE                           = 5   ;
static const uint8_t P9N2_C_CPLT_CTRL1_TC_REGION2_FENCE                           = 6   ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_7B                                  = 7   ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_8B                                  = 8   ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_9B                                  = 9   ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_10B                                 = 10  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_11B                                 = 11  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_12B                                 = 12  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_13B                                 = 13  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_14B                                 = 14  ;
static const uint8_t P9N2_C_CPLT_CTRL1_RESERVED                                   = 15  ;
static const uint8_t P9N2_C_CPLT_CTRL1_TC_UNIT_MULTICYCLE_TEST_FENCE              = 16  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_17B                                 = 17  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_18B                                 = 18  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_19B                                 = 19  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_20B                                 = 20  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_21B                                 = 21  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_22B                                 = 22  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_23B                                 = 23  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_24B                                 = 24  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_25B                                 = 25  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_26B                                 = 26  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_27B                                 = 27  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_28B                                 = 28  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_29B                                 = 29  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_30B                                 = 30  ;
static const uint8_t P9N2_C_CPLT_CTRL1_UNUSED_31B                                 = 31  ;

static const uint8_t P9N2_EQ_CPLT_MASK0_CPLTMASK0                                 = 0   ;
static const uint8_t P9N2_EQ_CPLT_MASK0_CPLTMASK0_LEN                             = 24  ;

static const uint8_t P9N2_EX_CPLT_MASK0_CPLTMASK0                                 = 0   ;
static const uint8_t P9N2_EX_CPLT_MASK0_CPLTMASK0_LEN                             = 24  ;

static const uint8_t P9N2_C_CPLT_MASK0_CPLTMASK0                                  = 0   ;
static const uint8_t P9N2_C_CPLT_MASK0_CPLTMASK0_LEN                              = 24  ;

static const uint8_t P9N2_EQ_CPLT_STAT0_ABIST_DONE_DC                             = 0   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_EBIST_DONE_DC                             = 1   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_RESERVED_2E                               = 2   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_RESERVED_3E                               = 3   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_TC_DIAG_PORT0_OUT                         = 4   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_TC_DIAG_PORT1_OUT                         = 5   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_RESERVED_6E                               = 6   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_UNUSED                                    = 7   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_CC_CTRL_OPCG_DONE_DC                      = 8   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_CC_CTRL_CHIPLET_IS_ALIGNED_DC             = 9   ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_10E                            = 10  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_11E                            = 11  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_12E                            = 12  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_13E                            = 13  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_14E                            = 14  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_15E                            = 15  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_16E                            = 16  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_17E                            = 17  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_18E                            = 18  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_19E                            = 19  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_20E                            = 20  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_21E                            = 21  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_22E                            = 22  ;
static const uint8_t P9N2_EQ_CPLT_STAT0_FREE_USAGE_23E                            = 23  ;

static const uint8_t P9N2_EX_CPLT_STAT0_ABIST_DONE_DC                             = 0   ;
static const uint8_t P9N2_EX_CPLT_STAT0_UNUSED_1E                                 = 1   ;
static const uint8_t P9N2_EX_CPLT_STAT0_RESERVED_2E                               = 2   ;
static const uint8_t P9N2_EX_CPLT_STAT0_RESERVED_3E                               = 3   ;
static const uint8_t P9N2_EX_CPLT_STAT0_TC_DIAG_PORT0_OUT                         = 4   ;
static const uint8_t P9N2_EX_CPLT_STAT0_TC_DIAG_PORT1_OUT                         = 5   ;
static const uint8_t P9N2_EX_CPLT_STAT0_RESERVED_6E                               = 6   ;
static const uint8_t P9N2_EX_CPLT_STAT0_UNUSED_7E                                 = 7   ;
static const uint8_t P9N2_EX_CPLT_STAT0_CC_CTRL_OPCG_DONE_DC                      = 8   ;
static const uint8_t P9N2_EX_CPLT_STAT0_CC_CTRL_CHIPLET_IS_ALIGNED_DC             = 9   ;
static const uint8_t P9N2_EX_CPLT_STAT0_PC_TC_VALID_NOT_HV_MODE                   = 10  ;
static const uint8_t P9N2_EX_CPLT_STAT0_PC_TC_AVP_OUT                             = 11  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_12E                            = 12  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_13E                            = 13  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_14E                            = 14  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_15E                            = 15  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_16E                            = 16  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_17E                            = 17  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_18E                            = 18  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_19E                            = 19  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_20E                            = 20  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_21E                            = 21  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_22E                            = 22  ;
static const uint8_t P9N2_EX_CPLT_STAT0_FREE_USAGE_23E                            = 23  ;

static const uint8_t P9N2_C_CPLT_STAT0_ABIST_DONE_DC                              = 0   ;
static const uint8_t P9N2_C_CPLT_STAT0_UNUSED_1E                                  = 1   ;
static const uint8_t P9N2_C_CPLT_STAT0_RESERVED_2E                                = 2   ;
static const uint8_t P9N2_C_CPLT_STAT0_RESERVED_3E                                = 3   ;
static const uint8_t P9N2_C_CPLT_STAT0_TC_DIAG_PORT0_OUT                          = 4   ;
static const uint8_t P9N2_C_CPLT_STAT0_TC_DIAG_PORT1_OUT                          = 5   ;
static const uint8_t P9N2_C_CPLT_STAT0_RESERVED_6E                                = 6   ;
static const uint8_t P9N2_C_CPLT_STAT0_UNUSED_7E                                  = 7   ;
static const uint8_t P9N2_C_CPLT_STAT0_CC_CTRL_OPCG_DONE_DC                       = 8   ;
static const uint8_t P9N2_C_CPLT_STAT0_CC_CTRL_CHIPLET_IS_ALIGNED_DC              = 9   ;
static const uint8_t P9N2_C_CPLT_STAT0_PC_TC_VALID_NOT_HV_MODE                    = 10  ;
static const uint8_t P9N2_C_CPLT_STAT0_PC_TC_AVP_OUT                              = 11  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_12E                             = 12  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_13E                             = 13  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_14E                             = 14  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_15E                             = 15  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_16E                             = 16  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_17E                             = 17  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_18E                             = 18  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_19E                             = 19  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_20E                             = 20  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_21E                             = 21  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_22E                             = 22  ;
static const uint8_t P9N2_C_CPLT_STAT0_FREE_USAGE_23E                             = 23  ;

static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SB_STRENGTH                           = 0   ;
static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SB_STRENGTH_LEN                       = 4   ;
static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SB_SPARE                              = 4   ;
static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SB_PULSE_MODE_EN                      = 5   ;
static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SB_PULSE_MODE                         = 6   ;
static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SB_PULSE_MODE_LEN                     = 2   ;
static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SW_RESCLK                             = 8   ;
static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SW_RESCLK_LEN                         = 4   ;
static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SW_SPARE                              = 12  ;
static const uint8_t P9N2_EX_CPPM_CACCR_QUAD_CLK_SB_OVERRIDE                      = 13  ;
static const uint8_t P9N2_EX_CPPM_CACCR_QUAD_CLK_SW_OVERRIDE                      = 14  ;
static const uint8_t P9N2_EX_CPPM_CACCR_CLK_SYNC_ENABLE                           = 15  ;

static const uint8_t P9N2_C_CPPM_CACCR_CLK_SB_STRENGTH                            = 0   ;
static const uint8_t P9N2_C_CPPM_CACCR_CLK_SB_STRENGTH_LEN                        = 4   ;
static const uint8_t P9N2_C_CPPM_CACCR_CLK_SB_SPARE                               = 4   ;
static const uint8_t P9N2_C_CPPM_CACCR_CLK_SB_PULSE_MODE_EN                       = 5   ;
static const uint8_t P9N2_C_CPPM_CACCR_CLK_SB_PULSE_MODE                          = 6   ;
static const uint8_t P9N2_C_CPPM_CACCR_CLK_SB_PULSE_MODE_LEN                      = 2   ;
static const uint8_t P9N2_C_CPPM_CACCR_CLK_SW_RESCLK                              = 8   ;
static const uint8_t P9N2_C_CPPM_CACCR_CLK_SW_RESCLK_LEN                          = 4   ;
static const uint8_t P9N2_C_CPPM_CACCR_CLK_SW_SPARE                               = 12  ;
static const uint8_t P9N2_C_CPPM_CACCR_QUAD_CLK_SB_OVERRIDE                       = 13  ;
static const uint8_t P9N2_C_CPPM_CACCR_QUAD_CLK_SW_OVERRIDE                       = 14  ;
static const uint8_t P9N2_C_CPPM_CACCR_CLK_SYNC_ENABLE                            = 15  ;

static const uint8_t P9N2_EX_CPPM_CACSR_ACTUAL_CLK_SB_STRENGTH                    = 0   ;
static const uint8_t P9N2_EX_CPPM_CACSR_ACTUAL_CLK_SB_STRENGTH_LEN                = 4   ;
static const uint8_t P9N2_EX_CPPM_CACSR_ACTUAL_CLK_SB_SPARE                       = 4   ;
static const uint8_t P9N2_EX_CPPM_CACSR_ACTUAL_CLK_SB_PULSE_MODE_EN               = 5   ;
static const uint8_t P9N2_EX_CPPM_CACSR_ACTUAL_CLK_SB_PULSE_MODE                  = 6   ;
static const uint8_t P9N2_EX_CPPM_CACSR_ACTUAL_CLK_SB_PULSE_MODE_LEN              = 2   ;
static const uint8_t P9N2_EX_CPPM_CACSR_ACTUAL_CLK_SW_RESCLK                      = 8   ;
static const uint8_t P9N2_EX_CPPM_CACSR_ACTUAL_CLK_SW_RESCLK_LEN                  = 4   ;
static const uint8_t P9N2_EX_CPPM_CACSR_ACTUAL_CLK_SW_SPARE                       = 12  ;
static const uint8_t P9N2_EX_CPPM_CACSR_CLK_SYNC_DONE                             = 13  ;

static const uint8_t P9N2_C_CPPM_CACSR_ACTUAL_CLK_SB_STRENGTH                     = 0   ;
static const uint8_t P9N2_C_CPPM_CACSR_ACTUAL_CLK_SB_STRENGTH_LEN                 = 4   ;
static const uint8_t P9N2_C_CPPM_CACSR_ACTUAL_CLK_SB_SPARE                        = 4   ;
static const uint8_t P9N2_C_CPPM_CACSR_ACTUAL_CLK_SB_PULSE_MODE_EN                = 5   ;
static const uint8_t P9N2_C_CPPM_CACSR_ACTUAL_CLK_SB_PULSE_MODE                   = 6   ;
static const uint8_t P9N2_C_CPPM_CACSR_ACTUAL_CLK_SB_PULSE_MODE_LEN               = 2   ;
static const uint8_t P9N2_C_CPPM_CACSR_ACTUAL_CLK_SW_RESCLK                       = 8   ;
static const uint8_t P9N2_C_CPPM_CACSR_ACTUAL_CLK_SW_RESCLK_LEN                   = 4   ;
static const uint8_t P9N2_C_CPPM_CACSR_ACTUAL_CLK_SW_SPARE                        = 12  ;
static const uint8_t P9N2_C_CPPM_CACSR_CLK_SYNC_DONE                              = 13  ;

static const uint8_t P9N2_EX_CPPM_CIIR_MSGSND_INTR_INJECT                         = 28  ;
static const uint8_t P9N2_EX_CPPM_CIIR_MSGSND_INTR_INJECT_LEN                     = 4   ;
static const uint8_t P9N2_EX_CPPM_CIIR_DD2_MSGSNDU_INTR_INJECT                    = 60  ;
static const uint8_t P9N2_EX_CPPM_CIIR_DD2_MSGSNDU_INTR_INJECT_LEN                = 4   ;

static const uint8_t P9N2_C_CPPM_CIIR_MSGSND_INTR_INJECT                          = 28  ;
static const uint8_t P9N2_C_CPPM_CIIR_MSGSND_INTR_INJECT_LEN                      = 4   ;
static const uint8_t P9N2_C_CPPM_CIIR_DD2_MSGSNDU_INTR_INJECT                     = 60  ;
static const uint8_t P9N2_C_CPPM_CIIR_DD2_MSGSNDU_INTR_INJECT_LEN                 = 4   ;

static const uint8_t P9N2_EX_CPPM_CISR_HYP_INTR_PRESENT                           = 0   ;
static const uint8_t P9N2_EX_CPPM_CISR_HYP_INTR_PRESENT_LEN                       = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_OS_INTR_PRESENT                            = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_OS_INTR_PRESENT_LEN                        = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_MSGSND_INTR_PRESENT                        = 8   ;
static const uint8_t P9N2_EX_CPPM_CISR_MSGSND_INTR_PRESENT_LEN                    = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_EBB_INTR_PRESENT                           = 12  ;
static const uint8_t P9N2_EX_CPPM_CISR_EBB_INTR_PRESENT_LEN                       = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_HYP_INTR_REQUESTED                         = 16  ;
static const uint8_t P9N2_EX_CPPM_CISR_HYP_INTR_REQUESTED_LEN                     = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_OS_INTR_REQUESTED                          = 20  ;
static const uint8_t P9N2_EX_CPPM_CISR_OS_INTR_REQUESTED_LEN                      = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_MSGSND_INTR_REQUESTED                      = 24  ;
static const uint8_t P9N2_EX_CPPM_CISR_MSGSND_INTR_REQUESTED_LEN                  = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_MSGSND_INTR_SAMPLE                         = 28  ;
static const uint8_t P9N2_EX_CPPM_CISR_MSGSND_INTR_SAMPLE_LEN                     = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_MSGSND_ACK                                 = 32  ;
static const uint8_t P9N2_EX_CPPM_CISR_MALF_ALERT_PRESENT                         = 33  ;
static const uint8_t P9N2_EX_CPPM_CISR_MALF_ALERT_REQUESTED                       = 34  ;
static const uint8_t P9N2_EX_CPPM_CISR_CME_SPECIAL_WKUP_DONE                      = 35  ;
static const uint8_t P9N2_EX_CPPM_CISR_DD2_MSGSNDU_INTR_PRESENT                   = 36  ;
static const uint8_t P9N2_EX_CPPM_CISR_DD2_MSGSNDU_INTR_PRESENT_LEN               = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_DD2_MSGSNDU_INTR_REQUESTED                 = 40  ;
static const uint8_t P9N2_EX_CPPM_CISR_DD2_MSGSNDU_INTR_REQUESTED_LEN             = 4   ;
static const uint8_t P9N2_EX_CPPM_CISR_DD2_MSGSNDU_INTR_SAMPLE                    = 44  ;
static const uint8_t P9N2_EX_CPPM_CISR_DD2_MSGSNDU_INTR_SAMPLE_LEN                = 4   ;

static const uint8_t P9N2_C_CPPM_CISR_HYP_INTR_PRESENT                            = 0   ;
static const uint8_t P9N2_C_CPPM_CISR_HYP_INTR_PRESENT_LEN                        = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_OS_INTR_PRESENT                             = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_OS_INTR_PRESENT_LEN                         = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_MSGSND_INTR_PRESENT                         = 8   ;
static const uint8_t P9N2_C_CPPM_CISR_MSGSND_INTR_PRESENT_LEN                     = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_EBB_INTR_PRESENT                            = 12  ;
static const uint8_t P9N2_C_CPPM_CISR_EBB_INTR_PRESENT_LEN                        = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_HYP_INTR_REQUESTED                          = 16  ;
static const uint8_t P9N2_C_CPPM_CISR_HYP_INTR_REQUESTED_LEN                      = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_OS_INTR_REQUESTED                           = 20  ;
static const uint8_t P9N2_C_CPPM_CISR_OS_INTR_REQUESTED_LEN                       = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_MSGSND_INTR_REQUESTED                       = 24  ;
static const uint8_t P9N2_C_CPPM_CISR_MSGSND_INTR_REQUESTED_LEN                   = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_MSGSND_INTR_SAMPLE                          = 28  ;
static const uint8_t P9N2_C_CPPM_CISR_MSGSND_INTR_SAMPLE_LEN                      = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_MSGSND_ACK                                  = 32  ;
static const uint8_t P9N2_C_CPPM_CISR_MALF_ALERT_PRESENT                          = 33  ;
static const uint8_t P9N2_C_CPPM_CISR_MALF_ALERT_REQUESTED                        = 34  ;
static const uint8_t P9N2_C_CPPM_CISR_CME_SPECIAL_WKUP_DONE                       = 35  ;
static const uint8_t P9N2_C_CPPM_CISR_DD2_MSGSNDU_INTR_PRESENT                    = 36  ;
static const uint8_t P9N2_C_CPPM_CISR_DD2_MSGSNDU_INTR_PRESENT_LEN                = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_DD2_MSGSNDU_INTR_REQUESTED                  = 40  ;
static const uint8_t P9N2_C_CPPM_CISR_DD2_MSGSNDU_INTR_REQUESTED_LEN              = 4   ;
static const uint8_t P9N2_C_CPPM_CISR_DD2_MSGSNDU_INTR_SAMPLE                     = 44  ;
static const uint8_t P9N2_C_CPPM_CISR_DD2_MSGSNDU_INTR_SAMPLE_LEN                 = 4   ;

static const uint8_t P9N2_EX_CPPM_CIVRMLCR_IVRM_LOCAL_CONTROL                     = 0   ;
static const uint8_t P9N2_EX_CPPM_CIVRMLCR_RESERVED_1_2                           = 1   ;
static const uint8_t P9N2_EX_CPPM_CIVRMLCR_RESERVED_1_2_LEN                       = 2   ;
static const uint8_t P9N2_EX_CPPM_CIVRMLCR_IVRM_UREG_TEST_EN                      = 3   ;
static const uint8_t P9N2_EX_CPPM_CIVRMLCR_IVRM_UREG_TEST_ID                      = 4   ;
static const uint8_t P9N2_EX_CPPM_CIVRMLCR_IVRM_UREG_TEST_ID_LEN                  = 4   ;

static const uint8_t P9N2_C_CPPM_CIVRMLCR_IVRM_LOCAL_CONTROL                      = 0   ;
static const uint8_t P9N2_C_CPPM_CIVRMLCR_RESERVED_1_2                            = 1   ;
static const uint8_t P9N2_C_CPPM_CIVRMLCR_RESERVED_1_2_LEN                        = 2   ;
static const uint8_t P9N2_C_CPPM_CIVRMLCR_IVRM_UREG_TEST_EN                       = 3   ;
static const uint8_t P9N2_C_CPPM_CIVRMLCR_IVRM_UREG_TEST_ID                       = 4   ;
static const uint8_t P9N2_C_CPPM_CIVRMLCR_IVRM_UREG_TEST_ID_LEN                   = 4   ;

static const uint8_t P9N2_EX_CPPM_CMEDATA_DATA                                    = 0   ;
static const uint8_t P9N2_EX_CPPM_CMEDATA_DATA_LEN                                = 32  ;

static const uint8_t P9N2_C_CPPM_CMEDATA_DATA                                     = 0   ;
static const uint8_t P9N2_C_CPPM_CMEDATA_DATA_LEN                                 = 32  ;

static const uint8_t P9N2_EX_CPPM_CMEDB0_CME_MESSAGE_NUMBER0                      = 0   ;
static const uint8_t P9N2_EX_CPPM_CMEDB0_CME_MESSAGE_NUMBER0_LEN                  = 8   ;
static const uint8_t P9N2_EX_CPPM_CMEDB0_CME_MESSAGE_HI                           = 8   ;
static const uint8_t P9N2_EX_CPPM_CMEDB0_CME_MESSAGE_HI_LEN                       = 56  ;

static const uint8_t P9N2_C_CPPM_CMEDB0_CME_MESSAGE_NUMBER0                       = 0   ;
static const uint8_t P9N2_C_CPPM_CMEDB0_CME_MESSAGE_NUMBER0_LEN                   = 8   ;
static const uint8_t P9N2_C_CPPM_CMEDB0_CME_MESSAGE_HI                            = 8   ;
static const uint8_t P9N2_C_CPPM_CMEDB0_CME_MESSAGE_HI_LEN                        = 56  ;

static const uint8_t P9N2_EX_CPPM_CMEDB1_CME_MESSAGE_NUMBER_N                     = 0   ;
static const uint8_t P9N2_EX_CPPM_CMEDB1_CME_MESSAGE_NUMBER_N_LEN                 = 8   ;

static const uint8_t P9N2_C_CPPM_CMEDB1_CME_MESSAGE_NUMBER_N                      = 0   ;
static const uint8_t P9N2_C_CPPM_CMEDB1_CME_MESSAGE_NUMBER_N_LEN                  = 8   ;

static const uint8_t P9N2_EX_CPPM_CMEDB2_CME_MESSAGE_NUMBER_N                     = 0   ;
static const uint8_t P9N2_EX_CPPM_CMEDB2_CME_MESSAGE_NUMBER_N_LEN                 = 8   ;

static const uint8_t P9N2_C_CPPM_CMEDB2_CME_MESSAGE_NUMBER_N                      = 0   ;
static const uint8_t P9N2_C_CPPM_CMEDB2_CME_MESSAGE_NUMBER_N_LEN                  = 8   ;

static const uint8_t P9N2_EX_CPPM_CMEDB3_CME_MESSAGE_NUMBER_N                     = 0   ;
static const uint8_t P9N2_EX_CPPM_CMEDB3_CME_MESSAGE_NUMBER_N_LEN                 = 8   ;
static const uint8_t P9N2_EX_CPPM_CMEDB3_CME_MESSAGE_HI                           = 8   ;
static const uint8_t P9N2_EX_CPPM_CMEDB3_CME_MESSAGE_HI_LEN                       = 56  ;

static const uint8_t P9N2_C_CPPM_CMEDB3_CME_MESSAGE_NUMBER_N                      = 0   ;
static const uint8_t P9N2_C_CPPM_CMEDB3_CME_MESSAGE_NUMBER_N_LEN                  = 8   ;
static const uint8_t P9N2_C_CPPM_CMEDB3_CME_MESSAGE_HI                            = 8   ;
static const uint8_t P9N2_C_CPPM_CMEDB3_CME_MESSAGE_HI_LEN                        = 56  ;

static const uint8_t P9N2_EX_CPPM_CMEMSG_CME_MESSAGE                              = 0   ;
static const uint8_t P9N2_EX_CPPM_CMEMSG_CME_MESSAGE_LEN                          = 64  ;

static const uint8_t P9N2_C_CPPM_CMEMSG_CME_MESSAGE                               = 0   ;
static const uint8_t P9N2_C_CPPM_CMEMSG_CME_MESSAGE_LEN                           = 64  ;

static const uint8_t P9N2_EX_CPPM_CPMMR_PPM_WRITE_DISABLE                         = 0   ;
static const uint8_t P9N2_EX_CPPM_CPMMR_PPM_WRITE_OVERRIDE                        = 1   ;
static const uint8_t P9N2_EX_CPPM_CPMMR_RESERVED_2_8                              = 2   ;
static const uint8_t P9N2_EX_CPPM_CPMMR_RESERVED_2_8_LEN                          = 7   ;
static const uint8_t P9N2_EX_CPPM_CPMMR_FUSED_CORE_MODE                           = 9   ;
static const uint8_t P9N2_EX_CPPM_CPMMR_STOP_EXIT_TYPE_SEL                        = 10  ;
static const uint8_t P9N2_EX_CPPM_CPMMR_BLOCK_INTR_INPUTS                         = 11  ;
static const uint8_t P9N2_EX_CPPM_CPMMR_CME_ERR_NOTIFY_DIS                        = 12  ;
static const uint8_t P9N2_EX_CPPM_CPMMR_WKUP_NOTIFY_SELECT                        = 13  ;
static const uint8_t P9N2_EX_CPPM_CPMMR_ENABLE_PECE                               = 14  ;
static const uint8_t P9N2_EX_CPPM_CPMMR_CME_SPECIAL_WKUP_DONE_DIS                 = 15  ;

static const uint8_t P9N2_C_CPPM_CPMMR_PPM_WRITE_DISABLE                          = 0   ;
static const uint8_t P9N2_C_CPPM_CPMMR_PPM_WRITE_OVERRIDE                         = 1   ;
static const uint8_t P9N2_C_CPPM_CPMMR_RESERVED_2_8                               = 2   ;
static const uint8_t P9N2_C_CPPM_CPMMR_RESERVED_2_8_LEN                           = 7   ;
static const uint8_t P9N2_C_CPPM_CPMMR_FUSED_CORE_MODE                            = 9   ;
static const uint8_t P9N2_C_CPPM_CPMMR_STOP_EXIT_TYPE_SEL                         = 10  ;
static const uint8_t P9N2_C_CPPM_CPMMR_BLOCK_INTR_INPUTS                          = 11  ;
static const uint8_t P9N2_C_CPPM_CPMMR_CME_ERR_NOTIFY_DIS                         = 12  ;
static const uint8_t P9N2_C_CPPM_CPMMR_WKUP_NOTIFY_SELECT                         = 13  ;
static const uint8_t P9N2_C_CPPM_CPMMR_ENABLE_PECE                                = 14  ;
static const uint8_t P9N2_C_CPPM_CPMMR_CME_SPECIAL_WKUP_DONE_DIS                  = 15  ;

static const uint8_t P9N2_EX_CPPM_CSAR_SCRATCH_ATOMIC_DATA                        = 0   ;
static const uint8_t P9N2_EX_CPPM_CSAR_SCRATCH_ATOMIC_DATA_LEN                    = 32  ;

static const uint8_t P9N2_C_CPPM_CSAR_SCRATCH_ATOMIC_DATA                         = 0   ;
static const uint8_t P9N2_C_CPPM_CSAR_SCRATCH_ATOMIC_DATA_LEN                     = 32  ;

static const uint8_t P9N2_EX_CPPM_ERR_PCB_INTERRUPT_PROTOCOL                      = 0   ;
static const uint8_t P9N2_EX_CPPM_ERR_SPECIAL_WKUP_PROTOCOL                       = 1   ;
static const uint8_t P9N2_EX_CPPM_ERR_SPECIAL_WKUP_DONE_PROTOCOL                  = 2   ;
static const uint8_t P9N2_EX_CPPM_ERR_PFET_SEQ_PROGRAM                            = 3   ;
static const uint8_t P9N2_EX_CPPM_ERR_CLK_SYNC                                    = 4   ;
static const uint8_t P9N2_EX_CPPM_ERR_PECE_INTR_DISABLED                          = 5   ;
static const uint8_t P9N2_EX_CPPM_ERR_DECONFIGURED_INTR                           = 6   ;
static const uint8_t P9N2_EX_CPPM_ERR_RESERVED_7                                  = 7   ;
static const uint8_t P9N2_EX_CPPM_ERR_RESERVED_8_11                               = 8   ;
static const uint8_t P9N2_EX_CPPM_ERR_RESERVED_8_11_LEN                           = 4   ;

static const uint8_t P9N2_C_CPPM_ERR_PCB_INTERRUPT_PROTOCOL                       = 0   ;
static const uint8_t P9N2_C_CPPM_ERR_SPECIAL_WKUP_PROTOCOL                        = 1   ;
static const uint8_t P9N2_C_CPPM_ERR_SPECIAL_WKUP_DONE_PROTOCOL                   = 2   ;
static const uint8_t P9N2_C_CPPM_ERR_PFET_SEQ_PROGRAM                             = 3   ;
static const uint8_t P9N2_C_CPPM_ERR_CLK_SYNC                                     = 4   ;
static const uint8_t P9N2_C_CPPM_ERR_PECE_INTR_DISABLED                           = 5   ;
static const uint8_t P9N2_C_CPPM_ERR_DECONFIGURED_INTR                            = 6   ;
static const uint8_t P9N2_C_CPPM_ERR_RESERVED_7                                   = 7   ;
static const uint8_t P9N2_C_CPPM_ERR_RESERVED_8_11                                = 8   ;
static const uint8_t P9N2_C_CPPM_ERR_RESERVED_8_11_LEN                            = 4   ;

static const uint8_t P9N2_EX_CPPM_ERRMSK_RESERVED_0_11                            = 0   ;
static const uint8_t P9N2_EX_CPPM_ERRMSK_RESERVED_0_11_LEN                        = 12  ;

static const uint8_t P9N2_C_CPPM_ERRMSK_RESERVED_0_11                             = 0   ;
static const uint8_t P9N2_C_CPPM_ERRMSK_RESERVED_0_11_LEN                         = 12  ;

static const uint8_t P9N2_EX_CPPM_IPPMCMD_QPPM_REG                                = 0   ;
static const uint8_t P9N2_EX_CPPM_IPPMCMD_QPPM_REG_LEN                            = 8   ;
static const uint8_t P9N2_EX_CPPM_IPPMCMD_QPPM_RNW                                = 8   ;
static const uint8_t P9N2_EX_CPPM_IPPMCMD_RESERVED_9                              = 9   ;

static const uint8_t P9N2_C_CPPM_IPPMCMD_QPPM_REG                                 = 0   ;
static const uint8_t P9N2_C_CPPM_IPPMCMD_QPPM_REG_LEN                             = 8   ;
static const uint8_t P9N2_C_CPPM_IPPMCMD_QPPM_RNW                                 = 8   ;
static const uint8_t P9N2_C_CPPM_IPPMCMD_RESERVED_9                               = 9   ;

static const uint8_t P9N2_EX_CPPM_IPPMRDATA_QPPM_RDATA                            = 0   ;
static const uint8_t P9N2_EX_CPPM_IPPMRDATA_QPPM_RDATA_LEN                        = 64  ;

static const uint8_t P9N2_C_CPPM_IPPMRDATA_QPPM_RDATA                             = 0   ;
static const uint8_t P9N2_C_CPPM_IPPMRDATA_QPPM_RDATA_LEN                         = 64  ;

static const uint8_t P9N2_EX_CPPM_IPPMSTAT_QPPM_ONGOING                           = 0   ;
static const uint8_t P9N2_EX_CPPM_IPPMSTAT_QPPM_STATUS                            = 1   ;
static const uint8_t P9N2_EX_CPPM_IPPMSTAT_QPPM_STATUS_LEN                        = 2   ;

static const uint8_t P9N2_C_CPPM_IPPMSTAT_QPPM_ONGOING                            = 0   ;
static const uint8_t P9N2_C_CPPM_IPPMSTAT_QPPM_STATUS                             = 1   ;
static const uint8_t P9N2_C_CPPM_IPPMSTAT_QPPM_STATUS_LEN                         = 2   ;

static const uint8_t P9N2_EX_CPPM_IPPMWDATA_QPPM_WDATA                            = 0   ;
static const uint8_t P9N2_EX_CPPM_IPPMWDATA_QPPM_WDATA_LEN                        = 64  ;

static const uint8_t P9N2_C_CPPM_IPPMWDATA_QPPM_WDATA                             = 0   ;
static const uint8_t P9N2_C_CPPM_IPPMWDATA_QPPM_WDATA_LEN                         = 64  ;

static const uint8_t P9N2_EX_CPPM_NC0INDIR_NC_N_INDIRECT                          = 0   ;
static const uint8_t P9N2_EX_CPPM_NC0INDIR_NC_N_INDIRECT_LEN                      = 32  ;

static const uint8_t P9N2_C_CPPM_NC0INDIR_NC_N_INDIRECT                           = 0   ;
static const uint8_t P9N2_C_CPPM_NC0INDIR_NC_N_INDIRECT_LEN                       = 32  ;

static const uint8_t P9N2_EX_CPPM_NC1INDIR_NC_N_INDIRECT                          = 0   ;
static const uint8_t P9N2_EX_CPPM_NC1INDIR_NC_N_INDIRECT_LEN                      = 32  ;

static const uint8_t P9N2_C_CPPM_NC1INDIR_NC_N_INDIRECT                           = 0   ;
static const uint8_t P9N2_C_CPPM_NC1INDIR_NC_N_INDIRECT_LEN                       = 32  ;

static const uint8_t P9N2_EX_CPPM_PECES_PECE_T0                                   = 0   ;
static const uint8_t P9N2_EX_CPPM_PECES_PECE_T0_LEN                               = 6   ;
static const uint8_t P9N2_EX_CPPM_PECES_PECE_T1                                   = 8   ;
static const uint8_t P9N2_EX_CPPM_PECES_PECE_T1_LEN                               = 6   ;
static const uint8_t P9N2_EX_CPPM_PECES_PECE_T2                                   = 16  ;
static const uint8_t P9N2_EX_CPPM_PECES_PECE_T2_LEN                               = 6   ;
static const uint8_t P9N2_EX_CPPM_PECES_PECE_T3                                   = 24  ;
static const uint8_t P9N2_EX_CPPM_PECES_PECE_T3_LEN                               = 6   ;
static const uint8_t P9N2_EX_CPPM_PECES_USE_PECE                                  = 32  ;
static const uint8_t P9N2_EX_CPPM_PECES_USE_PECE_LEN                              = 4   ;

static const uint8_t P9N2_C_CPPM_PECES_PECE_T0                                    = 0   ;
static const uint8_t P9N2_C_CPPM_PECES_PECE_T0_LEN                                = 6   ;
static const uint8_t P9N2_C_CPPM_PECES_PECE_T1                                    = 8   ;
static const uint8_t P9N2_C_CPPM_PECES_PECE_T1_LEN                                = 6   ;
static const uint8_t P9N2_C_CPPM_PECES_PECE_T2                                    = 16  ;
static const uint8_t P9N2_C_CPPM_PECES_PECE_T2_LEN                                = 6   ;
static const uint8_t P9N2_C_CPPM_PECES_PECE_T3                                    = 24  ;
static const uint8_t P9N2_C_CPPM_PECES_PECE_T3_LEN                                = 6   ;
static const uint8_t P9N2_C_CPPM_PECES_USE_PECE                                   = 32  ;
static const uint8_t P9N2_C_CPPM_PECES_USE_PECE_LEN                               = 4   ;

static const uint8_t P9N2_EX_CPPM_PERRSUM_ERROR                                   = 0   ;

static const uint8_t P9N2_C_CPPM_PERRSUM_ERROR                                    = 0   ;

static const uint8_t P9N2_EQ_CSAR_SRAM_ADDRESS                                    = 16  ;
static const uint8_t P9N2_EQ_CSAR_SRAM_ADDRESS_LEN                                = 13  ;

static const uint8_t P9N2_EX_CSAR_SRAM_ADDRESS                                    = 16  ;
static const uint8_t P9N2_EX_CSAR_SRAM_ADDRESS_LEN                                = 13  ;

static const uint8_t P9N2_EQ_CSCR_SRAM_ACCESS_MODE                                = 0   ;
static const uint8_t P9N2_EQ_CSCR_SRAM_SCRUB_ENABLE                               = 1   ;
static const uint8_t P9N2_EQ_CSCR_ECC_CORRECT_DIS                                 = 2   ;
static const uint8_t P9N2_EQ_CSCR_ECC_DETECT_DIS                                  = 3   ;
static const uint8_t P9N2_EQ_CSCR_ECC_INJECT_TYPE                                 = 4   ;
static const uint8_t P9N2_EQ_CSCR_ECC_INJECT_ERR                                  = 5   ;
static const uint8_t P9N2_EQ_CSCR_SPARE_6_7                                       = 6   ;
static const uint8_t P9N2_EQ_CSCR_SPARE_6_7_LEN                                   = 2   ;
static const uint8_t P9N2_EQ_CSCR_SRAM_SCRUB_INDEX                                = 47  ;
static const uint8_t P9N2_EQ_CSCR_SRAM_SCRUB_INDEX_LEN                            = 13  ;

static const uint8_t P9N2_EX_CSCR_SRAM_ACCESS_MODE                                = 0   ;
static const uint8_t P9N2_EX_CSCR_SRAM_SCRUB_ENABLE                               = 1   ;
static const uint8_t P9N2_EX_CSCR_ECC_CORRECT_DIS                                 = 2   ;
static const uint8_t P9N2_EX_CSCR_ECC_DETECT_DIS                                  = 3   ;
static const uint8_t P9N2_EX_CSCR_ECC_INJECT_TYPE                                 = 4   ;
static const uint8_t P9N2_EX_CSCR_ECC_INJECT_ERR                                  = 5   ;
static const uint8_t P9N2_EX_CSCR_SPARE_6_7                                       = 6   ;
static const uint8_t P9N2_EX_CSCR_SPARE_6_7_LEN                                   = 2   ;
static const uint8_t P9N2_EX_CSCR_SRAM_SCRUB_INDEX                                = 47  ;
static const uint8_t P9N2_EX_CSCR_SRAM_SCRUB_INDEX_LEN                            = 13  ;

static const uint8_t P9N2_EQ_CSDR_SRAM_DATA                                       = 0   ;
static const uint8_t P9N2_EQ_CSDR_SRAM_DATA_LEN                                   = 64  ;

static const uint8_t P9N2_EX_CSDR_SRAM_DATA                                       = 0   ;
static const uint8_t P9N2_EX_CSDR_SRAM_DATA_LEN                                   = 64  ;

static const uint8_t P9N2_EX_L2_CTRL_T0_RUN_Q                                     = 48  ;
static const uint8_t P9N2_EX_L2_CTRL_T1_RUN_Q                                     = 49  ;
static const uint8_t P9N2_EX_L2_CTRL_T2_RUN_Q                                     = 50  ;
static const uint8_t P9N2_EX_L2_CTRL_T3_RUN_Q                                     = 51  ;
static const uint8_t P9N2_EX_L2_CTRL_T4_RUN_Q                                     = 52  ;
static const uint8_t P9N2_EX_L2_CTRL_T5_RUN_Q                                     = 53  ;
static const uint8_t P9N2_EX_L2_CTRL_T6_RUN_Q                                     = 54  ;
static const uint8_t P9N2_EX_L2_CTRL_T7_RUN_Q                                     = 55  ;
static const uint8_t P9N2_EX_L2_CTRL_RUN_LATCH                                    = 63  ;

static const uint8_t P9N2_C_CTRL_T0_RUN_Q                                         = 48  ;
static const uint8_t P9N2_C_CTRL_T1_RUN_Q                                         = 49  ;
static const uint8_t P9N2_C_CTRL_T2_RUN_Q                                         = 50  ;
static const uint8_t P9N2_C_CTRL_T3_RUN_Q                                         = 51  ;
static const uint8_t P9N2_C_CTRL_T4_RUN_Q                                         = 52  ;
static const uint8_t P9N2_C_CTRL_T5_RUN_Q                                         = 53  ;
static const uint8_t P9N2_C_CTRL_T6_RUN_Q                                         = 54  ;
static const uint8_t P9N2_C_CTRL_T7_RUN_Q                                         = 55  ;
static const uint8_t P9N2_C_CTRL_RUN_LATCH                                        = 63  ;

static const uint8_t P9N2_EQ_CTRL_ATOMIC_LOCK_REG_ENABLE                          = 0   ;
static const uint8_t P9N2_EQ_CTRL_ATOMIC_LOCK_REG_ID                              = 1   ;
static const uint8_t P9N2_EQ_CTRL_ATOMIC_LOCK_REG_ID_LEN                          = 4   ;
static const uint8_t P9N2_EQ_CTRL_ATOMIC_LOCK_REG_ACTIVITY                        = 8   ;
static const uint8_t P9N2_EQ_CTRL_ATOMIC_LOCK_REG_ACTIVITY_LEN                    = 8   ;

static const uint8_t P9N2_EX_CTRL_ATOMIC_LOCK_REG_ENABLE                          = 0   ;
static const uint8_t P9N2_EX_CTRL_ATOMIC_LOCK_REG_ID                              = 1   ;
static const uint8_t P9N2_EX_CTRL_ATOMIC_LOCK_REG_ID_LEN                          = 4   ;
static const uint8_t P9N2_EX_CTRL_ATOMIC_LOCK_REG_ACTIVITY                        = 8   ;
static const uint8_t P9N2_EX_CTRL_ATOMIC_LOCK_REG_ACTIVITY_LEN                    = 8   ;

static const uint8_t P9N2_C_CTRL_ATOMIC_LOCK_REG_ENABLE                           = 0   ;
static const uint8_t P9N2_C_CTRL_ATOMIC_LOCK_REG_ID                               = 1   ;
static const uint8_t P9N2_C_CTRL_ATOMIC_LOCK_REG_ID_LEN                           = 4   ;
static const uint8_t P9N2_C_CTRL_ATOMIC_LOCK_REG_ACTIVITY                         = 8   ;
static const uint8_t P9N2_C_CTRL_ATOMIC_LOCK_REG_ACTIVITY_LEN                     = 8   ;

static const uint8_t P9N2_EQ_CTRL_PROTECT_MODE_REG_READ_ENABLE                    = 0   ;
static const uint8_t P9N2_EQ_CTRL_PROTECT_MODE_REG_WRITE_ENABLE                   = 1   ;

static const uint8_t P9N2_EX_CTRL_PROTECT_MODE_REG_READ_ENABLE                    = 0   ;
static const uint8_t P9N2_EX_CTRL_PROTECT_MODE_REG_WRITE_ENABLE                   = 1   ;

static const uint8_t P9N2_C_CTRL_PROTECT_MODE_REG_READ_ENABLE                     = 0   ;
static const uint8_t P9N2_C_CTRL_PROTECT_MODE_REG_WRITE_ENABLE                    = 1   ;

static const uint8_t P9N2_EQ_DBG_CBS_CC_RESET_EP                                  = 0   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_OPCG_IP                                   = 1   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_VITL_CLKOFF                               = 2   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_TEST_ENABLE                               = 3   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_REQ                                       = 4   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_CMD                                       = 5   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_CMD_LEN                                   = 3   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_STATE                                     = 8   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_STATE_LEN                                 = 5   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_SECURITY_DEBUG_MODE                       = 13  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_PROTOCOL_ERROR                            = 14  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_PCB_IDLE                                  = 15  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_CURRENT_OPCG_MODE                         = 16  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_CURRENT_OPCG_MODE_LEN                     = 4   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_LAST_OPCG_MODE                            = 20  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_LAST_OPCG_MODE_LEN                        = 4   ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_PCB_ERROR                                 = 24  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_PARITY_ERROR                              = 25  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_ERROR                                     = 26  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_CHIPLET_IS_ALIGNED                        = 27  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_PCB_REQUEST_SINCE_RESET                   = 28  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_PARANOIA_TEST_ENABLE_CHANGE               = 29  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_PARANOIA_VITL_CLKOFF_CHANGE               = 30  ;
static const uint8_t P9N2_EQ_DBG_CBS_CC_TP_TPFSI_ACK                              = 31  ;

static const uint8_t P9N2_EX_DBG_CBS_CC_RESET_EP                                  = 0   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_OPCG_IP                                   = 1   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_VITL_CLKOFF                               = 2   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_TEST_ENABLE                               = 3   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_REQ                                       = 4   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_CMD                                       = 5   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_CMD_LEN                                   = 3   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_STATE                                     = 8   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_STATE_LEN                                 = 5   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_SECURITY_DEBUG_MODE                       = 13  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_PROTOCOL_ERROR                            = 14  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_PCB_IDLE                                  = 15  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_CURRENT_OPCG_MODE                         = 16  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_CURRENT_OPCG_MODE_LEN                     = 4   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_LAST_OPCG_MODE                            = 20  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_LAST_OPCG_MODE_LEN                        = 4   ;
static const uint8_t P9N2_EX_DBG_CBS_CC_PCB_ERROR                                 = 24  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_PARITY_ERROR                              = 25  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_ERROR                                     = 26  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_CHIPLET_IS_ALIGNED                        = 27  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_PCB_REQUEST_SINCE_RESET                   = 28  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_PARANOIA_TEST_ENABLE_CHANGE               = 29  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_PARANOIA_VITL_CLKOFF_CHANGE               = 30  ;
static const uint8_t P9N2_EX_DBG_CBS_CC_TP_TPFSI_ACK                              = 31  ;

static const uint8_t P9N2_C_DBG_CBS_CC_RESET_EP                                   = 0   ;
static const uint8_t P9N2_C_DBG_CBS_CC_OPCG_IP                                    = 1   ;
static const uint8_t P9N2_C_DBG_CBS_CC_VITL_CLKOFF                                = 2   ;
static const uint8_t P9N2_C_DBG_CBS_CC_TEST_ENABLE                                = 3   ;
static const uint8_t P9N2_C_DBG_CBS_CC_REQ                                        = 4   ;
static const uint8_t P9N2_C_DBG_CBS_CC_CMD                                        = 5   ;
static const uint8_t P9N2_C_DBG_CBS_CC_CMD_LEN                                    = 3   ;
static const uint8_t P9N2_C_DBG_CBS_CC_STATE                                      = 8   ;
static const uint8_t P9N2_C_DBG_CBS_CC_STATE_LEN                                  = 5   ;
static const uint8_t P9N2_C_DBG_CBS_CC_SECURITY_DEBUG_MODE                        = 13  ;
static const uint8_t P9N2_C_DBG_CBS_CC_PROTOCOL_ERROR                             = 14  ;
static const uint8_t P9N2_C_DBG_CBS_CC_PCB_IDLE                                   = 15  ;
static const uint8_t P9N2_C_DBG_CBS_CC_CURRENT_OPCG_MODE                          = 16  ;
static const uint8_t P9N2_C_DBG_CBS_CC_CURRENT_OPCG_MODE_LEN                      = 4   ;
static const uint8_t P9N2_C_DBG_CBS_CC_LAST_OPCG_MODE                             = 20  ;
static const uint8_t P9N2_C_DBG_CBS_CC_LAST_OPCG_MODE_LEN                         = 4   ;
static const uint8_t P9N2_C_DBG_CBS_CC_PCB_ERROR                                  = 24  ;
static const uint8_t P9N2_C_DBG_CBS_CC_PARITY_ERROR                               = 25  ;
static const uint8_t P9N2_C_DBG_CBS_CC_ERROR                                      = 26  ;
static const uint8_t P9N2_C_DBG_CBS_CC_CHIPLET_IS_ALIGNED                         = 27  ;
static const uint8_t P9N2_C_DBG_CBS_CC_PCB_REQUEST_SINCE_RESET                    = 28  ;
static const uint8_t P9N2_C_DBG_CBS_CC_PARANOIA_TEST_ENABLE_CHANGE                = 29  ;
static const uint8_t P9N2_C_DBG_CBS_CC_PARANOIA_VITL_CLKOFF_CHANGE                = 30  ;
static const uint8_t P9N2_C_DBG_CBS_CC_TP_TPFSI_ACK                               = 31  ;

static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_COND1_SEL_A                     = 0   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_COND1_SEL_A_LEN                 = 8   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_COND1_SEL_B                     = 8   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_COND1_SEL_B_LEN                 = 8   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_COND2_SEL_A                     = 16  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_COND2_SEL_A_LEN                 = 8   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_COND2_SEL_B                     = 24  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_COND2_SEL_B_LEN                 = 8   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_C1_INAROW_MODE                  = 32  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE1               = 33  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE1               = 34  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE1              = 35  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_UNUSED                          = 36  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_UNUSED_LEN                      = 3   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_C2_INAROW_MODE                  = 39  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE2               = 40  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE2               = 41  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE2              = 42  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_UNUSED_2                        = 43  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_UNUSED_2_LEN                    = 3   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_COND3_ENABLE_RESET              = 46  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_EXACT_TO_MODE                   = 47  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_RESET_C2TIMER_ON_C1             = 48  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_RESET_C3_ON_C0                  = 49  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_SLOW_TO_MODE                    = 50  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_EXACT_RESET_C3_ON_TO            = 51  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_C1_COUNT_LT                     = 52  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_C1_COUNT_LT_LEN                 = 4   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_C2_COUNT_LT                     = 56  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_C2_COUNT_LT_LEN                 = 4   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_RESET_C3_SELECT                 = 60  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_1_RESET_C3_SELECT_LEN             = 3   ;

static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_COND1_SEL_A                     = 0   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_COND1_SEL_A_LEN                 = 8   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_COND1_SEL_B                     = 8   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_COND1_SEL_B_LEN                 = 8   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_COND2_SEL_A                     = 16  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_COND2_SEL_A_LEN                 = 8   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_COND2_SEL_B                     = 24  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_COND2_SEL_B_LEN                 = 8   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_C1_INAROW_MODE                  = 32  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE1               = 33  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE1               = 34  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE1              = 35  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_UNUSED                          = 36  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_UNUSED_LEN                      = 3   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_C2_INAROW_MODE                  = 39  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE2               = 40  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE2               = 41  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE2              = 42  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_UNUSED_2                        = 43  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_UNUSED_2_LEN                    = 3   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_COND3_ENABLE_RESET              = 46  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_EXACT_TO_MODE                   = 47  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_RESET_C2TIMER_ON_C1             = 48  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_RESET_C3_ON_C0                  = 49  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_SLOW_TO_MODE                    = 50  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_EXACT_RESET_C3_ON_TO            = 51  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_C1_COUNT_LT                     = 52  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_C1_COUNT_LT_LEN                 = 4   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_C2_COUNT_LT                     = 56  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_C2_COUNT_LT_LEN                 = 4   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_RESET_C3_SELECT                 = 60  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_1_RESET_C3_SELECT_LEN             = 3   ;

static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_COND1_SEL_A                      = 0   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_COND1_SEL_A_LEN                  = 8   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_COND1_SEL_B                      = 8   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_COND1_SEL_B_LEN                  = 8   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_COND2_SEL_A                      = 16  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_COND2_SEL_A_LEN                  = 8   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_COND2_SEL_B                      = 24  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_COND2_SEL_B_LEN                  = 8   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_C1_INAROW_MODE                   = 32  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE1                = 33  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE1                = 34  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE1               = 35  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_UNUSED                           = 36  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_UNUSED_LEN                       = 3   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_C2_INAROW_MODE                   = 39  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_AND_TRIGGER_MODE2                = 40  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_NOT_TRIGGER_MODE2                = 41  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_EDGE_TRIGGER_MODE2               = 42  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_UNUSED_2                         = 43  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_UNUSED_2_LEN                     = 3   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_COND3_ENABLE_RESET               = 46  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_EXACT_TO_MODE                    = 47  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_RESET_C2TIMER_ON_C1              = 48  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_RESET_C3_ON_C0                   = 49  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_SLOW_TO_MODE                     = 50  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_EXACT_RESET_C3_ON_TO             = 51  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_C1_COUNT_LT                      = 52  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_C1_COUNT_LT_LEN                  = 4   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_C2_COUNT_LT                      = 56  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_C2_COUNT_LT_LEN                  = 4   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_RESET_C3_SELECT                  = 60  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_1_RESET_C3_SELECT_LEN              = 3   ;

static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_A         = 0   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_A_LEN     = 5   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B         = 5   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN     = 5   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_A           = 10  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_A_LEN       = 5   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_B           = 15  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_B_LEN       = 5   ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_TO_CMP_LT                       = 20  ;
static const uint8_t P9N2_EQ_DBG_INST1_COND_REG_2_TO_CMP_LT_LEN                   = 24  ;

static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_A         = 0   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_A_LEN     = 5   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B         = 5   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN     = 5   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_A           = 10  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_A_LEN       = 5   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_B           = 15  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_B_LEN       = 5   ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_TO_CMP_LT                       = 20  ;
static const uint8_t P9N2_EX_DBG_INST1_COND_REG_2_TO_CMP_LT_LEN                   = 24  ;

static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_A          = 0   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_A_LEN      = 5   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B          = 5   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN      = 5   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_A            = 10  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_A_LEN        = 5   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_B            = 15  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_CROSS_COUPLE_SELECT_B_LEN        = 5   ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_TO_CMP_LT                        = 20  ;
static const uint8_t P9N2_C_DBG_INST1_COND_REG_2_TO_CMP_LT_LEN                    = 24  ;

static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_COND1_SEL_A                     = 0   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_COND1_SEL_A_LEN                 = 8   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_COND1_SEL_B                     = 8   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_COND1_SEL_B_LEN                 = 8   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_COND2_SEL_A                     = 16  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_COND2_SEL_A_LEN                 = 8   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_COND2_SEL_B                     = 24  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_COND2_SEL_B_LEN                 = 8   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_C1_INAROW_MODE                  = 32  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE1               = 33  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE1               = 34  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE1              = 35  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_UNUSED                          = 36  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_UNUSED_LEN                      = 3   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_C2_INAROW_MODE                  = 39  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE2               = 40  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE2               = 41  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE2              = 42  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_UNUSED_2                        = 43  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_UNUSED_2_LEN                    = 3   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_COND3_ENABLE_RESET              = 46  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_EXACT_TO_MODE                   = 47  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_RESET_C2TIMER_ON_C1             = 48  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_RESET_C3_ON_C0                  = 49  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_SLOW_TO_MODE                    = 50  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_EXACT_RESET_C3_ON_TO            = 51  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_C1_COUNT_LT                     = 52  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_C1_COUNT_LT_LEN                 = 4   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_C2_COUNT_LT                     = 56  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_C2_COUNT_LT_LEN                 = 4   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_RESET_C3_SELECT                 = 60  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_1_RESET_C3_SELECT_LEN             = 3   ;

static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_COND1_SEL_A                     = 0   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_COND1_SEL_A_LEN                 = 8   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_COND1_SEL_B                     = 8   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_COND1_SEL_B_LEN                 = 8   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_COND2_SEL_A                     = 16  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_COND2_SEL_A_LEN                 = 8   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_COND2_SEL_B                     = 24  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_COND2_SEL_B_LEN                 = 8   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_C1_INAROW_MODE                  = 32  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE1               = 33  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE1               = 34  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE1              = 35  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_UNUSED                          = 36  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_UNUSED_LEN                      = 3   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_C2_INAROW_MODE                  = 39  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE2               = 40  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE2               = 41  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE2              = 42  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_UNUSED_2                        = 43  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_UNUSED_2_LEN                    = 3   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_COND3_ENABLE_RESET              = 46  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_EXACT_TO_MODE                   = 47  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_RESET_C2TIMER_ON_C1             = 48  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_RESET_C3_ON_C0                  = 49  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_SLOW_TO_MODE                    = 50  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_EXACT_RESET_C3_ON_TO            = 51  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_C1_COUNT_LT                     = 52  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_C1_COUNT_LT_LEN                 = 4   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_C2_COUNT_LT                     = 56  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_C2_COUNT_LT_LEN                 = 4   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_RESET_C3_SELECT                 = 60  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_1_RESET_C3_SELECT_LEN             = 3   ;

static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_COND1_SEL_A                      = 0   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_COND1_SEL_A_LEN                  = 8   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_COND1_SEL_B                      = 8   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_COND1_SEL_B_LEN                  = 8   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_COND2_SEL_A                      = 16  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_COND2_SEL_A_LEN                  = 8   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_COND2_SEL_B                      = 24  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_COND2_SEL_B_LEN                  = 8   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_C1_INAROW_MODE                   = 32  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE1                = 33  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE1                = 34  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE1               = 35  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_UNUSED                           = 36  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_UNUSED_LEN                       = 3   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_C2_INAROW_MODE                   = 39  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_AND_TRIGGER_MODE2                = 40  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_NOT_TRIGGER_MODE2                = 41  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_EDGE_TRIGGER_MODE2               = 42  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_UNUSED_2                         = 43  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_UNUSED_2_LEN                     = 3   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_COND3_ENABLE_RESET               = 46  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_EXACT_TO_MODE                    = 47  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_RESET_C2TIMER_ON_C1              = 48  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_RESET_C3_ON_C0                   = 49  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_SLOW_TO_MODE                     = 50  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_EXACT_RESET_C3_ON_TO             = 51  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_C1_COUNT_LT                      = 52  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_C1_COUNT_LT_LEN                  = 4   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_C2_COUNT_LT                      = 56  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_C2_COUNT_LT_LEN                  = 4   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_RESET_C3_SELECT                  = 60  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_1_RESET_C3_SELECT_LEN              = 3   ;

static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_A         = 0   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_A_LEN     = 5   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B         = 5   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN     = 5   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_A           = 10  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_A_LEN       = 5   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_B           = 15  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_B_LEN       = 5   ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_TO_CMP_LT                       = 20  ;
static const uint8_t P9N2_EQ_DBG_INST2_COND_REG_2_TO_CMP_LT_LEN                   = 24  ;

static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_A         = 0   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_A_LEN     = 5   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B         = 5   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN     = 5   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_A           = 10  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_A_LEN       = 5   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_B           = 15  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_B_LEN       = 5   ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_TO_CMP_LT                       = 20  ;
static const uint8_t P9N2_EX_DBG_INST2_COND_REG_2_TO_CMP_LT_LEN                   = 24  ;

static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_A          = 0   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_A_LEN      = 5   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B          = 5   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_1_B_LEN      = 5   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_A            = 10  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_A_LEN        = 5   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_B            = 15  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_CROSS_COUPLE_SELECT_B_LEN        = 5   ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_TO_CMP_LT                        = 20  ;
static const uint8_t P9N2_C_DBG_INST2_COND_REG_2_TO_CMP_LT_LEN                    = 24  ;

static const uint8_t P9N2_EQ_DBG_MODE_REG_GLB_BRCST                               = 0   ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_GLB_BRCST_LEN                           = 3   ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_TRACE_SEL                               = 3   ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_TRACE_SEL_LEN                           = 3   ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_TRIG_SEL                                = 6   ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_TRIG_SEL_LEN                            = 2   ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_STOP_ON_XSTOP_SELECTION                 = 8   ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_STOP_ON_RECOV_ERR_SELECTION             = 9   ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_STOP_ON_SPATTN_SELECTION                = 10  ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_FREEZE_SEL                              = 11  ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_SYNC_BRCST                              = 12  ;
static const uint8_t P9N2_EQ_DBG_MODE_REG_SYNC_BRCST_LEN                          = 2   ;

static const uint8_t P9N2_EX_DBG_MODE_REG_GLB_BRCST                               = 0   ;
static const uint8_t P9N2_EX_DBG_MODE_REG_GLB_BRCST_LEN                           = 3   ;
static const uint8_t P9N2_EX_DBG_MODE_REG_TRACE_SEL                               = 3   ;
static const uint8_t P9N2_EX_DBG_MODE_REG_TRACE_SEL_LEN                           = 3   ;
static const uint8_t P9N2_EX_DBG_MODE_REG_TRIG_SEL                                = 6   ;
static const uint8_t P9N2_EX_DBG_MODE_REG_TRIG_SEL_LEN                            = 2   ;
static const uint8_t P9N2_EX_DBG_MODE_REG_STOP_ON_XSTOP_SELECTION                 = 8   ;
static const uint8_t P9N2_EX_DBG_MODE_REG_STOP_ON_RECOV_ERR_SELECTION             = 9   ;
static const uint8_t P9N2_EX_DBG_MODE_REG_STOP_ON_SPATTN_SELECTION                = 10  ;
static const uint8_t P9N2_EX_DBG_MODE_REG_FREEZE_SEL                              = 11  ;
static const uint8_t P9N2_EX_DBG_MODE_REG_SYNC_BRCST                              = 12  ;
static const uint8_t P9N2_EX_DBG_MODE_REG_SYNC_BRCST_LEN                          = 2   ;

static const uint8_t P9N2_C_DBG_MODE_REG_GLB_BRCST                                = 0   ;
static const uint8_t P9N2_C_DBG_MODE_REG_GLB_BRCST_LEN                            = 3   ;
static const uint8_t P9N2_C_DBG_MODE_REG_TRACE_SEL                                = 3   ;
static const uint8_t P9N2_C_DBG_MODE_REG_TRACE_SEL_LEN                            = 3   ;
static const uint8_t P9N2_C_DBG_MODE_REG_TRIG_SEL                                 = 6   ;
static const uint8_t P9N2_C_DBG_MODE_REG_TRIG_SEL_LEN                             = 2   ;
static const uint8_t P9N2_C_DBG_MODE_REG_STOP_ON_XSTOP_SELECTION                  = 8   ;
static const uint8_t P9N2_C_DBG_MODE_REG_STOP_ON_RECOV_ERR_SELECTION              = 9   ;
static const uint8_t P9N2_C_DBG_MODE_REG_STOP_ON_SPATTN_SELECTION                 = 10  ;
static const uint8_t P9N2_C_DBG_MODE_REG_FREEZE_SEL                               = 11  ;
static const uint8_t P9N2_C_DBG_MODE_REG_SYNC_BRCST                               = 12  ;
static const uint8_t P9N2_C_DBG_MODE_REG_SYNC_BRCST_LEN                           = 2   ;

static const uint8_t P9N2_EQ_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE        = 0   ;
static const uint8_t P9N2_EQ_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE_LEN    = 16  ;
static const uint8_t P9N2_EQ_DBG_TRACE_MODE_REG_2_IMM_FREEZE                      = 16  ;
static const uint8_t P9N2_EQ_DBG_TRACE_MODE_REG_2_STOP_ON_ERR                     = 17  ;
static const uint8_t P9N2_EQ_DBG_TRACE_MODE_REG_2_BANK_ON_RUNN_MATCH              = 18  ;
static const uint8_t P9N2_EQ_DBG_TRACE_MODE_REG_2_FORCE_TEST                      = 19  ;
static const uint8_t P9N2_EQ_DBG_TRACE_MODE_REG_2_ACCUM_HIST                      = 20  ;
static const uint8_t P9N2_EQ_DBG_TRACE_MODE_REG_2_FRZ_COUNT_ON_FRZ                = 21  ;

static const uint8_t P9N2_EX_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE        = 0   ;
static const uint8_t P9N2_EX_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE_LEN    = 16  ;
static const uint8_t P9N2_EX_DBG_TRACE_MODE_REG_2_IMM_FREEZE                      = 16  ;
static const uint8_t P9N2_EX_DBG_TRACE_MODE_REG_2_STOP_ON_ERR                     = 17  ;
static const uint8_t P9N2_EX_DBG_TRACE_MODE_REG_2_BANK_ON_RUNN_MATCH              = 18  ;
static const uint8_t P9N2_EX_DBG_TRACE_MODE_REG_2_FORCE_TEST                      = 19  ;
static const uint8_t P9N2_EX_DBG_TRACE_MODE_REG_2_ACCUM_HIST                      = 20  ;
static const uint8_t P9N2_EX_DBG_TRACE_MODE_REG_2_FRZ_COUNT_ON_FRZ                = 21  ;

static const uint8_t P9N2_C_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE         = 0   ;
static const uint8_t P9N2_C_DBG_TRACE_MODE_REG_2_RUNN_COUNT_COMPARE_VALUE_LEN     = 16  ;
static const uint8_t P9N2_C_DBG_TRACE_MODE_REG_2_IMM_FREEZE                       = 16  ;
static const uint8_t P9N2_C_DBG_TRACE_MODE_REG_2_STOP_ON_ERR                      = 17  ;
static const uint8_t P9N2_C_DBG_TRACE_MODE_REG_2_BANK_ON_RUNN_MATCH               = 18  ;
static const uint8_t P9N2_C_DBG_TRACE_MODE_REG_2_FORCE_TEST                       = 19  ;
static const uint8_t P9N2_C_DBG_TRACE_MODE_REG_2_ACCUM_HIST                       = 20  ;
static const uint8_t P9N2_C_DBG_TRACE_MODE_REG_2_FRZ_COUNT_ON_FRZ                 = 21  ;

static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST1_COND3_ENABLE                   = 0   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST2_COND3_ENABLE                   = 1   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST3_COND3_ENABLE                   = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST4_COND3_ENABLE                   = 3   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST1_SLOW_LFSR_MODE                 = 4   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST2_SLOW_LFSR_MODE                 = 5   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST3_SLOW_LFSR_MODE                 = 6   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST4_SLOW_LFSR_MODE                 = 7   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL            = 8   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL            = 10  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL            = 12  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL            = 14  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL            = 16  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL            = 18  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_EXT_TRIG_ON_STOP                     = 32  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_EXT_TRIG_ON_FREEZE                   = 33  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL                   = 34  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL_LEN               = 5   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL                   = 39  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL_LEN               = 5   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_PC_TP_TRIG_SEL                       = 44  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_PC_TP_TRIG_SEL_LEN                   = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_ARM_SEL                              = 46  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_ARM_SEL_LEN                          = 4   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL                      = 50  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL_LEN                  = 4   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL                      = 54  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL_LEN                  = 4   ;

static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST1_COND3_ENABLE                   = 0   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST2_COND3_ENABLE                   = 1   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST3_COND3_ENABLE                   = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST4_COND3_ENABLE                   = 3   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST1_SLOW_LFSR_MODE                 = 4   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST2_SLOW_LFSR_MODE                 = 5   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST3_SLOW_LFSR_MODE                 = 6   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST4_SLOW_LFSR_MODE                 = 7   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL            = 8   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL            = 10  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL            = 12  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL            = 14  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL            = 16  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL            = 18  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL_LEN        = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_EXT_TRIG_ON_STOP                     = 32  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_EXT_TRIG_ON_FREEZE                   = 33  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL                   = 34  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL_LEN               = 5   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL                   = 39  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL_LEN               = 5   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_PC_TP_TRIG_SEL                       = 44  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_PC_TP_TRIG_SEL_LEN                   = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_ARM_SEL                              = 46  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_ARM_SEL_LEN                          = 4   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL                      = 50  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL_LEN                  = 4   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL                      = 54  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL_LEN                  = 4   ;

static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST1_COND3_ENABLE                    = 0   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST2_COND3_ENABLE                    = 1   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST3_COND3_ENABLE                    = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST4_COND3_ENABLE                    = 3   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST1_SLOW_LFSR_MODE                  = 4   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST2_SLOW_LFSR_MODE                  = 5   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST3_SLOW_LFSR_MODE                  = 6   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST4_SLOW_LFSR_MODE                  = 7   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL             = 8   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST1_CONDITION1_TRIG_SEL_LEN         = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL             = 10  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST1_CONDITION2_TRIG_SEL_LEN         = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL             = 12  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST1_C2_TIMEOUT_TRIG_SEL_LEN         = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL             = 14  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST2_CONDITION1_TRIG_SEL_LEN         = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL             = 16  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST2_CONDITION2_TRIG_SEL_LEN         = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL             = 18  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_INST2_C2_TIMEOUT_TRIG_SEL_LEN         = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_EXT_TRIG_ON_STOP                      = 32  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_EXT_TRIG_ON_FREEZE                    = 33  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL                    = 34  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_CORE_RAS0_TRIG_SEL_LEN                = 5   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL                    = 39  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_CORE_RAS1_TRIG_SEL_LEN                = 5   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_PC_TP_TRIG_SEL                        = 44  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_PC_TP_TRIG_SEL_LEN                    = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_ARM_SEL                               = 46  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_ARM_SEL_LEN                           = 4   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL                       = 50  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_TRIG0_LEVEL_SEL_LEN                   = 4   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL                       = 54  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_0_TRIG1_LEVEL_SEL_LEN                   = 4   ;

static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO           = 0   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO           = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO           = 4   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO           = 6   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO           = 8   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO           = 10  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_WAITN        = 24  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_WAITN        = 25  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_WAITN        = 26  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_WAITN        = 27  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_WAITN        = 28  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_WAITN        = 29  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_BANK         = 36  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_BANK         = 37  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_BANK         = 38  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_BANK         = 39  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_BANK         = 40  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_BANK         = 41  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT              = 48  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT_LEN          = 3   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_SELECTOR        = 51  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT              = 52  ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT_LEN          = 3   ;
static const uint8_t P9N2_EQ_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_SELECTOR        = 55  ;

static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO           = 0   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO           = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO           = 4   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO           = 6   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO           = 8   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO           = 10  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO_LEN       = 2   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_WAITN        = 24  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_WAITN        = 25  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_WAITN        = 26  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_WAITN        = 27  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_WAITN        = 28  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_WAITN        = 29  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_BANK         = 36  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_BANK         = 37  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_BANK         = 38  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_BANK         = 39  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_BANK         = 40  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_BANK         = 41  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT              = 48  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT_LEN          = 3   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_SELECTOR        = 51  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT              = 52  ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT_LEN          = 3   ;
static const uint8_t P9N2_EX_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_SELECTOR        = 55  ;

static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO            = 0   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_DO_LEN        = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO            = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_DO_LEN        = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO            = 4   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_DO_LEN        = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO            = 6   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_DO_LEN        = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO            = 8   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_DO_LEN        = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO            = 10  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_DO_LEN        = 2   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_WAITN         = 24  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_WAITN         = 25  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_WAITN         = 26  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_WAITN         = 27  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_WAITN         = 28  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_WAITN         = 29  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CONDITION1_ACTION_BANK          = 36  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CONDITION2_ACTION_BANK          = 37  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_C2_TIMEOUT_ACTION_BANK          = 38  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CONDITION1_ACTION_BANK          = 39  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CONDITION2_ACTION_BANK          = 40  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_C2_TIMEOUT_ACTION_BANK          = 41  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT               = 48  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_LT_LEN           = 3   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST1_CHECKSTOP_MODE_SELECTOR         = 51  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT               = 52  ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_LT_LEN           = 3   ;
static const uint8_t P9N2_C_DBG_TRACE_REG_1_INST2_CHECKSTOP_MODE_SELECTOR         = 55  ;

static const uint8_t P9N2_EQ_DEBUG_TRACE_CONTROL_SCOM_TRACE_START                 = 0   ;
static const uint8_t P9N2_EQ_DEBUG_TRACE_CONTROL_SCOM_TRACE_STOP                  = 1   ;
static const uint8_t P9N2_EQ_DEBUG_TRACE_CONTROL_SCOM_TRACE_RESET                 = 2   ;

static const uint8_t P9N2_EX_DEBUG_TRACE_CONTROL_SCOM_TRACE_START                 = 0   ;
static const uint8_t P9N2_EX_DEBUG_TRACE_CONTROL_SCOM_TRACE_STOP                  = 1   ;
static const uint8_t P9N2_EX_DEBUG_TRACE_CONTROL_SCOM_TRACE_RESET                 = 2   ;

static const uint8_t P9N2_C_DEBUG_TRACE_CONTROL_SCOM_TRACE_START                  = 0   ;
static const uint8_t P9N2_C_DEBUG_TRACE_CONTROL_SCOM_TRACE_STOP                   = 1   ;
static const uint8_t P9N2_C_DEBUG_TRACE_CONTROL_SCOM_TRACE_RESET                  = 2   ;

static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T0_CLEAR_MAINT                 = 3   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T0_SRESET_REQUEST              = 4   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T0_CORE_STEP                   = 5   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T0_CORE_START                  = 6   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T0_CORE_STOP                   = 7   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T1_CLEAR_MAINT                 = 11  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T1_SRESET_REQUEST              = 12  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T1_CORE_STEP                   = 13  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T1_CORE_START                  = 14  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T1_CORE_STOP                   = 15  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T2_CLEAR_MAINT                 = 19  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T2_SRESET_REQUEST              = 20  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T2_CORE_STEP                   = 21  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T2_CORE_START                  = 22  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T2_CORE_STOP                   = 23  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T3_CLEAR_MAINT                 = 27  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T3_SRESET_REQUEST              = 28  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T3_CORE_STEP                   = 29  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T3_CORE_START                  = 30  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_DC_T3_CORE_STOP                   = 31  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_WRITE_T0_PM_STATE                 = 32  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T0_PLS                      = 33  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T0_PLS_LEN                  = 4   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T0_SRR1                     = 37  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T0_SRR1_LEN                 = 3   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_WRITE_T1_PM_STATE                 = 40  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T1_PLS                      = 41  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T1_PLS_LEN                  = 4   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T1_SRR1                     = 45  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T1_SRR1_LEN                 = 3   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_WRITE_T2_PM_STATE                 = 48  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T2_PLS                      = 49  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T2_PLS_LEN                  = 4   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T2_SRR1                     = 53  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T2_SRR1_LEN                 = 3   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_WRITE_T3_PM_STATE                 = 56  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T3_PLS                      = 57  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T3_PLS_LEN                  = 4   ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T3_SRR1                     = 61  ;
static const uint8_t P9N2_EX_L2_DIRECT_CONTROLS_PSSCR_T3_SRR1_LEN                 = 3   ;

static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T0_CLEAR_MAINT                     = 3   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T0_SRESET_REQUEST                  = 4   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T0_CORE_STEP                       = 5   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T0_CORE_START                      = 6   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T0_CORE_STOP                       = 7   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T1_CLEAR_MAINT                     = 11  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T1_SRESET_REQUEST                  = 12  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T1_CORE_STEP                       = 13  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T1_CORE_START                      = 14  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T1_CORE_STOP                       = 15  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T2_CLEAR_MAINT                     = 19  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T2_SRESET_REQUEST                  = 20  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T2_CORE_STEP                       = 21  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T2_CORE_START                      = 22  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T2_CORE_STOP                       = 23  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T3_CLEAR_MAINT                     = 27  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T3_SRESET_REQUEST                  = 28  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T3_CORE_STEP                       = 29  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T3_CORE_START                      = 30  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_DC_T3_CORE_STOP                       = 31  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_WRITE_T0_PM_STATE                     = 32  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T0_PLS                          = 33  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T0_PLS_LEN                      = 4   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T0_SRR1                         = 37  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T0_SRR1_LEN                     = 3   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_WRITE_T1_PM_STATE                     = 40  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T1_PLS                          = 41  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T1_PLS_LEN                      = 4   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T1_SRR1                         = 45  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T1_SRR1_LEN                     = 3   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_WRITE_T2_PM_STATE                     = 48  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T2_PLS                          = 49  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T2_PLS_LEN                      = 4   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T2_SRR1                         = 53  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T2_SRR1_LEN                     = 3   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_WRITE_T3_PM_STATE                     = 56  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T3_PLS                          = 57  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T3_PLS_LEN                      = 4   ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T3_SRR1                         = 61  ;
static const uint8_t P9N2_C_DIRECT_CONTROLS_PSSCR_T3_SRR1_LEN                     = 3   ;

static const uint8_t P9N2_EQ_DRAM_REF_REG_L3_TIMER_DIVIDE_MAJOR                   = 0   ;
static const uint8_t P9N2_EQ_DRAM_REF_REG_L3_TIMER_DIVIDE_MAJOR_LEN               = 4   ;
static const uint8_t P9N2_EQ_DRAM_REF_REG_L3_SCOM_INIT                            = 4   ;
static const uint8_t P9N2_EQ_DRAM_REF_REG_L3_SCOM_QUIESCE_CACHE                   = 5   ;
static const uint8_t P9N2_EQ_DRAM_REF_REG_L3_SCOM_QUIESCE_CACHE_LFSR              = 6   ;
static const uint8_t P9N2_EQ_DRAM_REF_REG_L3_SCOM_QUIESCE_REFRESH                 = 7   ;
static const uint8_t P9N2_EQ_DRAM_REF_REG_L3_TIMER_DIVIDE_MINOR                   = 8   ;
static const uint8_t P9N2_EQ_DRAM_REF_REG_L3_TIMER_DIVIDE_MINOR_LEN               = 4   ;

static const uint8_t P9N2_EX_DRAM_REF_REG_L3_TIMER_DIVIDE_MAJOR                   = 0   ;
static const uint8_t P9N2_EX_DRAM_REF_REG_L3_TIMER_DIVIDE_MAJOR_LEN               = 4   ;
static const uint8_t P9N2_EX_DRAM_REF_REG_L3_SCOM_INIT                            = 4   ;
static const uint8_t P9N2_EX_DRAM_REF_REG_L3_SCOM_QUIESCE_CACHE                   = 5   ;
static const uint8_t P9N2_EX_DRAM_REF_REG_L3_SCOM_QUIESCE_CACHE_LFSR              = 6   ;
static const uint8_t P9N2_EX_DRAM_REF_REG_L3_SCOM_QUIESCE_REFRESH                 = 7   ;
static const uint8_t P9N2_EX_DRAM_REF_REG_L3_TIMER_DIVIDE_MINOR                   = 8   ;
static const uint8_t P9N2_EX_DRAM_REF_REG_L3_TIMER_DIVIDE_MINOR_LEN               = 4   ;

static const uint8_t P9N2_EQ_DTS_RESULT0_0_RESULT                                 = 0   ;
static const uint8_t P9N2_EQ_DTS_RESULT0_0_RESULT_LEN                             = 16  ;
static const uint8_t P9N2_EQ_DTS_RESULT0_1_RESULT                                 = 16  ;
static const uint8_t P9N2_EQ_DTS_RESULT0_1_RESULT_LEN                             = 16  ;

static const uint8_t P9N2_EX_DTS_RESULT0_0_RESULT                                 = 0   ;
static const uint8_t P9N2_EX_DTS_RESULT0_0_RESULT_LEN                             = 16  ;
static const uint8_t P9N2_EX_DTS_RESULT0_1_RESULT                                 = 16  ;
static const uint8_t P9N2_EX_DTS_RESULT0_1_RESULT_LEN                             = 16  ;

static const uint8_t P9N2_C_DTS_RESULT0_0_RESULT                                  = 0   ;
static const uint8_t P9N2_C_DTS_RESULT0_0_RESULT_LEN                              = 16  ;
static const uint8_t P9N2_C_DTS_RESULT0_1_RESULT                                  = 16  ;
static const uint8_t P9N2_C_DTS_RESULT0_1_RESULT_LEN                              = 16  ;

static const uint8_t P9N2_EQ_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE               = 0   ;
static const uint8_t P9N2_EQ_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE_LEN           = 44  ;
static const uint8_t P9N2_EQ_DTS_TRC_RESULT_TIMESTAMP_COUNTER_OVERFLOW_ERR        = 44  ;
static const uint8_t P9N2_EQ_DTS_TRC_RESULT_1                                     = 48  ;
static const uint8_t P9N2_EQ_DTS_TRC_RESULT_1_LEN                                 = 16  ;

static const uint8_t P9N2_EX_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE               = 0   ;
static const uint8_t P9N2_EX_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE_LEN           = 44  ;
static const uint8_t P9N2_EX_DTS_TRC_RESULT_TIMESTAMP_COUNTER_OVERFLOW_ERR        = 44  ;
static const uint8_t P9N2_EX_DTS_TRC_RESULT_1                                     = 48  ;
static const uint8_t P9N2_EX_DTS_TRC_RESULT_1_LEN                                 = 16  ;

static const uint8_t P9N2_C_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE                = 0   ;
static const uint8_t P9N2_C_DTS_TRC_RESULT_TIMESTAMP_COUNTER_VALUE_LEN            = 44  ;
static const uint8_t P9N2_C_DTS_TRC_RESULT_TIMESTAMP_COUNTER_OVERFLOW_ERR         = 44  ;
static const uint8_t P9N2_C_DTS_TRC_RESULT_1                                      = 48  ;
static const uint8_t P9N2_C_DTS_TRC_RESULT_1_LEN                                  = 16  ;

static const uint8_t P9N2_EQ_EDRAM_BANK_FAIL_SCOM_RD_L3                           = 0   ;
static const uint8_t P9N2_EQ_EDRAM_BANK_FAIL_SCOM_RD_L3_LEN                       = 3   ;

static const uint8_t P9N2_EX_L3_EDRAM_BANK_FAIL_SCOM_RD_L3                        = 0   ;
static const uint8_t P9N2_EX_L3_EDRAM_BANK_FAIL_SCOM_RD_L3_LEN                    = 3   ;

static const uint8_t P9N2_EQ_EDRAM_BANK_SOFT_DIS_L3_CFG                           = 0   ;
static const uint8_t P9N2_EQ_EDRAM_BANK_SOFT_DIS_L3_CFG_LEN                       = 10  ;

static const uint8_t P9N2_EX_L3_EDRAM_BANK_SOFT_DIS_L3_CFG                        = 0   ;
static const uint8_t P9N2_EX_L3_EDRAM_BANK_SOFT_DIS_L3_CFG_LEN                    = 10  ;

static const uint8_t P9N2_EQ_EDRAM_REG_L3_CP_UTIL_EN_DC                           = 0   ;
static const uint8_t P9N2_EQ_EDRAM_REG_L3_CP_UTIL_SEL_DC                          = 1   ;
static const uint8_t P9N2_EQ_EDRAM_REG_L3_CP_UTIL_SEL_DC_LEN                      = 2   ;
static const uint8_t P9N2_EQ_EDRAM_REG_L3_SPARE3                                  = 3   ;
static const uint8_t P9N2_EQ_EDRAM_REG_L3_CP_UTIL_EXT_SEL                         = 4   ;
static const uint8_t P9N2_EQ_EDRAM_REG_L3_CP_UTIL_EXT_SEL_LEN                     = 3   ;
static const uint8_t P9N2_EQ_EDRAM_REG_L3_UTIL_MON_BITS                           = 7   ;
static const uint8_t P9N2_EQ_EDRAM_REG_L3_UTIL_MON_BITS_LEN                       = 6   ;

static const uint8_t P9N2_EX_L3_EDRAM_REG_L3_CP_UTIL_EN_DC                        = 0   ;
static const uint8_t P9N2_EX_L3_EDRAM_REG_L3_CP_UTIL_SEL_DC                       = 1   ;
static const uint8_t P9N2_EX_L3_EDRAM_REG_L3_CP_UTIL_SEL_DC_LEN                   = 2   ;
static const uint8_t P9N2_EX_L3_EDRAM_REG_L3_SPARE3                               = 3   ;
static const uint8_t P9N2_EX_L3_EDRAM_REG_L3_CP_UTIL_EXT_SEL                      = 4   ;
static const uint8_t P9N2_EX_L3_EDRAM_REG_L3_CP_UTIL_EXT_SEL_LEN                  = 3   ;
static const uint8_t P9N2_EX_L3_EDRAM_REG_L3_UTIL_MON_BITS                        = 7   ;
static const uint8_t P9N2_EX_L3_EDRAM_REG_L3_UTIL_MON_BITS_LEN                    = 6   ;

static const uint8_t P9N2_EQ_EDRAM_STATUS_STAT                                    = 0   ;
static const uint8_t P9N2_EQ_EDRAM_STATUS_STAT_LEN                                = 4   ;

static const uint8_t P9N2_EX_EDRAM_STATUS_STAT                                    = 0   ;
static const uint8_t P9N2_EX_EDRAM_STATUS_STAT_LEN                                = 4   ;

static const uint8_t P9N2_C_EDRAM_STATUS_STAT                                     = 0   ;
static const uint8_t P9N2_C_EDRAM_STATUS_STAT_LEN                                 = 4   ;

static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_VAL                           = 0   ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_1ST_BEAT_UE                   = 1   ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_2ND_BEAT_UE                   = 2   ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_SPARE3                        = 3   ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_1ST_BEAT_SYNDROME             = 4   ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_1ST_BEAT_SYNDROME_LEN         = 8   ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_2ND_BEAT_SYNDROME             = 12  ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_2ND_BEAT_SYNDROME_LEN         = 8   ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_DW                            = 20  ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG0_L3_DW_LEN                        = 3   ;

static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_VAL                           = 0   ;
static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_1ST_BEAT_UE                   = 1   ;
static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_2ND_BEAT_UE                   = 2   ;
static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_SPARE3                        = 3   ;
static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_1ST_BEAT_SYNDROME             = 4   ;
static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_1ST_BEAT_SYNDROME_LEN         = 8   ;
static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_2ND_BEAT_SYNDROME             = 12  ;
static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_2ND_BEAT_SYNDROME_LEN         = 8   ;
static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_DW                            = 20  ;
static const uint8_t P9N2_EX_ED_RD_ERR_STAT_REG0_L3_DW_LEN                        = 3   ;

static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG1_L3_RA                            = 0   ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG1_L3_RA_LEN                        = 14  ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG1_L3_BANK                          = 14  ;
static const uint8_t P9N2_EQ_ED_RD_ERR_STAT_REG1_L3_BANK_LEN                      = 4   ;

static const uint8_t P9N2_EX_L3_ED_RD_ERR_STAT_REG1_L3_RA                         = 0   ;
static const uint8_t P9N2_EX_L3_ED_RD_ERR_STAT_REG1_L3_RA_LEN                     = 14  ;
static const uint8_t P9N2_EX_L3_ED_RD_ERR_STAT_REG1_L3_BANK                       = 14  ;
static const uint8_t P9N2_EX_L3_ED_RD_ERR_STAT_REG1_L3_BANK_LEN                   = 4   ;

static const uint8_t P9N2_EQ_ERROR_REG_CE                                         = 0   ;
static const uint8_t P9N2_EQ_ERROR_REG_CHIPLET_ERRORS                             = 1   ;
static const uint8_t P9N2_EQ_ERROR_REG_CHIPLET_ERRORS_LEN                         = 3   ;
static const uint8_t P9N2_EQ_ERROR_REG_PARITY                                     = 4   ;
static const uint8_t P9N2_EQ_ERROR_REG_DATA_BUFFER                                = 5   ;
static const uint8_t P9N2_EQ_ERROR_REG_ADDR_BUFFER                                = 6   ;
static const uint8_t P9N2_EQ_ERROR_REG_PCB_FSM                                    = 7   ;
static const uint8_t P9N2_EQ_ERROR_REG_CL_FSM                                     = 8   ;
static const uint8_t P9N2_EQ_ERROR_REG_INT_RX_FSM                                 = 9   ;
static const uint8_t P9N2_EQ_ERROR_REG_INT_TX_FSM                                 = 10  ;
static const uint8_t P9N2_EQ_ERROR_REG_INT_TYPE                                   = 11  ;
static const uint8_t P9N2_EQ_ERROR_REG_CL_DATA                                    = 12  ;
static const uint8_t P9N2_EQ_ERROR_REG_INFO                                       = 13  ;
static const uint8_t P9N2_EQ_ERROR_REG_UNUSED_0                                   = 14  ;
static const uint8_t P9N2_EQ_ERROR_REG_CHIPLET_ATOMIC_LOCK                        = 15  ;
static const uint8_t P9N2_EQ_ERROR_REG_PCB_INTERFACE                              = 16  ;
static const uint8_t P9N2_EQ_ERROR_REG_CHIPLET_OFFLINE                            = 17  ;
static const uint8_t P9N2_EQ_ERROR_REG_EDRAM_SEQUENCE_ERR                         = 18  ;
static const uint8_t P9N2_EQ_ERROR_REG_CTRL_PARITY                                = 19  ;
static const uint8_t P9N2_EQ_ERROR_REG_ADDRESS_PARITY                             = 20  ;
static const uint8_t P9N2_EQ_ERROR_REG_TIMEOUT_PARITY                             = 21  ;
static const uint8_t P9N2_EQ_ERROR_REG_CONFIG_PARITY                              = 22  ;
static const uint8_t P9N2_EQ_ERROR_REG_UNUSED_1                                   = 23  ;
static const uint8_t P9N2_EQ_ERROR_REG_DIV_PARITY                                 = 24  ;
static const uint8_t P9N2_EQ_ERROR_REG_PLL_UNLOCK                                 = 25  ;
static const uint8_t P9N2_EQ_ERROR_REG_PLL_UNLOCK_LEN                             = 4   ;

static const uint8_t P9N2_EX_ERROR_REG_CE                                         = 0   ;
static const uint8_t P9N2_EX_ERROR_REG_CHIPLET_ERRORS                             = 1   ;
static const uint8_t P9N2_EX_ERROR_REG_CHIPLET_ERRORS_LEN                         = 3   ;
static const uint8_t P9N2_EX_ERROR_REG_PARITY                                     = 4   ;
static const uint8_t P9N2_EX_ERROR_REG_DATA_BUFFER                                = 5   ;
static const uint8_t P9N2_EX_ERROR_REG_ADDR_BUFFER                                = 6   ;
static const uint8_t P9N2_EX_ERROR_REG_PCB_FSM                                    = 7   ;
static const uint8_t P9N2_EX_ERROR_REG_CL_FSM                                     = 8   ;
static const uint8_t P9N2_EX_ERROR_REG_INT_RX_FSM                                 = 9   ;
static const uint8_t P9N2_EX_ERROR_REG_INT_TX_FSM                                 = 10  ;
static const uint8_t P9N2_EX_ERROR_REG_INT_TYPE                                   = 11  ;
static const uint8_t P9N2_EX_ERROR_REG_CL_DATA                                    = 12  ;
static const uint8_t P9N2_EX_ERROR_REG_INFO                                       = 13  ;
static const uint8_t P9N2_EX_ERROR_REG_UNUSED_0                                   = 14  ;
static const uint8_t P9N2_EX_ERROR_REG_CHIPLET_ATOMIC_LOCK                        = 15  ;
static const uint8_t P9N2_EX_ERROR_REG_PCB_INTERFACE                              = 16  ;
static const uint8_t P9N2_EX_ERROR_REG_CHIPLET_OFFLINE                            = 17  ;
static const uint8_t P9N2_EX_ERROR_REG_EDRAM_SEQUENCE_ERR                         = 18  ;
static const uint8_t P9N2_EX_ERROR_REG_CTRL_PARITY                                = 19  ;
static const uint8_t P9N2_EX_ERROR_REG_ADDRESS_PARITY                             = 20  ;
static const uint8_t P9N2_EX_ERROR_REG_TIMEOUT_PARITY                             = 21  ;
static const uint8_t P9N2_EX_ERROR_REG_CONFIG_PARITY                              = 22  ;
static const uint8_t P9N2_EX_ERROR_REG_UNUSED_1                                   = 23  ;
static const uint8_t P9N2_EX_ERROR_REG_DIV_PARITY                                 = 24  ;
static const uint8_t P9N2_EX_ERROR_REG_PLL_UNLOCK                                 = 25  ;
static const uint8_t P9N2_EX_ERROR_REG_PLL_UNLOCK_LEN                             = 4   ;

static const uint8_t P9N2_C_ERROR_REG_CE                                          = 0   ;
static const uint8_t P9N2_C_ERROR_REG_CHIPLET_ERRORS                              = 1   ;
static const uint8_t P9N2_C_ERROR_REG_CHIPLET_ERRORS_LEN                          = 3   ;
static const uint8_t P9N2_C_ERROR_REG_PARITY                                      = 4   ;
static const uint8_t P9N2_C_ERROR_REG_DATA_BUFFER                                 = 5   ;
static const uint8_t P9N2_C_ERROR_REG_ADDR_BUFFER                                 = 6   ;
static const uint8_t P9N2_C_ERROR_REG_PCB_FSM                                     = 7   ;
static const uint8_t P9N2_C_ERROR_REG_CL_FSM                                      = 8   ;
static const uint8_t P9N2_C_ERROR_REG_INT_RX_FSM                                  = 9   ;
static const uint8_t P9N2_C_ERROR_REG_INT_TX_FSM                                  = 10  ;
static const uint8_t P9N2_C_ERROR_REG_INT_TYPE                                    = 11  ;
static const uint8_t P9N2_C_ERROR_REG_CL_DATA                                     = 12  ;
static const uint8_t P9N2_C_ERROR_REG_INFO                                        = 13  ;
static const uint8_t P9N2_C_ERROR_REG_UNUSED_0                                    = 14  ;
static const uint8_t P9N2_C_ERROR_REG_CHIPLET_ATOMIC_LOCK                         = 15  ;
static const uint8_t P9N2_C_ERROR_REG_PCB_INTERFACE                               = 16  ;
static const uint8_t P9N2_C_ERROR_REG_CHIPLET_OFFLINE                             = 17  ;
static const uint8_t P9N2_C_ERROR_REG_EDRAM_SEQUENCE_ERR                          = 18  ;
static const uint8_t P9N2_C_ERROR_REG_CTRL_PARITY                                 = 19  ;
static const uint8_t P9N2_C_ERROR_REG_ADDRESS_PARITY                              = 20  ;
static const uint8_t P9N2_C_ERROR_REG_TIMEOUT_PARITY                              = 21  ;
static const uint8_t P9N2_C_ERROR_REG_CONFIG_PARITY                               = 22  ;
static const uint8_t P9N2_C_ERROR_REG_UNUSED_1                                    = 23  ;
static const uint8_t P9N2_C_ERROR_REG_DIV_PARITY                                  = 24  ;
static const uint8_t P9N2_C_ERROR_REG_PLL_UNLOCK                                  = 25  ;
static const uint8_t P9N2_C_ERROR_REG_PLL_UNLOCK_LEN                              = 4   ;

static const uint8_t P9N2_EQ_ERROR_STATUS_PCB_WRITE_NOT_ALLOWED_ERR               = 0   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PCB_READ_NOT_ALLOWED_ERR                = 1   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PCB_PARITY_ON_CMD_ERR                   = 2   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PCB_ADDRESS_NOT_VALID_ERR               = 3   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PCB_PARITY_ON_ADDR_ERR                  = 4   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PCB_PARITY_ON_DATA_ERR                  = 5   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PCB_PROTECTED_ACCESS_INVALID_ERR        = 6   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PCB_PARITY_ON_SPCIF_ERR                 = 7   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PCB_WRITE_AND_OPCG_IP_ERR               = 8   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_SCAN_READ_AND_OPCG_IP_ERR               = 9   ;
static const uint8_t P9N2_EQ_ERROR_STATUS_CLOCK_CMD_CONFLICT_ERR                  = 10  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_SCAN_COLLISION_ERR                      = 11  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PREVENTED_SCAN_COLLISION_ERR            = 12  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_OPCG_TRIGGER_ERR                        = 13  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PHASE_CNT_CORRUPTION_ERR                = 14  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_CLOCK_CMD_PREVENTED_ERR                 = 15  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PARITY_ON_OPCG_SM_ERR                   = 16  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PARITY_ON_CLOCK_MUX_REG_ERR             = 17  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PARITY_ON_OPCG_REG_ERR                  = 18  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PARITY_ON_SYNC_CONFIG_REG_ERR           = 19  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PARITY_ON_XSTOP_REG_ERR                 = 20  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PARITY_ON_GPIO_REG_ERR                  = 21  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_CLKCMD_REQUEST_ERR                      = 22  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_CBS_PROTOCOL_ERR                        = 23  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_VITL_ALIGN_ERR                          = 24  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_UNIT_SYNC_LVL_ERR                       = 25  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_PARITY_ON_SELFBOOT_CMD_STATE_ERR        = 26  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_OPCG_STOPPED_BY_PCB_ERR                 = 27  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_EDRAM_SCAN_PREVENTED_ERR                = 28  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_UNUSED_ERROR29                          = 29  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_UNUSED_ERROR30                          = 30  ;
static const uint8_t P9N2_EQ_ERROR_STATUS_UNUSED_ERROR31                          = 31  ;

static const uint8_t P9N2_EX_ERROR_STATUS_PCB_WRITE_NOT_ALLOWED_ERR               = 0   ;
static const uint8_t P9N2_EX_ERROR_STATUS_PCB_READ_NOT_ALLOWED_ERR                = 1   ;
static const uint8_t P9N2_EX_ERROR_STATUS_PCB_PARITY_ON_CMD_ERR                   = 2   ;
static const uint8_t P9N2_EX_ERROR_STATUS_PCB_ADDRESS_NOT_VALID_ERR               = 3   ;
static const uint8_t P9N2_EX_ERROR_STATUS_PCB_PARITY_ON_ADDR_ERR                  = 4   ;
static const uint8_t P9N2_EX_ERROR_STATUS_PCB_PARITY_ON_DATA_ERR                  = 5   ;
static const uint8_t P9N2_EX_ERROR_STATUS_PCB_PROTECTED_ACCESS_INVALID_ERR        = 6   ;
static const uint8_t P9N2_EX_ERROR_STATUS_PCB_PARITY_ON_SPCIF_ERR                 = 7   ;
static const uint8_t P9N2_EX_ERROR_STATUS_PCB_WRITE_AND_OPCG_IP_ERR               = 8   ;
static const uint8_t P9N2_EX_ERROR_STATUS_SCAN_READ_AND_OPCG_IP_ERR               = 9   ;
static const uint8_t P9N2_EX_ERROR_STATUS_CLOCK_CMD_CONFLICT_ERR                  = 10  ;
static const uint8_t P9N2_EX_ERROR_STATUS_SCAN_COLLISION_ERR                      = 11  ;
static const uint8_t P9N2_EX_ERROR_STATUS_PREVENTED_SCAN_COLLISION_ERR            = 12  ;
static const uint8_t P9N2_EX_ERROR_STATUS_OPCG_TRIGGER_ERR                        = 13  ;
static const uint8_t P9N2_EX_ERROR_STATUS_PHASE_CNT_CORRUPTION_ERR                = 14  ;
static const uint8_t P9N2_EX_ERROR_STATUS_CLOCK_CMD_PREVENTED_ERR                 = 15  ;
static const uint8_t P9N2_EX_ERROR_STATUS_PARITY_ON_OPCG_SM_ERR                   = 16  ;
static const uint8_t P9N2_EX_ERROR_STATUS_PARITY_ON_CLOCK_MUX_REG_ERR             = 17  ;
static const uint8_t P9N2_EX_ERROR_STATUS_PARITY_ON_OPCG_REG_ERR                  = 18  ;
static const uint8_t P9N2_EX_ERROR_STATUS_PARITY_ON_SYNC_CONFIG_REG_ERR           = 19  ;
static const uint8_t P9N2_EX_ERROR_STATUS_PARITY_ON_XSTOP_REG_ERR                 = 20  ;
static const uint8_t P9N2_EX_ERROR_STATUS_PARITY_ON_GPIO_REG_ERR                  = 21  ;
static const uint8_t P9N2_EX_ERROR_STATUS_CLKCMD_REQUEST_ERR                      = 22  ;
static const uint8_t P9N2_EX_ERROR_STATUS_CBS_PROTOCOL_ERR                        = 23  ;
static const uint8_t P9N2_EX_ERROR_STATUS_VITL_ALIGN_ERR                          = 24  ;
static const uint8_t P9N2_EX_ERROR_STATUS_UNIT_SYNC_LVL_ERR                       = 25  ;
static const uint8_t P9N2_EX_ERROR_STATUS_PARITY_ON_SELFBOOT_CMD_STATE_ERR        = 26  ;
static const uint8_t P9N2_EX_ERROR_STATUS_OPCG_STOPPED_BY_PCB_ERR                 = 27  ;
static const uint8_t P9N2_EX_ERROR_STATUS_EDRAM_SCAN_PREVENTED_ERR                = 28  ;
static const uint8_t P9N2_EX_ERROR_STATUS_UNUSED_ERROR29                          = 29  ;
static const uint8_t P9N2_EX_ERROR_STATUS_UNUSED_ERROR30                          = 30  ;
static const uint8_t P9N2_EX_ERROR_STATUS_UNUSED_ERROR31                          = 31  ;

static const uint8_t P9N2_C_ERROR_STATUS_PCB_WRITE_NOT_ALLOWED_ERR                = 0   ;
static const uint8_t P9N2_C_ERROR_STATUS_PCB_READ_NOT_ALLOWED_ERR                 = 1   ;
static const uint8_t P9N2_C_ERROR_STATUS_PCB_PARITY_ON_CMD_ERR                    = 2   ;
static const uint8_t P9N2_C_ERROR_STATUS_PCB_ADDRESS_NOT_VALID_ERR                = 3   ;
static const uint8_t P9N2_C_ERROR_STATUS_PCB_PARITY_ON_ADDR_ERR                   = 4   ;
static const uint8_t P9N2_C_ERROR_STATUS_PCB_PARITY_ON_DATA_ERR                   = 5   ;
static const uint8_t P9N2_C_ERROR_STATUS_PCB_PROTECTED_ACCESS_INVALID_ERR         = 6   ;
static const uint8_t P9N2_C_ERROR_STATUS_PCB_PARITY_ON_SPCIF_ERR                  = 7   ;
static const uint8_t P9N2_C_ERROR_STATUS_PCB_WRITE_AND_OPCG_IP_ERR                = 8   ;
static const uint8_t P9N2_C_ERROR_STATUS_SCAN_READ_AND_OPCG_IP_ERR                = 9   ;
static const uint8_t P9N2_C_ERROR_STATUS_CLOCK_CMD_CONFLICT_ERR                   = 10  ;
static const uint8_t P9N2_C_ERROR_STATUS_SCAN_COLLISION_ERR                       = 11  ;
static const uint8_t P9N2_C_ERROR_STATUS_PREVENTED_SCAN_COLLISION_ERR             = 12  ;
static const uint8_t P9N2_C_ERROR_STATUS_OPCG_TRIGGER_ERR                         = 13  ;
static const uint8_t P9N2_C_ERROR_STATUS_PHASE_CNT_CORRUPTION_ERR                 = 14  ;
static const uint8_t P9N2_C_ERROR_STATUS_CLOCK_CMD_PREVENTED_ERR                  = 15  ;
static const uint8_t P9N2_C_ERROR_STATUS_PARITY_ON_OPCG_SM_ERR                    = 16  ;
static const uint8_t P9N2_C_ERROR_STATUS_PARITY_ON_CLOCK_MUX_REG_ERR              = 17  ;
static const uint8_t P9N2_C_ERROR_STATUS_PARITY_ON_OPCG_REG_ERR                   = 18  ;
static const uint8_t P9N2_C_ERROR_STATUS_PARITY_ON_SYNC_CONFIG_REG_ERR            = 19  ;
static const uint8_t P9N2_C_ERROR_STATUS_PARITY_ON_XSTOP_REG_ERR                  = 20  ;
static const uint8_t P9N2_C_ERROR_STATUS_PARITY_ON_GPIO_REG_ERR                   = 21  ;
static const uint8_t P9N2_C_ERROR_STATUS_CLKCMD_REQUEST_ERR                       = 22  ;
static const uint8_t P9N2_C_ERROR_STATUS_CBS_PROTOCOL_ERR                         = 23  ;
static const uint8_t P9N2_C_ERROR_STATUS_VITL_ALIGN_ERR                           = 24  ;
static const uint8_t P9N2_C_ERROR_STATUS_UNIT_SYNC_LVL_ERR                        = 25  ;
static const uint8_t P9N2_C_ERROR_STATUS_PARITY_ON_SELFBOOT_CMD_STATE_ERR         = 26  ;
static const uint8_t P9N2_C_ERROR_STATUS_OPCG_STOPPED_BY_PCB_ERR                  = 27  ;
static const uint8_t P9N2_C_ERROR_STATUS_EDRAM_SCAN_PREVENTED_ERR                 = 28  ;
static const uint8_t P9N2_C_ERROR_STATUS_UNUSED_ERROR29                           = 29  ;
static const uint8_t P9N2_C_ERROR_STATUS_UNUSED_ERROR30                           = 30  ;
static const uint8_t P9N2_C_ERROR_STATUS_UNUSED_ERROR31                           = 31  ;

static const uint8_t P9N2_EQ_ERR_INJ_REG_L3_SINGLE_CAC                            = 0   ;
static const uint8_t P9N2_EQ_ERR_INJ_REG_L3_SOLID_CAC                             = 1   ;
static const uint8_t P9N2_EQ_ERR_INJ_REG_L3_CAC_TYPE                              = 2   ;
static const uint8_t P9N2_EQ_ERR_INJ_REG_L3_CAC_TYPE_LEN                          = 2   ;
static const uint8_t P9N2_EQ_ERR_INJ_REG_L3_SINGLE_DIR                            = 4   ;
static const uint8_t P9N2_EQ_ERR_INJ_REG_L3_SOLID_DIR                             = 5   ;
static const uint8_t P9N2_EQ_ERR_INJ_REG_L3_DIR_TYPE                              = 6   ;
static const uint8_t P9N2_EQ_ERR_INJ_REG_L3_SINGLE_LRU                            = 7   ;
static const uint8_t P9N2_EQ_ERR_INJ_REG_L3_SOLID_LRU                             = 8   ;

static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_DCSET0                         = 0   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_DCSET1                         = 1   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_DCSET2                         = 2   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_SLICE_DCD0                     = 3   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_SLICE_DCD1                     = 4   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_SLICE_DCD2                     = 5   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_DCACHE                         = 6   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_DDIR                           = 7   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_SETP                           = 8   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_DERAT                          = 9   ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_DERAT_MULTIHIT                 = 10  ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_SLB                            = 11  ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_SLB_MULTIHIT                   = 12  ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_ITLB                           = 13  ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_DTLB                           = 14  ;
static const uint8_t P9N2_EX_ERR_INJ_REG_ERROR_INJ_DTLB_MULTIHIT                  = 15  ;

static const uint8_t P9N2_EX_L2_ERR_INJ_REG_DW_TYPE                               = 0   ;
static const uint8_t P9N2_EX_L2_ERR_INJ_REG_DW_TYPE_LEN                           = 3   ;
static const uint8_t P9N2_EX_L2_ERR_INJ_REG_CW_TYPE                               = 4   ;
static const uint8_t P9N2_EX_L2_ERR_INJ_REG_CW_TYPE_LEN                           = 4   ;
static const uint8_t P9N2_EX_L2_ERR_INJ_REG_STQ_TYPE                              = 8   ;
static const uint8_t P9N2_EX_L2_ERR_INJ_REG_STQ_TYPE_LEN                          = 2   ;
static const uint8_t P9N2_EX_L2_ERR_INJ_REG_CPI_TYPE                              = 10  ;
static const uint8_t P9N2_EX_L2_ERR_INJ_REG_CPI_TYPE_LEN                          = 3   ;
static const uint8_t P9N2_EX_L2_ERR_INJ_REG_LVDIR_EN                              = 13  ;
static const uint8_t P9N2_EX_L2_ERR_INJ_REG_LRU_EN                                = 14  ;

static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_DCSET0                          = 0   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_DCSET1                          = 1   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_DCSET2                          = 2   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_SLICE_DCD0                      = 3   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_SLICE_DCD1                      = 4   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_SLICE_DCD2                      = 5   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_DCACHE                          = 6   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_DDIR                            = 7   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_SETP                            = 8   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_DERAT                           = 9   ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_DERAT_MULTIHIT                  = 10  ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_SLB                             = 11  ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_SLB_MULTIHIT                    = 12  ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_ITLB                            = 13  ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_DTLB                            = 14  ;
static const uint8_t P9N2_C_ERR_INJ_REG_ERROR_INJ_DTLB_MULTIHIT                   = 15  ;

static const uint8_t P9N2_EX_L3_ERR_INJ_REG_L3_SINGLE_CAC                         = 0   ;
static const uint8_t P9N2_EX_L3_ERR_INJ_REG_L3_SOLID_CAC                          = 1   ;
static const uint8_t P9N2_EX_L3_ERR_INJ_REG_L3_CAC_TYPE                           = 2   ;
static const uint8_t P9N2_EX_L3_ERR_INJ_REG_L3_CAC_TYPE_LEN                       = 2   ;
static const uint8_t P9N2_EX_L3_ERR_INJ_REG_L3_SINGLE_DIR                         = 4   ;
static const uint8_t P9N2_EX_L3_ERR_INJ_REG_L3_SOLID_DIR                          = 5   ;
static const uint8_t P9N2_EX_L3_ERR_INJ_REG_L3_DIR_TYPE                           = 6   ;
static const uint8_t P9N2_EX_L3_ERR_INJ_REG_L3_SINGLE_LRU                         = 7   ;
static const uint8_t P9N2_EX_L3_ERR_INJ_REG_L3_SOLID_LRU                          = 8   ;

static const uint8_t P9N2_EQ_ERR_RPT0_RSV                                         = 0   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_NCCTL_RLD_BARRIER                     = 1   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_NCCTL_SNP                             = 2   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_NCCTL_TLBIE_ACK                       = 3   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_NCCTL_SYNC                            = 4   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_NCCTL_VSYNC                           = 5   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_TMCTL_TIDX_TEND_LDST_SEQ              = 6   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RVCTL                                 = 7   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_SRCTL0_BAD_HPC                        = 8   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_SRCTL1_BAD_HPC                        = 9   ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_SRCTL2_BAD_HPC                        = 10  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_SRCTL3_BAD_HPC                        = 11  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_PBARB_FSM_REQ_OVERFLOW                = 12  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_PBARB_TRASHMODE_PB_REQ                = 13  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_L3PF_MACH_DONE                        = 14  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCMD0_TTAG_PERR                       = 15  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCMD1_TTAG_PERR                       = 16  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCMD2_TTAG_PERR                       = 17  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCMD3_TTAG_PERR                       = 18  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_CR0_TTAG_PERR                         = 19  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_CR0_ATAG_PERR                         = 20  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_CR1_TTAG_PERR                         = 21  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_CR1_ATAG_PERR                         = 22  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_CR2_TTAG_PERR                         = 23  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_CR2_ATAG_PERR                         = 24  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_CR3_TTAG_PERR                         = 25  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_CR3_ATAG_PERR                         = 26  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCMD0_ADDR_PERR                       = 27  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCMD1_ADDR_PERR                       = 28  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCMD2_ADDR_PERR                       = 29  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCMD3_ADDR_PERR                       = 30  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR9_PEC_PHASE3_TIMEOUT                     = 31  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR9_PEC_PHASE4_SAME                        = 32  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR9_PEC_PHASE4_RCCO_DISP_FAIL              = 33  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR9_PEC_PHASE5_TIMEOUT                     = 34  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_B01_BOTH_ACTIVE                       = 35  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_PHANTOM_B01_REQ                       = 36  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RC_UNEXP_F2_DATA                      = 37  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RC_UNEXP_PURG_HIT                     = 38  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCX_UNEXP_IDLE_PBL3_DATA              = 39  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_RCX_UNEXP_IDLE_PB_CRESP               = 40  ;
static const uint8_t P9N2_EQ_ERR_RPT0_FIR14_COX_UNEXP_IDLE_PB_CRESP               = 41  ;

static const uint8_t P9N2_EX_L2_ERR_RPT0_RSV                                      = 0   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_NCCTL_RLD_BARRIER                  = 1   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_NCCTL_SNP                          = 2   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_NCCTL_TLBIE_ACK                    = 3   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_NCCTL_SYNC                         = 4   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_NCCTL_VSYNC                        = 5   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_TMCTL_TIDX_TEND_LDST_SEQ           = 6   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RVCTL                              = 7   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_SRCTL0_BAD_HPC                     = 8   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_SRCTL1_BAD_HPC                     = 9   ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_SRCTL2_BAD_HPC                     = 10  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_SRCTL3_BAD_HPC                     = 11  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_PBARB_FSM_REQ_OVERFLOW             = 12  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_PBARB_TRASHMODE_PB_REQ             = 13  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_L3PF_MACH_DONE                     = 14  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCMD0_TTAG_PERR                    = 15  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCMD1_TTAG_PERR                    = 16  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCMD2_TTAG_PERR                    = 17  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCMD3_TTAG_PERR                    = 18  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_CR0_TTAG_PERR                      = 19  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_CR0_ATAG_PERR                      = 20  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_CR1_TTAG_PERR                      = 21  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_CR1_ATAG_PERR                      = 22  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_CR2_TTAG_PERR                      = 23  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_CR2_ATAG_PERR                      = 24  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_CR3_TTAG_PERR                      = 25  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_CR3_ATAG_PERR                      = 26  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCMD0_ADDR_PERR                    = 27  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCMD1_ADDR_PERR                    = 28  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCMD2_ADDR_PERR                    = 29  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCMD3_ADDR_PERR                    = 30  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR9_PEC_PHASE3_TIMEOUT                  = 31  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR9_PEC_PHASE4_SAME                     = 32  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR9_PEC_PHASE4_RCCO_DISP_FAIL           = 33  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR9_PEC_PHASE5_TIMEOUT                  = 34  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_B01_BOTH_ACTIVE                    = 35  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_PHANTOM_B01_REQ                    = 36  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RC_UNEXP_F2_DATA                   = 37  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RC_UNEXP_PURG_HIT                  = 38  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCX_UNEXP_IDLE_PBL3_DATA           = 39  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_RCX_UNEXP_IDLE_PB_CRESP            = 40  ;
static const uint8_t P9N2_EX_L2_ERR_RPT0_FIR14_COX_UNEXP_IDLE_PB_CRESP            = 41  ;

static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_RCX_UNEXP_IDLE_L3_CRESP               = 0   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_RCX_UNEXP_IDLE_L3_DWDONE              = 1   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_RCX_UNEXP_PB_RC_DTAG_PCHK             = 2   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_DW_SET_REF_WITH_FLAG_IDLE             = 3   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_KILL_REF_WITH_FLAG_IDLE               = 4   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_DW_SET_SI_BY_MACH                     = 5   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_PD_DIR_MULT_HIT                       = 6   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_B0_SD_DIR_MULT_HIT                    = 7   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_B1_SD_DIR_MULT_HIT                    = 8   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_B2_SD_DIR_MULT_HIT                    = 9   ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_B3_SD_DIR_MULT_HIT                    = 10  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_INVALID_SNP_CPS_STATU_RTN             = 11  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_HANG_WAITING_FOR_FP_MATE              = 12  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_BAD_FP_MATE                           = 13  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_LSU_TAG_REUSE                         = 14  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_IFU_MULT_REQ                          = 15  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_XPF_MULT_REQ                          = 16  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_XLT_QUEUE_OVRFLW                      = 17  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_L3PF_REQ                              = 18  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_NCU_TID_DONE                          = 19  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR11_LRU_MEM_INVALID_ABCD                  = 20  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR11_LRU_MEM_INVALID_EFGH                  = 21  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_STQ_COMING                            = 22  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_STQ_OVERFLOW                          = 23  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_RC_PBBUS_SFSTAT                       = 24  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_TMA_LARXA_VS_FRCMISS_SV               = 25  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR37_RC_TGT_NODAL_REQ_CRESP_DINC           = 26  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR37_SN_TGT_NODAL_REQ_CRESP_DINC           = 27  ;
static const uint8_t P9N2_EQ_ERR_RPT1_FIR14_RC_UNEXP_DIRSTAT_VS_DSECT_CHK         = 28  ;
static const uint8_t P9N2_EQ_ERR_RPT1_RSV                                         = 29  ;

static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_RCX_UNEXP_IDLE_L3_CRESP            = 0   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_RCX_UNEXP_IDLE_L3_DWDONE           = 1   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_RCX_UNEXP_PB_RC_DTAG_PCHK          = 2   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_DW_SET_REF_WITH_FLAG_IDLE          = 3   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_KILL_REF_WITH_FLAG_IDLE            = 4   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_DW_SET_SI_BY_MACH                  = 5   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_PD_DIR_MULT_HIT                    = 6   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_B0_SD_DIR_MULT_HIT                 = 7   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_B1_SD_DIR_MULT_HIT                 = 8   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_B2_SD_DIR_MULT_HIT                 = 9   ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_B3_SD_DIR_MULT_HIT                 = 10  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_INVALID_SNP_CPS_STATU_RTN          = 11  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_HANG_WAITING_FOR_FP_MATE           = 12  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_BAD_FP_MATE                        = 13  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_LSU_TAG_REUSE                      = 14  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_IFU_MULT_REQ                       = 15  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_XPF_MULT_REQ                       = 16  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_XLT_QUEUE_OVRFLW                   = 17  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_L3PF_REQ                           = 18  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_NCU_TID_DONE                       = 19  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR11_LRU_MEM_INVALID_ABCD               = 20  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR11_LRU_MEM_INVALID_EFGH               = 21  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_STQ_COMING                         = 22  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_STQ_OVERFLOW                       = 23  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_RC_PBBUS_SFSTAT                    = 24  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_TMA_LARXA_VS_FRCMISS_SV            = 25  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR37_RC_TGT_NODAL_REQ_CRESP_DINC        = 26  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR37_SN_TGT_NODAL_REQ_CRESP_DINC        = 27  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_FIR14_RC_UNEXP_DIRSTAT_VS_DSECT_CHK      = 28  ;
static const uint8_t P9N2_EX_L2_ERR_RPT1_RSV                                      = 29  ;

static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_OVERFLOW                            = 0   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_ILLEGAL_STORE_SIZE                  = 1   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_LD_AMO_SEQ                          = 2   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_CR0_TTAG_PERR                       = 3   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_CR0_ATAG_PERR                       = 4   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_CR1_TTAG_PERR                       = 5   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_CR1_ATAG_PERR                       = 6   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_CR2_TTAG_PERR                       = 7   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_CR2_ATAG_PERR                       = 8   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_CR3_TTAG_PERR                       = 9   ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_CR3_ATAG_PERR                       = 10  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_SNP0_ADDR_PERR                      = 11  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_SNP0_TTAG_PERR                      = 12  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_SNP1_ADDR_PERR                      = 13  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_SNP1_TTAG_PERR                      = 14  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_PBARB_TRASHMODE                     = 15  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR1_TLBIE_BAD_OP                        = 16  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR1_MASTER_SEQ_ID_PAR                   = 17  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR1_SNOOP_TLBIE_SEQ_PARITY              = 18  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_PURGE_LVL_ERR1                      = 19  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_PURGE_LVL_ERR2                      = 20  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_PURGE_ABORT_LVL_ERR1                = 21  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_PURGE_ABORT_LVL_ERR2                = 22  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_PURGE_DONE_LVL_ERR1                 = 23  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_IMA_FSM_TIMEOUT                     = 24  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_PPE_WR_FSM_TIMEOUT                  = 25  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_PPE_RD_FSM_TIMEOUT                  = 26  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR0_TLB_DATA_PAR                        = 27  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR19_LD_TGT_NODAL_DINC                  = 28  ;
static const uint8_t P9N2_EQ_ERR_RPT_REG_FIR19_ST_TGT_NODAL_DINC                  = 29  ;

static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_OVERFLOW                            = 0   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_ILLEGAL_STORE_SIZE                  = 1   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_LD_AMO_SEQ                          = 2   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_CR0_TTAG_PERR                       = 3   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_CR0_ATAG_PERR                       = 4   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_CR1_TTAG_PERR                       = 5   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_CR1_ATAG_PERR                       = 6   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_CR2_TTAG_PERR                       = 7   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_CR2_ATAG_PERR                       = 8   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_CR3_TTAG_PERR                       = 9   ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_CR3_ATAG_PERR                       = 10  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_SNP0_ADDR_PERR                      = 11  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_SNP0_TTAG_PERR                      = 12  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_SNP1_ADDR_PERR                      = 13  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_SNP1_TTAG_PERR                      = 14  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_PBARB_TRASHMODE                     = 15  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR1_TLBIE_BAD_OP                        = 16  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR1_MASTER_SEQ_ID_PAR                   = 17  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR1_SNOOP_TLBIE_SEQ_PARITY              = 18  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_PURGE_LVL_ERR1                      = 19  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_PURGE_LVL_ERR2                      = 20  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_PURGE_ABORT_LVL_ERR1                = 21  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_PURGE_ABORT_LVL_ERR2                = 22  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_PURGE_DONE_LVL_ERR1                 = 23  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_IMA_FSM_TIMEOUT                     = 24  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_PPE_WR_FSM_TIMEOUT                  = 25  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_PPE_RD_FSM_TIMEOUT                  = 26  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR0_TLB_DATA_PAR                        = 27  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR19_LD_TGT_NODAL_DINC                  = 28  ;
static const uint8_t P9N2_EX_ERR_RPT_REG_FIR19_ST_TGT_NODAL_DINC                  = 29  ;

static const uint8_t P9N2_EQ_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_ERR_HOLD = 0   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_THERM_MODEREG_PARITY_ERR_HOLD         = 1   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_ERR_HOLD       = 2   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_ERR_HOLD      = 3   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SCAN_INIT_VERSION_REG_PARITY_ERR_HOLD = 4   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_VOLT_MODEREG_PARITY_ERR_HOLD          = 5   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SKITTER_CLKSRCREG_PARITY_ERR_HOLD     = 6   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_COUNT_STATE_ERR_HOLD                  = 7   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_RUN_STATE_ERR_HOLD                    = 8   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_THRES_THERM_STATE_ERR_HOLD            = 9   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_THRES_THERM_OVERFLOW_ERR_HOLD         = 10  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SHIFTER_PARITY_ERR_HOLD               = 11  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SHIFTER_VALID_ERR_HOLD                = 12  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_TIMEOUT_ERR_HOLD                      = 13  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_F_SKITTER_ERR_HOLD                    = 14  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_PCB_ERR_HOLD_OUT                      = 15  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_MASK   = 16  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_THERM_MODEREG_PARITY_MASK             = 17  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_MASK           = 18  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_MASK          = 19  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SCAN_INIT_VERSION_PARITY_MASK         = 20  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_VOLT_MODEREG_PARITY_MASK              = 21  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_COUNT_STATE_MASK                      = 23  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_RUN_STATE_MASK                        = 24  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_THRES_STATE_MASK                      = 25  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_OVERFLOW_MASK                         = 26  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SHIFTER_PARITY_MASK                   = 27  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SHIFTER_VALID_MASK                    = 28  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_TIMEOUT_MASK                          = 29  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_F_SKITTER_READ_MASK                   = 30  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_PCB_MASK                              = 31  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_COUNT_STATE_LT                        = 40  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_COUNT_STATE_LT_LEN                    = 4   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_RUN_STATE_LT                          = 44  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_RUN_STATE_LT_LEN                      = 3   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SHIFT_DTS_LT                          = 47  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SHIFT_VOLT_LT                         = 48  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_READ_STATE_LT                         = 49  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_READ_STATE_LT_LEN                     = 2   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_WRITE_STATE_LT                        = 51  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_WRITE_STATE_LT_LEN                    = 4   ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_SAMPLE_DTS_LT                         = 55  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_MEASURE_VOLT_LT                       = 56  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_READ_CPM_LT                           = 57  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_WRITE_CPM_LT                          = 58  ;
static const uint8_t P9N2_EQ_ERR_STATUS_REG_UNUSED                                = 59  ;

static const uint8_t P9N2_EX_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_ERR_HOLD = 0   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_THERM_MODEREG_PARITY_ERR_HOLD         = 1   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_ERR_HOLD       = 2   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_ERR_HOLD      = 3   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SCAN_INIT_VERSION_REG_PARITY_ERR_HOLD = 4   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_VOLT_MODEREG_PARITY_ERR_HOLD          = 5   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SKITTER_CLKSRCREG_PARITY_ERR_HOLD     = 6   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_COUNT_STATE_ERR_HOLD                  = 7   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_RUN_STATE_ERR_HOLD                    = 8   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_THRES_THERM_STATE_ERR_HOLD            = 9   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_THRES_THERM_OVERFLOW_ERR_HOLD         = 10  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SHIFTER_PARITY_ERR_HOLD               = 11  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SHIFTER_VALID_ERR_HOLD                = 12  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_TIMEOUT_ERR_HOLD                      = 13  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_F_SKITTER_ERR_HOLD                    = 14  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_PCB_ERR_HOLD_OUT                      = 15  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_MASK   = 16  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_THERM_MODEREG_PARITY_MASK             = 17  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_MASK           = 18  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_MASK          = 19  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SCAN_INIT_VERSION_PARITY_MASK         = 20  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_VOLT_MODEREG_PARITY_MASK              = 21  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_COUNT_STATE_MASK                      = 23  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_RUN_STATE_MASK                        = 24  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_THRES_STATE_MASK                      = 25  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_OVERFLOW_MASK                         = 26  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SHIFTER_PARITY_MASK                   = 27  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SHIFTER_VALID_MASK                    = 28  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_TIMEOUT_MASK                          = 29  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_F_SKITTER_READ_MASK                   = 30  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_PCB_MASK                              = 31  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_COUNT_STATE_LT                        = 40  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_COUNT_STATE_LT_LEN                    = 4   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_RUN_STATE_LT                          = 44  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_RUN_STATE_LT_LEN                      = 3   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SHIFT_DTS_LT                          = 47  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SHIFT_VOLT_LT                         = 48  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_READ_STATE_LT                         = 49  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_READ_STATE_LT_LEN                     = 2   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_WRITE_STATE_LT                        = 51  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_WRITE_STATE_LT_LEN                    = 4   ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_SAMPLE_DTS_LT                         = 55  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_MEASURE_VOLT_LT                       = 56  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_READ_CPM_LT                           = 57  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_WRITE_CPM_LT                          = 58  ;
static const uint8_t P9N2_EX_ERR_STATUS_REG_UNUSED                                = 59  ;

static const uint8_t P9N2_C_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_ERR_HOLD = 0   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_THERM_MODEREG_PARITY_ERR_HOLD          = 1   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_ERR_HOLD        = 2   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_ERR_HOLD       = 3   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SCAN_INIT_VERSION_REG_PARITY_ERR_HOLD  = 4   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_VOLT_MODEREG_PARITY_ERR_HOLD           = 5   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SKITTER_CLKSRCREG_PARITY_ERR_HOLD      = 6   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_COUNT_STATE_ERR_HOLD                   = 7   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_RUN_STATE_ERR_HOLD                     = 8   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_THRES_THERM_STATE_ERR_HOLD             = 9   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_THRES_THERM_OVERFLOW_ERR_HOLD          = 10  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SHIFTER_PARITY_ERR_HOLD                = 11  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SHIFTER_VALID_ERR_HOLD                 = 12  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_TIMEOUT_ERR_HOLD                       = 13  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_F_SKITTER_ERR_HOLD                     = 14  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_PCB_ERR_HOLD_OUT                       = 15  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SERIAL_SHIFTCNT_MODEREG_PARITY_MASK    = 16  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_THERM_MODEREG_PARITY_MASK              = 17  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SKITTER_MODEREG_PARITY_MASK            = 18  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SKITTER_FORCEREG_PARITY_MASK           = 19  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SCAN_INIT_VERSION_PARITY_MASK          = 20  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_VOLT_MODEREG_PARITY_MASK               = 21  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_COUNT_STATE_MASK                       = 23  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_RUN_STATE_MASK                         = 24  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_THRES_STATE_MASK                       = 25  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_OVERFLOW_MASK                          = 26  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SHIFTER_PARITY_MASK                    = 27  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SHIFTER_VALID_MASK                     = 28  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_TIMEOUT_MASK                           = 29  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_F_SKITTER_READ_MASK                    = 30  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_PCB_MASK                               = 31  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_COUNT_STATE_LT                         = 40  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_COUNT_STATE_LT_LEN                     = 4   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_RUN_STATE_LT                           = 44  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_RUN_STATE_LT_LEN                       = 3   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SHIFT_DTS_LT                           = 47  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SHIFT_VOLT_LT                          = 48  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_READ_STATE_LT                          = 49  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_READ_STATE_LT_LEN                      = 2   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_WRITE_STATE_LT                         = 51  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_WRITE_STATE_LT_LEN                     = 4   ;
static const uint8_t P9N2_C_ERR_STATUS_REG_SAMPLE_DTS_LT                          = 55  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_MEASURE_VOLT_LT                        = 56  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_READ_CPM_LT                            = 57  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_WRITE_CPM_LT                           = 58  ;
static const uint8_t P9N2_C_ERR_STATUS_REG_UNUSED                                 = 59  ;

static const uint8_t P9N2_EQ_FIR_ACTION0_REG_ACTION0                              = 0   ;
static const uint8_t P9N2_EQ_FIR_ACTION0_REG_ACTION0_LEN                          = 31  ;

static const uint8_t P9N2_EX_FIR_ACTION0_REG_ACTION0                              = 0   ;
static const uint8_t P9N2_EX_FIR_ACTION0_REG_ACTION0_LEN                          = 31  ;

static const uint8_t P9N2_EX_L2_FIR_ACTION0_REG_ACTION0                           = 0   ;
static const uint8_t P9N2_EX_L2_FIR_ACTION0_REG_ACTION0_LEN                       = 42  ;

static const uint8_t P9N2_EX_L3_FIR_ACTION0_REG_ACTION0                           = 0   ;
static const uint8_t P9N2_EX_L3_FIR_ACTION0_REG_ACTION0_LEN                       = 35  ;

static const uint8_t P9N2_EQ_FIR_ACTION1_REG_ACTION1                              = 0   ;
static const uint8_t P9N2_EQ_FIR_ACTION1_REG_ACTION1_LEN                          = 31  ;

static const uint8_t P9N2_EX_FIR_ACTION1_REG_ACTION1                              = 0   ;
static const uint8_t P9N2_EX_FIR_ACTION1_REG_ACTION1_LEN                          = 31  ;

static const uint8_t P9N2_EX_L2_FIR_ACTION1_REG_ACTION1                           = 0   ;
static const uint8_t P9N2_EX_L2_FIR_ACTION1_REG_ACTION1_LEN                       = 42  ;

static const uint8_t P9N2_EX_L3_FIR_ACTION1_REG_ACTION1                           = 0   ;
static const uint8_t P9N2_EX_L3_FIR_ACTION1_REG_ACTION1_LEN                       = 35  ;

static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TO_LSU                                = 0   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TO_IFU                                = 1   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TO_ISU                                = 2   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TO_VSU                                = 3   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TO_PC                                 = 4   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_RESERVED                              = 5   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_ERROR_PULSE_OR_LEVEL                  = 6   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_CLEAR_STICKY_LEVEL                    = 7   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_SCOM_WRITE                            = 8   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TRIGGER                               = 9   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TRIGGER1                              = 10  ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TOD_TAP                               = 11  ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_BLOCK                                 = 12  ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_BLOCK_LEN                             = 2   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_DELAY_AFTER_BLOCK                     = 14  ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_RECOVERY_BLK                          = 15  ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_RECOVERY_BLK_EXTEND                   = 16  ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TAP_SEL                               = 17  ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_TAP_SEL_LEN                           = 4   ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_HYP_BLOCK                             = 21  ;
static const uint8_t P9N2_EX_L2_FIR_ERR_INJ_HYP_BLOCK_LEN                         = 3   ;

static const uint8_t P9N2_C_FIR_ERR_INJ_TO_LSU                                    = 0   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_TO_IFU                                    = 1   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_TO_ISU                                    = 2   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_TO_VSU                                    = 3   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_TO_PC                                     = 4   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_RESERVED                                  = 5   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_ERROR_PULSE_OR_LEVEL                      = 6   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_CLEAR_STICKY_LEVEL                        = 7   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_SCOM_WRITE                                = 8   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_TRIGGER                                   = 9   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_TRIGGER1                                  = 10  ;
static const uint8_t P9N2_C_FIR_ERR_INJ_TOD_TAP                                   = 11  ;
static const uint8_t P9N2_C_FIR_ERR_INJ_BLOCK                                     = 12  ;
static const uint8_t P9N2_C_FIR_ERR_INJ_BLOCK_LEN                                 = 2   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_DELAY_AFTER_BLOCK                         = 14  ;
static const uint8_t P9N2_C_FIR_ERR_INJ_RECOVERY_BLK                              = 15  ;
static const uint8_t P9N2_C_FIR_ERR_INJ_RECOVERY_BLK_EXTEND                       = 16  ;
static const uint8_t P9N2_C_FIR_ERR_INJ_TAP_SEL                                   = 17  ;
static const uint8_t P9N2_C_FIR_ERR_INJ_TAP_SEL_LEN                               = 4   ;
static const uint8_t P9N2_C_FIR_ERR_INJ_HYP_BLOCK                                 = 21  ;
static const uint8_t P9N2_C_FIR_ERR_INJ_HYP_BLOCK_LEN                             = 3   ;

static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_CY_FIR_LOCAL_XSTOP_HOLD_OUT          = 0   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_CY_FIR_RECOV_HOLD_OUT                = 1   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_CY_FIR_SYS_XSTOP_HOLD_OUT            = 2   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_FIR_ERR_INJ_REC_HOLD_OUT             = 3   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_FIR_ERR_INJ_XSTP_HOLD_OUT            = 4   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_FIR_PARITY_HOLD_OUT                  = 5   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_FIR_SCOM_HOLD_OUT                    = 6   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_L2_UE_OVER_THRES_HOLD_OUT            = 7   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_PHYP_ERR_INJ_HOLD_OUT                = 8   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_RAM_EXCEPTION_XSTOP_HOLD_OUT         = 9   ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_RAM_INSTR_REG_ACCESS_HOLD_OUT        = 10  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_RECOV_ERR_DURING_RAM_MODE_HOLD_OUT   = 11  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_RECOV_ERR_DURING_SMT_MODE_CHANGE_HOLD_OUT = 12  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_ECC_REF_STATE_HOLD_OUT               = 13  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_FWD_PROG_HOLD_OUT                    = 14  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_RECONFIG_STATE_HOLD_OUT              = 15  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_RECOV_ABIST_TIMEOUT_HOLD_OUT         = 16  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_RECOV_DISABLED_HOLD_OUT              = 17  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_RCVY_STATE_HOLD_OUT                  = 18  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_SD_LOG_XSTOP_HOLD_OUT                = 19  ;
static const uint8_t P9N2_EX_L2_FIR_HOLD_OUT_XSTOP_ON_DBG_TRIGGER_HOLD_OUT        = 20  ;

static const uint8_t P9N2_C_FIR_HOLD_OUT_CY_FIR_LOCAL_XSTOP_HOLD_OUT              = 0   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_CY_FIR_RECOV_HOLD_OUT                    = 1   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_CY_FIR_SYS_XSTOP_HOLD_OUT                = 2   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_FIR_ERR_INJ_REC_HOLD_OUT                 = 3   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_FIR_ERR_INJ_XSTP_HOLD_OUT                = 4   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_FIR_PARITY_HOLD_OUT                      = 5   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_FIR_SCOM_HOLD_OUT                        = 6   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_L2_UE_OVER_THRES_HOLD_OUT                = 7   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_PHYP_ERR_INJ_HOLD_OUT                    = 8   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_RAM_EXCEPTION_XSTOP_HOLD_OUT             = 9   ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_RAM_INSTR_REG_ACCESS_HOLD_OUT            = 10  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_RECOV_ERR_DURING_RAM_MODE_HOLD_OUT       = 11  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_RECOV_ERR_DURING_SMT_MODE_CHANGE_HOLD_OUT = 12  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_ECC_REF_STATE_HOLD_OUT                   = 13  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_FWD_PROG_HOLD_OUT                        = 14  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_RECONFIG_STATE_HOLD_OUT                  = 15  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_RECOV_ABIST_TIMEOUT_HOLD_OUT             = 16  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_RECOV_DISABLED_HOLD_OUT                  = 17  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_RCVY_STATE_HOLD_OUT                      = 18  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_SD_LOG_XSTOP_HOLD_OUT                    = 19  ;
static const uint8_t P9N2_C_FIR_HOLD_OUT_XSTOP_ON_DBG_TRIGGER_HOLD_OUT            = 20  ;

static const uint8_t P9N2_EQ_FIR_MASK_IN0                                         = 0   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN1                                         = 1   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN2                                         = 2   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN3                                         = 3   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN4                                         = 4   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN5                                         = 5   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN6                                         = 6   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN7                                         = 7   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN8                                         = 8   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN9                                         = 9   ;
static const uint8_t P9N2_EQ_FIR_MASK_IN10                                        = 10  ;
static const uint8_t P9N2_EQ_FIR_MASK_IN11                                        = 11  ;
static const uint8_t P9N2_EQ_FIR_MASK_IN12                                        = 12  ;
static const uint8_t P9N2_EQ_FIR_MASK_IN13                                        = 13  ;
static const uint8_t P9N2_EQ_FIR_MASK_IN13_LEN                                    = 13  ;
static const uint8_t P9N2_EQ_FIR_MASK_IN26                                        = 26  ;

static const uint8_t P9N2_EX_FIR_MASK_IN0                                         = 0   ;
static const uint8_t P9N2_EX_FIR_MASK_IN1                                         = 1   ;
static const uint8_t P9N2_EX_FIR_MASK_IN2                                         = 2   ;
static const uint8_t P9N2_EX_FIR_MASK_IN3                                         = 3   ;
static const uint8_t P9N2_EX_FIR_MASK_IN4                                         = 4   ;
static const uint8_t P9N2_EX_FIR_MASK_IN5                                         = 5   ;
static const uint8_t P9N2_EX_FIR_MASK_IN5_LEN                                     = 21  ;
static const uint8_t P9N2_EX_FIR_MASK_IN26                                        = 26  ;

static const uint8_t P9N2_C_FIR_MASK_IN0                                          = 0   ;
static const uint8_t P9N2_C_FIR_MASK_IN1                                          = 1   ;
static const uint8_t P9N2_C_FIR_MASK_IN2                                          = 2   ;
static const uint8_t P9N2_C_FIR_MASK_IN3                                          = 3   ;
static const uint8_t P9N2_C_FIR_MASK_IN4                                          = 4   ;
static const uint8_t P9N2_C_FIR_MASK_IN5                                          = 5   ;
static const uint8_t P9N2_C_FIR_MASK_IN5_LEN                                      = 21  ;
static const uint8_t P9N2_C_FIR_MASK_IN26                                         = 26  ;

static const uint8_t P9N2_EQ_FIR_MASK_REG_MASK                                    = 0   ;
static const uint8_t P9N2_EQ_FIR_MASK_REG_MASK_LEN                                = 31  ;

static const uint8_t P9N2_EX_FIR_MASK_REG_MASK                                    = 0   ;
static const uint8_t P9N2_EX_FIR_MASK_REG_MASK_LEN                                = 31  ;

static const uint8_t P9N2_EX_L2_FIR_MASK_REG_L2                                   = 0   ;
static const uint8_t P9N2_EX_L2_FIR_MASK_REG_L2_LEN                               = 42  ;

static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_RDDSP_SEGR_LCO_ALL_MEM_UNAVAIL_ERR_MASK = 0   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_FIR_SPARE1_MASK                   = 1   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_FIR_SPARE2_MASK                   = 2   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_DRAM_POS_WORDLINE_FAIL_MASK       = 3   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_CAC_RD_CE_DET_NOT_LINDEL_REQ_MASK = 4   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_CAC_RD_UE_DET_MASK                = 5   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_CAC_RD_SUE_DET_MASK               = 6   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_CAC_WR_DATA_CE_FROM_PB_MASK       = 7   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_CAC_WR_DATA_UE_FROM_PB_MASK       = 8   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_CAC_WR_DATA_SUE_FROM_PB_MASK      = 9   ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_CAC_WR_DATA_CE_FROM_L2_MASK       = 10  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_CAC_WR_DATA_UE_FROM_L2_MASK       = 11  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_CAC_WR_DATA_SUE_FROM_L2_OR_WIHPC_MASK = 12  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_DIR_RD_CE_DET_MASK                = 13  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_DIR_RD_UE_DET_MASK                = 14  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_DIR_RD_PHANTOM_ERROR_MASK         = 15  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_PB_MAST_WR_ADDR_ERR_MASK          = 16  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_PB_MAST_RD_ADDR_ERR_MASK          = 17  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_ADDR_HANG_DETECTED_MASK           = 18  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_LRU_INVAL_CNT_MASK                = 19  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_PPE_RD_CE_DET_MASK                = 20  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_PPE_RD_UE_DET_MASK                = 21  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_PPE_RD_SUE_DET_MASK               = 22  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_MACH_HANG_DETECTED_MASK           = 23  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_HW_CONTROL_ERR_MASK               = 24  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_SNP_CACHE_INHIBIT_ERR_MASK        = 25  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_LINE_DEL_CE_DONE_MASK             = 26  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_DRAM_ERROR_MASK                   = 27  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_LRU_ERROR_MASK                    = 28  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_ALL_MEMBERS_DELETED_ERROR_MASK    = 29  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_REFRESH_TIMER_ERROR_MASK          = 30  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_PB_MAST_WR_ACK_DEAD_MASK          = 31  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_L3_PB_MAST_RD_ACK_DEAD_MASK          = 32  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_SCOM_ERR_MASK1                       = 33  ;
static const uint8_t P9N2_EX_L3_FIR_MASK_REG_SCOM_ERR_MASK2                       = 34  ;

static const uint8_t P9N2_EQ_FIR_REG_CONTROL_ERR                                  = 0   ;
static const uint8_t P9N2_EQ_FIR_REG_TLBIE_CONTROL_ERR                            = 1   ;
static const uint8_t P9N2_EQ_FIR_REG_TLBIE_SLBIEG_SW_ERR                          = 2   ;
static const uint8_t P9N2_EQ_FIR_REG_ST_ADDR_ERR                                  = 3   ;
static const uint8_t P9N2_EQ_FIR_REG_LD_ADDR_ERR                                  = 4   ;
static const uint8_t P9N2_EQ_FIR_REG_ST_ACK_DEAD                                  = 5   ;
static const uint8_t P9N2_EQ_FIR_REG_LD_ACK_DEAD                                  = 6   ;
static const uint8_t P9N2_EQ_FIR_REG_MSG_ADDR_ERR                                 = 7   ;
static const uint8_t P9N2_EQ_FIR_REG_STQ_DATA_PARITY_ERR                          = 8   ;
static const uint8_t P9N2_EQ_FIR_REG_STORE_TIMEOUT                                = 9   ;
static const uint8_t P9N2_EQ_FIR_REG_TLBIE_MASTER_TIMEOUT                         = 10  ;
static const uint8_t P9N2_EQ_FIR_REG_TLBIE_SNOOP_TIMEOUT                          = 11  ;
static const uint8_t P9N2_EQ_FIR_REG_IMA_CRESP_ADDR_ERR                           = 12  ;
static const uint8_t P9N2_EQ_FIR_REG_IMA_ACK_DEAD                                 = 13  ;
static const uint8_t P9N2_EQ_FIR_REG_PMISC_CRESP_ADDR_ERR                         = 14  ;
static const uint8_t P9N2_EQ_FIR_REG_PPE_RD_CRESP_ADDR_ERR                        = 15  ;
static const uint8_t P9N2_EQ_FIR_REG_PPE_WR_CRESP_ADDR_ERR                        = 16  ;
static const uint8_t P9N2_EQ_FIR_REG_PPE_RD_ACK_DEAD                              = 17  ;
static const uint8_t P9N2_EQ_FIR_REG_PPE_WR_ACK_DEAD                              = 18  ;
static const uint8_t P9N2_EQ_FIR_REG_TGT_NODAL_DINC_ERR                           = 19  ;
static const uint8_t P9N2_EQ_FIR_REG_DARN_EN_ERR                                  = 20  ;
static const uint8_t P9N2_EQ_FIR_REG_DARN_ADDR_ERR                                = 21  ;
static const uint8_t P9N2_EQ_FIR_REG_PRATS_ACK_DEAD                               = 22  ;
static const uint8_t P9N2_EQ_FIR_REG_SPARE                                        = 23  ;
static const uint8_t P9N2_EQ_FIR_REG_SPARE_LEN                                    = 6   ;
static const uint8_t P9N2_EQ_FIR_REG_SCOM_ERR1                                    = 29  ;
static const uint8_t P9N2_EQ_FIR_REG_SCOM_ERR2                                    = 30  ;

static const uint8_t P9N2_EX_FIR_REG_CONTROL_ERR                                  = 0   ;
static const uint8_t P9N2_EX_FIR_REG_TLBIE_CONTROL_ERR                            = 1   ;
static const uint8_t P9N2_EX_FIR_REG_TLBIE_SLBIEG_SW_ERR                          = 2   ;
static const uint8_t P9N2_EX_FIR_REG_ST_ADDR_ERR                                  = 3   ;
static const uint8_t P9N2_EX_FIR_REG_LD_ADDR_ERR                                  = 4   ;
static const uint8_t P9N2_EX_FIR_REG_ST_ACK_DEAD                                  = 5   ;
static const uint8_t P9N2_EX_FIR_REG_LD_ACK_DEAD                                  = 6   ;
static const uint8_t P9N2_EX_FIR_REG_MSG_ADDR_ERR                                 = 7   ;
static const uint8_t P9N2_EX_FIR_REG_STQ_DATA_PARITY_ERR                          = 8   ;
static const uint8_t P9N2_EX_FIR_REG_STORE_TIMEOUT                                = 9   ;
static const uint8_t P9N2_EX_FIR_REG_TLBIE_MASTER_TIMEOUT                         = 10  ;
static const uint8_t P9N2_EX_FIR_REG_TLBIE_SNOOP_TIMEOUT                          = 11  ;
static const uint8_t P9N2_EX_FIR_REG_IMA_CRESP_ADDR_ERR                           = 12  ;
static const uint8_t P9N2_EX_FIR_REG_IMA_ACK_DEAD                                 = 13  ;
static const uint8_t P9N2_EX_FIR_REG_PMISC_CRESP_ADDR_ERR                         = 14  ;
static const uint8_t P9N2_EX_FIR_REG_PPE_RD_CRESP_ADDR_ERR                        = 15  ;
static const uint8_t P9N2_EX_FIR_REG_PPE_WR_CRESP_ADDR_ERR                        = 16  ;
static const uint8_t P9N2_EX_FIR_REG_PPE_RD_ACK_DEAD                              = 17  ;
static const uint8_t P9N2_EX_FIR_REG_PPE_WR_ACK_DEAD                              = 18  ;
static const uint8_t P9N2_EX_FIR_REG_TGT_NODAL_DINC_ERR                           = 19  ;
static const uint8_t P9N2_EX_FIR_REG_DARN_EN_ERR                                  = 20  ;
static const uint8_t P9N2_EX_FIR_REG_DARN_ADDR_ERR                                = 21  ;
static const uint8_t P9N2_EX_FIR_REG_PRATS_ACK_DEAD                               = 22  ;
static const uint8_t P9N2_EX_FIR_REG_SPARE                                        = 23  ;
static const uint8_t P9N2_EX_FIR_REG_SPARE_LEN                                    = 6   ;
static const uint8_t P9N2_EX_FIR_REG_SCOM_ERR1                                    = 29  ;
static const uint8_t P9N2_EX_FIR_REG_SCOM_ERR2                                    = 30  ;

static const uint8_t P9N2_EX_L2_FIR_REG_CACHE_RD_CE                               = 0   ;
static const uint8_t P9N2_EX_L2_FIR_REG_CACHE_RD_UE                               = 1   ;
static const uint8_t P9N2_EX_L2_FIR_REG_CACHE_RD_SUE                              = 2   ;
static const uint8_t P9N2_EX_L2_FIR_REG_HW_DIR_INTIATED_LINE_DELETE_OCCURRED      = 3   ;
static const uint8_t P9N2_EX_L2_FIR_REG_CACHE_UE_SUE_DETECTED_ON_MODIFIED_LINE_BY_CO = 4   ;
static const uint8_t P9N2_EX_L2_FIR_REG_CACHE_UE_SUE_DETECTED_ON_NON_MODIFIED_LINE_BY_CO = 5   ;
static const uint8_t P9N2_EX_L2_FIR_REG_DIR_CE_DETECTED                           = 6   ;
static const uint8_t P9N2_EX_L2_FIR_REG_DIR_UE_DETECTED                           = 7   ;
static const uint8_t P9N2_EX_L2_FIR_REG_DIR_STUCK_BIT_CE                          = 8   ;
static const uint8_t P9N2_EX_L2_FIR_REG_DIR_SBCE_REPAIR_FAILED                    = 9   ;
static const uint8_t P9N2_EX_L2_FIR_REG_MULTIPLE_DIR_ERRORS_DETECTED              = 10  ;
static const uint8_t P9N2_EX_L2_FIR_REG_LRU_READ_ERROR_DETECTED                   = 11  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_POWERBUS_DATA_TIMEOUT                  = 12  ;
static const uint8_t P9N2_EX_L2_FIR_REG_NCU_POWERBUS_DATA_TIMEOUT                 = 13  ;
static const uint8_t P9N2_EX_L2_FIR_REG_HW_CONTROL_ERROR                          = 14  ;
static const uint8_t P9N2_EX_L2_FIR_REG_LRU_ALL_MEMBERS_IN_CGC_ARE_LINE_DELETED   = 15  ;
static const uint8_t P9N2_EX_L2_FIR_REG_CACHE_INHIBITED_HIT_CACHEABLE_ERROR       = 16  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_LOAD_RECEIVED_PB_CRESP_ADR_ERR         = 17  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_STORE_RECEIVED_PB_CRESP_ADR_ERR        = 18  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_POWBUS_DATA_CE_ERR_FROM_F2CHK          = 19  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_POWBUS_DATA_UE_ERR_FROM_F2CHK          = 20  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_POWBUS_DATA_SUE_ERR_FROM_F2CHK         = 21  ;
static const uint8_t P9N2_EX_L2_FIR_REG_TGT_NODAL_REQ_DINC_ERR                    = 22  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_LOAD_RECEIVED_PB_CRESP_ADR_ERR_FOR_HYP = 23  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RCDAT_RD_PARITY_ERR                       = 24  ;
static const uint8_t P9N2_EX_L2_FIR_REG_CO_PSH_RECEIVED_PB_CRESP_ADR_ERR          = 25  ;
static const uint8_t P9N2_EX_L2_FIR_REG_LVDIR_PERR                                = 26  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_LOAD_RECEIVED_PB_ACK_DEAD_FROM_ALINKRECOV = 27  ;
static const uint8_t P9N2_EX_L2_FIR_REG_DARN_DATA_TIMEOUT                         = 28  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_STORE_RECEIVED_PB_ACK_DEAD_FROM_ALINKRECOV = 29  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_XLATE_LOAD_RECEIVED_PB_ACK_DEAD_FROM_ALINKRECOV = 30  ;
static const uint8_t P9N2_EX_L2_FIR_REG_RC_XLATE_STORE_RECEIVED_PB_ACK_DEAD_FROM_ALINKRECOV = 31  ;
static const uint8_t P9N2_EX_L2_FIR_REG_PEC_PH3_TIMEOUT                           = 32  ;
static const uint8_t P9N2_EX_L2_FIR_REG_SPARE2TO1                                 = 33  ;
static const uint8_t P9N2_EX_L2_FIR_REG_SPARE2TO1_LEN                             = 3   ;
static const uint8_t P9N2_EX_L2_FIR_REG_CACHE_RD_CE_AND_UE                        = 36  ;
static const uint8_t P9N2_EX_L2_FIR_REG_SPARE1TO1                                 = 37  ;
static const uint8_t P9N2_EX_L2_FIR_REG_SPARE1TO1_LEN                             = 3   ;
static const uint8_t P9N2_EX_L2_FIR_REG_SCOM_ERR1                                 = 40  ;
static const uint8_t P9N2_EX_L2_FIR_REG_SCOM_ERR2                                 = 41  ;

static const uint8_t P9N2_EX_L3_FIR_REG_L3_RDDSP_SEGR_LCO_ALL_MEM_UNAVAIL_ERR     = 0   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_SPARE1                                 = 1   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_SPARE2                                 = 2   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_DRAM_POS_WORDLINE_FAIL                 = 3   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_CAC_RD_CE_DET_NOT_LINDEL_REQ           = 4   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_CAC_RD_UE_DET                          = 5   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_CAC_RD_SUE_DET                         = 6   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_CAC_WR_DATA_CE_FROM_PB                 = 7   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_CAC_WR_DATA_UE_FROM_PB                 = 8   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_CAC_WR_DATA_SUE_FROM_PB                = 9   ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_CAC_WR_DATA_CE_FROM_L2                 = 10  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_CAC_WR_DATA_UE_FROM_L2                 = 11  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_CAC_WR_DATA_SUE_FROM_L2_OR_WIHPC       = 12  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_DIR_RD_CE_DET                          = 13  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_DIR_RD_UE_DET                          = 14  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_DIR_RD_PHANTOM_ERROR                   = 15  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_PB_MAST_WR_ADDR_ERR                    = 16  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_PB_MAST_RD_ADDR_ERR                    = 17  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_ADDR_HANG_DETECTED                     = 18  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_LRU_INVAL_CNT                          = 19  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_PPE_RD_CE_DET                          = 20  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_PPE_RD_UE_DET                          = 21  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_PPE_RD_SUE_DET                         = 22  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_MACH_HANG_DETECTED                     = 23  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_HW_CONTROL_ERR                         = 24  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_SNP_CACHE_INHIBIT_ERR                  = 25  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_LINE_DEL_CE_DONE                       = 26  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_DRAM_ERROR                             = 27  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_LRU_ERROR                              = 28  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_ALL_MEMBERS_DELETED_ERROR              = 29  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_REFRESH_TIMER_ERROR                    = 30  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_PB_MAST_WR_ACK_DEAD                    = 31  ;
static const uint8_t P9N2_EX_L3_FIR_REG_L3_PB_MAST_RD_ACK_DEAD                    = 32  ;
static const uint8_t P9N2_EX_L3_FIR_REG_SCOM_ERR1                                 = 33  ;
static const uint8_t P9N2_EX_L3_FIR_REG_SCOM_ERR2                                 = 34  ;

static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN0                     = 0   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN1                     = 1   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN2                     = 2   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN3                     = 3   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN4                     = 4   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN5                     = 5   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN6                     = 6   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN7                     = 7   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN8                     = 8   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN9                     = 9   ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN10                    = 10  ;
static const uint8_t P9N2_EQ_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN11                    = 11  ;

static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN0                     = 0   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN1                     = 1   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN2                     = 2   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN3                     = 3   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN4                     = 4   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN5                     = 5   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN6                     = 6   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN7                     = 7   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN8                     = 8   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN9                     = 9   ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN10                    = 10  ;
static const uint8_t P9N2_EX_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN11                    = 11  ;

static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN0                      = 0   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN1                      = 1   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN2                      = 2   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN3                      = 3   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN4                      = 4   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN5                      = 5   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN6                      = 6   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN7                      = 7   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN8                      = 8   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN9                      = 9   ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN10                     = 10  ;
static const uint8_t P9N2_C_GXSTOP0_MASK_REG_GXSTP0_TRIG_IN11                     = 11  ;

static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN0                     = 0   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN1                     = 1   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN2                     = 2   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN3                     = 3   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN4                     = 4   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN5                     = 5   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN6                     = 6   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN7                     = 7   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN8                     = 8   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN9                     = 9   ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN10                    = 10  ;
static const uint8_t P9N2_EQ_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN11                    = 11  ;

static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN0                     = 0   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN1                     = 1   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN2                     = 2   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN3                     = 3   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN4                     = 4   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN5                     = 5   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN6                     = 6   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN7                     = 7   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN8                     = 8   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN9                     = 9   ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN10                    = 10  ;
static const uint8_t P9N2_EX_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN11                    = 11  ;

static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN0                      = 0   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN1                      = 1   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN2                      = 2   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN3                      = 3   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN4                      = 4   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN5                      = 5   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN6                      = 6   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN7                      = 7   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN8                      = 8   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN9                      = 9   ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN10                     = 10  ;
static const uint8_t P9N2_C_GXSTOP1_MASK_REG_GXSTP1_TRIG_IN11                     = 11  ;

static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN0                     = 0   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN1                     = 1   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN2                     = 2   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN3                     = 3   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN4                     = 4   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN5                     = 5   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN6                     = 6   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN7                     = 7   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN8                     = 8   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN9                     = 9   ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN10                    = 10  ;
static const uint8_t P9N2_EQ_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN11                    = 11  ;

static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN0                     = 0   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN1                     = 1   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN2                     = 2   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN3                     = 3   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN4                     = 4   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN5                     = 5   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN6                     = 6   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN7                     = 7   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN8                     = 8   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN9                     = 9   ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN10                    = 10  ;
static const uint8_t P9N2_EX_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN11                    = 11  ;

static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN0                      = 0   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN1                      = 1   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN2                      = 2   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN3                      = 3   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN4                      = 4   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN5                      = 5   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN6                      = 6   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN7                      = 7   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN8                      = 8   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN9                      = 9   ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN10                     = 10  ;
static const uint8_t P9N2_C_GXSTOP2_MASK_REG_GXSTP2_TRIG_IN11                     = 11  ;

static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN0                            = 0   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN1                            = 1   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN2                            = 2   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN3                            = 3   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN4                            = 4   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN5                            = 5   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN6                            = 6   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN7                            = 7   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN8                            = 8   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN9                            = 9   ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN10                           = 10  ;
static const uint8_t P9N2_EQ_GXSTOP_TRIG_REG_GXSTP_IN11                           = 11  ;

static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN0                            = 0   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN1                            = 1   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN2                            = 2   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN3                            = 3   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN4                            = 4   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN5                            = 5   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN6                            = 6   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN7                            = 7   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN8                            = 8   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN9                            = 9   ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN10                           = 10  ;
static const uint8_t P9N2_EX_GXSTOP_TRIG_REG_GXSTP_IN11                           = 11  ;

static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN0                             = 0   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN1                             = 1   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN2                             = 2   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN3                             = 3   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN4                             = 4   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN5                             = 5   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN6                             = 6   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN7                             = 7   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN8                             = 8   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN9                             = 9   ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN10                            = 10  ;
static const uint8_t P9N2_C_GXSTOP_TRIG_REG_GXSTP_IN11                            = 11  ;

static const uint8_t P9N2_EX_L2_HANG_CONTROL_CORE_LIMIT                           = 0   ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_CORE_LIMIT_LEN                       = 8   ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_NEST_LIMIT                           = 8   ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_NEST_LIMIT_LEN                       = 8   ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_RETURN_GOOD_ON_COMP                  = 16  ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_COMP_CNT_LIMIT                       = 17  ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_COMP_CNT_LIMIT_LEN                   = 8   ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_REC_LIMIT                            = 25  ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_REC_LIMIT_LEN                        = 3   ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_USE_REC_LIMIT                        = 28  ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_ACTIVE_MASK                          = 29  ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_ACTIVE_MASK_LEN                      = 5   ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_TLBIE_STALL_LIMIT                    = 34  ;
static const uint8_t P9N2_EX_L2_HANG_CONTROL_TLBIE_STALL_LIMIT_LEN                = 8   ;

static const uint8_t P9N2_C_HANG_CONTROL_CORE_LIMIT                               = 0   ;
static const uint8_t P9N2_C_HANG_CONTROL_CORE_LIMIT_LEN                           = 8   ;
static const uint8_t P9N2_C_HANG_CONTROL_NEST_LIMIT                               = 8   ;
static const uint8_t P9N2_C_HANG_CONTROL_NEST_LIMIT_LEN                           = 8   ;
static const uint8_t P9N2_C_HANG_CONTROL_RETURN_GOOD_ON_COMP                      = 16  ;
static const uint8_t P9N2_C_HANG_CONTROL_COMP_CNT_LIMIT                           = 17  ;
static const uint8_t P9N2_C_HANG_CONTROL_COMP_CNT_LIMIT_LEN                       = 8   ;
static const uint8_t P9N2_C_HANG_CONTROL_REC_LIMIT                                = 25  ;
static const uint8_t P9N2_C_HANG_CONTROL_REC_LIMIT_LEN                            = 3   ;
static const uint8_t P9N2_C_HANG_CONTROL_USE_REC_LIMIT                            = 28  ;
static const uint8_t P9N2_C_HANG_CONTROL_ACTIVE_MASK                              = 29  ;
static const uint8_t P9N2_C_HANG_CONTROL_ACTIVE_MASK_LEN                          = 5   ;
static const uint8_t P9N2_C_HANG_CONTROL_TLBIE_STALL_LIMIT                        = 34  ;
static const uint8_t P9N2_C_HANG_CONTROL_TLBIE_STALL_LIMIT_LEN                    = 8   ;

static const uint8_t P9N2_EQ_HANG_PULSE_0_REG_0                                   = 0   ;
static const uint8_t P9N2_EQ_HANG_PULSE_0_REG_0_LEN                               = 6   ;
static const uint8_t P9N2_EQ_HANG_PULSE_0_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_EX_HANG_PULSE_0_REG_0                                   = 0   ;
static const uint8_t P9N2_EX_HANG_PULSE_0_REG_0_LEN                               = 6   ;
static const uint8_t P9N2_EX_HANG_PULSE_0_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_C_HANG_PULSE_0_REG_0                                    = 0   ;
static const uint8_t P9N2_C_HANG_PULSE_0_REG_0_LEN                                = 6   ;
static const uint8_t P9N2_C_HANG_PULSE_0_REG_SUPPRESS                             = 6   ;

static const uint8_t P9N2_EQ_HANG_PULSE_1_REG_1                                   = 0   ;
static const uint8_t P9N2_EQ_HANG_PULSE_1_REG_1_LEN                               = 6   ;
static const uint8_t P9N2_EQ_HANG_PULSE_1_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_EX_HANG_PULSE_1_REG_1                                   = 0   ;
static const uint8_t P9N2_EX_HANG_PULSE_1_REG_1_LEN                               = 6   ;
static const uint8_t P9N2_EX_HANG_PULSE_1_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_C_HANG_PULSE_1_REG_1                                    = 0   ;
static const uint8_t P9N2_C_HANG_PULSE_1_REG_1_LEN                                = 6   ;
static const uint8_t P9N2_C_HANG_PULSE_1_REG_SUPPRESS                             = 6   ;

static const uint8_t P9N2_EQ_HANG_PULSE_2_REG_2                                   = 0   ;
static const uint8_t P9N2_EQ_HANG_PULSE_2_REG_2_LEN                               = 6   ;
static const uint8_t P9N2_EQ_HANG_PULSE_2_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_EX_HANG_PULSE_2_REG_2                                   = 0   ;
static const uint8_t P9N2_EX_HANG_PULSE_2_REG_2_LEN                               = 6   ;
static const uint8_t P9N2_EX_HANG_PULSE_2_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_C_HANG_PULSE_2_REG_2                                    = 0   ;
static const uint8_t P9N2_C_HANG_PULSE_2_REG_2_LEN                                = 6   ;
static const uint8_t P9N2_C_HANG_PULSE_2_REG_SUPPRESS                             = 6   ;

static const uint8_t P9N2_EQ_HANG_PULSE_3_REG_3                                   = 0   ;
static const uint8_t P9N2_EQ_HANG_PULSE_3_REG_3_LEN                               = 6   ;
static const uint8_t P9N2_EQ_HANG_PULSE_3_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_EX_HANG_PULSE_3_REG_3                                   = 0   ;
static const uint8_t P9N2_EX_HANG_PULSE_3_REG_3_LEN                               = 6   ;
static const uint8_t P9N2_EX_HANG_PULSE_3_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_C_HANG_PULSE_3_REG_3                                    = 0   ;
static const uint8_t P9N2_C_HANG_PULSE_3_REG_3_LEN                                = 6   ;
static const uint8_t P9N2_C_HANG_PULSE_3_REG_SUPPRESS                             = 6   ;

static const uint8_t P9N2_EQ_HANG_PULSE_4_REG_4                                   = 0   ;
static const uint8_t P9N2_EQ_HANG_PULSE_4_REG_4_LEN                               = 6   ;
static const uint8_t P9N2_EQ_HANG_PULSE_4_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_EX_HANG_PULSE_4_REG_4                                   = 0   ;
static const uint8_t P9N2_EX_HANG_PULSE_4_REG_4_LEN                               = 6   ;
static const uint8_t P9N2_EX_HANG_PULSE_4_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_C_HANG_PULSE_4_REG_4                                    = 0   ;
static const uint8_t P9N2_C_HANG_PULSE_4_REG_4_LEN                                = 6   ;
static const uint8_t P9N2_C_HANG_PULSE_4_REG_SUPPRESS                             = 6   ;

static const uint8_t P9N2_EQ_HANG_PULSE_5_REG_5                                   = 0   ;
static const uint8_t P9N2_EQ_HANG_PULSE_5_REG_5_LEN                               = 6   ;
static const uint8_t P9N2_EQ_HANG_PULSE_5_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_EX_HANG_PULSE_5_REG_5                                   = 0   ;
static const uint8_t P9N2_EX_HANG_PULSE_5_REG_5_LEN                               = 6   ;
static const uint8_t P9N2_EX_HANG_PULSE_5_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_C_HANG_PULSE_5_REG_5                                    = 0   ;
static const uint8_t P9N2_C_HANG_PULSE_5_REG_5_LEN                                = 6   ;
static const uint8_t P9N2_C_HANG_PULSE_5_REG_SUPPRESS                             = 6   ;

static const uint8_t P9N2_EQ_HANG_PULSE_6_REG_6                                   = 0   ;
static const uint8_t P9N2_EQ_HANG_PULSE_6_REG_6_LEN                               = 6   ;
static const uint8_t P9N2_EQ_HANG_PULSE_6_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_EX_HANG_PULSE_6_REG_6                                   = 0   ;
static const uint8_t P9N2_EX_HANG_PULSE_6_REG_6_LEN                               = 6   ;
static const uint8_t P9N2_EX_HANG_PULSE_6_REG_SUPPRESS                            = 6   ;

static const uint8_t P9N2_C_HANG_PULSE_6_REG_6                                    = 0   ;
static const uint8_t P9N2_C_HANG_PULSE_6_REG_6_LEN                                = 6   ;
static const uint8_t P9N2_C_HANG_PULSE_6_REG_SUPPRESS                             = 6   ;

static const uint8_t P9N2_EQ_HEARTBEAT_REG_DEAD                                   = 0   ;

static const uint8_t P9N2_EX_HEARTBEAT_REG_DEAD                                   = 0   ;

static const uint8_t P9N2_C_HEARTBEAT_REG_DEAD                                    = 0   ;

static const uint8_t P9N2_EX_L2_HID_ONE_PPC                                       = 0   ;
static const uint8_t P9N2_EX_L2_HID_EN_INSTRUC_TRACE                              = 1   ;
static const uint8_t P9N2_EX_L2_HID_FLUSH_IC                                      = 2   ;
static const uint8_t P9N2_EX_L2_HID_EN_ATTN                                       = 3   ;
static const uint8_t P9N2_EX_L2_HID_HILE                                          = 4   ;
static const uint8_t P9N2_EX_L2_HID_DIS_RECOVERY                                  = 5   ;
static const uint8_t P9N2_EX_L2_HID_MEGAMOUTH                                     = 6   ;
static const uint8_t P9N2_EX_L2_HID_PREFETCH_RESET                                = 7   ;
static const uint8_t P9N2_EX_L2_HID_RADIX_MODE                                    = 8   ;
static const uint8_t P9N2_EX_L2_HID_DCACHE_PARTITIONED                            = 9   ;
static const uint8_t P9N2_EX_L2_HID_ICACHE_PARTITIONED                            = 10  ;
static const uint8_t P9N2_EX_L2_HID_SPARE_11                                      = 11  ;
static const uint8_t P9N2_EX_L2_HID_SPARE_12                                      = 12  ;

static const uint8_t P9N2_C_HID_ONE_PPC                                           = 0   ;
static const uint8_t P9N2_C_HID_EN_INSTRUC_TRACE                                  = 1   ;
static const uint8_t P9N2_C_HID_FLUSH_IC                                          = 2   ;
static const uint8_t P9N2_C_HID_EN_ATTN                                           = 3   ;
static const uint8_t P9N2_C_HID_HILE                                              = 4   ;
static const uint8_t P9N2_C_HID_DIS_RECOVERY                                      = 5   ;
static const uint8_t P9N2_C_HID_MEGAMOUTH                                         = 6   ;
static const uint8_t P9N2_C_HID_PREFETCH_RESET                                    = 7   ;
static const uint8_t P9N2_C_HID_RADIX_MODE                                        = 8   ;
static const uint8_t P9N2_C_HID_DCACHE_PARTITIONED                                = 9   ;
static const uint8_t P9N2_C_HID_ICACHE_PARTITIONED                                = 10  ;
static const uint8_t P9N2_C_HID_SPARE_11                                          = 11  ;
static const uint8_t P9N2_C_HID_SPARE_12                                          = 12  ;

static const uint8_t P9N2_EX_L2_HMEER_ENABLE                                      = 0   ;
static const uint8_t P9N2_EX_L2_HMEER_ENABLE_LEN                                  = 24  ;

static const uint8_t P9N2_C_HMEER_ENABLE                                          = 0   ;
static const uint8_t P9N2_C_HMEER_ENABLE_LEN                                      = 24  ;

static const uint8_t P9N2_EQ_HOSTATTN_IN0                                         = 0   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN1                                         = 1   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN2                                         = 2   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN3                                         = 3   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN4                                         = 4   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN5                                         = 5   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN6                                         = 6   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN7                                         = 7   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN8                                         = 8   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN9                                         = 9   ;
static const uint8_t P9N2_EQ_HOSTATTN_IN10                                        = 10  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN11                                        = 11  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN12                                        = 12  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN13                                        = 13  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN14                                        = 14  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN15                                        = 15  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN16                                        = 16  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN17                                        = 17  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN18                                        = 18  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN19                                        = 19  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN20                                        = 20  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN21                                        = 21  ;
static const uint8_t P9N2_EQ_HOSTATTN_IN22                                        = 22  ;

static const uint8_t P9N2_EX_HOSTATTN_IN0                                         = 0   ;
static const uint8_t P9N2_EX_HOSTATTN_IN1                                         = 1   ;
static const uint8_t P9N2_EX_HOSTATTN_IN2                                         = 2   ;
static const uint8_t P9N2_EX_HOSTATTN_IN3                                         = 3   ;
static const uint8_t P9N2_EX_HOSTATTN_IN4                                         = 4   ;
static const uint8_t P9N2_EX_HOSTATTN_IN5                                         = 5   ;
static const uint8_t P9N2_EX_HOSTATTN_IN6                                         = 6   ;
static const uint8_t P9N2_EX_HOSTATTN_IN7                                         = 7   ;
static const uint8_t P9N2_EX_HOSTATTN_IN8                                         = 8   ;
static const uint8_t P9N2_EX_HOSTATTN_IN9                                         = 9   ;
static const uint8_t P9N2_EX_HOSTATTN_IN10                                        = 10  ;
static const uint8_t P9N2_EX_HOSTATTN_IN11                                        = 11  ;
static const uint8_t P9N2_EX_HOSTATTN_IN12                                        = 12  ;
static const uint8_t P9N2_EX_HOSTATTN_IN13                                        = 13  ;
static const uint8_t P9N2_EX_HOSTATTN_IN14                                        = 14  ;
static const uint8_t P9N2_EX_HOSTATTN_IN15                                        = 15  ;
static const uint8_t P9N2_EX_HOSTATTN_IN16                                        = 16  ;
static const uint8_t P9N2_EX_HOSTATTN_IN17                                        = 17  ;
static const uint8_t P9N2_EX_HOSTATTN_IN18                                        = 18  ;
static const uint8_t P9N2_EX_HOSTATTN_IN19                                        = 19  ;
static const uint8_t P9N2_EX_HOSTATTN_IN20                                        = 20  ;
static const uint8_t P9N2_EX_HOSTATTN_IN21                                        = 21  ;
static const uint8_t P9N2_EX_HOSTATTN_IN22                                        = 22  ;

static const uint8_t P9N2_C_HOSTATTN_IN0                                          = 0   ;
static const uint8_t P9N2_C_HOSTATTN_IN1                                          = 1   ;
static const uint8_t P9N2_C_HOSTATTN_IN2                                          = 2   ;
static const uint8_t P9N2_C_HOSTATTN_IN3                                          = 3   ;
static const uint8_t P9N2_C_HOSTATTN_IN4                                          = 4   ;
static const uint8_t P9N2_C_HOSTATTN_IN5                                          = 5   ;
static const uint8_t P9N2_C_HOSTATTN_IN6                                          = 6   ;
static const uint8_t P9N2_C_HOSTATTN_IN7                                          = 7   ;
static const uint8_t P9N2_C_HOSTATTN_IN8                                          = 8   ;
static const uint8_t P9N2_C_HOSTATTN_IN9                                          = 9   ;
static const uint8_t P9N2_C_HOSTATTN_IN10                                         = 10  ;
static const uint8_t P9N2_C_HOSTATTN_IN11                                         = 11  ;
static const uint8_t P9N2_C_HOSTATTN_IN12                                         = 12  ;
static const uint8_t P9N2_C_HOSTATTN_IN13                                         = 13  ;
static const uint8_t P9N2_C_HOSTATTN_IN14                                         = 14  ;
static const uint8_t P9N2_C_HOSTATTN_IN15                                         = 15  ;
static const uint8_t P9N2_C_HOSTATTN_IN16                                         = 16  ;
static const uint8_t P9N2_C_HOSTATTN_IN17                                         = 17  ;
static const uint8_t P9N2_C_HOSTATTN_IN18                                         = 18  ;
static const uint8_t P9N2_C_HOSTATTN_IN19                                         = 19  ;
static const uint8_t P9N2_C_HOSTATTN_IN20                                         = 20  ;
static const uint8_t P9N2_C_HOSTATTN_IN21                                         = 21  ;
static const uint8_t P9N2_C_HOSTATTN_IN22                                         = 22  ;

static const uint8_t P9N2_EQ_HOSTATTN_MASK_IN                                     = 0   ;
static const uint8_t P9N2_EQ_HOSTATTN_MASK_IN_LEN                                 = 22  ;

static const uint8_t P9N2_EX_HOSTATTN_MASK_IN                                     = 0   ;
static const uint8_t P9N2_EX_HOSTATTN_MASK_IN_LEN                                 = 22  ;

static const uint8_t P9N2_C_HOSTATTN_MASK_IN                                      = 0   ;
static const uint8_t P9N2_C_HOSTATTN_MASK_IN_LEN                                  = 22  ;

static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_TRIG                                  = 0   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_TRIG_LEN                              = 2   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_MTSPR_TRIG                            = 2   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_MTSPR_MARK                            = 3   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_MARK                                  = 4   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_MARK_LEN                              = 2   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_DBG0_STOP                             = 6   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_DBG1_STOP                             = 7   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_RUN_STOP                              = 8   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_CHIP0_STOP                            = 9   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_CHIP1_STOP                            = 10  ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_SPARE1112                             = 11  ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_SPARE1112_LEN                         = 2   ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_XSTOP_STOP                            = 13  ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_SPARE1415                             = 14  ;
static const uint8_t P9N2_EQ_HTM_CTRL_HTMSC_SPARE1415_LEN                         = 2   ;

static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_TRIG                                  = 0   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_TRIG_LEN                              = 2   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_MTSPR_TRIG                            = 2   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_MTSPR_MARK                            = 3   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_MARK                                  = 4   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_MARK_LEN                              = 2   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_DBG0_STOP                             = 6   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_DBG1_STOP                             = 7   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_RUN_STOP                              = 8   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_CHIP0_STOP                            = 9   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_CHIP1_STOP                            = 10  ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_SPARE1112                             = 11  ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_SPARE1112_LEN                         = 2   ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_XSTOP_STOP                            = 13  ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_SPARE1415                             = 14  ;
static const uint8_t P9N2_EX_HTM_CTRL_HTMSC_SPARE1415_LEN                         = 2   ;

static const uint8_t P9N2_EQ_HTM_IMA_PDBAR_HTMSC_ENABLE_SPLIT_CORE                = 1   ;
static const uint8_t P9N2_EQ_HTM_IMA_PDBAR_HTMSC_SPARE2TO4                        = 2   ;
static const uint8_t P9N2_EQ_HTM_IMA_PDBAR_HTMSC_SPARE2TO4_LEN                    = 3   ;
static const uint8_t P9N2_EQ_HTM_IMA_PDBAR_HTMSC_SCOPE                            = 5   ;
static const uint8_t P9N2_EQ_HTM_IMA_PDBAR_HTMSC_SCOPE_LEN                        = 3   ;
static const uint8_t P9N2_EQ_HTM_IMA_PDBAR_HTMSC                                  = 8   ;
static const uint8_t P9N2_EQ_HTM_IMA_PDBAR_HTMSC_LEN                              = 43  ;

static const uint8_t P9N2_EX_HTM_IMA_PDBAR_HTMSC_ENABLE_SPLIT_CORE                = 1   ;
static const uint8_t P9N2_EX_HTM_IMA_PDBAR_HTMSC_SPARE2TO4                        = 2   ;
static const uint8_t P9N2_EX_HTM_IMA_PDBAR_HTMSC_SPARE2TO4_LEN                    = 3   ;
static const uint8_t P9N2_EX_HTM_IMA_PDBAR_HTMSC_SCOPE                            = 5   ;
static const uint8_t P9N2_EX_HTM_IMA_PDBAR_HTMSC_SCOPE_LEN                        = 3   ;
static const uint8_t P9N2_EX_HTM_IMA_PDBAR_HTMSC                                  = 8   ;
static const uint8_t P9N2_EX_HTM_IMA_PDBAR_HTMSC_LEN                              = 43  ;

static const uint8_t P9N2_EQ_HTM_IMA_STATUS_HTMSC_ERROR                           = 0   ;
static const uint8_t P9N2_EQ_HTM_IMA_STATUS_HTMSC_TRACE_ACTIVE                    = 1   ;
static const uint8_t P9N2_EQ_HTM_IMA_STATUS_HTMSC_PDBAR_ERROR                     = 2   ;
static const uint8_t P9N2_EQ_HTM_IMA_STATUS_HTMSC_RESERVED                        = 3   ;
static const uint8_t P9N2_EQ_HTM_IMA_STATUS_HTMSC_RESERVED_LEN                    = 2   ;
static const uint8_t P9N2_EQ_HTM_IMA_STATUS_HTMSC_FSM                             = 5   ;
static const uint8_t P9N2_EQ_HTM_IMA_STATUS_HTMSC_FSM_LEN                         = 7   ;
static const uint8_t P9N2_EQ_HTM_IMA_STATUS_HTMSC_COUNT                           = 12  ;
static const uint8_t P9N2_EQ_HTM_IMA_STATUS_HTMSC_COUNT_LEN                       = 4   ;

static const uint8_t P9N2_EX_HTM_IMA_STATUS_HTMSC_ERROR                           = 0   ;
static const uint8_t P9N2_EX_HTM_IMA_STATUS_HTMSC_TRACE_ACTIVE                    = 1   ;
static const uint8_t P9N2_EX_HTM_IMA_STATUS_HTMSC_PDBAR_ERROR                     = 2   ;
static const uint8_t P9N2_EX_HTM_IMA_STATUS_HTMSC_RESERVED                        = 3   ;
static const uint8_t P9N2_EX_HTM_IMA_STATUS_HTMSC_RESERVED_LEN                    = 2   ;
static const uint8_t P9N2_EX_HTM_IMA_STATUS_HTMSC_FSM                             = 5   ;
static const uint8_t P9N2_EX_HTM_IMA_STATUS_HTMSC_FSM_LEN                         = 7   ;
static const uint8_t P9N2_EX_HTM_IMA_STATUS_HTMSC_COUNT                           = 12  ;
static const uint8_t P9N2_EX_HTM_IMA_STATUS_HTMSC_COUNT_LEN                       = 4   ;

static const uint8_t P9N2_EQ_HTM_LAST_ADDRESS                                     = 8   ;
static const uint8_t P9N2_EQ_HTM_LAST_ADDRESS_LEN                                 = 49  ;

static const uint8_t P9N2_EX_HTM_LAST_ADDRESS                                     = 8   ;
static const uint8_t P9N2_EX_HTM_LAST_ADDRESS_LEN                                 = 49  ;

static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_ALLOC                                  = 0   ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_SCOPE                                  = 1   ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_SCOPE_LEN                              = 3   ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_PRIORITY                               = 4   ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_SIZE_SMALL                             = 5   ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_SPARE                                  = 6   ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_SPARE_LEN                              = 2   ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_BASE                                   = 8   ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_BASE_LEN                               = 32  ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_SIZE                                   = 40  ;
static const uint8_t P9N2_EQ_HTM_MEM_HTMSC_SIZE_LEN                               = 9   ;

static const uint8_t P9N2_EX_HTM_MEM_HTMSC_ALLOC                                  = 0   ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_SCOPE                                  = 1   ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_SCOPE_LEN                              = 3   ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_PRIORITY                               = 4   ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_SIZE_SMALL                             = 5   ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_SPARE                                  = 6   ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_SPARE_LEN                              = 2   ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_BASE                                   = 8   ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_BASE_LEN                               = 32  ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_SIZE                                   = 40  ;
static const uint8_t P9N2_EX_HTM_MEM_HTMSC_SIZE_LEN                               = 9   ;

static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_ENABLE                                = 0   ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_CONTENT_SEL                           = 1   ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_CONTENT_SEL_LEN                       = 2   ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_SPARE0                                = 3   ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_CAPTURE                               = 4   ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_CAPTURE_LEN                           = 6   ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_DD1EQUIV                              = 10  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_SPARE_1TO2                            = 11  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_SPARE_1TO2_LEN                        = 2   ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_WRAP                                  = 13  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_DIS_TSTAMP                            = 14  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_SINGLE_TSTAMP                         = 15  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_DIS_STALL                             = 16  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_MARKERS_ONLY                          = 17  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_DIS_GROUP                             = 18  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_SPARES                                = 19  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_SPARES_LEN                            = 5   ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_VGTARGET                              = 24  ;
static const uint8_t P9N2_EQ_HTM_MODE_HTMSC_VGTARGET_LEN                          = 16  ;

static const uint8_t P9N2_EX_HTM_MODE_HTMSC_ENABLE                                = 0   ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_CONTENT_SEL                           = 1   ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_CONTENT_SEL_LEN                       = 2   ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_SPARE0                                = 3   ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_CAPTURE                               = 4   ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_CAPTURE_LEN                           = 6   ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_DD1EQUIV                              = 10  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_SPARE_1TO2                            = 11  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_SPARE_1TO2_LEN                        = 2   ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_WRAP                                  = 13  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_DIS_TSTAMP                            = 14  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_SINGLE_TSTAMP                         = 15  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_DIS_STALL                             = 16  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_MARKERS_ONLY                          = 17  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_DIS_GROUP                             = 18  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_SPARES                                = 19  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_SPARES_LEN                            = 5   ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_VGTARGET                              = 24  ;
static const uint8_t P9N2_EX_HTM_MODE_HTMSC_VGTARGET_LEN                          = 16  ;

static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_PURGE_IN_PROG                  = 0   ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_PURGE_DONE                     = 1   ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_CRESP_OV                       = 2   ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_REPAIR                         = 3   ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_BUF_WAIT                       = 4   ;
static const uint8_t P9N2_EQ_HTM_STAT_STATUS_TRIG_DROPPED_Q                       = 5   ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_ADDR_ERROR                     = 6   ;
static const uint8_t P9N2_EQ_HTM_STAT_STATUS_REC_DROPPED_Q                        = 7   ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_INIT                           = 8   ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_PREREQ                         = 9   ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_READY                          = 10  ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_TRACING                        = 11  ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_PAUSED                         = 12  ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_FLUSH                          = 13  ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_COMPLETE                       = 14  ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_ENABLE                         = 15  ;
static const uint8_t P9N2_EQ_HTM_STAT_HTMCO_STATUS_STAMP                          = 16  ;
static const uint8_t P9N2_EQ_HTM_STAT_STATUS_SCOM_ERROR                           = 17  ;
static const uint8_t P9N2_EQ_HTM_STAT_STATUS_UNUSED                               = 18  ;
static const uint8_t P9N2_EQ_HTM_STAT_STATUS_UNUSED_LEN                           = 2   ;

static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_PURGE_IN_PROG                  = 0   ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_PURGE_DONE                     = 1   ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_CRESP_OV                       = 2   ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_REPAIR                         = 3   ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_BUF_WAIT                       = 4   ;
static const uint8_t P9N2_EX_HTM_STAT_STATUS_TRIG_DROPPED_Q                       = 5   ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_ADDR_ERROR                     = 6   ;
static const uint8_t P9N2_EX_HTM_STAT_STATUS_REC_DROPPED_Q                        = 7   ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_INIT                           = 8   ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_PREREQ                         = 9   ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_READY                          = 10  ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_TRACING                        = 11  ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_PAUSED                         = 12  ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_FLUSH                          = 13  ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_COMPLETE                       = 14  ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_ENABLE                         = 15  ;
static const uint8_t P9N2_EX_HTM_STAT_HTMCO_STATUS_STAMP                          = 16  ;
static const uint8_t P9N2_EX_HTM_STAT_STATUS_SCOM_ERROR                           = 17  ;
static const uint8_t P9N2_EX_HTM_STAT_STATUS_UNUSED                               = 18  ;
static const uint8_t P9N2_EX_HTM_STAT_STATUS_UNUSED_LEN                           = 2   ;

static const uint8_t P9N2_EQ_HTM_TRIG_HTMSC_START                                 = 0   ;
static const uint8_t P9N2_EQ_HTM_TRIG_HTMSC_STOP                                  = 1   ;
static const uint8_t P9N2_EQ_HTM_TRIG_HTMSC_PAUSE                                 = 2   ;
static const uint8_t P9N2_EQ_HTM_TRIG_HTMSC_STOP_ALT                              = 3   ;
static const uint8_t P9N2_EQ_HTM_TRIG_HTMSC_RESET                                 = 4   ;
static const uint8_t P9N2_EQ_HTM_TRIG_HTMSC_MARK_VALID                            = 5   ;
static const uint8_t P9N2_EQ_HTM_TRIG_HTMSC_MARK_TYPE                             = 6   ;
static const uint8_t P9N2_EQ_HTM_TRIG_HTMSC_MARK_TYPE_LEN                         = 10  ;

static const uint8_t P9N2_EX_HTM_TRIG_HTMSC_START                                 = 0   ;
static const uint8_t P9N2_EX_HTM_TRIG_HTMSC_STOP                                  = 1   ;
static const uint8_t P9N2_EX_HTM_TRIG_HTMSC_PAUSE                                 = 2   ;
static const uint8_t P9N2_EX_HTM_TRIG_HTMSC_STOP_ALT                              = 3   ;
static const uint8_t P9N2_EX_HTM_TRIG_HTMSC_RESET                                 = 4   ;
static const uint8_t P9N2_EX_HTM_TRIG_HTMSC_MARK_VALID                            = 5   ;
static const uint8_t P9N2_EX_HTM_TRIG_HTMSC_MARK_TYPE                             = 6   ;
static const uint8_t P9N2_EX_HTM_TRIG_HTMSC_MARK_TYPE_LEN                         = 10  ;

static const uint8_t P9N2_EX_L2_HV_STATE_VT0_MSR_HV                               = 56  ;
static const uint8_t P9N2_EX_L2_HV_STATE_VT1_MSR_HV                               = 57  ;
static const uint8_t P9N2_EX_L2_HV_STATE_VT2_MSR_HV                               = 58  ;
static const uint8_t P9N2_EX_L2_HV_STATE_VT3_MSR_HV                               = 59  ;
static const uint8_t P9N2_EX_L2_HV_STATE_VT0_MSR_PR                               = 60  ;
static const uint8_t P9N2_EX_L2_HV_STATE_VT1_MSR_PR                               = 61  ;
static const uint8_t P9N2_EX_L2_HV_STATE_VT2_MSR_PR                               = 62  ;
static const uint8_t P9N2_EX_L2_HV_STATE_VT3_MSR_PR                               = 63  ;

static const uint8_t P9N2_C_HV_STATE_VT0_MSR_HV                                   = 56  ;
static const uint8_t P9N2_C_HV_STATE_VT1_MSR_HV                                   = 57  ;
static const uint8_t P9N2_C_HV_STATE_VT2_MSR_HV                                   = 58  ;
static const uint8_t P9N2_C_HV_STATE_VT3_MSR_HV                                   = 59  ;
static const uint8_t P9N2_C_HV_STATE_VT0_MSR_PR                                   = 60  ;
static const uint8_t P9N2_C_HV_STATE_VT1_MSR_PR                                   = 61  ;
static const uint8_t P9N2_C_HV_STATE_VT2_MSR_PR                                   = 62  ;
static const uint8_t P9N2_C_HV_STATE_VT3_MSR_PR                                   = 63  ;

static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_UNUSED                             = 0   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_UNUSED_LEN                         = 4   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFBC_EAT_OVERFLOW_HOLD_OUT_2      = 4   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFBC_EATAG_MISMATCHES_IFAR_HOLD_OUT_2 = 5   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFBC_IFAR_PARITY_HOLD_OUT_2       = 6   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFBC_LNK_STK_OR_CC_PTY_HOLD_OUT_2 = 7   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFBC_MULTI_THREAD_HOLD_OUT_2      = 8   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFBC_EAT_UNDERFLOW_HOLD_OUT_2     = 9   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFSE_SPR_PARITY_HOLD_OUT_2        = 10  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFAC_EAT_WRITE_CONFLICT_HOLD_OUT_2 = 11  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFEC_DYNAMIC_IC_DELETE_HOLD_OUT   = 12  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFEC_EADIR_ILLEGAL_HOLD_OUT       = 13  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFEC_ERAT_PTY_HOLD_OUT            = 14  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_0_IFFEC_ICACHE_MISSING_EADIR_WRT_HOLD_OUT = 15  ;

static const uint8_t P9N2_C_IFU_HOLD_OUT_0_UNUSED                                 = 0   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_UNUSED_LEN                             = 4   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFBC_EAT_OVERFLOW_HOLD_OUT_2          = 4   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFBC_EATAG_MISMATCHES_IFAR_HOLD_OUT_2 = 5   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFBC_IFAR_PARITY_HOLD_OUT_2           = 6   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFBC_LNK_STK_OR_CC_PTY_HOLD_OUT_2     = 7   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFBC_MULTI_THREAD_HOLD_OUT_2          = 8   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFBC_EAT_UNDERFLOW_HOLD_OUT_2         = 9   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFSE_SPR_PARITY_HOLD_OUT_2            = 10  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFAC_EAT_WRITE_CONFLICT_HOLD_OUT_2    = 11  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFEC_DYNAMIC_IC_DELETE_HOLD_OUT       = 12  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFEC_EADIR_ILLEGAL_HOLD_OUT           = 13  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFEC_ERAT_PTY_HOLD_OUT                = 14  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_0_IFFEC_ICACHE_MISSING_EADIR_WRT_HOLD_OUT = 15  ;

static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFFEC_ICACHE_PE_HOLD_OUT           = 0   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFFEC_IDIR_EA_PTY_HOLD_OUT         = 1   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFFEC_IDIR_PTY_HOLD_OUT            = 2   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFFEC_IERAT_WRT_EA_HOLD_OUT        = 3   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFFEC_IFAR_CHECK1_HOLD_OUT         = 4   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFFEC_IFAR_CHECK2_HOLD_OUT         = 5   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFFEC_IFFIW_IDIR_HOLD_OUT          = 6   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_0      = 7   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2        = 8   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_2      = 9   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_3      = 10  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_4      = 11  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_5      = 12  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFFLC_WRITE_COLL_HOLD_OUT_2        = 13  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFDFE_IDU_FETCH_LENGTH_ERROR_HOLD_OUT_2 = 14  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_1_IFDFE_IBUF_OVERRUN_ERROR_HOLD_OUT_2 = 15  ;

static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFFEC_ICACHE_PE_HOLD_OUT               = 0   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFFEC_IDIR_EA_PTY_HOLD_OUT             = 1   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFFEC_IDIR_PTY_HOLD_OUT                = 2   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFFEC_IERAT_WRT_EA_HOLD_OUT            = 3   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFFEC_IFAR_CHECK1_HOLD_OUT             = 4   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFFEC_IFAR_CHECK2_HOLD_OUT             = 5   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFFEC_IFFIW_IDIR_HOLD_OUT              = 6   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_0          = 7   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2            = 8   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_2          = 9   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_3          = 10  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_4          = 11  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFDPOP_IBUF_PERR_HOLD_OUT_2_5          = 12  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFFLC_WRITE_COLL_HOLD_OUT_2            = 13  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFDFE_IDU_FETCH_LENGTH_ERROR_HOLD_OUT_2 = 14  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_1_IFDFE_IBUF_OVERRUN_ERROR_HOLD_OUT_2    = 15  ;

static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFFSE_MFSPR_COLLISION_ERR_HOLD_OUT = 0   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFFPF_IFAR_VLD_IN_QERR_HOLD_OUT    = 1   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFFPF_L2_RELOAD_COMING_QERR_HOLD_OUT = 2   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFFPF_L2_RELOAD_INTERF_QERR_HOLD_OUT = 3   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFFPF_MULTI_RLDM_HAS_SAME_EA_QERR_HOLD_OUT = 4   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFFCP_CIABR_PERR_HOLD_OUT          = 5   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_UNUSED_1                           = 6   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFFMSR_MSR_DATA_PERR_HOLD_OUT_3    = 7   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFBBC_BREX_PRED_CHECKER_HOLD_OUT   = 8   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFBBX_RFILE_EAT_BR_ERR_HOLD_OUT_3  = 9   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFBBX_RFILE_EAT_BRP1_ERR_HOLD_OUT_3 = 10  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFBBX_RFILE_LKCT0_ARF_ERR_HOLD_OUT_3 = 11  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFBBX_RFILE_LKCT0_ROB_ERR_HOLD_OUT_3 = 12  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFBBX_RFILE_LKCT1_ARF_ERR_HOLD_OUT_3 = 13  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFBBX_RFILE_LKCT1_ROB_ERR_HOLD_OUT_3 = 14  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_2_IFBBC_BREX_ROB_WR_COLLISION_HOLD_OUT = 15  ;

static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFFSE_MFSPR_COLLISION_ERR_HOLD_OUT     = 0   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFFPF_IFAR_VLD_IN_QERR_HOLD_OUT        = 1   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFFPF_L2_RELOAD_COMING_QERR_HOLD_OUT   = 2   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFFPF_L2_RELOAD_INTERF_QERR_HOLD_OUT   = 3   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFFPF_MULTI_RLDM_HAS_SAME_EA_QERR_HOLD_OUT = 4   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFFCP_CIABR_PERR_HOLD_OUT              = 5   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_UNUSED_1                               = 6   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFFMSR_MSR_DATA_PERR_HOLD_OUT_3        = 7   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFBBC_BREX_PRED_CHECKER_HOLD_OUT       = 8   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFBBX_RFILE_EAT_BR_ERR_HOLD_OUT_3      = 9   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFBBX_RFILE_EAT_BRP1_ERR_HOLD_OUT_3    = 10  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFBBX_RFILE_LKCT0_ARF_ERR_HOLD_OUT_3   = 11  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFBBX_RFILE_LKCT0_ROB_ERR_HOLD_OUT_3   = 12  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFBBX_RFILE_LKCT1_ARF_ERR_HOLD_OUT_3   = 13  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFBBX_RFILE_LKCT1_ROB_ERR_HOLD_OUT_3   = 14  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_2_IFBBC_BREX_ROB_WR_COLLISION_HOLD_OUT   = 15  ;

static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFBSC_MFSPR_LOG_CRIT_P_HOLD_OUT    = 0   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFBSC_MFSPR_LOG_NONCRIT_P_HOLD_OUT = 1   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFBSC_MFSPR_RFILE_CRIT_P_HOLD_OUT  = 2   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFBSC_MFSPR_RFILE_NONCRIT_P_HOLD_OUT = 3   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFBBC_BREX_EATAG_OUTOFRANGE_HOLD_OUT_2 = 4   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFBBC_BREX_FLUSH_CHECKER_HOLD_OUT_2 = 5   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFFAC_S0_NIA_P_HOLD_OUT            = 6   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFFAC_S0_TAIL_P_HOLD_OUT           = 7   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFFAC_REFETCH_OUTOFRANGE_HOLD_OUT  = 8   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFFAC_S0_COMP_EATAG_OUTOFRANGE_HOLD_OUT = 9   ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFFAC_S0_NIA_EATAG_OUTOFRANGE_HOLD_OUT = 10  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_UNUSED_2                           = 11  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFFRC_REFETCH_EAT_P_HOLD_OUT       = 12  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_IFFRC_REFETCH_SPR_P_HOLD_OUT       = 13  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_TCC_TC_FIR_SCOM_HOLD_OUT           = 14  ;
static const uint8_t P9N2_EX_L2_IFU_HOLD_OUT_3_UNUSED                             = 15  ;

static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFBSC_MFSPR_LOG_CRIT_P_HOLD_OUT        = 0   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFBSC_MFSPR_LOG_NONCRIT_P_HOLD_OUT     = 1   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFBSC_MFSPR_RFILE_CRIT_P_HOLD_OUT      = 2   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFBSC_MFSPR_RFILE_NONCRIT_P_HOLD_OUT   = 3   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFBBC_BREX_EATAG_OUTOFRANGE_HOLD_OUT_2 = 4   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFBBC_BREX_FLUSH_CHECKER_HOLD_OUT_2    = 5   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFFAC_S0_NIA_P_HOLD_OUT                = 6   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFFAC_S0_TAIL_P_HOLD_OUT               = 7   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFFAC_REFETCH_OUTOFRANGE_HOLD_OUT      = 8   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFFAC_S0_COMP_EATAG_OUTOFRANGE_HOLD_OUT = 9   ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFFAC_S0_NIA_EATAG_OUTOFRANGE_HOLD_OUT = 10  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_UNUSED_2                               = 11  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFFRC_REFETCH_EAT_P_HOLD_OUT           = 12  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_IFFRC_REFETCH_SPR_P_HOLD_OUT           = 13  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_TCC_TC_FIR_SCOM_HOLD_OUT               = 14  ;
static const uint8_t P9N2_C_IFU_HOLD_OUT_3_UNUSED                                 = 15  ;

static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECONL_0                               = 0   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECRL_0                                = 1   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECH_0                                 = 2   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECP_0                                 = 3   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECS_0                                 = 4   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECA_0                                 = 5   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECTA0_0                               = 6   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECTA1_0                               = 7   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECUS0_0                               = 8   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECUS1_0                               = 9   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECONL_1                               = 10  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECRL_1                                = 11  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECH_1                                 = 12  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECP_1                                 = 13  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECS_1                                 = 14  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECA_1                                 = 15  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECTA0_1                               = 16  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECTA1_1                               = 17  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECUS0_1                               = 18  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECUS1_1                               = 19  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECONL_2                               = 20  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECRL_2                                = 21  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECH_2                                 = 22  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECP_2                                 = 23  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECS_2                                 = 24  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECA_2                                 = 25  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECTA0_2                               = 26  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECTA1_2                               = 27  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECUS0_2                               = 28  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ECUS1_2                               = 29  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_IC_TAP                                = 30  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_IC_TAP_LEN                            = 3   ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_DISABLE_WRAP                          = 33  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_CME_POWSAV                            = 34  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_ONL_OVR                               = 35  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_DIS_D_PRE                             = 36  ;
static const uint8_t P9N2_EX_IMA_EVENT_MASK_DIS_I_PRE                             = 37  ;

static const uint8_t P9N2_C_IMA_EVENT_MASK_ECONL_0                                = 0   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECRL_0                                 = 1   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECH_0                                  = 2   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECP_0                                  = 3   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECS_0                                  = 4   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECA_0                                  = 5   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECTA0_0                                = 6   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECTA1_0                                = 7   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECUS0_0                                = 8   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECUS1_0                                = 9   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECONL_1                                = 10  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECRL_1                                 = 11  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECH_1                                  = 12  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECP_1                                  = 13  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECS_1                                  = 14  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECA_1                                  = 15  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECTA0_1                                = 16  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECTA1_1                                = 17  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECUS0_1                                = 18  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECUS1_1                                = 19  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECONL_2                                = 20  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECRL_2                                 = 21  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECH_2                                  = 22  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECP_2                                  = 23  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECS_2                                  = 24  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECA_2                                  = 25  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECTA0_2                                = 26  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECTA1_2                                = 27  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECUS0_2                                = 28  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ECUS1_2                                = 29  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_IC_TAP                                 = 30  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_IC_TAP_LEN                             = 3   ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_DISABLE_WRAP                           = 33  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_CME_POWSAV                             = 34  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_ONL_OVR                                = 35  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_DIS_D_PRE                              = 36  ;
static const uint8_t P9N2_C_IMA_EVENT_MASK_DIS_I_PRE                              = 37  ;

static const uint8_t P9N2_EX_IMA_TRACE_SAMPSEL                                    = 0   ;
static const uint8_t P9N2_EX_IMA_TRACE_SAMPSEL_LEN                                = 2   ;
static const uint8_t P9N2_EX_IMA_TRACE_CPMC_LOAD                                  = 2   ;
static const uint8_t P9N2_EX_IMA_TRACE_CPMC_LOAD_LEN                              = 32  ;
static const uint8_t P9N2_EX_IMA_TRACE_CPMC1SEL                                   = 34  ;
static const uint8_t P9N2_EX_IMA_TRACE_CPMC1SEL_LEN                               = 7   ;
static const uint8_t P9N2_EX_IMA_TRACE_CPMC2SEL                                   = 41  ;
static const uint8_t P9N2_EX_IMA_TRACE_CPMC2SEL_LEN                               = 7   ;
static const uint8_t P9N2_EX_IMA_TRACE_BUFFERSIZE                                 = 48  ;
static const uint8_t P9N2_EX_IMA_TRACE_BUFFERSIZE_LEN                             = 3   ;

static const uint8_t P9N2_C_IMA_TRACE_SAMPSEL                                     = 0   ;
static const uint8_t P9N2_C_IMA_TRACE_SAMPSEL_LEN                                 = 2   ;
static const uint8_t P9N2_C_IMA_TRACE_CPMC_LOAD                                   = 2   ;
static const uint8_t P9N2_C_IMA_TRACE_CPMC_LOAD_LEN                               = 32  ;
static const uint8_t P9N2_C_IMA_TRACE_CPMC1SEL                                    = 34  ;
static const uint8_t P9N2_C_IMA_TRACE_CPMC1SEL_LEN                                = 7   ;
static const uint8_t P9N2_C_IMA_TRACE_CPMC2SEL                                    = 41  ;
static const uint8_t P9N2_C_IMA_TRACE_CPMC2SEL_LEN                                = 7   ;
static const uint8_t P9N2_C_IMA_TRACE_BUFFERSIZE                                  = 48  ;
static const uint8_t P9N2_C_IMA_TRACE_BUFFERSIZE_LEN                              = 3   ;

static const uint8_t P9N2_EQ_INJECT_REG_THERM_TRIP                                = 0   ;
static const uint8_t P9N2_EQ_INJECT_REG_THERM_TRIP_LEN                            = 2   ;
static const uint8_t P9N2_EQ_INJECT_REG_THERM_MODE                                = 2   ;
static const uint8_t P9N2_EQ_INJECT_REG_THERM_MODE_LEN                            = 2   ;

static const uint8_t P9N2_EX_INJECT_REG_THERM_TRIP                                = 0   ;
static const uint8_t P9N2_EX_INJECT_REG_THERM_TRIP_LEN                            = 2   ;
static const uint8_t P9N2_EX_INJECT_REG_THERM_MODE                                = 2   ;
static const uint8_t P9N2_EX_INJECT_REG_THERM_MODE_LEN                            = 2   ;

static const uint8_t P9N2_C_INJECT_REG_THERM_TRIP                                 = 0   ;
static const uint8_t P9N2_C_INJECT_REG_THERM_TRIP_LEN                             = 2   ;
static const uint8_t P9N2_C_INJECT_REG_THERM_MODE                                 = 2   ;
static const uint8_t P9N2_C_INJECT_REG_THERM_MODE_LEN                             = 2   ;

static const uint8_t P9N2_EQ_INJ_REG_STQ_ERR                                      = 0   ;
static const uint8_t P9N2_EQ_INJ_REG_STQ_ERR_LEN                                  = 2   ;

static const uint8_t P9N2_EX_INJ_REG_STQ_ERR                                      = 0   ;
static const uint8_t P9N2_EX_INJ_REG_STQ_ERR_LEN                                  = 2   ;

static const uint8_t P9N2_EX_L2_INV_ERATE_INVALIDATE_ERAT                         = 63  ;

static const uint8_t P9N2_C_INV_ERATE_INVALIDATE_ERAT                             = 63  ;

static const uint8_t P9N2_EX_L2_ISU_DEBUG_CTRL_ISU_HLD_OUT_REG6                   = 0   ;
static const uint8_t P9N2_EX_L2_ISU_DEBUG_CTRL_ISU_HLD_OUT_REG6_LEN               = 18  ;

static const uint8_t P9N2_C_ISU_DEBUG_CTRL_ISU_HLD_OUT_REG6                       = 0   ;
static const uint8_t P9N2_C_ISU_DEBUG_CTRL_ISU_HLD_OUT_REG6_LEN                   = 18  ;

static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_HEIR_CHKSTOP_HOLD_OUT = 0   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_HSRR1_CHKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_MSR_CHKSTOP_HOLD_OUT = 2   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_SRR1_CHKSTOP_HOLD_OUT = 3   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_VRSAVE_BKUP_CHKSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_VRSAVE_CHKSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_FSCR_CHKSTOP_HOLD_OUT = 6   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_HFSCR_CHKSTOP_HOLD_OUT = 7   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_TEXASR_CHKSTOP_HOLD_OUT = 8   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_BESCR_CHKSTOP_HOLD_OUT = 9   ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCX_SDCU_T0_MCHK_AND_ME_EQ_0_HOLD_OUT = 12  ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCR_ERR_INJ                    = 13  ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCC_T0_HEAD_TAIL_XSTOP         = 14  ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCC_T1_HEAD_TAIL_XSTOP         = 15  ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCC_T2_HEAD_TAIL_XSTOP         = 16  ;
static const uint8_t P9N2_EX_L2_ISU_REG0_HOLD_OUT_SDCC_T3_HEAD_TAIL_XSTOP         = 17  ;

static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_HEIR_CHKSTOP_HOLD_OUT  = 0   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_HSRR1_CHKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_MSR_CHKSTOP_HOLD_OUT   = 2   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_SRR1_CHKSTOP_HOLD_OUT  = 3   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_VRSAVE_BKUP_CHKSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_VRSAVE_CHKSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_FSCR_CHKSTOP_HOLD_OUT  = 6   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_HFSCR_CHKSTOP_HOLD_OUT = 7   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_TEXASR_CHKSTOP_HOLD_OUT = 8   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCO_T0_BESCR_CHKSTOP_HOLD_OUT = 9   ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCX_SDCU_T0_MCHK_AND_ME_EQ_0_HOLD_OUT = 12  ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCR_ERR_INJ                        = 13  ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCC_T0_HEAD_TAIL_XSTOP             = 14  ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCC_T1_HEAD_TAIL_XSTOP             = 15  ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCC_T2_HEAD_TAIL_XSTOP             = 16  ;
static const uint8_t P9N2_C_ISU_REG0_HOLD_OUT_SDCC_T3_HEAD_TAIL_XSTOP             = 17  ;

static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_HEIR_CHKSTOP_HOLD_OUT = 0   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_HSRR1_CHKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_MSR_CHKSTOP_HOLD_OUT = 2   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_SRR1_CHKSTOP_HOLD_OUT = 3   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_VRSAVE_BKUP_CHKSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_VRSAVE_CHKSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_FSCR_CHKSTOP_HOLD_OUT = 6   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_HFSCR_CHKSTOP_HOLD_OUT = 7   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_TEXASR_CHKSTOP_HOLD_OUT = 8   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_BESCR_CHKSTOP_HOLD_OUT = 9   ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCX_SDCU_T1_MCHK_AND_ME_EQ_0_HOLD_OUT = 12  ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_ERR_INJ_RECOV                   = 13  ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCCC_T0_COMP_RCOV              = 14  ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCCC_T1_COMP_RCOV              = 15  ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCCC_T2_COMP_RCOV              = 16  ;
static const uint8_t P9N2_EX_L2_ISU_REG1_HOLD_OUT_SDCCC_T3_COMP_RCOV              = 17  ;

static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_HEIR_CHKSTOP_HOLD_OUT  = 0   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_HSRR1_CHKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_MSR_CHKSTOP_HOLD_OUT   = 2   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_SRR1_CHKSTOP_HOLD_OUT  = 3   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_VRSAVE_BKUP_CHKSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_VRSAVE_CHKSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_FSCR_CHKSTOP_HOLD_OUT  = 6   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_HFSCR_CHKSTOP_HOLD_OUT = 7   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_TEXASR_CHKSTOP_HOLD_OUT = 8   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCO_T1_BESCR_CHKSTOP_HOLD_OUT = 9   ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCX_SDCU_T1_MCHK_AND_ME_EQ_0_HOLD_OUT = 12  ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_ERR_INJ_RECOV                       = 13  ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCCC_T0_COMP_RCOV                  = 14  ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCCC_T1_COMP_RCOV                  = 15  ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCCC_T2_COMP_RCOV                  = 16  ;
static const uint8_t P9N2_C_ISU_REG1_HOLD_OUT_SDCCC_T3_COMP_RCOV                  = 17  ;

static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_HEIR_CHKSTOP_HOLD_OUT = 0   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_HSRR1_CHKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_MSR_CHKSTOP_HOLD_OUT = 2   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_SRR1_CHKSTOP_HOLD_OUT = 3   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_VRSAVE_BKUP_CHKSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_VRSAVE_CHKSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_FSCR_CHKSTOP_HOLD_OUT = 6   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_HFSCR_CHKSTOP_HOLD_OUT = 7   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_TEXASR_CHKSTOP_HOLD_OUT = 8   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_BESCR_CHKSTOP_HOLD_OUT = 9   ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCX_SDCU_T2_MCHK_AND_ME_EQ_0_HOLD_OUT = 12  ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_WAT_INJECT_INT                  = 13  ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCA_RCOV                       = 14  ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCU_RAM_XSTOP                  = 15  ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_SDCU_XSTOP                      = 16  ;
static const uint8_t P9N2_EX_L2_ISU_REG2_HOLD_OUT_WAT_INJECT_INT_RECOV            = 17  ;

static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_HEIR_CHKSTOP_HOLD_OUT  = 0   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_HSRR1_CHKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_MSR_CHKSTOP_HOLD_OUT   = 2   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_SRR1_CHKSTOP_HOLD_OUT  = 3   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_VRSAVE_BKUP_CHKSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_VRSAVE_CHKSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_FSCR_CHKSTOP_HOLD_OUT  = 6   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_HFSCR_CHKSTOP_HOLD_OUT = 7   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_TEXASR_CHKSTOP_HOLD_OUT = 8   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCO_T2_BESCR_CHKSTOP_HOLD_OUT = 9   ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCX_SDCU_T2_MCHK_AND_ME_EQ_0_HOLD_OUT = 12  ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_WAT_INJECT_INT                      = 13  ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCA_RCOV                           = 14  ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCU_RAM_XSTOP                      = 15  ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_SDCU_XSTOP                          = 16  ;
static const uint8_t P9N2_C_ISU_REG2_HOLD_OUT_WAT_INJECT_INT_RECOV                = 17  ;

static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_HEIR_CHKSTOP_HOLD_OUT = 0   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_HSRR1_CHKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_MSR_CHKSTOP_HOLD_OUT = 2   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_SRR1_CHKSTOP_HOLD_OUT = 3   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_VRSAVE_BKUP_CHKSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_VRSAVE_CHKSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_FSCR_CHKSTOP_HOLD_OUT = 6   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_HFSCR_CHKSTOP_HOLD_OUT = 7   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_TEXASR_CHKSTOP_HOLD_OUT = 8   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_BESCR_CHKSTOP_HOLD_OUT = 9   ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCX_SDCU_T3_MCHK_AND_ME_EQ_0_HOLD_OUT = 12  ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCV_T0_FLUSH_XSTOP             = 13  ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCV_T1_FLUSH_XSTOP             = 14  ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCV_T2_FLUSH_XSTOP             = 15  ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDCV_T3_FLUSH_XSTOP             = 16  ;
static const uint8_t P9N2_EX_L2_ISU_REG3_HOLD_OUT_SDKSMRF_SS0_1B                  = 17  ;

static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_HEIR_CHKSTOP_HOLD_OUT  = 0   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_HSRR1_CHKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_MSR_CHKSTOP_HOLD_OUT   = 2   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_SRR1_CHKSTOP_HOLD_OUT  = 3   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_VRSAVE_BKUP_CHKSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_VRSAVE_CHKSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_FSCR_CHKSTOP_HOLD_OUT  = 6   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_HFSCR_CHKSTOP_HOLD_OUT = 7   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_TEXASR_CHKSTOP_HOLD_OUT = 8   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCO_T3_BESCR_CHKSTOP_HOLD_OUT = 9   ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCX_SDCU_T3_MCHK_AND_ME_EQ_0_HOLD_OUT = 12  ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCV_T0_FLUSH_XSTOP                 = 13  ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCV_T1_FLUSH_XSTOP                 = 14  ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCV_T2_FLUSH_XSTOP                 = 15  ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDCV_T3_FLUSH_XSTOP                 = 16  ;
static const uint8_t P9N2_C_ISU_REG3_HOLD_OUT_SDKSMRF_SS0_1B                      = 17  ;

static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_SDKSMRF_SS1_1B                  = 0   ;
static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_SDKSMRF_SS0_2B_XSTOP            = 1   ;
static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_SDKSMRF_SS1_2B_XSTOP            = 2   ;
static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_SDCXC_ERR_RPT                   = 3   ;
static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_SDCC_T0_CRITICAL_IS_XSTOP       = 4   ;
static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_SDCC_T1_CRITICAL_IS_XSTOP       = 5   ;
static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_SDCC_T2_CRITICAL_IS_XSTOP       = 6   ;
static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_SDCC_T3_CRITICAL_IS_XSTOP       = 7   ;
static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_GND                             = 8   ;
static const uint8_t P9N2_EX_L2_ISU_REG4_HOLD_OUT_GND_LEN                         = 10  ;

static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_SDKSMRF_SS1_1B                      = 0   ;
static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_SDKSMRF_SS0_2B_XSTOP                = 1   ;
static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_SDKSMRF_SS1_2B_XSTOP                = 2   ;
static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_SDCXC_ERR_RPT                       = 3   ;
static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_SDCC_T0_CRITICAL_IS_XSTOP           = 4   ;
static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_SDCC_T1_CRITICAL_IS_XSTOP           = 5   ;
static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_SDCC_T2_CRITICAL_IS_XSTOP           = 6   ;
static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_SDCC_T3_CRITICAL_IS_XSTOP           = 7   ;
static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_GND                                 = 8   ;
static const uint8_t P9N2_C_ISU_REG4_HOLD_OUT_GND_LEN                             = 10  ;

static const uint8_t P9N2_EX_L2_ISU_REG5_HOLD_OUT_GND                             = 0   ;
static const uint8_t P9N2_EX_L2_ISU_REG5_HOLD_OUT_GND_LEN                         = 18  ;

static const uint8_t P9N2_C_ISU_REG5_HOLD_OUT_GND                                 = 0   ;
static const uint8_t P9N2_C_ISU_REG5_HOLD_OUT_GND_LEN                             = 18  ;

static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_L3SDRTL0_BAD_HPC                     = 0   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_L3SDRTL1_BAD_HPC                     = 1   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_L3CORTR_NO_LCO_TGTS                  = 2   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN0_RCMD_TTAG_P                      = 3   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN1_RCMD_TTAG_P                      = 4   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN0_RCMD_ADDR_P                      = 5   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN1_RCMD_ADDR_P                      = 6   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN0_CRESP_TTAG_P                     = 7   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN1_CRESP_TTAG_P                     = 8   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN0_CRESP_ATAG_P                     = 9   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN1_CRESP_ATAG_P                     = 10  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_DATA_RTAG_P                          = 11  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_PF_UNSOLICITED_CRESP                 = 12  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN_UNSOLICITED_CRESP                 = 13  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_CO_UNSOLICITED_CRESP                 = 14  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_MC_FP_MATE_CMD_ERR2                  = 15  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_MC_FP_MATE_CMD_ERR3                  = 16  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SPARE_17                             = 17  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_WI_UNSOLICITED_DATA                  = 18  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_PF_UNSOLICITED_DATA                  = 19  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_TM_CAM                               = 20  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_TM_CAM_LEN                           = 4   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_COFSM_ADDR                           = 24  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SNFSM_ADDR                           = 25  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_L3SDRTL0_CACHE_INHIBIT               = 26  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_L3SDRTL1_CACHE_INHIBIT               = 27  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_L3SDRTL2_CACHE_INHIBIT               = 28  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_L3SDRTL3_CACHE_INHIBIT               = 29  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_L3SDRTL2_BAD_HPC                     = 30  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_L3SDRTL3_BAD_HPC                     = 31  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_SN_MACHINE_HANG                      = 32  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_RD_MACHINE_HANG                      = 33  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_CI_MACHINE_HANG                      = 34  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT0_REG_CO_MACHINE_HANG                      = 35  ;

static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_L3SDRTL0_BAD_HPC                  = 0   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_L3SDRTL1_BAD_HPC                  = 1   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_L3CORTR_NO_LCO_TGTS               = 2   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN0_RCMD_TTAG_P                   = 3   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN1_RCMD_TTAG_P                   = 4   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN0_RCMD_ADDR_P                   = 5   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN1_RCMD_ADDR_P                   = 6   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN0_CRESP_TTAG_P                  = 7   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN1_CRESP_TTAG_P                  = 8   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN0_CRESP_ATAG_P                  = 9   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN1_CRESP_ATAG_P                  = 10  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_DATA_RTAG_P                       = 11  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_PF_UNSOLICITED_CRESP              = 12  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN_UNSOLICITED_CRESP              = 13  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_CO_UNSOLICITED_CRESP              = 14  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_MC_FP_MATE_CMD_ERR2               = 15  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_MC_FP_MATE_CMD_ERR3               = 16  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SPARE_17                          = 17  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_WI_UNSOLICITED_DATA               = 18  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_PF_UNSOLICITED_DATA               = 19  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_TM_CAM                            = 20  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_TM_CAM_LEN                        = 4   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_COFSM_ADDR                        = 24  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SNFSM_ADDR                        = 25  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_L3SDRTL0_CACHE_INHIBIT            = 26  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_L3SDRTL1_CACHE_INHIBIT            = 27  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_L3SDRTL2_CACHE_INHIBIT            = 28  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_L3SDRTL3_CACHE_INHIBIT            = 29  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_L3SDRTL2_BAD_HPC                  = 30  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_L3SDRTL3_BAD_HPC                  = 31  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_SN_MACHINE_HANG                   = 32  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_RD_MACHINE_HANG                   = 33  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_CI_MACHINE_HANG                   = 34  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT0_REG_CO_MACHINE_HANG                   = 35  ;

static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_PF_MACHINE_HANG                      = 0   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_WI_MACHINE_HANG                      = 1   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3L2CTL_RD_OVERRUN_CK                = 2   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3L2CTL_PF_OVERRUN_CK                = 3   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3CICTL_CI_OVERRUN_CK                = 4   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3XMEMA0_DW_DIR_HIT                  = 5   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3XMEMA1_DW_DIR_HIT                  = 6   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3XMEMA0_CRW_DIR_HIT                 = 7   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3XMEMA1_CRW_DIR_HIT                 = 8   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_PBEXCA0_CMD_REQ_ERR0                 = 9   ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_PBEXCA0_CMD_REQ_ERR1                 = 10  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_PBEXCA0_CMD_REQ_ERR2                 = 11  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_PBEXCA1_CMD_REQ_ERR0                 = 12  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_PBEXCA1_CMD_REQ_ERR1                 = 13  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_PBEXCA1_CMD_REQ_ERR2                 = 14  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_MC_FP_MATE_CMD_ERR0                  = 15  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_MC_FP_MATE_CMD_ERR1                  = 16  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3PBEXCA0_OVERFLOW                   = 17  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3PBEXCA1_OVERFLOW                   = 18  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3PBEXCA0_UNDERFLOW                  = 19  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_L3PBEXCA1_UNDERFLOW                  = 20  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_PF_MACHINE_W4DT_HANG                 = 21  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_WI_MACHINE_W4DT_HANG                 = 22  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_CO_CRESP_ACK_DEAD                    = 23  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_SN_CRESP_ACK_DEAD                    = 24  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_SN2_RCMD_TTAG_P                      = 25  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_SN3_RCMD_TTAG_P                      = 26  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_SN2_RCMD_ADDR_P                      = 27  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_SN3_RCMD_ADDR_P                      = 28  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_SN2_CRESP_TTAG_P                     = 29  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_SN3_CRESP_TTAG_P                     = 30  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_SN2_CRESP_ATAG_P                     = 31  ;
static const uint8_t P9N2_EQ_L3_ERR_RPT1_REG_SN3_CRESP_ATAG_P                     = 32  ;

static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_PF_MACHINE_HANG                   = 0   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_WI_MACHINE_HANG                   = 1   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3L2CTL_RD_OVERRUN_CK             = 2   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3L2CTL_PF_OVERRUN_CK             = 3   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3CICTL_CI_OVERRUN_CK             = 4   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3XMEMA0_DW_DIR_HIT               = 5   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3XMEMA1_DW_DIR_HIT               = 6   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3XMEMA0_CRW_DIR_HIT              = 7   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3XMEMA1_CRW_DIR_HIT              = 8   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_PBEXCA0_CMD_REQ_ERR0              = 9   ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_PBEXCA0_CMD_REQ_ERR1              = 10  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_PBEXCA0_CMD_REQ_ERR2              = 11  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_PBEXCA1_CMD_REQ_ERR0              = 12  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_PBEXCA1_CMD_REQ_ERR1              = 13  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_PBEXCA1_CMD_REQ_ERR2              = 14  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_MC_FP_MATE_CMD_ERR0               = 15  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_MC_FP_MATE_CMD_ERR1               = 16  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3PBEXCA0_OVERFLOW                = 17  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3PBEXCA1_OVERFLOW                = 18  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3PBEXCA0_UNDERFLOW               = 19  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_L3PBEXCA1_UNDERFLOW               = 20  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_PF_MACHINE_W4DT_HANG              = 21  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_WI_MACHINE_W4DT_HANG              = 22  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_CO_CRESP_ACK_DEAD                 = 23  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_SN_CRESP_ACK_DEAD                 = 24  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_SN2_RCMD_TTAG_P                   = 25  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_SN3_RCMD_TTAG_P                   = 26  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_SN2_RCMD_ADDR_P                   = 27  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_SN3_RCMD_ADDR_P                   = 28  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_SN2_CRESP_TTAG_P                  = 29  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_SN3_CRESP_TTAG_P                  = 30  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_SN2_CRESP_ATAG_P                  = 31  ;
static const uint8_t P9N2_EX_L3_L3_ERR_RPT1_REG_SN3_CRESP_ATAG_P                  = 32  ;

static const uint8_t P9N2_EQ_L3_RD_EPSILON_CFG_REG_WT4CR_TIER0_EPS_VAL            = 0   ;
static const uint8_t P9N2_EQ_L3_RD_EPSILON_CFG_REG_WT4CR_TIER0_EPS_VAL_LEN        = 12  ;
static const uint8_t P9N2_EQ_L3_RD_EPSILON_CFG_REG_WT4CR_TIER1_EPS_VAL            = 12  ;
static const uint8_t P9N2_EQ_L3_RD_EPSILON_CFG_REG_WT4CR_TIER1_EPS_VAL_LEN        = 12  ;
static const uint8_t P9N2_EQ_L3_RD_EPSILON_CFG_REG_WT4CR_TIER2_EPS_VAL            = 24  ;
static const uint8_t P9N2_EQ_L3_RD_EPSILON_CFG_REG_WT4CR_TIER2_EPS_VAL_LEN        = 12  ;
static const uint8_t P9N2_EQ_L3_RD_EPSILON_CFG_REG_EPS_MODE_SEL                   = 36  ;

static const uint8_t P9N2_EX_L3_RD_EPSILON_CFG_REG_WT4CR_TIER0_EPS_VAL            = 0   ;
static const uint8_t P9N2_EX_L3_RD_EPSILON_CFG_REG_WT4CR_TIER0_EPS_VAL_LEN        = 12  ;
static const uint8_t P9N2_EX_L3_RD_EPSILON_CFG_REG_WT4CR_TIER1_EPS_VAL            = 12  ;
static const uint8_t P9N2_EX_L3_RD_EPSILON_CFG_REG_WT4CR_TIER1_EPS_VAL_LEN        = 12  ;
static const uint8_t P9N2_EX_L3_RD_EPSILON_CFG_REG_WT4CR_TIER2_EPS_VAL            = 24  ;
static const uint8_t P9N2_EX_L3_RD_EPSILON_CFG_REG_WT4CR_TIER2_EPS_VAL_LEN        = 12  ;
static const uint8_t P9N2_EX_L3_RD_EPSILON_CFG_REG_EPS_MODE_SEL                   = 36  ;

static const uint8_t P9N2_EQ_L3_RTIM_PERIOD_MONITOR_MON                           = 0   ;
static const uint8_t P9N2_EQ_L3_RTIM_PERIOD_MONITOR_MON_LEN                       = 8   ;

static const uint8_t P9N2_EX_L3_L3_RTIM_PERIOD_MONITOR_MON                        = 0   ;
static const uint8_t P9N2_EX_L3_L3_RTIM_PERIOD_MONITOR_MON_LEN                    = 8   ;

static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_WT4CR_TIER1_EPS_VAL            = 0   ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_WT4CR_TIER1_EPS_VAL_LEN        = 12  ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_WT4CR_TIER2_EPS_VAL            = 12  ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_WT4CR_TIER2_EPS_VAL_LEN        = 12  ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_EN_WT4CR_EPS_ON_LCO            = 24  ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_EN_WT4CR_EXTENDED_MODE         = 25  ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_EPS_STEP_MODE                  = 26  ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_EPS_STEP_MODE_LEN              = 4   ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_EPS_DIVIDER_MODE               = 30  ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_EPS_DIVIDER_MODE_LEN           = 4   ;
static const uint8_t P9N2_EQ_L3_WR_EPSILON_CFG_REG_EPS_CNT_USE_DIVIDER_EN         = 34  ;

static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_WT4CR_TIER1_EPS_VAL         = 0   ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_WT4CR_TIER1_EPS_VAL_LEN     = 12  ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_WT4CR_TIER2_EPS_VAL         = 12  ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_WT4CR_TIER2_EPS_VAL_LEN     = 12  ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_EN_WT4CR_EPS_ON_LCO         = 24  ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_EN_WT4CR_EXTENDED_MODE      = 25  ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_EPS_STEP_MODE               = 26  ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_EPS_STEP_MODE_LEN           = 4   ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_EPS_DIVIDER_MODE            = 30  ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_EPS_DIVIDER_MODE_LEN        = 4   ;
static const uint8_t P9N2_EX_L3_L3_WR_EPSILON_CFG_REG_EPS_CNT_USE_DIVIDER_EN      = 34  ;

static const uint8_t P9N2_EQ_LINEDEL_TRIG_REG_TRIG                                = 0   ;
static const uint8_t P9N2_EQ_LINEDEL_TRIG_REG_DONE                                = 1   ;
static const uint8_t P9N2_EQ_LINEDEL_TRIG_REG_SPARE                               = 2   ;
static const uint8_t P9N2_EQ_LINEDEL_TRIG_REG_SPARE_LEN                           = 2   ;

static const uint8_t P9N2_EX_L2_LINEDEL_TRIG_REG_TRIG                             = 0   ;
static const uint8_t P9N2_EX_L2_LINEDEL_TRIG_REG_DONE                             = 1   ;
static const uint8_t P9N2_EX_L2_LINEDEL_TRIG_REG_SPARE                            = 2   ;
static const uint8_t P9N2_EX_L2_LINEDEL_TRIG_REG_SPARE_LEN                        = 2   ;

static const uint8_t P9N2_EQ_LINE_DELETED_MEMBERS_REG_L3                          = 0   ;
static const uint8_t P9N2_EQ_LINE_DELETED_MEMBERS_REG_L3_LEN                      = 5   ;

static const uint8_t P9N2_EX_L3_LINE_DELETED_MEMBERS_REG_L3                       = 0   ;
static const uint8_t P9N2_EX_L3_LINE_DELETED_MEMBERS_REG_L3_LEN                   = 5   ;

static const uint8_t P9N2_EQ_LOCAL_FIR_IN0                                        = 0   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN1                                        = 1   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN2                                        = 2   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN3                                        = 3   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN4                                        = 4   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN5                                        = 5   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN6                                        = 6   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN7                                        = 7   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN8                                        = 8   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN9                                        = 9   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN10                                       = 10  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN11                                       = 11  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN12                                       = 12  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN13                                       = 13  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN14                                       = 14  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN15                                       = 15  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN16                                       = 16  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN17                                       = 17  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN18                                       = 18  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN19                                       = 19  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN20                                       = 20  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN21                                       = 21  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN22                                       = 22  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN23                                       = 23  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN24                                       = 24  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN25                                       = 25  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN26                                       = 26  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN27                                       = 27  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN28                                       = 28  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN29                                       = 29  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN30                                       = 30  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN31                                       = 31  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN32                                       = 32  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN33                                       = 33  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN34                                       = 34  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN35                                       = 35  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN36                                       = 36  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN37                                       = 37  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN38                                       = 38  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN39                                       = 39  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN40                                       = 40  ;
static const uint8_t P9N2_EQ_LOCAL_FIR_IN41                                       = 41  ;

static const uint8_t P9N2_EX_LOCAL_FIR_IN0                                        = 0   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN1                                        = 1   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN2                                        = 2   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN3                                        = 3   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN4                                        = 4   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN5                                        = 5   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN6                                        = 6   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN7                                        = 7   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN8                                        = 8   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN9                                        = 9   ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN10                                       = 10  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN11                                       = 11  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN12                                       = 12  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN13                                       = 13  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN14                                       = 14  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN15                                       = 15  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN16                                       = 16  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN17                                       = 17  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN18                                       = 18  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN19                                       = 19  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN20                                       = 20  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN21                                       = 21  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN22                                       = 22  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN23                                       = 23  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN24                                       = 24  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN25                                       = 25  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN26                                       = 26  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN27                                       = 27  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN28                                       = 28  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN29                                       = 29  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN30                                       = 30  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN31                                       = 31  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN32                                       = 32  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN33                                       = 33  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN34                                       = 34  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN35                                       = 35  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN36                                       = 36  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN37                                       = 37  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN38                                       = 38  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN39                                       = 39  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN40                                       = 40  ;
static const uint8_t P9N2_EX_LOCAL_FIR_IN41                                       = 41  ;

static const uint8_t P9N2_C_LOCAL_FIR_IN0                                         = 0   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN1                                         = 1   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN2                                         = 2   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN3                                         = 3   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN4                                         = 4   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN5                                         = 5   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN6                                         = 6   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN7                                         = 7   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN8                                         = 8   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN9                                         = 9   ;
static const uint8_t P9N2_C_LOCAL_FIR_IN10                                        = 10  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN11                                        = 11  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN12                                        = 12  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN13                                        = 13  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN14                                        = 14  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN15                                        = 15  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN16                                        = 16  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN17                                        = 17  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN18                                        = 18  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN19                                        = 19  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN20                                        = 20  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN21                                        = 21  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN22                                        = 22  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN23                                        = 23  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN24                                        = 24  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN25                                        = 25  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN26                                        = 26  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN27                                        = 27  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN28                                        = 28  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN29                                        = 29  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN30                                        = 30  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN31                                        = 31  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN32                                        = 32  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN33                                        = 33  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN34                                        = 34  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN35                                        = 35  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN36                                        = 36  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN37                                        = 37  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN38                                        = 38  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN39                                        = 39  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN40                                        = 40  ;
static const uint8_t P9N2_C_LOCAL_FIR_IN41                                        = 41  ;

static const uint8_t P9N2_EQ_LOCAL_FIR_ACTION0_IN                                 = 0   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_ACTION0_IN_LEN                             = 42  ;

static const uint8_t P9N2_EX_LOCAL_FIR_ACTION0_IN                                 = 0   ;
static const uint8_t P9N2_EX_LOCAL_FIR_ACTION0_IN_LEN                             = 42  ;

static const uint8_t P9N2_C_LOCAL_FIR_ACTION0_IN                                  = 0   ;
static const uint8_t P9N2_C_LOCAL_FIR_ACTION0_IN_LEN                              = 42  ;

static const uint8_t P9N2_EQ_LOCAL_FIR_ACTION1_IN                                 = 0   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_ACTION1_IN_LEN                             = 42  ;

static const uint8_t P9N2_EX_LOCAL_FIR_ACTION1_IN                                 = 0   ;
static const uint8_t P9N2_EX_LOCAL_FIR_ACTION1_IN_LEN                             = 42  ;

static const uint8_t P9N2_C_LOCAL_FIR_ACTION1_IN                                  = 0   ;
static const uint8_t P9N2_C_LOCAL_FIR_ACTION1_IN_LEN                              = 42  ;

static const uint8_t P9N2_EQ_LOCAL_FIR_MASK_LFIR_IN                               = 0   ;
static const uint8_t P9N2_EQ_LOCAL_FIR_MASK_LFIR_IN_LEN                           = 42  ;

static const uint8_t P9N2_EX_LOCAL_FIR_MASK_LFIR_IN                               = 0   ;
static const uint8_t P9N2_EX_LOCAL_FIR_MASK_LFIR_IN_LEN                           = 42  ;

static const uint8_t P9N2_C_LOCAL_FIR_MASK_LFIR_IN                                = 0   ;
static const uint8_t P9N2_C_LOCAL_FIR_MASK_LFIR_IN_LEN                            = 42  ;

static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN0                                  = 0   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN1                                  = 1   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN2                                  = 2   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN3                                  = 3   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN4                                  = 4   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN5                                  = 5   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN6                                  = 6   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN7                                  = 7   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN8                                  = 8   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN9                                  = 9   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN10                                 = 10  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN11                                 = 11  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN12                                 = 12  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN13                                 = 13  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN14                                 = 14  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN15                                 = 15  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN16                                 = 16  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN17                                 = 17  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN18                                 = 18  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN19                                 = 19  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN20                                 = 20  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN21                                 = 21  ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_ERR_IN22                                 = 22  ;

static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN0                                  = 0   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN1                                  = 1   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN2                                  = 2   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN3                                  = 3   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN4                                  = 4   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN5                                  = 5   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN6                                  = 6   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN7                                  = 7   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN8                                  = 8   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN9                                  = 9   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN10                                 = 10  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN11                                 = 11  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN12                                 = 12  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN13                                 = 13  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN14                                 = 14  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN15                                 = 15  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN16                                 = 16  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN17                                 = 17  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN18                                 = 18  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN19                                 = 19  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN20                                 = 20  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN21                                 = 21  ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_ERR_IN22                                 = 22  ;

static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN0                                   = 0   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN1                                   = 1   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN2                                   = 2   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN3                                   = 3   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN4                                   = 4   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN5                                   = 5   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN6                                   = 6   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN7                                   = 7   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN8                                   = 8   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN9                                   = 9   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN10                                  = 10  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN11                                  = 11  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN12                                  = 12  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN13                                  = 13  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN14                                  = 14  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN15                                  = 15  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN16                                  = 16  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN17                                  = 17  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN18                                  = 18  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN19                                  = 19  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN20                                  = 20  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN21                                  = 21  ;
static const uint8_t P9N2_C_LOCAL_XSTOP_ERR_IN22                                  = 22  ;

static const uint8_t P9N2_EQ_LOCAL_XSTOP_MASK_IN                                  = 0   ;
static const uint8_t P9N2_EQ_LOCAL_XSTOP_MASK_IN_LEN                              = 22  ;

static const uint8_t P9N2_EX_LOCAL_XSTOP_MASK_IN                                  = 0   ;
static const uint8_t P9N2_EX_LOCAL_XSTOP_MASK_IN_LEN                              = 22  ;

static const uint8_t P9N2_C_LOCAL_XSTOP_MASK_IN                                   = 0   ;
static const uint8_t P9N2_C_LOCAL_XSTOP_MASK_IN_LEN                               = 22  ;

static const uint8_t P9N2_EQ_LRU_VIC_ALLOC_REG_L3_COLUMN_SEGR_COLUMN_CFG          = 0   ;
static const uint8_t P9N2_EQ_LRU_VIC_ALLOC_REG_L3_COLUMN_SEGR_COLUMN_CFG_LEN      = 20  ;
static const uint8_t P9N2_EQ_LRU_VIC_ALLOC_REG_L3_COLUMN_MD_CFG                   = 20  ;
static const uint8_t P9N2_EQ_LRU_VIC_ALLOC_REG_L3_COLUMN_MD_CFG_LEN               = 2   ;

static const uint8_t P9N2_EX_L3_LRU_VIC_ALLOC_REG_L3_COLUMN_SEGR_COLUMN_CFG       = 0   ;
static const uint8_t P9N2_EX_L3_LRU_VIC_ALLOC_REG_L3_COLUMN_SEGR_COLUMN_CFG_LEN   = 20  ;
static const uint8_t P9N2_EX_L3_LRU_VIC_ALLOC_REG_L3_COLUMN_MD_CFG                = 20  ;
static const uint8_t P9N2_EX_L3_LRU_VIC_ALLOC_REG_L3_COLUMN_MD_CFG_LEN            = 2   ;

static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSEXEC_HYPERV_TRAP_CHECKSTOP_HOLD_OUT = 0   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSEXEC_BAD_DVAL_FINISH_CHECKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSEXEC_REJECT_FINISH_CHECKSTOP_HOLD_OUT = 2   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_FLSH_FFN_AND_NOT_UC_HOLD_OUT    = 3   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_FLSH_FLUSH_NEXT_UCODE_HOLD_OUT  = 4   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_FLSH_INVALID_FLUSH_CASE_HOLD_OUT = 5   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_FLSH_FLUSH_CRITICAL_OP_HOLD_OUT = 6   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_FLSH_FLUSH_NEXT_NON_CRIT_ATOMIC_HOLD_OUT = 7   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSLRQE_CI_CDF_STUCK_HOLD_OUT    = 8   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSLRQE_OVERFLOW_HOLD_OUT        = 9   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSLRQF_OVERFLOW_HOLD_OUT        = 10  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSLSAQ_OVERFLOW_HOLD_OUT        = 11  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSLMQE_BAD_MC_RLD_DTYPE_ERR_HOLD_OUT = 12  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSLMQE_GOT_SV_TWICE_ERR_HOLD_OUT = 13  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_LSLMQE_INV_RD_ERR_HOLD_OUT      = 14  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG0_SCOM_PARITY_HOLD_OUT            = 15  ;

static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSEXEC_HYPERV_TRAP_CHECKSTOP_HOLD_OUT = 0   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSEXEC_BAD_DVAL_FINISH_CHECKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSEXEC_REJECT_FINISH_CHECKSTOP_HOLD_OUT = 2   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_FLSH_FFN_AND_NOT_UC_HOLD_OUT        = 3   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_FLSH_FLUSH_NEXT_UCODE_HOLD_OUT      = 4   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_FLSH_INVALID_FLUSH_CASE_HOLD_OUT    = 5   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_FLSH_FLUSH_CRITICAL_OP_HOLD_OUT     = 6   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_FLSH_FLUSH_NEXT_NON_CRIT_ATOMIC_HOLD_OUT = 7   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSLRQE_CI_CDF_STUCK_HOLD_OUT        = 8   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSLRQE_OVERFLOW_HOLD_OUT            = 9   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSLRQF_OVERFLOW_HOLD_OUT            = 10  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSLSAQ_OVERFLOW_HOLD_OUT            = 11  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSLMQE_BAD_MC_RLD_DTYPE_ERR_HOLD_OUT = 12  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSLMQE_GOT_SV_TWICE_ERR_HOLD_OUT    = 13  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_LSLMQE_INV_RD_ERR_HOLD_OUT          = 14  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG0_SCOM_PARITY_HOLD_OUT                = 15  ;

static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSSLBC_MULTI_BUSY_CHECKSTOP_HOLD_OUT = 0   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSSLBC_MULTI_ERAT_WRITE_CHECKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSSLBC_MULTI_GRANT_CHECKSTOP_HOLD_OUT = 2   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSSLBC_MULTI_PGSEL_CHECKSTOP_HOLD_OUT = 3   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSPRQ_CONTROL_ERROR_CORE_XSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSPRQ_CONTROL_ERROR_SYS_XSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LS_S2QR_PERR_P2_HOLD_OUT        = 6   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSPRQ_SPR_PERR_HOLD_OUT         = 7   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSAMRD_SPR_PERR_HOLD_OUT        = 8   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSAMRS_SPR_PERR_HOLD_OUT        = 9   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSINTR_SPR_PERR_HOLD_OUT        = 10  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSXREG_SPR_PERR_HOLD_OUT        = 11  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_GRBC_SPR_PARITY_ERROR_CORE_XSTOP_HOLD_OUT = 12  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_WPPM_SPR_PARITY_ERROR_CORE_XSTOP_HOLD_OUT = 13  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSPRQ_CONTROL_ERROR_RECOV_HOLD_OUT = 14  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG1_LSS2Q_ERRC_RTYPE_CHECKSTOP_HOLD_OUT = 15  ;

static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSSLBC_MULTI_BUSY_CHECKSTOP_HOLD_OUT = 0   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSSLBC_MULTI_ERAT_WRITE_CHECKSTOP_HOLD_OUT = 1   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSSLBC_MULTI_GRANT_CHECKSTOP_HOLD_OUT = 2   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSSLBC_MULTI_PGSEL_CHECKSTOP_HOLD_OUT = 3   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSPRQ_CONTROL_ERROR_CORE_XSTOP_HOLD_OUT = 4   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSPRQ_CONTROL_ERROR_SYS_XSTOP_HOLD_OUT = 5   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LS_S2QR_PERR_P2_HOLD_OUT            = 6   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSPRQ_SPR_PERR_HOLD_OUT             = 7   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSAMRD_SPR_PERR_HOLD_OUT            = 8   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSAMRS_SPR_PERR_HOLD_OUT            = 9   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSINTR_SPR_PERR_HOLD_OUT            = 10  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSXREG_SPR_PERR_HOLD_OUT            = 11  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_GRBC_SPR_PARITY_ERROR_CORE_XSTOP_HOLD_OUT = 12  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_WPPM_SPR_PARITY_ERROR_CORE_XSTOP_HOLD_OUT = 13  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSPRQ_CONTROL_ERROR_RECOV_HOLD_OUT  = 14  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG1_LSS2Q_ERRC_RTYPE_CHECKSTOP_HOLD_OUT = 15  ;

static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_LS0_DCAC_FIN_PERR_HOLD_OUT      = 0   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_LS1_DCAC_FIN_PERR_HOLD_OUT      = 1   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_LS2_DCAC_FIN_PERR_HOLD_OUT      = 2   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_LS3_DCAC_FIN_PERR_HOLD_OUT      = 3   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_SETC_RC6_RD23_PARITY_ERROR_TOTAL_HOLD_OUT = 4   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_WDRD0_RC9_DDIR_ANY_ERROR_ANY_SET_HOLD_OUT = 5   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_WDRD1_RC8_DDIR_ANY_ERROR_ANY_SET_HOLD_OUT = 6   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_DYNAM_SET_DELETED_HOLD_OUT      = 7   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_LS_SLB_MULTIHIT_HOLD_OUT        = 8   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_LS_SLB_P_HOLD_OUT               = 9   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_LS_TLB_MULTIHIT_HOLD_OUT        = 10  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_LS_TLB_P_HOLD_OUT               = 11  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_STPM0_RP2_SETP_PERR_HOLD_OUT    = 12  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_STPM1_RP2_SETP_PERR_HOLD_OUT    = 13  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_STPM2_RP1_SETP_PERR_HOLD_OUT    = 14  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG2_STPM3_RP1_SETP_PERR_HOLD_OUT    = 15  ;

static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_LS0_DCAC_FIN_PERR_HOLD_OUT          = 0   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_LS1_DCAC_FIN_PERR_HOLD_OUT          = 1   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_LS2_DCAC_FIN_PERR_HOLD_OUT          = 2   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_LS3_DCAC_FIN_PERR_HOLD_OUT          = 3   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_SETC_RC6_RD23_PARITY_ERROR_TOTAL_HOLD_OUT = 4   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_WDRD0_RC9_DDIR_ANY_ERROR_ANY_SET_HOLD_OUT = 5   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_WDRD1_RC8_DDIR_ANY_ERROR_ANY_SET_HOLD_OUT = 6   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_DYNAM_SET_DELETED_HOLD_OUT          = 7   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_LS_SLB_MULTIHIT_HOLD_OUT            = 8   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_LS_SLB_P_HOLD_OUT                   = 9   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_LS_TLB_MULTIHIT_HOLD_OUT            = 10  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_LS_TLB_P_HOLD_OUT                   = 11  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_STPM0_RP2_SETP_PERR_HOLD_OUT        = 12  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_STPM1_RP2_SETP_PERR_HOLD_OUT        = 13  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_STPM2_RP1_SETP_PERR_HOLD_OUT        = 14  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG2_STPM3_RP1_SETP_PERR_HOLD_OUT        = 15  ;

static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_DMAG0_FIN_RF_PARITY_HOLD_OUT    = 0   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_DMAG1_FIN_RF_PARITY_HOLD_OUT    = 1   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_DMAG2_RP2_RF_PARITY_HOLD_OUT    = 2   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_DMAG3_RP2_RF_PARITY_HOLD_OUT    = 3   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LS0_RP2_RSVT_MULTILMQ_HOLD_OUT  = 4   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LS1_RP2_RSVT_MULTILMQ_HOLD_OUT  = 5   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LS2_RP1_RSVT_MULTILMQ_HOLD_OUT  = 6   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LS3_RP1_RSVT_MULTILMQ_HOLD_OUT  = 7   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LSERTD_FIN_P_HOLD_OUT           = 8   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LSERTD_FIN_ERATMHE_HOLD_OUT     = 9   ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LSS2Q_PC_S2Q_QUEUE_OVERFLOW_HOLD_OUT = 10  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LSSRQ_RES_OVERFLOW_HOLD_OUT     = 11  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_HID_PARITY_ERROR_CORE_XSTOP_HOLD_OUT = 12  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LSTBLW_CHECKSTOP_HOLD_OUT       = 13  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_LSLRQE_NTC_HANGBUSTER_HOLD_OUT  = 14  ;
static const uint8_t P9N2_EX_L2_LSU_HOLD_OUT_REG3_RESERVED1                       = 15  ;

static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_DMAG0_FIN_RF_PARITY_HOLD_OUT        = 0   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_DMAG1_FIN_RF_PARITY_HOLD_OUT        = 1   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_DMAG2_RP2_RF_PARITY_HOLD_OUT        = 2   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_DMAG3_RP2_RF_PARITY_HOLD_OUT        = 3   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LS0_RP2_RSVT_MULTILMQ_HOLD_OUT      = 4   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LS1_RP2_RSVT_MULTILMQ_HOLD_OUT      = 5   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LS2_RP1_RSVT_MULTILMQ_HOLD_OUT      = 6   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LS3_RP1_RSVT_MULTILMQ_HOLD_OUT      = 7   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LSERTD_FIN_P_HOLD_OUT               = 8   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LSERTD_FIN_ERATMHE_HOLD_OUT         = 9   ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LSS2Q_PC_S2Q_QUEUE_OVERFLOW_HOLD_OUT = 10  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LSSRQ_RES_OVERFLOW_HOLD_OUT         = 11  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_HID_PARITY_ERROR_CORE_XSTOP_HOLD_OUT = 12  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LSTBLW_CHECKSTOP_HOLD_OUT           = 13  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_LSLRQE_NTC_HANGBUSTER_HOLD_OUT      = 14  ;
static const uint8_t P9N2_C_LSU_HOLD_OUT_REG3_RESERVED1                           = 15  ;

static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_TAG_ADDR                           = 0   ;
static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_TAG_ADDR_LEN                       = 27  ;
static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_ERR                                = 32  ;
static const uint8_t P9N2_EQ_MIB_XIICAC_CME_SCOM_XISIB_PIB_IFETCH_PENDING         = 34  ;
static const uint8_t P9N2_EQ_MIB_XIICAC_XIMEM_MEM_IFETCH_PENDING                  = 35  ;
static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_VALID                              = 36  ;
static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_VALID_LEN                          = 4   ;
static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_LINE2_VALID                        = 40  ;
static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_LINE2_VALID_LEN                    = 4   ;
static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_LINE_PTR                           = 45  ;
static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_LINE2_ERR                          = 46  ;
static const uint8_t P9N2_EQ_MIB_XIICAC_ICACHE_PREFETCH_PENDING                   = 47  ;

static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_TAG_ADDR                           = 0   ;
static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_TAG_ADDR_LEN                       = 27  ;
static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_ERR                                = 32  ;
static const uint8_t P9N2_EX_MIB_XIICAC_CME_SCOM_XISIB_PIB_IFETCH_PENDING         = 34  ;
static const uint8_t P9N2_EX_MIB_XIICAC_XIMEM_MEM_IFETCH_PENDING                  = 35  ;
static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_VALID                              = 36  ;
static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_VALID_LEN                          = 4   ;
static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_LINE2_VALID                        = 40  ;
static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_LINE2_VALID_LEN                    = 4   ;
static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_LINE_PTR                           = 45  ;
static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_LINE2_ERR                          = 46  ;
static const uint8_t P9N2_EX_MIB_XIICAC_ICACHE_PREFETCH_PENDING                   = 47  ;

static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_ADDR                                   = 0   ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_ADDR_LEN                               = 32  ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_R_NW                                   = 32  ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_BUSY                                   = 33  ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_IMPRECISE_ERROR_PENDING                = 34  ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_BYTE_ENABLE                            = 35  ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_BYTE_ENABLE_LEN                        = 8   ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_LINE_MODE                              = 43  ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_ERROR                                  = 49  ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_ERROR_LEN                              = 3   ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_IFETCH_PENDING                         = 62  ;
static const uint8_t P9N2_EQ_MIB_XIMEM_MEM_DATAOP_PENDING                         = 63  ;

static const uint8_t P9N2_EX_MIB_XIMEM_MEM_ADDR                                   = 0   ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_ADDR_LEN                               = 32  ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_R_NW                                   = 32  ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_BUSY                                   = 33  ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_IMPRECISE_ERROR_PENDING                = 34  ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_BYTE_ENABLE                            = 35  ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_BYTE_ENABLE_LEN                        = 8   ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_LINE_MODE                              = 43  ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_ERROR                                  = 49  ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_ERROR_LEN                              = 3   ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_IFETCH_PENDING                         = 62  ;
static const uint8_t P9N2_EX_MIB_XIMEM_MEM_DATAOP_PENDING                         = 63  ;

static const uint8_t P9N2_EQ_MIB_XISGB_STORE_ADDRESS                              = 0   ;
static const uint8_t P9N2_EQ_MIB_XISGB_STORE_ADDRESS_LEN                          = 32  ;
static const uint8_t P9N2_EQ_MIB_XISGB_XIMEM_MEM_IMPRECISE_ERROR_PENDING          = 35  ;
static const uint8_t P9N2_EQ_MIB_XISGB_SGB_BYTE_VALID                             = 36  ;
static const uint8_t P9N2_EQ_MIB_XISGB_SGB_BYTE_VALID_LEN                         = 4   ;
static const uint8_t P9N2_EQ_MIB_XISGB_SGB_FLUSH_PENDING                          = 63  ;

static const uint8_t P9N2_EX_MIB_XISGB_STORE_ADDRESS                              = 0   ;
static const uint8_t P9N2_EX_MIB_XISGB_STORE_ADDRESS_LEN                          = 32  ;
static const uint8_t P9N2_EX_MIB_XISGB_XIMEM_MEM_IMPRECISE_ERROR_PENDING          = 35  ;
static const uint8_t P9N2_EX_MIB_XISGB_SGB_BYTE_VALID                             = 36  ;
static const uint8_t P9N2_EX_MIB_XISGB_SGB_BYTE_VALID_LEN                         = 4   ;
static const uint8_t P9N2_EX_MIB_XISGB_SGB_FLUSH_PENDING                          = 63  ;

static const uint8_t P9N2_EQ_MODE_REG_IN0                                         = 0   ;
static const uint8_t P9N2_EQ_MODE_REG_IN1                                         = 1   ;
static const uint8_t P9N2_EQ_MODE_REG_IN2                                         = 2   ;
static const uint8_t P9N2_EQ_MODE_REG_IN3                                         = 3   ;
static const uint8_t P9N2_EQ_MODE_REG_IN4                                         = 4   ;
static const uint8_t P9N2_EQ_MODE_REG_IN5                                         = 5   ;
static const uint8_t P9N2_EQ_MODE_REG_IN6                                         = 6   ;
static const uint8_t P9N2_EQ_MODE_REG_IN7                                         = 7   ;
static const uint8_t P9N2_EQ_MODE_REG_IN8                                         = 8   ;
static const uint8_t P9N2_EQ_MODE_REG_IN9                                         = 9   ;
static const uint8_t P9N2_EQ_MODE_REG_IN10                                        = 10  ;
static const uint8_t P9N2_EQ_MODE_REG_IN11                                        = 11  ;
static const uint8_t P9N2_EQ_MODE_REG_IN                                          = 12  ;
static const uint8_t P9N2_EQ_MODE_REG_IN_LEN                                      = 4   ;

static const uint8_t P9N2_EX_MODE_REG_IN0                                         = 0   ;
static const uint8_t P9N2_EX_MODE_REG_IN1                                         = 1   ;
static const uint8_t P9N2_EX_MODE_REG_IN2                                         = 2   ;
static const uint8_t P9N2_EX_MODE_REG_IN3                                         = 3   ;
static const uint8_t P9N2_EX_MODE_REG_IN4                                         = 4   ;
static const uint8_t P9N2_EX_MODE_REG_IN5                                         = 5   ;
static const uint8_t P9N2_EX_MODE_REG_IN6                                         = 6   ;
static const uint8_t P9N2_EX_MODE_REG_IN7                                         = 7   ;
static const uint8_t P9N2_EX_MODE_REG_IN8                                         = 8   ;
static const uint8_t P9N2_EX_MODE_REG_IN9                                         = 9   ;
static const uint8_t P9N2_EX_MODE_REG_IN10                                        = 10  ;
static const uint8_t P9N2_EX_MODE_REG_IN11                                        = 11  ;
static const uint8_t P9N2_EX_MODE_REG_IN                                          = 12  ;
static const uint8_t P9N2_EX_MODE_REG_IN_LEN                                      = 4   ;

static const uint8_t P9N2_C_MODE_REG_IN0                                          = 0   ;
static const uint8_t P9N2_C_MODE_REG_IN1                                          = 1   ;
static const uint8_t P9N2_C_MODE_REG_IN2                                          = 2   ;
static const uint8_t P9N2_C_MODE_REG_IN3                                          = 3   ;
static const uint8_t P9N2_C_MODE_REG_IN4                                          = 4   ;
static const uint8_t P9N2_C_MODE_REG_IN5                                          = 5   ;
static const uint8_t P9N2_C_MODE_REG_IN6                                          = 6   ;
static const uint8_t P9N2_C_MODE_REG_IN7                                          = 7   ;
static const uint8_t P9N2_C_MODE_REG_IN8                                          = 8   ;
static const uint8_t P9N2_C_MODE_REG_IN9                                          = 9   ;
static const uint8_t P9N2_C_MODE_REG_IN10                                         = 10  ;
static const uint8_t P9N2_C_MODE_REG_IN11                                         = 11  ;
static const uint8_t P9N2_C_MODE_REG_IN                                           = 12  ;
static const uint8_t P9N2_C_MODE_REG_IN_LEN                                       = 4   ;

static const uint8_t P9N2_EQ_MODE_REG0_L3_DISABLED_CFG                            = 0   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_DMAP_CI_EN_CFG                          = 1   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_RDSN_LINEDEL_UE_EN                      = 2   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_NO_ALLOCATE_EN                          = 3   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_NO_ALLOCATE_ACTIVE                      = 4   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_CERRS_PF_CFG_SKIP_GRP_SCOPE_EN          = 5   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_SPARE6                                  = 6   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_SPARE7                                  = 7   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_LCO_RTY_LIMIT_DISABLE                   = 8   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_DYN_LCO_BLK_DIS_CFG                     = 9   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_LCO_ADDR_TGT_ENABLE                     = 10  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_ADDR_HASH_EN_CFG                        = 11  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_SPARE12                                 = 12  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3CERRS_LCO_RETRY_THROTL_DIS               = 13  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_HANG_POLL_PULSE_DIV                     = 14  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_HANG_POLL_PULSE_DIV_LEN                 = 4   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_DATA_POLL_PULSE_DIV                     = 18  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_DATA_POLL_PULSE_DIV_LEN                 = 4   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_SYSMAP_SM_NOT_LG_SEL                    = 22  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_CFG_CHIP_ADDR_EXT_MASK_EN               = 23  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_CFG_CHIP_ADDR_EXT_MASK_EN_LEN           = 7   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_CERRS_LRU_DECR_EN_CFG                   = 30  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_CERRS_LRU_DECR_PROB_SEL_CFG             = 31  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_CERRS_LRU_DECR_PROB_SEL_CFG_LEN         = 2   ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_CERRS_LRU_DECR_SUB_SEL_CFG              = 33  ;
static const uint8_t P9N2_EQ_MODE_REG0_L3_CERRS_LRU_DECR_SUB_SEL_CFG_LEN          = 3   ;

static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_LRU_DIRECT_MAP                      = 0   ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_RANDOM_EN                           = 1   ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_SINGLE_MEM_EN                       = 2   ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_SINGLE_MEM                          = 3   ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_SINGLE_MEM_LEN                      = 8   ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_L3_DIS                              = 11  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_CO_SOFT_PURGE_ME_SX_EN              = 12  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_CO_SOFT_PURGE_ALL_LINES_EN          = 13  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_DCBZ_TRASHMODE_EN                   = 14  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_CAC_ERR_REPAIR_EN                   = 15  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_LINEDEL_ON_CAC_UE_EN                = 16  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_HW_TRIG_LINEDEL_LDDISP_CE_EN        = 17  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_C0_L2_PB_ARB_RATE_SEL               = 18  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_C0_L2_PB_ARB_RATE_SEL_LEN           = 3   ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_HASH_L3_ADDR_EN                     = 21  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_RC_FRC_DISP_EQ_NTM_INIG_SI_TO_RCR_EN = 22  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_SYSMAP_SM_NOT_LG_SEL                = 23  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_Q_BIT_TID_MASK                      = 24  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_Q_BIT_TID_MASK_LEN                  = 8   ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_STQ_PF_EN                           = 32  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_DCACHE_CAPP_LPC_EN                  = 33  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_PERFMON_INFO_SRC_ED_SEL             = 34  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_C1_L2_PB_ARB_RATE_SEL               = 35  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_C1_L2_PB_ARB_RATE_SEL_LEN           = 3   ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_SKIP_GRP_SCOPE_EN                   = 38  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_CFG_TM_DTT_EN                           = 39  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_MODE_REG0_SPARE                         = 40  ;
static const uint8_t P9N2_EX_L2_MODE_REG0_MODE_REG0_SPARE_LEN                     = 2   ;

static const uint8_t P9N2_EX_L3_MODE_REG0_L3_DISABLED_CFG                         = 0   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_DMAP_CI_EN_CFG                       = 1   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_RDSN_LINEDEL_UE_EN                   = 2   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_NO_ALLOCATE_EN                       = 3   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_NO_ALLOCATE_ACTIVE                   = 4   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_CERRS_PF_CFG_SKIP_GRP_SCOPE_EN       = 5   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_SPARE6                               = 6   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_SPARE7                               = 7   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_LCO_RTY_LIMIT_DISABLE                = 8   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_DYN_LCO_BLK_DIS_CFG                  = 9   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_LCO_ADDR_TGT_ENABLE                  = 10  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_ADDR_HASH_EN_CFG                     = 11  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_SPARE12                              = 12  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3CERRS_LCO_RETRY_THROTL_DIS            = 13  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_HANG_POLL_PULSE_DIV                  = 14  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_HANG_POLL_PULSE_DIV_LEN              = 4   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_DATA_POLL_PULSE_DIV                  = 18  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_DATA_POLL_PULSE_DIV_LEN              = 4   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_SYSMAP_SM_NOT_LG_SEL                 = 22  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_CFG_CHIP_ADDR_EXT_MASK_EN            = 23  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_CFG_CHIP_ADDR_EXT_MASK_EN_LEN        = 7   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_CERRS_LRU_DECR_EN_CFG                = 30  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_CERRS_LRU_DECR_PROB_SEL_CFG          = 31  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_CERRS_LRU_DECR_PROB_SEL_CFG_LEN      = 2   ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_CERRS_LRU_DECR_SUB_SEL_CFG           = 33  ;
static const uint8_t P9N2_EX_L3_MODE_REG0_L3_CERRS_LRU_DECR_SUB_SEL_CFG_LEN       = 3   ;

static const uint8_t P9N2_EQ_MODE_REG1_L3_LCO_ENABLE_CFG                          = 0   ;
static const uint8_t P9N2_EQ_MODE_REG1_L3_LCO_TARGET_GROUP                        = 1   ;
static const uint8_t P9N2_EQ_MODE_REG1_L3_LCO_TARGET_ID                           = 2   ;
static const uint8_t P9N2_EQ_MODE_REG1_L3_LCO_TARGET_ID_LEN                       = 4   ;
static const uint8_t P9N2_EQ_MODE_REG1_L3_LCO_TARGET_VICTIMS                      = 6   ;
static const uint8_t P9N2_EQ_MODE_REG1_L3_LCO_TARGET_VICTIMS_LEN                  = 16  ;
static const uint8_t P9N2_EQ_MODE_REG1_L3_SCOM_CINJ_LCO_DIS                       = 22  ;

static const uint8_t P9N2_EX_L2_MODE_REG1_CFG_ECCCK_CE_UE_SUE_ERR_DET_DIS         = 0   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_CFG_ECCCK_UE_SUE_DET_DIS                = 1   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_MODE_REG1_SPARE0                        = 2   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_MODE_REG1_SPARE0_LEN                    = 2   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_HANG_POLL_PULSE_DIV                     = 4   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_HANG_POLL_PULSE_DIV_LEN                 = 4   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_DATA_POLL_PULSE_DIV                     = 8   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_DATA_POLL_PULSE_DIV_LEN                 = 4   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_MODE_REG1_SPARE1                        = 12  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_MODE_REG1_SPARE1_LEN                    = 4   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM03_SMT_ROTATION_DIS                   = 16  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM47_SMT_ROTATION_DIS                   = 17  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_MODE_REG1_SPARE2                        = 18  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_MODE_REG1_SPARE2_LEN                    = 2   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM07_TID_ROTATE_PLSS_RATE               = 20  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM07_TID_ROTATE_PLSS_RATE_LEN           = 3   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_MODE_REG1_SPARE3                        = 23  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_MODE_REG1_SPARE3_LEN                    = 2   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM03_L23_EVENT_TID_SEL_EN               = 25  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM03_L23_EVENT_TID_SEL_NUM              = 26  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM03_L23_EVENT_TID_SEL_NUM_LEN          = 2   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM47_L23_EVENT_TID_SEL_EN               = 29  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM47_L23_EVENT_TID_SEL_NUM              = 30  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_PM47_L23_EVENT_TID_SEL_NUM_LEN          = 2   ;
static const uint8_t P9N2_EX_L2_MODE_REG1_SYSMAP_PB_CHIP_ADDR_EXT_MASK_EN         = 32  ;
static const uint8_t P9N2_EX_L2_MODE_REG1_SYSMAP_PB_CHIP_ADDR_EXT_MASK_EN_LEN     = 7   ;

static const uint8_t P9N2_EX_L3_MODE_REG1_L3_LCO_ENABLE_CFG                       = 0   ;
static const uint8_t P9N2_EX_L3_MODE_REG1_L3_LCO_TARGET_GROUP                     = 1   ;
static const uint8_t P9N2_EX_L3_MODE_REG1_L3_LCO_TARGET_ID                        = 2   ;
static const uint8_t P9N2_EX_L3_MODE_REG1_L3_LCO_TARGET_ID_LEN                    = 4   ;
static const uint8_t P9N2_EX_L3_MODE_REG1_L3_LCO_TARGET_VICTIMS                   = 6   ;
static const uint8_t P9N2_EX_L3_MODE_REG1_L3_LCO_TARGET_VICTIMS_LEN               = 16  ;
static const uint8_t P9N2_EX_L3_MODE_REG1_L3_SCOM_CINJ_LCO_DIS                    = 22  ;

static const uint8_t P9N2_EQ_MULTICAST_GROUP_1_MULTICAST1                         = 3   ;
static const uint8_t P9N2_EQ_MULTICAST_GROUP_1_MULTICAST1_LEN                     = 3   ;

static const uint8_t P9N2_EX_MULTICAST_GROUP_1_MULTICAST1                         = 3   ;
static const uint8_t P9N2_EX_MULTICAST_GROUP_1_MULTICAST1_LEN                     = 3   ;

static const uint8_t P9N2_C_MULTICAST_GROUP_1_MULTICAST1                          = 3   ;
static const uint8_t P9N2_C_MULTICAST_GROUP_1_MULTICAST1_LEN                      = 3   ;

static const uint8_t P9N2_EQ_MULTICAST_GROUP_2_MULTICAST2                         = 3   ;
static const uint8_t P9N2_EQ_MULTICAST_GROUP_2_MULTICAST2_LEN                     = 3   ;

static const uint8_t P9N2_EX_MULTICAST_GROUP_2_MULTICAST2                         = 3   ;
static const uint8_t P9N2_EX_MULTICAST_GROUP_2_MULTICAST2_LEN                     = 3   ;

static const uint8_t P9N2_C_MULTICAST_GROUP_2_MULTICAST2                          = 3   ;
static const uint8_t P9N2_C_MULTICAST_GROUP_2_MULTICAST2_LEN                      = 3   ;

static const uint8_t P9N2_EQ_MULTICAST_GROUP_3_MULTICAST3                         = 3   ;
static const uint8_t P9N2_EQ_MULTICAST_GROUP_3_MULTICAST3_LEN                     = 3   ;

static const uint8_t P9N2_EX_MULTICAST_GROUP_3_MULTICAST3                         = 3   ;
static const uint8_t P9N2_EX_MULTICAST_GROUP_3_MULTICAST3_LEN                     = 3   ;

static const uint8_t P9N2_C_MULTICAST_GROUP_3_MULTICAST3                          = 3   ;
static const uint8_t P9N2_C_MULTICAST_GROUP_3_MULTICAST3_LEN                      = 3   ;

static const uint8_t P9N2_EQ_MULTICAST_GROUP_4_MULTICAST4                         = 3   ;
static const uint8_t P9N2_EQ_MULTICAST_GROUP_4_MULTICAST4_LEN                     = 3   ;

static const uint8_t P9N2_EX_MULTICAST_GROUP_4_MULTICAST4                         = 3   ;
static const uint8_t P9N2_EX_MULTICAST_GROUP_4_MULTICAST4_LEN                     = 3   ;

static const uint8_t P9N2_C_MULTICAST_GROUP_4_MULTICAST4                          = 3   ;
static const uint8_t P9N2_C_MULTICAST_GROUP_4_MULTICAST4_LEN                      = 3   ;

static const uint8_t P9N2_EQ_NCU_DARN_BAR_REG_EN                                  = 0   ;
static const uint8_t P9N2_EQ_NCU_DARN_BAR_REG_ADDR                                = 8   ;
static const uint8_t P9N2_EQ_NCU_DARN_BAR_REG_ADDR_LEN                            = 44  ;

static const uint8_t P9N2_EX_NCU_DARN_BAR_REG_EN                                  = 0   ;
static const uint8_t P9N2_EX_NCU_DARN_BAR_REG_ADDR                                = 8   ;
static const uint8_t P9N2_EX_NCU_DARN_BAR_REG_ADDR_LEN                            = 44  ;

static const uint8_t P9N2_EQ_NCU_MODE_REG_HTM_QUEUE_LIMIT                         = 0   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_HTM_QUEUE_LIMIT_LEN                     = 2   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TRASH_EN                                = 2   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_FENCE_TLBIE                             = 3   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_DROP_PRIORITY_MASK                      = 4   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_DROP_PRIORITY_MASK_LEN                  = 3   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLBI_GROUP_PUMP_EN                      = 7   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_SLBI_GROUP_PUMP_EN                      = 8   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_SYSMAP_SM_NOT_LG_SEL                    = 9   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLBIE_PACING_CNT_EN                     = 10  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLBIE_DEC_RATE                          = 11  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLBIE_DEC_RATE_LEN                      = 8   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLBIE_INC_RATE                          = 19  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLBIE_INC_RATE_LEN                      = 8   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLBIE_CNT_THRESH                        = 27  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLBIE_CNT_THRESH_LEN                    = 8   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLBIE_CNT_WT4TX_CORE_EN                 = 35  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLB_CHK_WAIT_DEC                        = 36  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_TLB_CHK_WAIT_DEC_LEN                    = 8   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_SYSMAP_PB_CHIP_ADDR_EXT_MASK_EN         = 44  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_SYSMAP_PB_CHIP_ADDR_EXT_MASK_EN_LEN     = 7   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG_SKIP_GRP_SCOPE_EN                       = 51  ;

static const uint8_t P9N2_EX_NCU_MODE_REG_HTM_QUEUE_LIMIT                         = 0   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_HTM_QUEUE_LIMIT_LEN                     = 2   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TRASH_EN                                = 2   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_FENCE_TLBIE                             = 3   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_DROP_PRIORITY_MASK                      = 4   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_DROP_PRIORITY_MASK_LEN                  = 3   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLBI_GROUP_PUMP_EN                      = 7   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_SLBI_GROUP_PUMP_EN                      = 8   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_SYSMAP_SM_NOT_LG_SEL                    = 9   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLBIE_PACING_CNT_EN                     = 10  ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLBIE_DEC_RATE                          = 11  ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLBIE_DEC_RATE_LEN                      = 8   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLBIE_INC_RATE                          = 19  ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLBIE_INC_RATE_LEN                      = 8   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLBIE_CNT_THRESH                        = 27  ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLBIE_CNT_THRESH_LEN                    = 8   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLBIE_CNT_WT4TX_CORE_EN                 = 35  ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLB_CHK_WAIT_DEC                        = 36  ;
static const uint8_t P9N2_EX_NCU_MODE_REG_TLB_CHK_WAIT_DEC_LEN                    = 8   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_SYSMAP_PB_CHIP_ADDR_EXT_MASK_EN         = 44  ;
static const uint8_t P9N2_EX_NCU_MODE_REG_SYSMAP_PB_CHIP_ADDR_EXT_MASK_EN_LEN     = 7   ;
static const uint8_t P9N2_EX_NCU_MODE_REG_SKIP_GRP_SCOPE_EN                       = 51  ;

static const uint8_t P9N2_EQ_NCU_MODE_REG2_HANG_POLL_PULSE_DIV                    = 0   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_HANG_POLL_PULSE_DIV_LEN                = 4   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_MASTER_CP_DATA_POLL_PULSE_DIV          = 4   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_MASTER_CP_DATA_POLL_PULSE_DIV_LEN      = 4   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_TLB_SNOOP_DATA_POLL_PULSE_DIV          = 8   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_TLB_SNOOP_DATA_POLL_PULSE_DIV_LEN      = 10  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_TLB_STG1_HANG_POLL_PULSE_DIV           = 18  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_TLB_STG1_HANG_POLL_PULSE_DIV_LEN       = 4   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_TLB_STG2_HANG_POLL_PULSE_DIV           = 22  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_TLB_STG2_HANG_POLL_PULSE_DIV_LEN       = 4   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_MASTER_TLB_DATA_POLL_PULSE_DIV         = 26  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG2_MASTER_TLB_DATA_POLL_PULSE_DIV_LEN     = 10  ;

static const uint8_t P9N2_EX_NCU_MODE_REG2_HANG_POLL_PULSE_DIV                    = 0   ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_HANG_POLL_PULSE_DIV_LEN                = 4   ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_MASTER_CP_DATA_POLL_PULSE_DIV          = 4   ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_MASTER_CP_DATA_POLL_PULSE_DIV_LEN      = 4   ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_TLB_SNOOP_DATA_POLL_PULSE_DIV          = 8   ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_TLB_SNOOP_DATA_POLL_PULSE_DIV_LEN      = 10  ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_TLB_STG1_HANG_POLL_PULSE_DIV           = 18  ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_TLB_STG1_HANG_POLL_PULSE_DIV_LEN       = 4   ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_TLB_STG2_HANG_POLL_PULSE_DIV           = 22  ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_TLB_STG2_HANG_POLL_PULSE_DIV_LEN       = 4   ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_MASTER_TLB_DATA_POLL_PULSE_DIV         = 26  ;
static const uint8_t P9N2_EX_NCU_MODE_REG2_MASTER_TLB_DATA_POLL_PULSE_DIV_LEN     = 10  ;

static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_STALL_EN                         = 0   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_STALL_THRESHOLD                  = 1   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_STALL_THRESHOLD_LEN              = 3   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_STALL_CMPLT_CNT                  = 4   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_STALL_CMPLT_CNT_LEN              = 4   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_STALL_DELAY_CNT                  = 8   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_STALL_DELAY_CNT_LEN              = 8   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_PACING_MST_DLY_EN                = 16  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_PACING_PMU_THRESH                = 17  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_TLBIE_PACING_PMU_THRESH_LEN            = 3   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_SMF_CONFIG                             = 20  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_SMF_CONFIG_LEN                         = 2   ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_SPARE                                  = 22  ;
static const uint8_t P9N2_EQ_NCU_MODE_REG3_SPARE_LEN                              = 10  ;

static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_STALL_EN                         = 0   ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_STALL_THRESHOLD                  = 1   ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_STALL_THRESHOLD_LEN              = 3   ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_STALL_CMPLT_CNT                  = 4   ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_STALL_CMPLT_CNT_LEN              = 4   ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_STALL_DELAY_CNT                  = 8   ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_STALL_DELAY_CNT_LEN              = 8   ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_PACING_MST_DLY_EN                = 16  ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_PACING_PMU_THRESH                = 17  ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_TLBIE_PACING_PMU_THRESH_LEN            = 3   ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_SMF_CONFIG                             = 20  ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_SMF_CONFIG_LEN                         = 2   ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_SPARE                                  = 22  ;
static const uint8_t P9N2_EX_NCU_MODE_REG3_SPARE_LEN                              = 10  ;

static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY8_VALID                      = 0   ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY8_ID                         = 1   ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY8_ID_LEN                     = 12  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY7_VALID                      = 13  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY7_ID                         = 14  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY7_ID_LEN                     = 12  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY6_VALID                      = 26  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY6_ID                         = 27  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY6_ID_LEN                     = 12  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY5_VALID                      = 39  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY5_ID                         = 40  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG0_DELAY5_ID_LEN                     = 12  ;

static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY8_VALID                      = 0   ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY8_ID                         = 1   ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY8_ID_LEN                     = 12  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY7_VALID                      = 13  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY7_ID                         = 14  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY7_ID_LEN                     = 12  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY6_VALID                      = 26  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY6_ID                         = 27  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY6_ID_LEN                     = 12  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY5_VALID                      = 39  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY5_ID                         = 40  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG0_DELAY5_ID_LEN                     = 12  ;

static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY4_VALID                      = 0   ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY4_ID                         = 1   ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY4_ID_LEN                     = 12  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY3_VALID                      = 13  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY3_ID                         = 14  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY3_ID_LEN                     = 12  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY2_VALID                      = 26  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY2_ID                         = 27  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY2_ID_LEN                     = 12  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY1_VALID                      = 39  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY1_ID                         = 40  ;
static const uint8_t P9N2_EQ_NCU_SLOW_LPAR_REG1_DELAY1_ID_LEN                     = 12  ;

static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY4_VALID                      = 0   ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY4_ID                         = 1   ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY4_ID_LEN                     = 12  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY3_VALID                      = 13  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY3_ID                         = 14  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY3_ID_LEN                     = 12  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY2_VALID                      = 26  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY2_ID                         = 27  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY2_ID_LEN                     = 12  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY1_VALID                      = 39  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY1_ID                         = 40  ;
static const uint8_t P9N2_EX_NCU_SLOW_LPAR_REG1_DELAY1_ID_LEN                     = 12  ;

static const uint8_t P9N2_EQ_NCU_SPEC_BAR_REG_EN                                  = 0   ;
static const uint8_t P9N2_EQ_NCU_SPEC_BAR_REG_256K                                = 1   ;
static const uint8_t P9N2_EQ_NCU_SPEC_BAR_REG_ADDR                                = 8   ;
static const uint8_t P9N2_EQ_NCU_SPEC_BAR_REG_ADDR_LEN                            = 42  ;

static const uint8_t P9N2_EX_NCU_SPEC_BAR_REG_EN                                  = 0   ;
static const uint8_t P9N2_EX_NCU_SPEC_BAR_REG_256K                                = 1   ;
static const uint8_t P9N2_EX_NCU_SPEC_BAR_REG_ADDR                                = 8   ;
static const uint8_t P9N2_EX_NCU_SPEC_BAR_REG_ADDR_LEN                            = 42  ;

static const uint8_t P9N2_EQ_NCU_STATUS_REG_CORE0_REQ_ACTIVE                      = 0   ;
static const uint8_t P9N2_EQ_NCU_STATUS_REG_CORE1_REQ_ACTIVE                      = 1   ;
static const uint8_t P9N2_EQ_NCU_STATUS_REG_CORE_OR_SNP_REQ_ACTIVE                = 2   ;
static const uint8_t P9N2_EQ_NCU_STATUS_REG_ANY_REQ_ACTIVE                        = 3   ;

static const uint8_t P9N2_EX_NCU_STATUS_REG_CORE0_REQ_ACTIVE                      = 0   ;
static const uint8_t P9N2_EX_NCU_STATUS_REG_CORE1_REQ_ACTIVE                      = 1   ;
static const uint8_t P9N2_EX_NCU_STATUS_REG_CORE_OR_SNP_REQ_ACTIVE                = 2   ;
static const uint8_t P9N2_EX_NCU_STATUS_REG_ANY_REQ_ACTIVE                        = 3   ;

static const uint8_t P9N2_EQ_NET_CTRL0_CHIPLET_ENABLE                             = 0   ;
static const uint8_t P9N2_EQ_NET_CTRL0_PCB_EP_RESET                               = 1   ;
static const uint8_t P9N2_EQ_NET_CTRL0_CLK_ASYNC_RESET                            = 2   ;
static const uint8_t P9N2_EQ_NET_CTRL0_PLL_TEST_EN                                = 3   ;
static const uint8_t P9N2_EQ_NET_CTRL0_PLL_RESET                                  = 4   ;
static const uint8_t P9N2_EQ_NET_CTRL0_PLL_BYPASS                                 = 5   ;
static const uint8_t P9N2_EQ_NET_CTRL0_VITAL_SCAN                                 = 6   ;
static const uint8_t P9N2_EQ_NET_CTRL0_VITAL_SCAN_IN                              = 7   ;
static const uint8_t P9N2_EQ_NET_CTRL0_VITAL_PHASE                                = 8   ;
static const uint8_t P9N2_EQ_NET_CTRL0_FLUSH_ALIGN_OVR                            = 9   ;
static const uint8_t P9N2_EQ_NET_CTRL0_VITAL_AL                                   = 10  ;
static const uint8_t P9N2_EQ_NET_CTRL0_ACT_DIS                                    = 11  ;
static const uint8_t P9N2_EQ_NET_CTRL0_MPW1                                       = 12  ;
static const uint8_t P9N2_EQ_NET_CTRL0_MPW2                                       = 13  ;
static const uint8_t P9N2_EQ_NET_CTRL0_MPW3                                       = 14  ;
static const uint8_t P9N2_EQ_NET_CTRL0_DELAY_LCLKR                                = 15  ;
static const uint8_t P9N2_EQ_NET_CTRL0_VITAL_THOLD                                = 16  ;
static const uint8_t P9N2_EQ_NET_CTRL0_FLUSH_SCAN_N                               = 17  ;
static const uint8_t P9N2_EQ_NET_CTRL0_FENCE_EN                                   = 18  ;
static const uint8_t P9N2_EQ_NET_CTRL0_CPLT_RCTRL                                 = 19  ;
static const uint8_t P9N2_EQ_NET_CTRL0_CPLT_DCTRL                                 = 20  ;
static const uint8_t P9N2_EQ_NET_CTRL0_ADJ_FUNC_CLKSEL                            = 22  ;
static const uint8_t P9N2_EQ_NET_CTRL0_TP_FENCE_PCB                               = 25  ;
static const uint8_t P9N2_EQ_NET_CTRL0_LVLTRANS_FENCE                             = 26  ;
static const uint8_t P9N2_EQ_NET_CTRL0_ARRAY_WRITE_ASSIST_EN                      = 27  ;
static const uint8_t P9N2_EQ_NET_CTRL0_HTB_INTEST                                 = 28  ;
static const uint8_t P9N2_EQ_NET_CTRL0_HTB_EXTEST                                 = 29  ;
static const uint8_t P9N2_EQ_NET_CTRL0_PM_ACCESS                                  = 30  ;
static const uint8_t P9N2_EQ_NET_CTRL0_PLLFORCE_OUT_EN                            = 31  ;

static const uint8_t P9N2_EX_NET_CTRL0_CHIPLET_ENABLE                             = 0   ;
static const uint8_t P9N2_EX_NET_CTRL0_PCB_EP_RESET                               = 1   ;
static const uint8_t P9N2_EX_NET_CTRL0_CLK_ASYNC_RESET                            = 2   ;
static const uint8_t P9N2_EX_NET_CTRL0_PLL_TEST_EN                                = 3   ;
static const uint8_t P9N2_EX_NET_CTRL0_PLL_RESET                                  = 4   ;
static const uint8_t P9N2_EX_NET_CTRL0_PLL_BYPASS                                 = 5   ;
static const uint8_t P9N2_EX_NET_CTRL0_VITAL_SCAN                                 = 6   ;
static const uint8_t P9N2_EX_NET_CTRL0_VITAL_SCAN_IN                              = 7   ;
static const uint8_t P9N2_EX_NET_CTRL0_VITAL_PHASE                                = 8   ;
static const uint8_t P9N2_EX_NET_CTRL0_FLUSH_ALIGN_OVR                            = 9   ;
static const uint8_t P9N2_EX_NET_CTRL0_VITAL_AL                                   = 10  ;
static const uint8_t P9N2_EX_NET_CTRL0_ACT_DIS                                    = 11  ;
static const uint8_t P9N2_EX_NET_CTRL0_MPW1                                       = 12  ;
static const uint8_t P9N2_EX_NET_CTRL0_MPW2                                       = 13  ;
static const uint8_t P9N2_EX_NET_CTRL0_MPW3                                       = 14  ;
static const uint8_t P9N2_EX_NET_CTRL0_DELAY_LCLKR                                = 15  ;
static const uint8_t P9N2_EX_NET_CTRL0_VITAL_THOLD                                = 16  ;
static const uint8_t P9N2_EX_NET_CTRL0_FLUSH_SCAN_N                               = 17  ;
static const uint8_t P9N2_EX_NET_CTRL0_FENCE_EN                                   = 18  ;
static const uint8_t P9N2_EX_NET_CTRL0_CPLT_RCTRL                                 = 19  ;
static const uint8_t P9N2_EX_NET_CTRL0_CPLT_DCTRL                                 = 20  ;
static const uint8_t P9N2_EX_NET_CTRL0_ADJ_FUNC_CLKSEL                            = 22  ;
static const uint8_t P9N2_EX_NET_CTRL0_TP_FENCE_PCB                               = 25  ;
static const uint8_t P9N2_EX_NET_CTRL0_LVLTRANS_FENCE                             = 26  ;
static const uint8_t P9N2_EX_NET_CTRL0_ARRAY_WRITE_ASSIST_EN                      = 27  ;
static const uint8_t P9N2_EX_NET_CTRL0_HTB_INTEST                                 = 28  ;
static const uint8_t P9N2_EX_NET_CTRL0_HTB_EXTEST                                 = 29  ;
static const uint8_t P9N2_EX_NET_CTRL0_PM_ACCESS                                  = 30  ;
static const uint8_t P9N2_EX_NET_CTRL0_PLLFORCE_OUT_EN                            = 31  ;

static const uint8_t P9N2_C_NET_CTRL0_CHIPLET_ENABLE                              = 0   ;
static const uint8_t P9N2_C_NET_CTRL0_PCB_EP_RESET                                = 1   ;
static const uint8_t P9N2_C_NET_CTRL0_CLK_ASYNC_RESET                             = 2   ;
static const uint8_t P9N2_C_NET_CTRL0_PLL_TEST_EN                                 = 3   ;
static const uint8_t P9N2_C_NET_CTRL0_PLL_RESET                                   = 4   ;
static const uint8_t P9N2_C_NET_CTRL0_PLL_BYPASS                                  = 5   ;
static const uint8_t P9N2_C_NET_CTRL0_VITAL_SCAN                                  = 6   ;
static const uint8_t P9N2_C_NET_CTRL0_VITAL_SCAN_IN                               = 7   ;
static const uint8_t P9N2_C_NET_CTRL0_VITAL_PHASE                                 = 8   ;
static const uint8_t P9N2_C_NET_CTRL0_FLUSH_ALIGN_OVR                             = 9   ;
static const uint8_t P9N2_C_NET_CTRL0_VITAL_AL                                    = 10  ;
static const uint8_t P9N2_C_NET_CTRL0_ACT_DIS                                     = 11  ;
static const uint8_t P9N2_C_NET_CTRL0_MPW1                                        = 12  ;
static const uint8_t P9N2_C_NET_CTRL0_MPW2                                        = 13  ;
static const uint8_t P9N2_C_NET_CTRL0_MPW3                                        = 14  ;
static const uint8_t P9N2_C_NET_CTRL0_DELAY_LCLKR                                 = 15  ;
static const uint8_t P9N2_C_NET_CTRL0_VITAL_THOLD                                 = 16  ;
static const uint8_t P9N2_C_NET_CTRL0_FLUSH_SCAN_N                                = 17  ;
static const uint8_t P9N2_C_NET_CTRL0_FENCE_EN                                    = 18  ;
static const uint8_t P9N2_C_NET_CTRL0_CPLT_RCTRL                                  = 19  ;
static const uint8_t P9N2_C_NET_CTRL0_CPLT_DCTRL                                  = 20  ;
static const uint8_t P9N2_C_NET_CTRL0_ADJ_FUNC_CLKSEL                             = 22  ;
static const uint8_t P9N2_C_NET_CTRL0_TP_FENCE_PCB                                = 25  ;
static const uint8_t P9N2_C_NET_CTRL0_LVLTRANS_FENCE                              = 26  ;
static const uint8_t P9N2_C_NET_CTRL0_ARRAY_WRITE_ASSIST_EN                       = 27  ;
static const uint8_t P9N2_C_NET_CTRL0_HTB_INTEST                                  = 28  ;
static const uint8_t P9N2_C_NET_CTRL0_HTB_EXTEST                                  = 29  ;
static const uint8_t P9N2_C_NET_CTRL0_PM_ACCESS                                   = 30  ;
static const uint8_t P9N2_C_NET_CTRL0_PLLFORCE_OUT_EN                             = 31  ;

static const uint8_t P9N2_EQ_NET_CTRL1_PLL_CLKIN_SEL                              = 0   ;
static const uint8_t P9N2_EQ_NET_CTRL1_CLK_DCC_BYPASS_EN                          = 1   ;
static const uint8_t P9N2_EQ_NET_CTRL1_CLK_PDLY_BYPASS_EN                         = 2   ;
static const uint8_t P9N2_EQ_NET_CTRL1_CLK_DIV_BYPASS_EN                          = 3   ;
static const uint8_t P9N2_EQ_NET_CTRL1_REFCLK_CLKMUX0_SEL                         = 4   ;
static const uint8_t P9N2_EQ_NET_CTRL1_REFCLK_CLKMUX1_SEL                         = 5   ;
static const uint8_t P9N2_EQ_NET_CTRL1_PLL_BNDY_BYPASS_EN                         = 6   ;
static const uint8_t P9N2_EQ_NET_CTRL1_DPLL_TEST_SEL                              = 8   ;
static const uint8_t P9N2_EQ_NET_CTRL1_DPLL_TEST_SEL_LEN                          = 8   ;
static const uint8_t P9N2_EQ_NET_CTRL1_SB_STRENGTH                                = 16  ;
static const uint8_t P9N2_EQ_NET_CTRL1_SB_STRENGTH_LEN                            = 4   ;
static const uint8_t P9N2_EQ_NET_CTRL1_ASYNC_TYPE                                 = 20  ;
static const uint8_t P9N2_EQ_NET_CTRL1_ASYNC_OBS                                  = 21  ;
static const uint8_t P9N2_EQ_NET_CTRL1_CPM_CAL_SET                                = 22  ;
static const uint8_t P9N2_EQ_NET_CTRL1_SENSEADJ_RESET0                            = 23  ;
static const uint8_t P9N2_EQ_NET_CTRL1_SENSEADJ_RESET1                            = 24  ;
static const uint8_t P9N2_EQ_NET_CTRL1_CLK_PULSE_EN                               = 25  ;
static const uint8_t P9N2_EQ_NET_CTRL1_CLK_PULSE_MODE                             = 26  ;
static const uint8_t P9N2_EQ_NET_CTRL1_CLK_PULSE_MODE_LEN                         = 2   ;
static const uint8_t P9N2_EQ_NET_CTRL1_PCB_ACCESS                                 = 28  ;
static const uint8_t P9N2_EQ_NET_CTRL1_PCB_ACCESS_LEN                             = 4   ;

static const uint8_t P9N2_EX_NET_CTRL1_PLL_CLKIN_SEL                              = 0   ;
static const uint8_t P9N2_EX_NET_CTRL1_CLK_DCC_BYPASS_EN                          = 1   ;
static const uint8_t P9N2_EX_NET_CTRL1_CLK_PDLY_BYPASS_EN                         = 2   ;
static const uint8_t P9N2_EX_NET_CTRL1_CLK_DIV_BYPASS_EN                          = 3   ;
static const uint8_t P9N2_EX_NET_CTRL1_REFCLK_CLKMUX0_SEL                         = 4   ;
static const uint8_t P9N2_EX_NET_CTRL1_REFCLK_CLKMUX1_SEL                         = 5   ;
static const uint8_t P9N2_EX_NET_CTRL1_PLL_BNDY_BYPASS_EN                         = 6   ;
static const uint8_t P9N2_EX_NET_CTRL1_DPLL_TEST_SEL                              = 8   ;
static const uint8_t P9N2_EX_NET_CTRL1_DPLL_TEST_SEL_LEN                          = 8   ;
static const uint8_t P9N2_EX_NET_CTRL1_SB_STRENGTH                                = 16  ;
static const uint8_t P9N2_EX_NET_CTRL1_SB_STRENGTH_LEN                            = 4   ;
static const uint8_t P9N2_EX_NET_CTRL1_ASYNC_TYPE                                 = 20  ;
static const uint8_t P9N2_EX_NET_CTRL1_ASYNC_OBS                                  = 21  ;
static const uint8_t P9N2_EX_NET_CTRL1_CPM_CAL_SET                                = 22  ;
static const uint8_t P9N2_EX_NET_CTRL1_SENSEADJ_RESET0                            = 23  ;
static const uint8_t P9N2_EX_NET_CTRL1_SENSEADJ_RESET1                            = 24  ;
static const uint8_t P9N2_EX_NET_CTRL1_CLK_PULSE_EN                               = 25  ;
static const uint8_t P9N2_EX_NET_CTRL1_CLK_PULSE_MODE                             = 26  ;
static const uint8_t P9N2_EX_NET_CTRL1_CLK_PULSE_MODE_LEN                         = 2   ;
static const uint8_t P9N2_EX_NET_CTRL1_PCB_ACCESS                                 = 28  ;
static const uint8_t P9N2_EX_NET_CTRL1_PCB_ACCESS_LEN                             = 4   ;

static const uint8_t P9N2_C_NET_CTRL1_PLL_CLKIN_SEL                               = 0   ;
static const uint8_t P9N2_C_NET_CTRL1_CLK_DCC_BYPASS_EN                           = 1   ;
static const uint8_t P9N2_C_NET_CTRL1_CLK_PDLY_BYPASS_EN                          = 2   ;
static const uint8_t P9N2_C_NET_CTRL1_CLK_DIV_BYPASS_EN                           = 3   ;
static const uint8_t P9N2_C_NET_CTRL1_REFCLK_CLKMUX0_SEL                          = 4   ;
static const uint8_t P9N2_C_NET_CTRL1_REFCLK_CLKMUX1_SEL                          = 5   ;
static const uint8_t P9N2_C_NET_CTRL1_PLL_BNDY_BYPASS_EN                          = 6   ;
static const uint8_t P9N2_C_NET_CTRL1_DPLL_TEST_SEL                               = 8   ;
static const uint8_t P9N2_C_NET_CTRL1_DPLL_TEST_SEL_LEN                           = 8   ;
static const uint8_t P9N2_C_NET_CTRL1_SB_STRENGTH                                 = 16  ;
static const uint8_t P9N2_C_NET_CTRL1_SB_STRENGTH_LEN                             = 4   ;
static const uint8_t P9N2_C_NET_CTRL1_ASYNC_TYPE                                  = 20  ;
static const uint8_t P9N2_C_NET_CTRL1_ASYNC_OBS                                   = 21  ;
static const uint8_t P9N2_C_NET_CTRL1_CPM_CAL_SET                                 = 22  ;
static const uint8_t P9N2_C_NET_CTRL1_SENSEADJ_RESET0                             = 23  ;
static const uint8_t P9N2_C_NET_CTRL1_SENSEADJ_RESET1                             = 24  ;
static const uint8_t P9N2_C_NET_CTRL1_CLK_PULSE_EN                                = 25  ;
static const uint8_t P9N2_C_NET_CTRL1_CLK_PULSE_MODE                              = 26  ;
static const uint8_t P9N2_C_NET_CTRL1_CLK_PULSE_MODE_LEN                          = 2   ;
static const uint8_t P9N2_C_NET_CTRL1_PCB_ACCESS                                  = 28  ;
static const uint8_t P9N2_C_NET_CTRL1_PCB_ACCESS_LEN                              = 4   ;

static const uint8_t P9N2_EX_L2_OCC_SCOMC_MODE_CX                                 = 54  ;
static const uint8_t P9N2_EX_L2_OCC_SCOMC_MODE_CX_LEN                             = 7   ;

static const uint8_t P9N2_C_OCC_SCOMC_MODE_CX                                     = 54  ;
static const uint8_t P9N2_C_OCC_SCOMC_MODE_CX_LEN                                 = 7   ;

static const uint8_t P9N2_EQ_OPCG_ALIGN_INOP                                      = 0   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_INOP_LEN                                  = 4   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_SNOP                                      = 4   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_SNOP_LEN                                  = 4   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_ENOP                                      = 8   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_ENOP_LEN                                  = 4   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_INOP_WAIT                                 = 12  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_INOP_WAIT_LEN                             = 8   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_SNOP_WAIT                                 = 20  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_SNOP_WAIT_LEN                             = 12  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_ENOP_WAIT                                 = 32  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_ENOP_WAIT_LEN                             = 8   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_INOP_FORCE_SG                             = 40  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_SNOP_FORCE_SG                             = 41  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_ENOP_FORCE_SG                             = 42  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_NO_WAIT_ON_CLK_CMD                        = 43  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_SOURCE_SELECT                             = 44  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_SOURCE_SELECT_LEN                         = 2   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_UNUSED46                                  = 46  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_SCAN_RATIO                                = 47  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_SCAN_RATIO_LEN                            = 5   ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_WAIT_CYCLES                               = 52  ;
static const uint8_t P9N2_EQ_OPCG_ALIGN_WAIT_CYCLES_LEN                           = 12  ;

static const uint8_t P9N2_EX_OPCG_ALIGN_INOP                                      = 0   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_INOP_LEN                                  = 4   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_SNOP                                      = 4   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_SNOP_LEN                                  = 4   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_ENOP                                      = 8   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_ENOP_LEN                                  = 4   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_INOP_WAIT                                 = 12  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_INOP_WAIT_LEN                             = 8   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_SNOP_WAIT                                 = 20  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_SNOP_WAIT_LEN                             = 12  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_ENOP_WAIT                                 = 32  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_ENOP_WAIT_LEN                             = 8   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_INOP_FORCE_SG                             = 40  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_SNOP_FORCE_SG                             = 41  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_ENOP_FORCE_SG                             = 42  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_NO_WAIT_ON_CLK_CMD                        = 43  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_SOURCE_SELECT                             = 44  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_SOURCE_SELECT_LEN                         = 2   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_UNUSED46                                  = 46  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_SCAN_RATIO                                = 47  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_SCAN_RATIO_LEN                            = 5   ;
static const uint8_t P9N2_EX_OPCG_ALIGN_WAIT_CYCLES                               = 52  ;
static const uint8_t P9N2_EX_OPCG_ALIGN_WAIT_CYCLES_LEN                           = 12  ;

static const uint8_t P9N2_C_OPCG_ALIGN_INOP                                       = 0   ;
static const uint8_t P9N2_C_OPCG_ALIGN_INOP_LEN                                   = 4   ;
static const uint8_t P9N2_C_OPCG_ALIGN_SNOP                                       = 4   ;
static const uint8_t P9N2_C_OPCG_ALIGN_SNOP_LEN                                   = 4   ;
static const uint8_t P9N2_C_OPCG_ALIGN_ENOP                                       = 8   ;
static const uint8_t P9N2_C_OPCG_ALIGN_ENOP_LEN                                   = 4   ;
static const uint8_t P9N2_C_OPCG_ALIGN_INOP_WAIT                                  = 12  ;
static const uint8_t P9N2_C_OPCG_ALIGN_INOP_WAIT_LEN                              = 8   ;
static const uint8_t P9N2_C_OPCG_ALIGN_SNOP_WAIT                                  = 20  ;
static const uint8_t P9N2_C_OPCG_ALIGN_SNOP_WAIT_LEN                              = 12  ;
static const uint8_t P9N2_C_OPCG_ALIGN_ENOP_WAIT                                  = 32  ;
static const uint8_t P9N2_C_OPCG_ALIGN_ENOP_WAIT_LEN                              = 8   ;
static const uint8_t P9N2_C_OPCG_ALIGN_INOP_FORCE_SG                              = 40  ;
static const uint8_t P9N2_C_OPCG_ALIGN_SNOP_FORCE_SG                              = 41  ;
static const uint8_t P9N2_C_OPCG_ALIGN_ENOP_FORCE_SG                              = 42  ;
static const uint8_t P9N2_C_OPCG_ALIGN_NO_WAIT_ON_CLK_CMD                         = 43  ;
static const uint8_t P9N2_C_OPCG_ALIGN_SOURCE_SELECT                              = 44  ;
static const uint8_t P9N2_C_OPCG_ALIGN_SOURCE_SELECT_LEN                          = 2   ;
static const uint8_t P9N2_C_OPCG_ALIGN_UNUSED46                                   = 46  ;
static const uint8_t P9N2_C_OPCG_ALIGN_SCAN_RATIO                                 = 47  ;
static const uint8_t P9N2_C_OPCG_ALIGN_SCAN_RATIO_LEN                             = 5   ;
static const uint8_t P9N2_C_OPCG_ALIGN_WAIT_CYCLES                                = 52  ;
static const uint8_t P9N2_C_OPCG_ALIGN_WAIT_CYCLES_LEN                            = 12  ;

static const uint8_t P9N2_EQ_OPCG_CAPT1_COUNT                                     = 0   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_COUNT_LEN                                 = 4   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_01                                    = 4   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_01_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_02                                    = 9   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_02_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_03                                    = 14  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_03_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_04                                    = 19  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_04_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_05                                    = 24  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_05_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_06                                    = 29  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_06_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_07                                    = 34  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_07_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_08                                    = 39  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_08_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_09                                    = 44  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_09_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_10                                    = 49  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_10_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_11                                    = 54  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_11_LEN                                = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_12                                    = 59  ;
static const uint8_t P9N2_EQ_OPCG_CAPT1_SEQ_12_LEN                                = 5   ;

static const uint8_t P9N2_EX_OPCG_CAPT1_COUNT                                     = 0   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_COUNT_LEN                                 = 4   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_01                                    = 4   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_01_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_02                                    = 9   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_02_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_03                                    = 14  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_03_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_04                                    = 19  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_04_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_05                                    = 24  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_05_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_06                                    = 29  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_06_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_07                                    = 34  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_07_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_08                                    = 39  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_08_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_09                                    = 44  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_09_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_10                                    = 49  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_10_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_11                                    = 54  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_11_LEN                                = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_12                                    = 59  ;
static const uint8_t P9N2_EX_OPCG_CAPT1_SEQ_12_LEN                                = 5   ;

static const uint8_t P9N2_C_OPCG_CAPT1_COUNT                                      = 0   ;
static const uint8_t P9N2_C_OPCG_CAPT1_COUNT_LEN                                  = 4   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_01                                     = 4   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_01_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_02                                     = 9   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_02_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_03                                     = 14  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_03_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_04                                     = 19  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_04_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_05                                     = 24  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_05_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_06                                     = 29  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_06_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_07                                     = 34  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_07_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_08                                     = 39  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_08_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_09                                     = 44  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_09_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_10                                     = 49  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_10_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_11                                     = 54  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_11_LEN                                 = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_12                                     = 59  ;
static const uint8_t P9N2_C_OPCG_CAPT1_SEQ_12_LEN                                 = 5   ;

static const uint8_t P9N2_EQ_OPCG_CAPT2_UNUSED                                    = 0   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_UNUSED_LEN                                = 4   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_13_01EVEN                             = 4   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_13_01EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_14_01ODD                              = 9   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_14_01ODD_LEN                          = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_15_02EVEN                             = 14  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_15_02EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_16_02ODD                              = 19  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_16_02ODD_LEN                          = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_17_03EVEN                             = 24  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_17_03EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_18_03ODD                              = 29  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_18_03ODD_LEN                          = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_19_04EVEN                             = 34  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_19_04EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_20_04ODD                              = 39  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_20_04ODD_LEN                          = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_21_05EVEN                             = 44  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_21_05EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_22_05ODD                              = 49  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_22_05ODD_LEN                          = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_23_06EVEN                             = 54  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_23_06EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_24_06ODD                              = 59  ;
static const uint8_t P9N2_EQ_OPCG_CAPT2_SEQ_24_06ODD_LEN                          = 5   ;

static const uint8_t P9N2_EX_OPCG_CAPT2_UNUSED                                    = 0   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_UNUSED_LEN                                = 4   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_13_01EVEN                             = 4   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_13_01EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_14_01ODD                              = 9   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_14_01ODD_LEN                          = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_15_02EVEN                             = 14  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_15_02EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_16_02ODD                              = 19  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_16_02ODD_LEN                          = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_17_03EVEN                             = 24  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_17_03EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_18_03ODD                              = 29  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_18_03ODD_LEN                          = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_19_04EVEN                             = 34  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_19_04EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_20_04ODD                              = 39  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_20_04ODD_LEN                          = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_21_05EVEN                             = 44  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_21_05EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_22_05ODD                              = 49  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_22_05ODD_LEN                          = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_23_06EVEN                             = 54  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_23_06EVEN_LEN                         = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_24_06ODD                              = 59  ;
static const uint8_t P9N2_EX_OPCG_CAPT2_SEQ_24_06ODD_LEN                          = 5   ;

static const uint8_t P9N2_C_OPCG_CAPT2_UNUSED                                     = 0   ;
static const uint8_t P9N2_C_OPCG_CAPT2_UNUSED_LEN                                 = 4   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_13_01EVEN                              = 4   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_13_01EVEN_LEN                          = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_14_01ODD                               = 9   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_14_01ODD_LEN                           = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_15_02EVEN                              = 14  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_15_02EVEN_LEN                          = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_16_02ODD                               = 19  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_16_02ODD_LEN                           = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_17_03EVEN                              = 24  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_17_03EVEN_LEN                          = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_18_03ODD                               = 29  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_18_03ODD_LEN                           = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_19_04EVEN                              = 34  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_19_04EVEN_LEN                          = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_20_04ODD                               = 39  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_20_04ODD_LEN                           = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_21_05EVEN                              = 44  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_21_05EVEN_LEN                          = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_22_05ODD                               = 49  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_22_05ODD_LEN                           = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_23_06EVEN                              = 54  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_23_06EVEN_LEN                          = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_24_06ODD                               = 59  ;
static const uint8_t P9N2_C_OPCG_CAPT2_SEQ_24_06ODD_LEN                           = 5   ;

static const uint8_t P9N2_EQ_OPCG_CAPT3_UNUSED                                    = 0   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_UNUSED_LEN                                = 4   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_07EVEN                                = 4   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_07EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_07ODD                                 = 9   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_07ODD_LEN                             = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_08EVEN                                = 14  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_08EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_08ODD                                 = 19  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_08ODD_LEN                             = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_09EVEN                                = 24  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_09EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_09ODD                                 = 29  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_09ODD_LEN                             = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_10EVEN                                = 34  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_10EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_10ODD                                 = 39  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_10ODD_LEN                             = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_11EVEN                                = 44  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_11EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_11ODD                                 = 49  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_11ODD_LEN                             = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_12EVEN                                = 54  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_12EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_12ODD                                 = 59  ;
static const uint8_t P9N2_EQ_OPCG_CAPT3_SEQ_12ODD_LEN                             = 5   ;

static const uint8_t P9N2_EX_OPCG_CAPT3_UNUSED                                    = 0   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_UNUSED_LEN                                = 4   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_07EVEN                                = 4   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_07EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_07ODD                                 = 9   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_07ODD_LEN                             = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_08EVEN                                = 14  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_08EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_08ODD                                 = 19  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_08ODD_LEN                             = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_09EVEN                                = 24  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_09EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_09ODD                                 = 29  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_09ODD_LEN                             = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_10EVEN                                = 34  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_10EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_10ODD                                 = 39  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_10ODD_LEN                             = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_11EVEN                                = 44  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_11EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_11ODD                                 = 49  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_11ODD_LEN                             = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_12EVEN                                = 54  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_12EVEN_LEN                            = 5   ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_12ODD                                 = 59  ;
static const uint8_t P9N2_EX_OPCG_CAPT3_SEQ_12ODD_LEN                             = 5   ;

static const uint8_t P9N2_C_OPCG_CAPT3_UNUSED                                     = 0   ;
static const uint8_t P9N2_C_OPCG_CAPT3_UNUSED_LEN                                 = 4   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_07EVEN                                 = 4   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_07EVEN_LEN                             = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_07ODD                                  = 9   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_07ODD_LEN                              = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_08EVEN                                 = 14  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_08EVEN_LEN                             = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_08ODD                                  = 19  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_08ODD_LEN                              = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_09EVEN                                 = 24  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_09EVEN_LEN                             = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_09ODD                                  = 29  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_09ODD_LEN                              = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_10EVEN                                 = 34  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_10EVEN_LEN                             = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_10ODD                                  = 39  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_10ODD_LEN                              = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_11EVEN                                 = 44  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_11EVEN_LEN                             = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_11ODD                                  = 49  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_11ODD_LEN                              = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_12EVEN                                 = 54  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_12EVEN_LEN                             = 5   ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_12ODD                                  = 59  ;
static const uint8_t P9N2_C_OPCG_CAPT3_SEQ_12ODD_LEN                              = 5   ;

static const uint8_t P9N2_EQ_OPCG_REG0_RUNN_MODE                                  = 0   ;
static const uint8_t P9N2_EQ_OPCG_REG0_GO                                         = 1   ;
static const uint8_t P9N2_EQ_OPCG_REG0_RUN_SCAN0                                  = 2   ;
static const uint8_t P9N2_EQ_OPCG_REG0_SCAN0_MODE                                 = 3   ;
static const uint8_t P9N2_EQ_OPCG_REG0_IN_SLAVE_MODE                              = 4   ;
static const uint8_t P9N2_EQ_OPCG_REG0_IN_MASTER_MODE                             = 5   ;
static const uint8_t P9N2_EQ_OPCG_REG0_KEEP_MS_MODE                               = 6   ;
static const uint8_t P9N2_EQ_OPCG_REG0_TRIGGER_ON_UNIT0_SYNC_LVL                  = 7   ;
static const uint8_t P9N2_EQ_OPCG_REG0_TRIGGER_ON_UNIT1_SYNC_LVL                  = 8   ;
static const uint8_t P9N2_EQ_OPCG_REG0_RUN_CHIPLET_SCAN0                          = 9   ;
static const uint8_t P9N2_EQ_OPCG_REG0_RUN_CHIPLET_SCAN0_NO_PLL                   = 10  ;
static const uint8_t P9N2_EQ_OPCG_REG0_RUN_ON_UPDATE_DR                           = 11  ;
static const uint8_t P9N2_EQ_OPCG_REG0_RUN_ON_CAPTURE_DR                          = 12  ;
static const uint8_t P9N2_EQ_OPCG_REG0_STOP_RUNN_ON_XSTOP                         = 13  ;
static const uint8_t P9N2_EQ_OPCG_REG0_STARTS_BIST                                = 14  ;
static const uint8_t P9N2_EQ_OPCG_REG0_UNUSED1520                                 = 15  ;
static const uint8_t P9N2_EQ_OPCG_REG0_UNUSED1520_LEN                             = 6   ;
static const uint8_t P9N2_EQ_OPCG_REG0_LOOP_COUNT                                 = 21  ;
static const uint8_t P9N2_EQ_OPCG_REG0_LOOP_COUNT_LEN                             = 43  ;

static const uint8_t P9N2_EX_OPCG_REG0_RUNN_MODE                                  = 0   ;
static const uint8_t P9N2_EX_OPCG_REG0_GO                                         = 1   ;
static const uint8_t P9N2_EX_OPCG_REG0_RUN_SCAN0                                  = 2   ;
static const uint8_t P9N2_EX_OPCG_REG0_SCAN0_MODE                                 = 3   ;
static const uint8_t P9N2_EX_OPCG_REG0_IN_SLAVE_MODE                              = 4   ;
static const uint8_t P9N2_EX_OPCG_REG0_IN_MASTER_MODE                             = 5   ;
static const uint8_t P9N2_EX_OPCG_REG0_KEEP_MS_MODE                               = 6   ;
static const uint8_t P9N2_EX_OPCG_REG0_TRIGGER_ON_UNIT0_SYNC_LVL                  = 7   ;
static const uint8_t P9N2_EX_OPCG_REG0_TRIGGER_ON_UNIT1_SYNC_LVL                  = 8   ;
static const uint8_t P9N2_EX_OPCG_REG0_RUN_CHIPLET_SCAN0                          = 9   ;
static const uint8_t P9N2_EX_OPCG_REG0_RUN_CHIPLET_SCAN0_NO_PLL                   = 10  ;
static const uint8_t P9N2_EX_OPCG_REG0_RUN_ON_UPDATE_DR                           = 11  ;
static const uint8_t P9N2_EX_OPCG_REG0_RUN_ON_CAPTURE_DR                          = 12  ;
static const uint8_t P9N2_EX_OPCG_REG0_STOP_RUNN_ON_XSTOP                         = 13  ;
static const uint8_t P9N2_EX_OPCG_REG0_STARTS_BIST                                = 14  ;
static const uint8_t P9N2_EX_OPCG_REG0_UNUSED1520                                 = 15  ;
static const uint8_t P9N2_EX_OPCG_REG0_UNUSED1520_LEN                             = 6   ;
static const uint8_t P9N2_EX_OPCG_REG0_LOOP_COUNT                                 = 21  ;
static const uint8_t P9N2_EX_OPCG_REG0_LOOP_COUNT_LEN                             = 43  ;

static const uint8_t P9N2_C_OPCG_REG0_RUNN_MODE                                   = 0   ;
static const uint8_t P9N2_C_OPCG_REG0_GO                                          = 1   ;
static const uint8_t P9N2_C_OPCG_REG0_RUN_SCAN0                                   = 2   ;
static const uint8_t P9N2_C_OPCG_REG0_SCAN0_MODE                                  = 3   ;
static const uint8_t P9N2_C_OPCG_REG0_IN_SLAVE_MODE                               = 4   ;
static const uint8_t P9N2_C_OPCG_REG0_IN_MASTER_MODE                              = 5   ;
static const uint8_t P9N2_C_OPCG_REG0_KEEP_MS_MODE                                = 6   ;
static const uint8_t P9N2_C_OPCG_REG0_TRIGGER_ON_UNIT0_SYNC_LVL                   = 7   ;
static const uint8_t P9N2_C_OPCG_REG0_TRIGGER_ON_UNIT1_SYNC_LVL                   = 8   ;
static const uint8_t P9N2_C_OPCG_REG0_RUN_CHIPLET_SCAN0                           = 9   ;
static const uint8_t P9N2_C_OPCG_REG0_RUN_CHIPLET_SCAN0_NO_PLL                    = 10  ;
static const uint8_t P9N2_C_OPCG_REG0_RUN_ON_UPDATE_DR                            = 11  ;
static const uint8_t P9N2_C_OPCG_REG0_RUN_ON_CAPTURE_DR                           = 12  ;
static const uint8_t P9N2_C_OPCG_REG0_STOP_RUNN_ON_XSTOP                          = 13  ;
static const uint8_t P9N2_C_OPCG_REG0_STARTS_BIST                                 = 14  ;
static const uint8_t P9N2_C_OPCG_REG0_UNUSED1520                                  = 15  ;
static const uint8_t P9N2_C_OPCG_REG0_UNUSED1520_LEN                              = 6   ;
static const uint8_t P9N2_C_OPCG_REG0_LOOP_COUNT                                  = 21  ;
static const uint8_t P9N2_C_OPCG_REG0_LOOP_COUNT_LEN                              = 43  ;

static const uint8_t P9N2_EQ_OPCG_REG1_SCAN_COUNT                                 = 0   ;
static const uint8_t P9N2_EQ_OPCG_REG1_SCAN_COUNT_LEN                             = 12  ;
static const uint8_t P9N2_EQ_OPCG_REG1_MISR_A_VAL                                 = 12  ;
static const uint8_t P9N2_EQ_OPCG_REG1_MISR_A_VAL_LEN                             = 12  ;
static const uint8_t P9N2_EQ_OPCG_REG1_MISR_B_VAL                                 = 24  ;
static const uint8_t P9N2_EQ_OPCG_REG1_MISR_B_VAL_LEN                             = 12  ;
static const uint8_t P9N2_EQ_OPCG_REG1_MISR_INIT_WAIT                             = 36  ;
static const uint8_t P9N2_EQ_OPCG_REG1_MISR_INIT_WAIT_LEN                         = 12  ;
static const uint8_t P9N2_EQ_OPCG_REG1_SUPPRESS_LAST_RUNN_CLK                     = 48  ;
static const uint8_t P9N2_EQ_OPCG_REG1_SCAN_CLK_USE_EVEN                          = 49  ;
static const uint8_t P9N2_EQ_OPCG_REG1_UNUSED2                                    = 50  ;
static const uint8_t P9N2_EQ_OPCG_REG1_UNUSED2_LEN                                = 2   ;
static const uint8_t P9N2_EQ_OPCG_REG1_RTIM_THOLD_FORCE                           = 52  ;
static const uint8_t P9N2_EQ_OPCG_REG1_DISABLE_ARY_CLK_DURING_FILL                = 53  ;
static const uint8_t P9N2_EQ_OPCG_REG1_SG_HIGH_DURING_FILL                        = 54  ;
static const uint8_t P9N2_EQ_OPCG_REG1_LBIST_SKITTER_CTL                          = 55  ;
static const uint8_t P9N2_EQ_OPCG_REG1_LBIST_SKITTER_CTL_LEN                      = 2   ;
static const uint8_t P9N2_EQ_OPCG_REG1_MISR_MODE                                  = 57  ;
static const uint8_t P9N2_EQ_OPCG_REG1_INFINITE_MODE                              = 58  ;
static const uint8_t P9N2_EQ_OPCG_REG1_NSL_FILL_COUNT                             = 59  ;
static const uint8_t P9N2_EQ_OPCG_REG1_NSL_FILL_COUNT_LEN                         = 5   ;

static const uint8_t P9N2_EX_OPCG_REG1_SCAN_COUNT                                 = 0   ;
static const uint8_t P9N2_EX_OPCG_REG1_SCAN_COUNT_LEN                             = 12  ;
static const uint8_t P9N2_EX_OPCG_REG1_MISR_A_VAL                                 = 12  ;
static const uint8_t P9N2_EX_OPCG_REG1_MISR_A_VAL_LEN                             = 12  ;
static const uint8_t P9N2_EX_OPCG_REG1_MISR_B_VAL                                 = 24  ;
static const uint8_t P9N2_EX_OPCG_REG1_MISR_B_VAL_LEN                             = 12  ;
static const uint8_t P9N2_EX_OPCG_REG1_MISR_INIT_WAIT                             = 36  ;
static const uint8_t P9N2_EX_OPCG_REG1_MISR_INIT_WAIT_LEN                         = 12  ;
static const uint8_t P9N2_EX_OPCG_REG1_SUPPRESS_LAST_RUNN_CLK                     = 48  ;
static const uint8_t P9N2_EX_OPCG_REG1_SCAN_CLK_USE_EVEN                          = 49  ;
static const uint8_t P9N2_EX_OPCG_REG1_UNUSED2                                    = 50  ;
static const uint8_t P9N2_EX_OPCG_REG1_UNUSED2_LEN                                = 2   ;
static const uint8_t P9N2_EX_OPCG_REG1_RTIM_THOLD_FORCE                           = 52  ;
static const uint8_t P9N2_EX_OPCG_REG1_DISABLE_ARY_CLK_DURING_FILL                = 53  ;
static const uint8_t P9N2_EX_OPCG_REG1_SG_HIGH_DURING_FILL                        = 54  ;
static const uint8_t P9N2_EX_OPCG_REG1_LBIST_SKITTER_CTL                          = 55  ;
static const uint8_t P9N2_EX_OPCG_REG1_LBIST_SKITTER_CTL_LEN                      = 2   ;
static const uint8_t P9N2_EX_OPCG_REG1_MISR_MODE                                  = 57  ;
static const uint8_t P9N2_EX_OPCG_REG1_INFINITE_MODE                              = 58  ;
static const uint8_t P9N2_EX_OPCG_REG1_NSL_FILL_COUNT                             = 59  ;
static const uint8_t P9N2_EX_OPCG_REG1_NSL_FILL_COUNT_LEN                         = 5   ;

static const uint8_t P9N2_C_OPCG_REG1_SCAN_COUNT                                  = 0   ;
static const uint8_t P9N2_C_OPCG_REG1_SCAN_COUNT_LEN                              = 12  ;
static const uint8_t P9N2_C_OPCG_REG1_MISR_A_VAL                                  = 12  ;
static const uint8_t P9N2_C_OPCG_REG1_MISR_A_VAL_LEN                              = 12  ;
static const uint8_t P9N2_C_OPCG_REG1_MISR_B_VAL                                  = 24  ;
static const uint8_t P9N2_C_OPCG_REG1_MISR_B_VAL_LEN                              = 12  ;
static const uint8_t P9N2_C_OPCG_REG1_MISR_INIT_WAIT                              = 36  ;
static const uint8_t P9N2_C_OPCG_REG1_MISR_INIT_WAIT_LEN                          = 12  ;
static const uint8_t P9N2_C_OPCG_REG1_SUPPRESS_LAST_RUNN_CLK                      = 48  ;
static const uint8_t P9N2_C_OPCG_REG1_SCAN_CLK_USE_EVEN                           = 49  ;
static const uint8_t P9N2_C_OPCG_REG1_UNUSED2                                     = 50  ;
static const uint8_t P9N2_C_OPCG_REG1_UNUSED2_LEN                                 = 2   ;
static const uint8_t P9N2_C_OPCG_REG1_RTIM_THOLD_FORCE                            = 52  ;
static const uint8_t P9N2_C_OPCG_REG1_DISABLE_ARY_CLK_DURING_FILL                 = 53  ;
static const uint8_t P9N2_C_OPCG_REG1_SG_HIGH_DURING_FILL                         = 54  ;
static const uint8_t P9N2_C_OPCG_REG1_LBIST_SKITTER_CTL                           = 55  ;
static const uint8_t P9N2_C_OPCG_REG1_LBIST_SKITTER_CTL_LEN                       = 2   ;
static const uint8_t P9N2_C_OPCG_REG1_MISR_MODE                                   = 57  ;
static const uint8_t P9N2_C_OPCG_REG1_INFINITE_MODE                               = 58  ;
static const uint8_t P9N2_C_OPCG_REG1_NSL_FILL_COUNT                              = 59  ;
static const uint8_t P9N2_C_OPCG_REG1_NSL_FILL_COUNT_LEN                          = 5   ;

static const uint8_t P9N2_EQ_OPCG_REG2_GO2                                        = 0   ;
static const uint8_t P9N2_EQ_OPCG_REG2_PRPG_WEIGHTING                             = 1   ;
static const uint8_t P9N2_EQ_OPCG_REG2_PRPG_WEIGHTING_LEN                         = 3   ;
static const uint8_t P9N2_EQ_OPCG_REG2_PRPG_VALUE                                 = 4   ;
static const uint8_t P9N2_EQ_OPCG_REG2_PRPG_VALUE_LEN                             = 12  ;
static const uint8_t P9N2_EQ_OPCG_REG2_PRPG_A_VAL                                 = 16  ;
static const uint8_t P9N2_EQ_OPCG_REG2_PRPG_A_VAL_LEN                             = 12  ;
static const uint8_t P9N2_EQ_OPCG_REG2_PRPG_B_VAL                                 = 28  ;
static const uint8_t P9N2_EQ_OPCG_REG2_PRPG_B_VAL_LEN                             = 12  ;
static const uint8_t P9N2_EQ_OPCG_REG2_PRPG_MODE                                  = 40  ;
static const uint8_t P9N2_EQ_OPCG_REG2_UNUSED41_63                                = 41  ;
static const uint8_t P9N2_EQ_OPCG_REG2_UNUSED41_63_LEN                            = 23  ;

static const uint8_t P9N2_EX_OPCG_REG2_GO2                                        = 0   ;
static const uint8_t P9N2_EX_OPCG_REG2_PRPG_WEIGHTING                             = 1   ;
static const uint8_t P9N2_EX_OPCG_REG2_PRPG_WEIGHTING_LEN                         = 3   ;
static const uint8_t P9N2_EX_OPCG_REG2_PRPG_VALUE                                 = 4   ;
static const uint8_t P9N2_EX_OPCG_REG2_PRPG_VALUE_LEN                             = 12  ;
static const uint8_t P9N2_EX_OPCG_REG2_PRPG_A_VAL                                 = 16  ;
static const uint8_t P9N2_EX_OPCG_REG2_PRPG_A_VAL_LEN                             = 12  ;
static const uint8_t P9N2_EX_OPCG_REG2_PRPG_B_VAL                                 = 28  ;
static const uint8_t P9N2_EX_OPCG_REG2_PRPG_B_VAL_LEN                             = 12  ;
static const uint8_t P9N2_EX_OPCG_REG2_PRPG_MODE                                  = 40  ;
static const uint8_t P9N2_EX_OPCG_REG2_UNUSED41_63                                = 41  ;
static const uint8_t P9N2_EX_OPCG_REG2_UNUSED41_63_LEN                            = 23  ;

static const uint8_t P9N2_C_OPCG_REG2_GO2                                         = 0   ;
static const uint8_t P9N2_C_OPCG_REG2_PRPG_WEIGHTING                              = 1   ;
static const uint8_t P9N2_C_OPCG_REG2_PRPG_WEIGHTING_LEN                          = 3   ;
static const uint8_t P9N2_C_OPCG_REG2_PRPG_VALUE                                  = 4   ;
static const uint8_t P9N2_C_OPCG_REG2_PRPG_VALUE_LEN                              = 12  ;
static const uint8_t P9N2_C_OPCG_REG2_PRPG_A_VAL                                  = 16  ;
static const uint8_t P9N2_C_OPCG_REG2_PRPG_A_VAL_LEN                              = 12  ;
static const uint8_t P9N2_C_OPCG_REG2_PRPG_B_VAL                                  = 28  ;
static const uint8_t P9N2_C_OPCG_REG2_PRPG_B_VAL_LEN                              = 12  ;
static const uint8_t P9N2_C_OPCG_REG2_PRPG_MODE                                   = 40  ;
static const uint8_t P9N2_C_OPCG_REG2_UNUSED41_63                                 = 41  ;
static const uint8_t P9N2_C_OPCG_REG2_UNUSED41_63_LEN                             = 23  ;

static const uint8_t P9N2_EQ_PCB_OPCG_GO_OPCGGO                                   = 0   ;

static const uint8_t P9N2_EX_PCB_OPCG_GO_OPCGGO                                   = 0   ;

static const uint8_t P9N2_C_PCB_OPCG_GO_OPCGGO                                    = 0   ;

static const uint8_t P9N2_EQ_PCB_OPCG_STOP_OPCGSTOP                               = 0   ;

static const uint8_t P9N2_EX_PCB_OPCG_STOP_OPCGSTOP                               = 0   ;

static const uint8_t P9N2_C_PCB_OPCG_STOP_OPCGSTOP                                = 0   ;

static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_TRIGGER                           = 0   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_TYPE                              = 1   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_TYPE_LEN                          = 4   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_BUSY                              = 9   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_PRGSM_BUSY_ON_THIS                = 10  ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_PRGSM_BUSY                        = 11  ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_MEM                               = 17  ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_MEM_LEN                           = 3   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_CGC                               = 20  ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_CGC_LEN                           = 8   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_BANK                              = 28  ;
static const uint8_t P9N2_EQ_PHYP_PURGE_CMD_REG_ERR                               = 29  ;

static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_TRIGGER                           = 0   ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_TYPE                              = 1   ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_TYPE_LEN                          = 4   ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_BUSY                              = 9   ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_PRGSM_BUSY_ON_THIS                = 10  ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_PRGSM_BUSY                        = 11  ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_MEM                               = 17  ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_MEM_LEN                           = 3   ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_CGC                               = 20  ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_CGC_LEN                           = 8   ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_BANK                              = 28  ;
static const uint8_t P9N2_EX_PHYP_PURGE_CMD_REG_ERR                               = 29  ;

static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_REQ                                = 0   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_TTYPE                              = 1   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_TTYPE_LEN                          = 4   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_LINE_DEL_ON_NEXT_CE                = 5   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_LINE_DEL_ON_ALL_CE                 = 6   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_PHYP_PURGE_RESERVED_1              = 7   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_PHYP_PURGE_RESERVED_1_LEN          = 2   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_BUSY_ERR                           = 9   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_PHYP_PURGE_RESERVED_2              = 10  ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_PHYP_PURGE_RESERVED_2_LEN          = 2   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_MEMBER                             = 12  ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_MEMBER_LEN                         = 5   ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_DIR_ADDR                           = 17  ;
static const uint8_t P9N2_EQ_PHYP_PURGE_REG_L3_DIR_ADDR_LEN                       = 12  ;

static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_REQ                             = 0   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_TTYPE                           = 1   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_TTYPE_LEN                       = 4   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_LINE_DEL_ON_NEXT_CE             = 5   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_LINE_DEL_ON_ALL_CE              = 6   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_PHYP_PURGE_RESERVED_1           = 7   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_PHYP_PURGE_RESERVED_1_LEN       = 2   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_BUSY_ERR                        = 9   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_PHYP_PURGE_RESERVED_2           = 10  ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_PHYP_PURGE_RESERVED_2_LEN       = 2   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_MEMBER                          = 12  ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_MEMBER_LEN                      = 5   ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_DIR_ADDR                        = 17  ;
static const uint8_t P9N2_EX_L3_PHYP_PURGE_REG_L3_DIR_ADDR_LEN                    = 12  ;

static const uint8_t P9N2_EQ_PLL_LOCK_REG_LOCK                                    = 0   ;
static const uint8_t P9N2_EQ_PLL_LOCK_REG_LOCK_LEN                                = 4   ;

static const uint8_t P9N2_EX_PLL_LOCK_REG_LOCK                                    = 0   ;
static const uint8_t P9N2_EX_PLL_LOCK_REG_LOCK_LEN                                = 4   ;

static const uint8_t P9N2_C_PLL_LOCK_REG_LOCK                                     = 0   ;
static const uint8_t P9N2_C_PLL_LOCK_REG_LOCK_LEN                                 = 4   ;

static const uint8_t P9N2_EX_L2_PMU_HOLD_OUT_PMUT0_SPR_HOLD_OUT                   = 0   ;
static const uint8_t P9N2_EX_L2_PMU_HOLD_OUT_PMUT0_SPR_HOLD_OUT_LEN               = 4   ;
static const uint8_t P9N2_EX_L2_PMU_HOLD_OUT_PMUT1_SPR_HOLD_OUT                   = 4   ;
static const uint8_t P9N2_EX_L2_PMU_HOLD_OUT_PMUT1_SPR_HOLD_OUT_LEN               = 4   ;
static const uint8_t P9N2_EX_L2_PMU_HOLD_OUT_PMUT2_SPR_HOLD_OUT                   = 8   ;
static const uint8_t P9N2_EX_L2_PMU_HOLD_OUT_PMUT2_SPR_HOLD_OUT_LEN               = 4   ;
static const uint8_t P9N2_EX_L2_PMU_HOLD_OUT_PMUT3_SPR_HOLD_OUT                   = 12  ;
static const uint8_t P9N2_EX_L2_PMU_HOLD_OUT_PMUT3_SPR_HOLD_OUT_LEN               = 4   ;

static const uint8_t P9N2_C_PMU_HOLD_OUT_PMUT0_SPR_HOLD_OUT                       = 0   ;
static const uint8_t P9N2_C_PMU_HOLD_OUT_PMUT0_SPR_HOLD_OUT_LEN                   = 4   ;
static const uint8_t P9N2_C_PMU_HOLD_OUT_PMUT1_SPR_HOLD_OUT                       = 4   ;
static const uint8_t P9N2_C_PMU_HOLD_OUT_PMUT1_SPR_HOLD_OUT_LEN                   = 4   ;
static const uint8_t P9N2_C_PMU_HOLD_OUT_PMUT2_SPR_HOLD_OUT                       = 8   ;
static const uint8_t P9N2_C_PMU_HOLD_OUT_PMUT2_SPR_HOLD_OUT_LEN                   = 4   ;
static const uint8_t P9N2_C_PMU_HOLD_OUT_PMUT3_SPR_HOLD_OUT                       = 12  ;
static const uint8_t P9N2_C_PMU_HOLD_OUT_PMUT3_SPR_HOLD_OUT_LEN                   = 4   ;

static const uint8_t P9N2_EX_L2_PMU_SCOMC_PMC1                                    = 0   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_PMC2                                    = 1   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_PMC3                                    = 2   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_PMC4                                    = 3   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_PMC5                                    = 4   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_PMC6                                    = 5   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_MMCRC                                   = 6   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_MMCR0                                   = 7   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_MMCR1                                   = 8   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_MMCR2                                   = 9   ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_MMCRA                                   = 10  ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_SIER                                    = 11  ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_THREAD_ID                               = 12  ;
static const uint8_t P9N2_EX_L2_PMU_SCOMC_THREAD_ID_LEN                           = 2   ;

static const uint8_t P9N2_C_PMU_SCOMC_PMC1                                        = 0   ;
static const uint8_t P9N2_C_PMU_SCOMC_PMC2                                        = 1   ;
static const uint8_t P9N2_C_PMU_SCOMC_PMC3                                        = 2   ;
static const uint8_t P9N2_C_PMU_SCOMC_PMC4                                        = 3   ;
static const uint8_t P9N2_C_PMU_SCOMC_PMC5                                        = 4   ;
static const uint8_t P9N2_C_PMU_SCOMC_PMC6                                        = 5   ;
static const uint8_t P9N2_C_PMU_SCOMC_MMCRC                                       = 6   ;
static const uint8_t P9N2_C_PMU_SCOMC_MMCR0                                       = 7   ;
static const uint8_t P9N2_C_PMU_SCOMC_MMCR1                                       = 8   ;
static const uint8_t P9N2_C_PMU_SCOMC_MMCR2                                       = 9   ;
static const uint8_t P9N2_C_PMU_SCOMC_MMCRA                                       = 10  ;
static const uint8_t P9N2_C_PMU_SCOMC_SIER                                        = 11  ;
static const uint8_t P9N2_C_PMU_SCOMC_THREAD_ID                                   = 12  ;
static const uint8_t P9N2_C_PMU_SCOMC_THREAD_ID_LEN                               = 2   ;

static const uint8_t P9N2_EX_L2_PMU_SCOMC_EN_ENABLE_INDIRECT_PMU_SCOM             = 0   ;

static const uint8_t P9N2_C_PMU_SCOMC_EN_ENABLE_INDIRECT_PMU_SCOM                 = 0   ;

static const uint8_t P9N2_EQ_PM_L2_RCMD_DIS_REG_L3_CFG                            = 0   ;

static const uint8_t P9N2_EX_PM_L2_RCMD_DIS_REG_L3_CFG                            = 0   ;

static const uint8_t P9N2_EQ_PM_LCO_DIS_REG_L3_CFG                                = 0   ;

static const uint8_t P9N2_EX_L3_PM_LCO_DIS_REG_L3_CFG                             = 0   ;

static const uint8_t P9N2_EQ_PM_PURGE_REG_L3_REQ                                  = 0   ;
static const uint8_t P9N2_EQ_PM_PURGE_REG_L3_BUSY_ERR                             = 1   ;
static const uint8_t P9N2_EQ_PM_PURGE_REG_L3_ABORT                                = 2   ;

static const uint8_t P9N2_EX_L3_PM_PURGE_REG_L3_REQ                               = 0   ;
static const uint8_t P9N2_EX_L3_PM_PURGE_REG_L3_BUSY_ERR                          = 1   ;
static const uint8_t P9N2_EX_L3_PM_PURGE_REG_L3_ABORT                             = 2   ;

static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_HS                                  = 0   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_HC                                  = 1   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_HC_LEN                              = 3   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_HCP                                 = 4   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_RIP                                 = 5   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_SIP                                 = 6   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_TRAP                                = 7   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_IAC                                 = 8   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_NULL_MSR_SIBRC                          = 9   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_NULL_MSR_SIBRC_LEN                      = 3   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_DACR                                = 12  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_DACW                                = 13  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_NULL_MSR_WE                             = 14  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_TRH                                 = 15  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_SMS                                 = 16  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_SMS_LEN                             = 4   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_NULL_MSR_LP                             = 20  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_EP                                  = 21  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_PTR                                 = 24  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_ST                                  = 25  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_MFE                                 = 28  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_MCS                                 = 29  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_XSR_MCS_LEN                             = 3   ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_IAR                                     = 32  ;
static const uint8_t P9N2_EQ_PPE_XIDBGPRO_IAR_LEN                                 = 30  ;

static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_HS                                  = 0   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_HC                                  = 1   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_HC_LEN                              = 3   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_HCP                                 = 4   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_RIP                                 = 5   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_SIP                                 = 6   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_TRAP                                = 7   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_IAC                                 = 8   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_NULL_MSR_SIBRC                          = 9   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_NULL_MSR_SIBRC_LEN                      = 3   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_DACR                                = 12  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_DACW                                = 13  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_NULL_MSR_WE                             = 14  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_TRH                                 = 15  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_SMS                                 = 16  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_SMS_LEN                             = 4   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_NULL_MSR_LP                             = 20  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_EP                                  = 21  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_PTR                                 = 24  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_ST                                  = 25  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_MFE                                 = 28  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_MCS                                 = 29  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_XSR_MCS_LEN                             = 3   ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_IAR                                     = 32  ;
static const uint8_t P9N2_EX_PPE_XIDBGPRO_IAR_LEN                                 = 30  ;

static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_HS                                  = 0   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_HC                                  = 1   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_HC_LEN                              = 3   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_HCP                                 = 4   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_RIP                                 = 5   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_SIP                                 = 6   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_TRAP                                = 7   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_IAC                                 = 8   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_NULL_MSR_SIBRC                          = 9   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_NULL_MSR_SIBRC_LEN                      = 3   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_DACR                                = 12  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_DACW                                = 13  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_NULL_MSR_WE                             = 14  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_TRH                                 = 15  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_SMS                                 = 16  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_SMS_LEN                             = 4   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_NULL_MSR_LP                             = 20  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_EP                                  = 21  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_PTR                                 = 24  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_ST                                  = 25  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_MFE                                 = 28  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_MCS                                 = 29  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XSR_MCS_LEN                             = 3   ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XIRAMRA_SPRG0                           = 32  ;
static const uint8_t P9N2_EQ_PPE_XIRAMDBG_XIRAMRA_SPRG0_LEN                       = 32  ;

static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_HS                                  = 0   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_HC                                  = 1   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_HC_LEN                              = 3   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_HCP                                 = 4   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_RIP                                 = 5   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_SIP                                 = 6   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_TRAP                                = 7   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_IAC                                 = 8   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_NULL_MSR_SIBRC                          = 9   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_NULL_MSR_SIBRC_LEN                      = 3   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_DACR                                = 12  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_DACW                                = 13  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_NULL_MSR_WE                             = 14  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_TRH                                 = 15  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_SMS                                 = 16  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_SMS_LEN                             = 4   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_NULL_MSR_LP                             = 20  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_EP                                  = 21  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_PTR                                 = 24  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_ST                                  = 25  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_MFE                                 = 28  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_MCS                                 = 29  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XSR_MCS_LEN                             = 3   ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XIRAMRA_SPRG0                           = 32  ;
static const uint8_t P9N2_EX_PPE_XIRAMDBG_XIRAMRA_SPRG0_LEN                       = 32  ;

static const uint8_t P9N2_EQ_PPE_XIRAMEDR_XIRAMGA_IR                              = 0   ;
static const uint8_t P9N2_EQ_PPE_XIRAMEDR_XIRAMGA_IR_LEN                          = 32  ;
static const uint8_t P9N2_EQ_PPE_XIRAMEDR_EDR                                     = 32  ;
static const uint8_t P9N2_EQ_PPE_XIRAMEDR_EDR_LEN                                 = 32  ;

static const uint8_t P9N2_EX_PPE_XIRAMEDR_XIRAMGA_IR                              = 0   ;
static const uint8_t P9N2_EX_PPE_XIRAMEDR_XIRAMGA_IR_LEN                          = 32  ;
static const uint8_t P9N2_EX_PPE_XIRAMEDR_EDR                                     = 32  ;
static const uint8_t P9N2_EX_PPE_XIRAMEDR_EDR_LEN                                 = 32  ;

static const uint8_t P9N2_EQ_PPE_XIRAMGA_IR                                       = 0   ;
static const uint8_t P9N2_EQ_PPE_XIRAMGA_IR_LEN                                   = 32  ;
static const uint8_t P9N2_EQ_PPE_XIRAMGA_XIRAMRA_SPRG0                            = 32  ;
static const uint8_t P9N2_EQ_PPE_XIRAMGA_XIRAMRA_SPRG0_LEN                        = 32  ;

static const uint8_t P9N2_EX_PPE_XIRAMGA_IR                                       = 0   ;
static const uint8_t P9N2_EX_PPE_XIRAMGA_IR_LEN                                   = 32  ;
static const uint8_t P9N2_EX_PPE_XIRAMGA_XIRAMRA_SPRG0                            = 32  ;
static const uint8_t P9N2_EX_PPE_XIRAMGA_XIRAMRA_SPRG0_LEN                        = 32  ;

static const uint8_t P9N2_EQ_PPE_XIRAMRA_XIXCR_XCR                                = 1   ;
static const uint8_t P9N2_EQ_PPE_XIRAMRA_XIXCR_XCR_LEN                            = 3   ;
static const uint8_t P9N2_EQ_PPE_XIRAMRA_SPRG0                                    = 32  ;
static const uint8_t P9N2_EQ_PPE_XIRAMRA_SPRG0_LEN                                = 32  ;

static const uint8_t P9N2_EX_PPE_XIRAMRA_XIXCR_XCR                                = 1   ;
static const uint8_t P9N2_EX_PPE_XIRAMRA_XIXCR_XCR_LEN                            = 3   ;
static const uint8_t P9N2_EX_PPE_XIRAMRA_SPRG0                                    = 32  ;
static const uint8_t P9N2_EX_PPE_XIRAMRA_SPRG0_LEN                                = 32  ;

static const uint8_t P9N2_EQ_PPE_XIXCR_XCR                                        = 1   ;
static const uint8_t P9N2_EQ_PPE_XIXCR_XCR_LEN                                    = 3   ;

static const uint8_t P9N2_EX_PPE_XIXCR_XCR                                        = 1   ;
static const uint8_t P9N2_EX_PPE_XIXCR_XCR_LEN                                    = 3   ;

static const uint8_t P9N2_EQ_PPM_CGCR_CLKGLM_ASYNC_RESET                          = 0   ;
static const uint8_t P9N2_EQ_PPM_CGCR_RESERVED_1_2                                = 1   ;
static const uint8_t P9N2_EQ_PPM_CGCR_RESERVED_1_2_LEN                            = 2   ;
static const uint8_t P9N2_EQ_PPM_CGCR_CLKGLM_SEL                                  = 3   ;

static const uint8_t P9N2_EX_PPM_CGCR_CLKGLM_ASYNC_RESET                          = 0   ;
static const uint8_t P9N2_EX_PPM_CGCR_RESERVED_1_2                                = 1   ;
static const uint8_t P9N2_EX_PPM_CGCR_RESERVED_1_2_LEN                            = 2   ;
static const uint8_t P9N2_EX_PPM_CGCR_CLKGLM_SEL                                  = 3   ;

static const uint8_t P9N2_C_PPM_CGCR_CLKGLM_ASYNC_RESET                           = 0   ;
static const uint8_t P9N2_C_PPM_CGCR_RESERVED_1_2                                 = 1   ;
static const uint8_t P9N2_C_PPM_CGCR_RESERVED_1_2_LEN                             = 2   ;
static const uint8_t P9N2_C_PPM_CGCR_CLKGLM_SEL                                   = 3   ;

static const uint8_t P9N2_EQ_PPM_GPMMR_SPECIAL_WKUP_DONE                          = 0   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_SPECIAL_WKUP_ACTIVE                        = 1   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_REGULAR_WKUP_ACTIVE                        = 2   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_SPECIAL_WKUP_REQUESTED                     = 3   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_REGULAR_WKUP_REQUESTED                     = 4   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_REGULAR_WKUP_PRESENT                       = 5   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_BLOCK_REG_WKUP_EVENTS                      = 6   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_BLOCK_ALL_WKUP_EVENTS                      = 7   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_WKUP_OVERRIDE_EN                           = 8   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_SPC_WKUP_OVERRIDE                          = 9   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_REG_WKUP_OVERRIDE                          = 10  ;
static const uint8_t P9N2_EQ_PPM_GPMMR_CHIPLET_ENABLE                             = 11  ;
static const uint8_t P9N2_EQ_PPM_GPMMR_RESERVED_12_14                             = 12  ;
static const uint8_t P9N2_EQ_PPM_GPMMR_RESERVED_12_14_LEN                         = 3   ;
static const uint8_t P9N2_EQ_PPM_GPMMR_RESET_STATE_INDICATOR                      = 15  ;

static const uint8_t P9N2_EX_PPM_GPMMR_SPECIAL_WKUP_DONE                          = 0   ;
static const uint8_t P9N2_EX_PPM_GPMMR_SPECIAL_WKUP_ACTIVE                        = 1   ;
static const uint8_t P9N2_EX_PPM_GPMMR_REGULAR_WKUP_ACTIVE                        = 2   ;
static const uint8_t P9N2_EX_PPM_GPMMR_SPECIAL_WKUP_REQUESTED                     = 3   ;
static const uint8_t P9N2_EX_PPM_GPMMR_REGULAR_WKUP_REQUESTED                     = 4   ;
static const uint8_t P9N2_EX_PPM_GPMMR_REGULAR_WKUP_PRESENT                       = 5   ;
static const uint8_t P9N2_EX_PPM_GPMMR_BLOCK_REG_WKUP_EVENTS                      = 6   ;
static const uint8_t P9N2_EX_PPM_GPMMR_BLOCK_ALL_WKUP_EVENTS                      = 7   ;
static const uint8_t P9N2_EX_PPM_GPMMR_WKUP_OVERRIDE_EN                           = 8   ;
static const uint8_t P9N2_EX_PPM_GPMMR_SPC_WKUP_OVERRIDE                          = 9   ;
static const uint8_t P9N2_EX_PPM_GPMMR_REG_WKUP_OVERRIDE                          = 10  ;
static const uint8_t P9N2_EX_PPM_GPMMR_CHIPLET_ENABLE                             = 11  ;
static const uint8_t P9N2_EX_PPM_GPMMR_RESERVED_12_14                             = 12  ;
static const uint8_t P9N2_EX_PPM_GPMMR_RESERVED_12_14_LEN                         = 3   ;
static const uint8_t P9N2_EX_PPM_GPMMR_RESET_STATE_INDICATOR                      = 15  ;

static const uint8_t P9N2_C_PPM_GPMMR_SPECIAL_WKUP_DONE                           = 0   ;
static const uint8_t P9N2_C_PPM_GPMMR_SPECIAL_WKUP_ACTIVE                         = 1   ;
static const uint8_t P9N2_C_PPM_GPMMR_REGULAR_WKUP_ACTIVE                         = 2   ;
static const uint8_t P9N2_C_PPM_GPMMR_SPECIAL_WKUP_REQUESTED                      = 3   ;
static const uint8_t P9N2_C_PPM_GPMMR_REGULAR_WKUP_REQUESTED                      = 4   ;
static const uint8_t P9N2_C_PPM_GPMMR_REGULAR_WKUP_PRESENT                        = 5   ;
static const uint8_t P9N2_C_PPM_GPMMR_BLOCK_REG_WKUP_EVENTS                       = 6   ;
static const uint8_t P9N2_C_PPM_GPMMR_BLOCK_ALL_WKUP_EVENTS                       = 7   ;
static const uint8_t P9N2_C_PPM_GPMMR_WKUP_OVERRIDE_EN                            = 8   ;
static const uint8_t P9N2_C_PPM_GPMMR_SPC_WKUP_OVERRIDE                           = 9   ;
static const uint8_t P9N2_C_PPM_GPMMR_REG_WKUP_OVERRIDE                           = 10  ;
static const uint8_t P9N2_C_PPM_GPMMR_CHIPLET_ENABLE                              = 11  ;
static const uint8_t P9N2_C_PPM_GPMMR_RESERVED_12_14                              = 12  ;
static const uint8_t P9N2_C_PPM_GPMMR_RESERVED_12_14_LEN                          = 3   ;
static const uint8_t P9N2_C_PPM_GPMMR_RESET_STATE_INDICATOR                       = 15  ;

static const uint8_t P9N2_EQ_PPM_IVRMAVR_IVRM_IVID                                = 0   ;
static const uint8_t P9N2_EQ_PPM_IVRMAVR_IVRM_IVID_LEN                            = 8   ;
static const uint8_t P9N2_EQ_PPM_IVRMAVR_IVRM_PROTECT_ACTIVE                      = 8   ;
static const uint8_t P9N2_EQ_PPM_IVRMAVR_IVRM_PFET_STRENGTH                       = 11  ;
static const uint8_t P9N2_EQ_PPM_IVRMAVR_IVRM_PFET_STRENGTH_LEN                   = 5   ;
static const uint8_t P9N2_EQ_PPM_IVRMAVR_IVRM_VID_VALID                           = 24  ;
static const uint8_t P9N2_EQ_PPM_IVRMAVR_IVRM_BYPASS_B                            = 25  ;
static const uint8_t P9N2_EQ_PPM_IVRMAVR_IVRM_POWERON                             = 26  ;
static const uint8_t P9N2_EQ_PPM_IVRMAVR_IVRM_VREG_SLOW_DC                        = 27  ;

static const uint8_t P9N2_EX_PPM_IVRMAVR_IVRM_IVID                                = 0   ;
static const uint8_t P9N2_EX_PPM_IVRMAVR_IVRM_IVID_LEN                            = 8   ;
static const uint8_t P9N2_EX_PPM_IVRMAVR_IVRM_PROTECT_ACTIVE                      = 8   ;
static const uint8_t P9N2_EX_PPM_IVRMAVR_IVRM_PFET_STRENGTH                       = 11  ;
static const uint8_t P9N2_EX_PPM_IVRMAVR_IVRM_PFET_STRENGTH_LEN                   = 5   ;
static const uint8_t P9N2_EX_PPM_IVRMAVR_IVRM_VID_VALID                           = 24  ;
static const uint8_t P9N2_EX_PPM_IVRMAVR_IVRM_BYPASS_B                            = 25  ;
static const uint8_t P9N2_EX_PPM_IVRMAVR_IVRM_POWERON                             = 26  ;
static const uint8_t P9N2_EX_PPM_IVRMAVR_IVRM_VREG_SLOW_DC                        = 27  ;

static const uint8_t P9N2_C_PPM_IVRMAVR_IVRM_IVID                                 = 0   ;
static const uint8_t P9N2_C_PPM_IVRMAVR_IVRM_IVID_LEN                             = 8   ;
static const uint8_t P9N2_C_PPM_IVRMAVR_IVRM_PROTECT_ACTIVE                       = 8   ;
static const uint8_t P9N2_C_PPM_IVRMAVR_IVRM_PFET_STRENGTH                        = 11  ;
static const uint8_t P9N2_C_PPM_IVRMAVR_IVRM_PFET_STRENGTH_LEN                    = 5   ;
static const uint8_t P9N2_C_PPM_IVRMAVR_IVRM_VID_VALID                            = 24  ;
static const uint8_t P9N2_C_PPM_IVRMAVR_IVRM_BYPASS_B                             = 25  ;
static const uint8_t P9N2_C_PPM_IVRMAVR_IVRM_POWERON                              = 26  ;
static const uint8_t P9N2_C_PPM_IVRMAVR_IVRM_VREG_SLOW_DC                         = 27  ;

static const uint8_t P9N2_EQ_PPM_IVRMCR_IVRM_VID_VALID                            = 0   ;
static const uint8_t P9N2_EQ_PPM_IVRMCR_IVRM_BYPASS_B                             = 1   ;
static const uint8_t P9N2_EQ_PPM_IVRMCR_IVRM_POWERON                              = 2   ;
static const uint8_t P9N2_EQ_PPM_IVRMCR_IVRM_VREG_SLOW_DC                         = 3   ;
static const uint8_t P9N2_EQ_PPM_IVRMCR_RESERVED_4_7                              = 4   ;
static const uint8_t P9N2_EQ_PPM_IVRMCR_RESERVED_4_7_LEN                          = 4   ;

static const uint8_t P9N2_EX_PPM_IVRMCR_IVRM_VID_VALID                            = 0   ;
static const uint8_t P9N2_EX_PPM_IVRMCR_IVRM_BYPASS_B                             = 1   ;
static const uint8_t P9N2_EX_PPM_IVRMCR_IVRM_POWERON                              = 2   ;
static const uint8_t P9N2_EX_PPM_IVRMCR_IVRM_VREG_SLOW_DC                         = 3   ;
static const uint8_t P9N2_EX_PPM_IVRMCR_RESERVED_4_7                              = 4   ;
static const uint8_t P9N2_EX_PPM_IVRMCR_RESERVED_4_7_LEN                          = 4   ;

static const uint8_t P9N2_C_PPM_IVRMCR_IVRM_VID_VALID                             = 0   ;
static const uint8_t P9N2_C_PPM_IVRMCR_IVRM_BYPASS_B                              = 1   ;
static const uint8_t P9N2_C_PPM_IVRMCR_IVRM_POWERON                               = 2   ;
static const uint8_t P9N2_C_PPM_IVRMCR_IVRM_VREG_SLOW_DC                          = 3   ;
static const uint8_t P9N2_C_PPM_IVRMCR_RESERVED_4_7                               = 4   ;
static const uint8_t P9N2_C_PPM_IVRMCR_RESERVED_4_7_LEN                           = 4   ;

static const uint8_t P9N2_EQ_PPM_IVRMDVR_IVRM_IVID                                = 0   ;
static const uint8_t P9N2_EQ_PPM_IVRMDVR_IVRM_IVID_LEN                            = 8   ;
static const uint8_t P9N2_EQ_PPM_IVRMDVR_RESERVED_8_10                            = 8   ;
static const uint8_t P9N2_EQ_PPM_IVRMDVR_RESERVED_8_10_LEN                        = 3   ;
static const uint8_t P9N2_EQ_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CORE                  = 11  ;
static const uint8_t P9N2_EQ_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CORE_LEN              = 5   ;
static const uint8_t P9N2_EQ_PPM_IVRMDVR_RESERVED_16_18                           = 16  ;
static const uint8_t P9N2_EQ_PPM_IVRMDVR_RESERVED_16_18_LEN                       = 3   ;
static const uint8_t P9N2_EQ_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CACHE                 = 19  ;
static const uint8_t P9N2_EQ_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CACHE_LEN             = 5   ;

static const uint8_t P9N2_EX_PPM_IVRMDVR_IVRM_IVID                                = 0   ;
static const uint8_t P9N2_EX_PPM_IVRMDVR_IVRM_IVID_LEN                            = 8   ;
static const uint8_t P9N2_EX_PPM_IVRMDVR_RESERVED_8_10                            = 8   ;
static const uint8_t P9N2_EX_PPM_IVRMDVR_RESERVED_8_10_LEN                        = 3   ;
static const uint8_t P9N2_EX_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CORE                  = 11  ;
static const uint8_t P9N2_EX_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CORE_LEN              = 5   ;
static const uint8_t P9N2_EX_PPM_IVRMDVR_RESERVED_16_18                           = 16  ;
static const uint8_t P9N2_EX_PPM_IVRMDVR_RESERVED_16_18_LEN                       = 3   ;
static const uint8_t P9N2_EX_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CACHE                 = 19  ;
static const uint8_t P9N2_EX_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CACHE_LEN             = 5   ;

static const uint8_t P9N2_C_PPM_IVRMDVR_IVRM_IVID                                 = 0   ;
static const uint8_t P9N2_C_PPM_IVRMDVR_IVRM_IVID_LEN                             = 8   ;
static const uint8_t P9N2_C_PPM_IVRMDVR_RESERVED_8_10                             = 8   ;
static const uint8_t P9N2_C_PPM_IVRMDVR_RESERVED_8_10_LEN                         = 3   ;
static const uint8_t P9N2_C_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CORE                   = 11  ;
static const uint8_t P9N2_C_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CORE_LEN               = 5   ;
static const uint8_t P9N2_C_PPM_IVRMDVR_RESERVED_16_18                            = 16  ;
static const uint8_t P9N2_C_PPM_IVRMDVR_RESERVED_16_18_LEN                        = 3   ;
static const uint8_t P9N2_C_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CACHE                  = 19  ;
static const uint8_t P9N2_C_PPM_IVRMDVR_IVRM_PFET_STRENGTH_CACHE_LEN              = 5   ;

static const uint8_t P9N2_EQ_PPM_IVRMST_IVRM_VID_DONE                             = 0   ;

static const uint8_t P9N2_EX_PPM_IVRMST_IVRM_VID_DONE                             = 0   ;

static const uint8_t P9N2_C_PPM_IVRMST_IVRM_VID_DONE                              = 0   ;

static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_FORCE_STATE                        = 0   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_FORCE_STATE_LEN                    = 2   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PFET_FORCE_STATE                        = 2   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PFET_FORCE_STATE_LEN                    = 2   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_VAL_OVERRIDE                       = 4   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_SEL_OVERRIDE                       = 5   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PFET_VAL_OVERRIDE                       = 6   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PFET_SEL_OVERRIDE                       = 7   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_REGULATION_FINGER_EN               = 8   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_REGULATION_FINGER_VALUE            = 9   ;
static const uint8_t P9N2_EQ_PPM_PFCS_RESERVED_10_11                              = 10  ;
static const uint8_t P9N2_EQ_PPM_PFCS_RESERVED_10_11_LEN                          = 2   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_ENABLE_VALUE                       = 12  ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_ENABLE_VALUE_LEN                   = 8   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_SEL_VALUE                          = 20  ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PFET_SEL_VALUE_LEN                      = 4   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PFET_ENABLE_VALUE                       = 24  ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PFET_ENABLE_VALUE_LEN                   = 8   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PFET_SEL_VALUE                          = 32  ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PFET_SEL_VALUE_LEN                      = 4   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PG_STATE                                = 42  ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PG_STATE_LEN                            = 4   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PG_SEL                                  = 46  ;
static const uint8_t P9N2_EQ_PPM_PFCS_VDD_PG_SEL_LEN                              = 4   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PG_STATE                                = 50  ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PG_STATE_LEN                            = 4   ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PG_SEL                                  = 54  ;
static const uint8_t P9N2_EQ_PPM_PFCS_VCS_PG_SEL_LEN                              = 4   ;

static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_FORCE_STATE                        = 0   ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_FORCE_STATE_LEN                    = 2   ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PFET_FORCE_STATE                        = 2   ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PFET_FORCE_STATE_LEN                    = 2   ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_VAL_OVERRIDE                       = 4   ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_SEL_OVERRIDE                       = 5   ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PFET_VAL_OVERRIDE                       = 6   ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PFET_SEL_OVERRIDE                       = 7   ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_REGULATION_FINGER_EN               = 8   ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_REGULATION_FINGER_VALUE            = 9   ;
static const uint8_t P9N2_EX_PPM_PFCS_RESERVED_10_11                              = 10  ;
static const uint8_t P9N2_EX_PPM_PFCS_RESERVED_10_11_LEN                          = 2   ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_ENABLE_VALUE                       = 12  ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_ENABLE_VALUE_LEN                   = 8   ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_SEL_VALUE                          = 20  ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PFET_SEL_VALUE_LEN                      = 4   ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PFET_ENABLE_VALUE                       = 24  ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PFET_ENABLE_VALUE_LEN                   = 8   ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PFET_SEL_VALUE                          = 32  ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PFET_SEL_VALUE_LEN                      = 4   ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PG_STATE                                = 42  ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PG_STATE_LEN                            = 4   ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PG_SEL                                  = 46  ;
static const uint8_t P9N2_EX_PPM_PFCS_VDD_PG_SEL_LEN                              = 4   ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PG_STATE                                = 50  ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PG_STATE_LEN                            = 4   ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PG_SEL                                  = 54  ;
static const uint8_t P9N2_EX_PPM_PFCS_VCS_PG_SEL_LEN                              = 4   ;

static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_FORCE_STATE                         = 0   ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_FORCE_STATE_LEN                     = 2   ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PFET_FORCE_STATE                         = 2   ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PFET_FORCE_STATE_LEN                     = 2   ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_VAL_OVERRIDE                        = 4   ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_SEL_OVERRIDE                        = 5   ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PFET_VAL_OVERRIDE                        = 6   ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PFET_SEL_OVERRIDE                        = 7   ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_REGULATION_FINGER_EN                = 8   ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_REGULATION_FINGER_VALUE             = 9   ;
static const uint8_t P9N2_C_PPM_PFCS_RESERVED_10_11                               = 10  ;
static const uint8_t P9N2_C_PPM_PFCS_RESERVED_10_11_LEN                           = 2   ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_ENABLE_VALUE                        = 12  ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_ENABLE_VALUE_LEN                    = 8   ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_SEL_VALUE                           = 20  ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PFET_SEL_VALUE_LEN                       = 4   ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PFET_ENABLE_VALUE                        = 24  ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PFET_ENABLE_VALUE_LEN                    = 8   ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PFET_SEL_VALUE                           = 32  ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PFET_SEL_VALUE_LEN                       = 4   ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PG_STATE                                 = 42  ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PG_STATE_LEN                             = 4   ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PG_SEL                                   = 46  ;
static const uint8_t P9N2_C_PPM_PFCS_VDD_PG_SEL_LEN                               = 4   ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PG_STATE                                 = 50  ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PG_STATE_LEN                             = 4   ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PG_SEL                                   = 54  ;
static const uint8_t P9N2_C_PPM_PFCS_VCS_PG_SEL_LEN                               = 4   ;

static const uint8_t P9N2_EQ_PPM_PFDLY_POWDN_DLY                                  = 0   ;
static const uint8_t P9N2_EQ_PPM_PFDLY_POWDN_DLY_LEN                              = 4   ;
static const uint8_t P9N2_EQ_PPM_PFDLY_POWUP_DLY                                  = 4   ;
static const uint8_t P9N2_EQ_PPM_PFDLY_POWUP_DLY_LEN                              = 4   ;

static const uint8_t P9N2_EX_PPM_PFDLY_POWDN_DLY                                  = 0   ;
static const uint8_t P9N2_EX_PPM_PFDLY_POWDN_DLY_LEN                              = 4   ;
static const uint8_t P9N2_EX_PPM_PFDLY_POWUP_DLY                                  = 4   ;
static const uint8_t P9N2_EX_PPM_PFDLY_POWUP_DLY_LEN                              = 4   ;

static const uint8_t P9N2_C_PPM_PFDLY_POWDN_DLY                                   = 0   ;
static const uint8_t P9N2_C_PPM_PFDLY_POWDN_DLY_LEN                               = 4   ;
static const uint8_t P9N2_C_PPM_PFDLY_POWUP_DLY                                   = 4   ;
static const uint8_t P9N2_C_PPM_PFDLY_POWUP_DLY_LEN                               = 4   ;

static const uint8_t P9N2_EQ_PPM_PFOFF_VDD_VOFF_SEL                               = 0   ;
static const uint8_t P9N2_EQ_PPM_PFOFF_VDD_VOFF_SEL_LEN                           = 4   ;
static const uint8_t P9N2_EQ_PPM_PFOFF_VCS_VOFF_SEL                               = 4   ;
static const uint8_t P9N2_EQ_PPM_PFOFF_VCS_VOFF_SEL_LEN                           = 4   ;

static const uint8_t P9N2_EX_PPM_PFOFF_VDD_VOFF_SEL                               = 0   ;
static const uint8_t P9N2_EX_PPM_PFOFF_VDD_VOFF_SEL_LEN                           = 4   ;
static const uint8_t P9N2_EX_PPM_PFOFF_VCS_VOFF_SEL                               = 4   ;
static const uint8_t P9N2_EX_PPM_PFOFF_VCS_VOFF_SEL_LEN                           = 4   ;

static const uint8_t P9N2_C_PPM_PFOFF_VDD_VOFF_SEL                                = 0   ;
static const uint8_t P9N2_C_PPM_PFOFF_VDD_VOFF_SEL_LEN                            = 4   ;
static const uint8_t P9N2_C_PPM_PFOFF_VCS_VOFF_SEL                                = 4   ;
static const uint8_t P9N2_C_PPM_PFOFF_VCS_VOFF_SEL_LEN                            = 4   ;

static const uint8_t P9N2_EQ_PPM_PFSNS_VDD_PFETS_ENABLED_SENSE                    = 0   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VDD_PFETS_DISABLED_SENSE                   = 1   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VCS_PFETS_ENABLED_SENSE                    = 2   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VCS_PFETS_DISABLED_SENSE                   = 3   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_RESERVED_4_15                              = 4   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_RESERVED_4_15_LEN                          = 12  ;
static const uint8_t P9N2_EQ_PPM_PFSNS_TP_VDD_PFET_ENABLE_ACTUAL                  = 16  ;
static const uint8_t P9N2_EQ_PPM_PFSNS_TP_VDD_PFET_ENABLE_ACTUAL_LEN              = 8   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_TP_VCS_PFET_ENABLE_ACTUAL                  = 24  ;
static const uint8_t P9N2_EQ_PPM_PFSNS_TP_VCS_PFET_ENABLE_ACTUAL_LEN              = 8   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VDD_PG_STATE                               = 42  ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VDD_PG_STATE_LEN                           = 4   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VDD_PG_SEL                                 = 46  ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VDD_PG_SEL_LEN                             = 4   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VCS_PG_STATE                               = 50  ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VCS_PG_STATE_LEN                           = 4   ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VCS_PG_SEL                                 = 54  ;
static const uint8_t P9N2_EQ_PPM_PFSNS_VCS_PG_SEL_LEN                             = 4   ;

static const uint8_t P9N2_EX_PPM_PFSNS_VDD_PFETS_ENABLED_SENSE                    = 0   ;
static const uint8_t P9N2_EX_PPM_PFSNS_VDD_PFETS_DISABLED_SENSE                   = 1   ;
static const uint8_t P9N2_EX_PPM_PFSNS_VCS_PFETS_ENABLED_SENSE                    = 2   ;
static const uint8_t P9N2_EX_PPM_PFSNS_VCS_PFETS_DISABLED_SENSE                   = 3   ;
static const uint8_t P9N2_EX_PPM_PFSNS_RESERVED_4_15                              = 4   ;
static const uint8_t P9N2_EX_PPM_PFSNS_RESERVED_4_15_LEN                          = 12  ;
static const uint8_t P9N2_EX_PPM_PFSNS_TP_VDD_PFET_ENABLE_ACTUAL                  = 16  ;
static const uint8_t P9N2_EX_PPM_PFSNS_TP_VDD_PFET_ENABLE_ACTUAL_LEN              = 8   ;
static const uint8_t P9N2_EX_PPM_PFSNS_TP_VCS_PFET_ENABLE_ACTUAL                  = 24  ;
static const uint8_t P9N2_EX_PPM_PFSNS_TP_VCS_PFET_ENABLE_ACTUAL_LEN              = 8   ;
static const uint8_t P9N2_EX_PPM_PFSNS_VDD_PG_STATE                               = 42  ;
static const uint8_t P9N2_EX_PPM_PFSNS_VDD_PG_STATE_LEN                           = 4   ;
static const uint8_t P9N2_EX_PPM_PFSNS_VDD_PG_SEL                                 = 46  ;
static const uint8_t P9N2_EX_PPM_PFSNS_VDD_PG_SEL_LEN                             = 4   ;
static const uint8_t P9N2_EX_PPM_PFSNS_VCS_PG_STATE                               = 50  ;
static const uint8_t P9N2_EX_PPM_PFSNS_VCS_PG_STATE_LEN                           = 4   ;
static const uint8_t P9N2_EX_PPM_PFSNS_VCS_PG_SEL                                 = 54  ;
static const uint8_t P9N2_EX_PPM_PFSNS_VCS_PG_SEL_LEN                             = 4   ;

static const uint8_t P9N2_C_PPM_PFSNS_VDD_PFETS_ENABLED_SENSE                     = 0   ;
static const uint8_t P9N2_C_PPM_PFSNS_VDD_PFETS_DISABLED_SENSE                    = 1   ;
static const uint8_t P9N2_C_PPM_PFSNS_VCS_PFETS_ENABLED_SENSE                     = 2   ;
static const uint8_t P9N2_C_PPM_PFSNS_VCS_PFETS_DISABLED_SENSE                    = 3   ;
static const uint8_t P9N2_C_PPM_PFSNS_RESERVED_4_15                               = 4   ;
static const uint8_t P9N2_C_PPM_PFSNS_RESERVED_4_15_LEN                           = 12  ;
static const uint8_t P9N2_C_PPM_PFSNS_TP_VDD_PFET_ENABLE_ACTUAL                   = 16  ;
static const uint8_t P9N2_C_PPM_PFSNS_TP_VDD_PFET_ENABLE_ACTUAL_LEN               = 8   ;
static const uint8_t P9N2_C_PPM_PFSNS_TP_VCS_PFET_ENABLE_ACTUAL                   = 24  ;
static const uint8_t P9N2_C_PPM_PFSNS_TP_VCS_PFET_ENABLE_ACTUAL_LEN               = 8   ;
static const uint8_t P9N2_C_PPM_PFSNS_VDD_PG_STATE                                = 42  ;
static const uint8_t P9N2_C_PPM_PFSNS_VDD_PG_STATE_LEN                            = 4   ;
static const uint8_t P9N2_C_PPM_PFSNS_VDD_PG_SEL                                  = 46  ;
static const uint8_t P9N2_C_PPM_PFSNS_VDD_PG_SEL_LEN                              = 4   ;
static const uint8_t P9N2_C_PPM_PFSNS_VCS_PG_STATE                                = 50  ;
static const uint8_t P9N2_C_PPM_PFSNS_VCS_PG_STATE_LEN                            = 4   ;
static const uint8_t P9N2_C_PPM_PFSNS_VCS_PG_SEL                                  = 54  ;
static const uint8_t P9N2_C_PPM_PFSNS_VCS_PG_SEL_LEN                              = 4   ;

static const uint8_t P9N2_EQ_PPM_PIG_REQ_INTR_TYPE                                = 1   ;
static const uint8_t P9N2_EQ_PPM_PIG_REQ_INTR_TYPE_LEN                            = 3   ;
static const uint8_t P9N2_EQ_PPM_PIG_REQ_INTR_PAYLOAD                             = 4   ;
static const uint8_t P9N2_EQ_PPM_PIG_REQ_INTR_PAYLOAD_LEN                         = 12  ;
static const uint8_t P9N2_EQ_PPM_PIG_GRANTED_PACKET                               = 16  ;
static const uint8_t P9N2_EQ_PPM_PIG_GRANTED_PACKET_LEN                           = 16  ;
static const uint8_t P9N2_EQ_PPM_PIG_INTR_GRANTED                                 = 32  ;
static const uint8_t P9N2_EQ_PPM_PIG_GRANTED_SOURCE                               = 34  ;
static const uint8_t P9N2_EQ_PPM_PIG_GRANTED_SOURCE_LEN                           = 2   ;
static const uint8_t P9N2_EQ_PPM_PIG_PENDING_SOURCE                               = 37  ;
static const uint8_t P9N2_EQ_PPM_PIG_PENDING_SOURCE_LEN                           = 3   ;
static const uint8_t P9N2_EQ_PPM_PIG_NETWORK_RESET_OCCURRED                       = 40  ;

static const uint8_t P9N2_EX_PPM_PIG_REQ_INTR_TYPE                                = 1   ;
static const uint8_t P9N2_EX_PPM_PIG_REQ_INTR_TYPE_LEN                            = 3   ;
static const uint8_t P9N2_EX_PPM_PIG_REQ_INTR_PAYLOAD                             = 4   ;
static const uint8_t P9N2_EX_PPM_PIG_REQ_INTR_PAYLOAD_LEN                         = 12  ;
static const uint8_t P9N2_EX_PPM_PIG_GRANTED_PACKET                               = 16  ;
static const uint8_t P9N2_EX_PPM_PIG_GRANTED_PACKET_LEN                           = 16  ;
static const uint8_t P9N2_EX_PPM_PIG_INTR_GRANTED                                 = 32  ;
static const uint8_t P9N2_EX_PPM_PIG_GRANTED_SOURCE                               = 34  ;
static const uint8_t P9N2_EX_PPM_PIG_GRANTED_SOURCE_LEN                           = 2   ;
static const uint8_t P9N2_EX_PPM_PIG_PENDING_SOURCE                               = 37  ;
static const uint8_t P9N2_EX_PPM_PIG_PENDING_SOURCE_LEN                           = 3   ;
static const uint8_t P9N2_EX_PPM_PIG_NETWORK_RESET_OCCURRED                       = 40  ;

static const uint8_t P9N2_C_PPM_PIG_REQ_INTR_TYPE                                 = 1   ;
static const uint8_t P9N2_C_PPM_PIG_REQ_INTR_TYPE_LEN                             = 3   ;
static const uint8_t P9N2_C_PPM_PIG_REQ_INTR_PAYLOAD                              = 4   ;
static const uint8_t P9N2_C_PPM_PIG_REQ_INTR_PAYLOAD_LEN                          = 12  ;
static const uint8_t P9N2_C_PPM_PIG_GRANTED_PACKET                                = 16  ;
static const uint8_t P9N2_C_PPM_PIG_GRANTED_PACKET_LEN                            = 16  ;
static const uint8_t P9N2_C_PPM_PIG_INTR_GRANTED                                  = 32  ;
static const uint8_t P9N2_C_PPM_PIG_GRANTED_SOURCE                                = 34  ;
static const uint8_t P9N2_C_PPM_PIG_GRANTED_SOURCE_LEN                            = 2   ;
static const uint8_t P9N2_C_PPM_PIG_PENDING_SOURCE                                = 37  ;
static const uint8_t P9N2_C_PPM_PIG_PENDING_SOURCE_LEN                            = 3   ;
static const uint8_t P9N2_C_PPM_PIG_NETWORK_RESET_OCCURRED                        = 40  ;

static const uint8_t P9N2_EQ_PPM_SCRATCH0_DATA                                    = 0   ;
static const uint8_t P9N2_EQ_PPM_SCRATCH0_DATA_LEN                                = 64  ;

static const uint8_t P9N2_EX_PPM_SCRATCH0_DATA                                    = 0   ;
static const uint8_t P9N2_EX_PPM_SCRATCH0_DATA_LEN                                = 64  ;

static const uint8_t P9N2_C_PPM_SCRATCH0_DATA                                     = 0   ;
static const uint8_t P9N2_C_PPM_SCRATCH0_DATA_LEN                                 = 64  ;

static const uint8_t P9N2_EQ_PPM_SCRATCH1_DATA                                    = 0   ;
static const uint8_t P9N2_EQ_PPM_SCRATCH1_DATA_LEN                                = 64  ;

static const uint8_t P9N2_EX_PPM_SCRATCH1_DATA                                    = 0   ;
static const uint8_t P9N2_EX_PPM_SCRATCH1_DATA_LEN                                = 64  ;

static const uint8_t P9N2_C_PPM_SCRATCH1_DATA                                     = 0   ;
static const uint8_t P9N2_C_PPM_SCRATCH1_DATA_LEN                                 = 64  ;

static const uint8_t P9N2_EQ_PPM_SPWKUP_FSP_FSP_SPECIAL_WKUP                      = 0   ;

static const uint8_t P9N2_EX_PPM_SPWKUP_FSP_FSP_SPECIAL_WKUP                      = 0   ;

static const uint8_t P9N2_C_PPM_SPWKUP_FSP_FSP_SPECIAL_WKUP                       = 0   ;

static const uint8_t P9N2_EQ_PPM_SPWKUP_HYP_HYP_SPECIAL_WKUP                      = 0   ;

static const uint8_t P9N2_EX_PPM_SPWKUP_HYP_HYP_SPECIAL_WKUP                      = 0   ;

static const uint8_t P9N2_C_PPM_SPWKUP_HYP_HYP_SPECIAL_WKUP                       = 0   ;

static const uint8_t P9N2_EQ_PPM_SPWKUP_OCC_OCC_SPECIAL_WKUP                      = 0   ;

static const uint8_t P9N2_EX_PPM_SPWKUP_OCC_OCC_SPECIAL_WKUP                      = 0   ;

static const uint8_t P9N2_C_PPM_SPWKUP_OCC_OCC_SPECIAL_WKUP                       = 0   ;

static const uint8_t P9N2_EQ_PPM_SPWKUP_OTR_OTR_SPECIAL_WKUP                      = 0   ;

static const uint8_t P9N2_EX_PPM_SPWKUP_OTR_OTR_SPECIAL_WKUP                      = 0   ;

static const uint8_t P9N2_C_PPM_SPWKUP_OTR_OTR_SPECIAL_WKUP                       = 0   ;

static const uint8_t P9N2_EQ_PPM_SSHFSP_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_DEEPEST_REQ_STOP_LEVEL_FSP                = 12  ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_DEEPEST_REQ_STOP_LEVEL_FSP_LEN            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_DEEPEST_ACT_STOP_LEVEL_FSP                = 16  ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_DEEPEST_ACT_STOP_LEVEL_FSP_LEN            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHFSP_IVRM_ENABLED_HISTORY_FSP                  = 20  ;

static const uint8_t P9N2_EX_PPM_SSHFSP_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_DEEPEST_REQ_STOP_LEVEL_FSP                = 12  ;
static const uint8_t P9N2_EX_PPM_SSHFSP_DEEPEST_REQ_STOP_LEVEL_FSP_LEN            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_DEEPEST_ACT_STOP_LEVEL_FSP                = 16  ;
static const uint8_t P9N2_EX_PPM_SSHFSP_DEEPEST_ACT_STOP_LEVEL_FSP_LEN            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHFSP_IVRM_ENABLED_HISTORY_FSP                  = 20  ;

static const uint8_t P9N2_C_PPM_SSHFSP_STOP_GATED                                 = 0   ;
static const uint8_t P9N2_C_PPM_SSHFSP_SPECIAL_WKUP_DONE                          = 1   ;
static const uint8_t P9N2_C_PPM_SSHFSP_STOP_TRANSITION                            = 2   ;
static const uint8_t P9N2_C_PPM_SSHFSP_STOP_TRANSITION_LEN                        = 2   ;
static const uint8_t P9N2_C_PPM_SSHFSP_REQ_STOP_LEVEL                             = 4   ;
static const uint8_t P9N2_C_PPM_SSHFSP_REQ_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHFSP_ACT_STOP_LEVEL                             = 8   ;
static const uint8_t P9N2_C_PPM_SSHFSP_ACT_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHFSP_DEEPEST_REQ_STOP_LEVEL_FSP                 = 12  ;
static const uint8_t P9N2_C_PPM_SSHFSP_DEEPEST_REQ_STOP_LEVEL_FSP_LEN             = 4   ;
static const uint8_t P9N2_C_PPM_SSHFSP_DEEPEST_ACT_STOP_LEVEL_FSP                 = 16  ;
static const uint8_t P9N2_C_PPM_SSHFSP_DEEPEST_ACT_STOP_LEVEL_FSP_LEN             = 4   ;
static const uint8_t P9N2_C_PPM_SSHFSP_IVRM_ENABLED_HISTORY_FSP                   = 20  ;

static const uint8_t P9N2_EQ_PPM_SSHHYP_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_DEEPEST_REQ_STOP_LEVEL_HYP                = 12  ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_DEEPEST_REQ_STOP_LEVEL_HYP_LEN            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_DEEPEST_ACT_STOP_LEVEL_HYP                = 16  ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_DEEPEST_ACT_STOP_LEVEL_HYP_LEN            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHHYP_IVRM_ENABLED_HISTORY_HYP                  = 20  ;

static const uint8_t P9N2_EX_PPM_SSHHYP_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_DEEPEST_REQ_STOP_LEVEL_HYP                = 12  ;
static const uint8_t P9N2_EX_PPM_SSHHYP_DEEPEST_REQ_STOP_LEVEL_HYP_LEN            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_DEEPEST_ACT_STOP_LEVEL_HYP                = 16  ;
static const uint8_t P9N2_EX_PPM_SSHHYP_DEEPEST_ACT_STOP_LEVEL_HYP_LEN            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHHYP_IVRM_ENABLED_HISTORY_HYP                  = 20  ;

static const uint8_t P9N2_C_PPM_SSHHYP_STOP_GATED                                 = 0   ;
static const uint8_t P9N2_C_PPM_SSHHYP_SPECIAL_WKUP_DONE                          = 1   ;
static const uint8_t P9N2_C_PPM_SSHHYP_STOP_TRANSITION                            = 2   ;
static const uint8_t P9N2_C_PPM_SSHHYP_STOP_TRANSITION_LEN                        = 2   ;
static const uint8_t P9N2_C_PPM_SSHHYP_REQ_STOP_LEVEL                             = 4   ;
static const uint8_t P9N2_C_PPM_SSHHYP_REQ_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHHYP_ACT_STOP_LEVEL                             = 8   ;
static const uint8_t P9N2_C_PPM_SSHHYP_ACT_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHHYP_DEEPEST_REQ_STOP_LEVEL_HYP                 = 12  ;
static const uint8_t P9N2_C_PPM_SSHHYP_DEEPEST_REQ_STOP_LEVEL_HYP_LEN             = 4   ;
static const uint8_t P9N2_C_PPM_SSHHYP_DEEPEST_ACT_STOP_LEVEL_HYP                 = 16  ;
static const uint8_t P9N2_C_PPM_SSHHYP_DEEPEST_ACT_STOP_LEVEL_HYP_LEN             = 4   ;
static const uint8_t P9N2_C_PPM_SSHHYP_IVRM_ENABLED_HISTORY_HYP                   = 20  ;

static const uint8_t P9N2_EQ_PPM_SSHOCC_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_DEEPEST_REQ_STOP_LEVEL_OCC                = 12  ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_DEEPEST_REQ_STOP_LEVEL_OCC_LEN            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_DEEPEST_ACT_STOP_LEVEL_OCC                = 16  ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_DEEPEST_ACT_STOP_LEVEL_OCC_LEN            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOCC_IVRM_ENABLED_HISTORY_OCC                  = 20  ;

static const uint8_t P9N2_EX_PPM_SSHOCC_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_DEEPEST_REQ_STOP_LEVEL_OCC                = 12  ;
static const uint8_t P9N2_EX_PPM_SSHOCC_DEEPEST_REQ_STOP_LEVEL_OCC_LEN            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_DEEPEST_ACT_STOP_LEVEL_OCC                = 16  ;
static const uint8_t P9N2_EX_PPM_SSHOCC_DEEPEST_ACT_STOP_LEVEL_OCC_LEN            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOCC_IVRM_ENABLED_HISTORY_OCC                  = 20  ;

static const uint8_t P9N2_C_PPM_SSHOCC_STOP_GATED                                 = 0   ;
static const uint8_t P9N2_C_PPM_SSHOCC_SPECIAL_WKUP_DONE                          = 1   ;
static const uint8_t P9N2_C_PPM_SSHOCC_STOP_TRANSITION                            = 2   ;
static const uint8_t P9N2_C_PPM_SSHOCC_STOP_TRANSITION_LEN                        = 2   ;
static const uint8_t P9N2_C_PPM_SSHOCC_REQ_STOP_LEVEL                             = 4   ;
static const uint8_t P9N2_C_PPM_SSHOCC_REQ_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHOCC_ACT_STOP_LEVEL                             = 8   ;
static const uint8_t P9N2_C_PPM_SSHOCC_ACT_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHOCC_DEEPEST_REQ_STOP_LEVEL_OCC                 = 12  ;
static const uint8_t P9N2_C_PPM_SSHOCC_DEEPEST_REQ_STOP_LEVEL_OCC_LEN             = 4   ;
static const uint8_t P9N2_C_PPM_SSHOCC_DEEPEST_ACT_STOP_LEVEL_OCC                 = 16  ;
static const uint8_t P9N2_C_PPM_SSHOCC_DEEPEST_ACT_STOP_LEVEL_OCC_LEN             = 4   ;
static const uint8_t P9N2_C_PPM_SSHOCC_IVRM_ENABLED_HISTORY_OCC                   = 20  ;

static const uint8_t P9N2_EQ_PPM_SSHOTR_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_DEEPEST_REQ_STOP_LEVEL_OTR                = 12  ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_DEEPEST_REQ_STOP_LEVEL_OTR_LEN            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_DEEPEST_ACT_STOP_LEVEL_OTR                = 16  ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_DEEPEST_ACT_STOP_LEVEL_OTR_LEN            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHOTR_IVRM_ENABLED_HISTORY_OTR                  = 20  ;

static const uint8_t P9N2_EX_PPM_SSHOTR_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_DEEPEST_REQ_STOP_LEVEL_OTR                = 12  ;
static const uint8_t P9N2_EX_PPM_SSHOTR_DEEPEST_REQ_STOP_LEVEL_OTR_LEN            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_DEEPEST_ACT_STOP_LEVEL_OTR                = 16  ;
static const uint8_t P9N2_EX_PPM_SSHOTR_DEEPEST_ACT_STOP_LEVEL_OTR_LEN            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHOTR_IVRM_ENABLED_HISTORY_OTR                  = 20  ;

static const uint8_t P9N2_C_PPM_SSHOTR_STOP_GATED                                 = 0   ;
static const uint8_t P9N2_C_PPM_SSHOTR_SPECIAL_WKUP_DONE                          = 1   ;
static const uint8_t P9N2_C_PPM_SSHOTR_STOP_TRANSITION                            = 2   ;
static const uint8_t P9N2_C_PPM_SSHOTR_STOP_TRANSITION_LEN                        = 2   ;
static const uint8_t P9N2_C_PPM_SSHOTR_REQ_STOP_LEVEL                             = 4   ;
static const uint8_t P9N2_C_PPM_SSHOTR_REQ_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHOTR_ACT_STOP_LEVEL                             = 8   ;
static const uint8_t P9N2_C_PPM_SSHOTR_ACT_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHOTR_DEEPEST_REQ_STOP_LEVEL_OTR                 = 12  ;
static const uint8_t P9N2_C_PPM_SSHOTR_DEEPEST_REQ_STOP_LEVEL_OTR_LEN             = 4   ;
static const uint8_t P9N2_C_PPM_SSHOTR_DEEPEST_ACT_STOP_LEVEL_OTR                 = 16  ;
static const uint8_t P9N2_C_PPM_SSHOTR_DEEPEST_ACT_STOP_LEVEL_OTR_LEN             = 4   ;
static const uint8_t P9N2_C_PPM_SSHOTR_IVRM_ENABLED_HISTORY_OTR                   = 20  ;

static const uint8_t P9N2_EQ_PPM_SSHSRC_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EQ_PPM_SSHSRC_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EQ_PPM_SSHSRC_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHSRC_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EQ_PPM_SSHSRC_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHSRC_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHSRC_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EQ_PPM_SSHSRC_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EQ_PPM_SSHSRC_REQ_WRITE_ENABLE                          = 12  ;
static const uint8_t P9N2_EQ_PPM_SSHSRC_ACT_WRITE_ENABLE                          = 13  ;

static const uint8_t P9N2_EX_PPM_SSHSRC_STOP_GATED                                = 0   ;
static const uint8_t P9N2_EX_PPM_SSHSRC_SPECIAL_WKUP_DONE                         = 1   ;
static const uint8_t P9N2_EX_PPM_SSHSRC_STOP_TRANSITION                           = 2   ;
static const uint8_t P9N2_EX_PPM_SSHSRC_STOP_TRANSITION_LEN                       = 2   ;
static const uint8_t P9N2_EX_PPM_SSHSRC_REQ_STOP_LEVEL                            = 4   ;
static const uint8_t P9N2_EX_PPM_SSHSRC_REQ_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHSRC_ACT_STOP_LEVEL                            = 8   ;
static const uint8_t P9N2_EX_PPM_SSHSRC_ACT_STOP_LEVEL_LEN                        = 4   ;
static const uint8_t P9N2_EX_PPM_SSHSRC_REQ_WRITE_ENABLE                          = 12  ;
static const uint8_t P9N2_EX_PPM_SSHSRC_ACT_WRITE_ENABLE                          = 13  ;

static const uint8_t P9N2_C_PPM_SSHSRC_STOP_GATED                                 = 0   ;
static const uint8_t P9N2_C_PPM_SSHSRC_SPECIAL_WKUP_DONE                          = 1   ;
static const uint8_t P9N2_C_PPM_SSHSRC_STOP_TRANSITION                            = 2   ;
static const uint8_t P9N2_C_PPM_SSHSRC_STOP_TRANSITION_LEN                        = 2   ;
static const uint8_t P9N2_C_PPM_SSHSRC_REQ_STOP_LEVEL                             = 4   ;
static const uint8_t P9N2_C_PPM_SSHSRC_REQ_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHSRC_ACT_STOP_LEVEL                             = 8   ;
static const uint8_t P9N2_C_PPM_SSHSRC_ACT_STOP_LEVEL_LEN                         = 4   ;
static const uint8_t P9N2_C_PPM_SSHSRC_REQ_WRITE_ENABLE                           = 12  ;
static const uint8_t P9N2_C_PPM_SSHSRC_ACT_WRITE_ENABLE                           = 13  ;

static const uint8_t P9N2_EQ_PPM_VDMCR_VDM_POWERON                                = 0   ;
static const uint8_t P9N2_EQ_PPM_VDMCR_VDM_DISABLE                                = 1   ;

static const uint8_t P9N2_EX_PPM_VDMCR_VDM_POWERON                                = 0   ;
static const uint8_t P9N2_EX_PPM_VDMCR_VDM_DISABLE                                = 1   ;

static const uint8_t P9N2_C_PPM_VDMCR_VDM_POWERON                                 = 0   ;
static const uint8_t P9N2_C_PPM_VDMCR_VDM_DISABLE                                 = 1   ;

static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_TRIGGER                            = 0   ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_TYPE                               = 1   ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_TYPE_LEN                           = 4   ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_BUSY                               = 9   ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_PRGSM_BUSY_ON_THIS                 = 10  ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_PRGSM_BUSY                         = 11  ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_MEM                                = 17  ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_MEM_LEN                            = 3   ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_CGC                                = 20  ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_CGC_LEN                            = 8   ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_BANK                               = 28  ;
static const uint8_t P9N2_EQ_PRD_PURGE_CMD_REG_ERR                                = 29  ;

static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_TRIGGER                            = 0   ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_TYPE                               = 1   ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_TYPE_LEN                           = 4   ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_BUSY                               = 9   ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_PRGSM_BUSY_ON_THIS                 = 10  ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_PRGSM_BUSY                         = 11  ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_MEM                                = 17  ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_MEM_LEN                            = 3   ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_CGC                                = 20  ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_CGC_LEN                            = 8   ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_BANK                               = 28  ;
static const uint8_t P9N2_EX_PRD_PURGE_CMD_REG_ERR                                = 29  ;

static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_REQ                                 = 0   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_TTYPE                               = 1   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_TTYPE_LEN                           = 4   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_LINE_DEL_ON_NEXT_CE                 = 5   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_LINE_DEL_ON_ALL_CE                  = 6   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_PRD_PURGE_RESERVED_1                = 7   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_PRD_PURGE_RESERVED_1_LEN            = 2   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_BUSY_ERR                            = 9   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_PRD_PURGE_RESERVED_2                = 10  ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_PRD_PURGE_RESERVED_2_LEN            = 2   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_MEMBER                              = 12  ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_MEMBER_LEN                          = 5   ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_DIR_ADDR                            = 17  ;
static const uint8_t P9N2_EQ_PRD_PURGE_REG_L3_DIR_ADDR_LEN                        = 12  ;

static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_REQ                                 = 0   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_TTYPE                               = 1   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_TTYPE_LEN                           = 4   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_LINE_DEL_ON_NEXT_CE                 = 5   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_LINE_DEL_ON_ALL_CE                  = 6   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_PRD_PURGE_RESERVED_1                = 7   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_PRD_PURGE_RESERVED_1_LEN            = 2   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_BUSY_ERR                            = 9   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_PRD_PURGE_RESERVED_2                = 10  ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_PRD_PURGE_RESERVED_2_LEN            = 2   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_MEMBER                              = 12  ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_MEMBER_LEN                          = 5   ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_DIR_ADDR                            = 17  ;
static const uint8_t P9N2_EX_PRD_PURGE_REG_L3_DIR_ADDR_LEN                        = 12  ;

static const uint8_t P9N2_EQ_PRE_COUNTER_REG_COUNTER                              = 0   ;
static const uint8_t P9N2_EQ_PRE_COUNTER_REG_COUNTER_LEN                          = 8   ;

static const uint8_t P9N2_EX_PRE_COUNTER_REG_COUNTER                              = 0   ;
static const uint8_t P9N2_EX_PRE_COUNTER_REG_COUNTER_LEN                          = 8   ;

static const uint8_t P9N2_C_PRE_COUNTER_REG_COUNTER                               = 0   ;
static const uint8_t P9N2_C_PRE_COUNTER_REG_COUNTER_LEN                           = 8   ;

static const uint8_t P9N2_EQ_PRIMARY_ADDRESS_REG_PRIMARY_ADDRESS                  = 0   ;
static const uint8_t P9N2_EQ_PRIMARY_ADDRESS_REG_PRIMARY_ADDRESS_LEN              = 6   ;

static const uint8_t P9N2_EX_PRIMARY_ADDRESS_REG_PRIMARY_ADDRESS                  = 0   ;
static const uint8_t P9N2_EX_PRIMARY_ADDRESS_REG_PRIMARY_ADDRESS_LEN              = 6   ;

static const uint8_t P9N2_C_PRIMARY_ADDRESS_REG_PRIMARY_ADDRESS                   = 0   ;
static const uint8_t P9N2_C_PRIMARY_ADDRESS_REG_PRIMARY_ADDRESS_LEN               = 6   ;

static const uint8_t P9N2_EQ_PROTECT_MODE_REG_READ_ENABLE                         = 0   ;
static const uint8_t P9N2_EQ_PROTECT_MODE_REG_WRITE_ENABLE                        = 1   ;

static const uint8_t P9N2_EX_PROTECT_MODE_REG_READ_ENABLE                         = 0   ;
static const uint8_t P9N2_EX_PROTECT_MODE_REG_WRITE_ENABLE                        = 1   ;

static const uint8_t P9N2_C_PROTECT_MODE_REG_READ_ENABLE                          = 0   ;
static const uint8_t P9N2_C_PROTECT_MODE_REG_WRITE_ENABLE                         = 1   ;

static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_PCB_WDATA_PARITY                    = 0   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_PCB_ADDRESS_PARITY                  = 1   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_DL_RETURN_WDATA_PARITY              = 2   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_DL_RETURN_P0                        = 3   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_UL_RDATA_PARITY                     = 4   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_UL_P0                               = 5   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_PARITY_ON_INTERFACE_MACHINE         = 6   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_PARITY_ON_P2S_MACHINE               = 7   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH     = 8   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 9   ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULDCH     = 10  ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_PARALLEL_WRITE_NVLD                 = 11  ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_PARALLEL_READ_NVLD                  = 12  ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_PARALLEL_ADDR_INVALID               = 13  ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_PCB_COMMAND_PARITY                  = 14  ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_GENERAL_TIMEOUT                     = 15  ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 16  ;
static const uint8_t P9N2_EQ_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 17  ;

static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_PCB_WDATA_PARITY                    = 0   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_PCB_ADDRESS_PARITY                  = 1   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_DL_RETURN_WDATA_PARITY              = 2   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_DL_RETURN_P0                        = 3   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_UL_RDATA_PARITY                     = 4   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_UL_P0                               = 5   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_PARITY_ON_INTERFACE_MACHINE         = 6   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_PARITY_ON_P2S_MACHINE               = 7   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH     = 8   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 9   ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULDCH     = 10  ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_PARALLEL_WRITE_NVLD                 = 11  ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_PARALLEL_READ_NVLD                  = 12  ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_PARALLEL_ADDR_INVALID               = 13  ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_PCB_COMMAND_PARITY                  = 14  ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_GENERAL_TIMEOUT                     = 15  ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 16  ;
static const uint8_t P9N2_EX_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 17  ;

static const uint8_t P9N2_C_PSCOM_ERROR_MASK_PCB_WDATA_PARITY                     = 0   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_PCB_ADDRESS_PARITY                   = 1   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_DL_RETURN_WDATA_PARITY               = 2   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_DL_RETURN_P0                         = 3   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_UL_RDATA_PARITY                      = 4   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_UL_P0                                = 5   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_PARITY_ON_INTERFACE_MACHINE          = 6   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_PARITY_ON_P2S_MACHINE                = 7   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULCCH      = 8   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 9   ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_TIMEOUT_WHILE_WAITING_FOR_ULDCH      = 10  ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_PARALLEL_WRITE_NVLD                  = 11  ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_PARALLEL_READ_NVLD                   = 12  ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_PARALLEL_ADDR_INVALID                = 13  ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_PCB_COMMAND_PARITY                   = 14  ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_GENERAL_TIMEOUT                      = 15  ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 16  ;
static const uint8_t P9N2_C_PSCOM_ERROR_MASK_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 17  ;

static const uint8_t P9N2_EQ_PSCOM_MODE_REG_ABORT_ON_PCB_ADDR_PARITY_ERROR        = 0   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_ABORT_ON_PCB_WDATA_PARITY_ERROR       = 1   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_UNUSED_BIT_2                          = 2   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_WDATA_PARITY_ERROR = 3   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_WATCHDOG_ENABLE                       = 4   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_SCOM_HANG_LIMIT                       = 5   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_SCOM_HANG_LIMIT_LEN                   = 2   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_FORCE_ALL_RINGS                       = 7   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_FSM_SELFRESET_ON_STATEVEC_PARITYERROR_ENABLE = 8   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_RESERVED_LT                           = 9   ;
static const uint8_t P9N2_EQ_PSCOM_MODE_REG_RESERVED_LT_LEN                       = 3   ;

static const uint8_t P9N2_EX_PSCOM_MODE_REG_ABORT_ON_PCB_ADDR_PARITY_ERROR        = 0   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_ABORT_ON_PCB_WDATA_PARITY_ERROR       = 1   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_UNUSED_BIT_2                          = 2   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_WDATA_PARITY_ERROR = 3   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_WATCHDOG_ENABLE                       = 4   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_SCOM_HANG_LIMIT                       = 5   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_SCOM_HANG_LIMIT_LEN                   = 2   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_FORCE_ALL_RINGS                       = 7   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_FSM_SELFRESET_ON_STATEVEC_PARITYERROR_ENABLE = 8   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_RESERVED_LT                           = 9   ;
static const uint8_t P9N2_EX_PSCOM_MODE_REG_RESERVED_LT_LEN                       = 3   ;

static const uint8_t P9N2_C_PSCOM_MODE_REG_ABORT_ON_PCB_ADDR_PARITY_ERROR         = 0   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_ABORT_ON_PCB_WDATA_PARITY_ERROR        = 1   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_UNUSED_BIT_2                           = 2   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_ABORT_ON_DL_RETURN_WDATA_PARITY_ERROR  = 3   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_WATCHDOG_ENABLE                        = 4   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_SCOM_HANG_LIMIT                        = 5   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_SCOM_HANG_LIMIT_LEN                    = 2   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_FORCE_ALL_RINGS                        = 7   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_FSM_SELFRESET_ON_STATEVEC_PARITYERROR_ENABLE = 8   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_RESERVED_LT                            = 9   ;
static const uint8_t P9N2_C_PSCOM_MODE_REG_RESERVED_LT_LEN                        = 3   ;

static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_WDATA_PARITY  = 0   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_ADDRESS_PARITY = 1   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_WDATA_PARITY = 2   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_P0      = 3   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_RDATA_PARITY   = 4   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_P0             = 5   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_INTERFACE_MACHINE = 6   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_P2S_MACHINE = 7   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 8   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 9   ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 10  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_WRITE_NVLD = 11  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_READ_NVLD = 12  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_ADDR_INVALID = 13  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_COMMAND_PARITY = 14  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_GENERAL_TIMEOUT   = 15  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 16  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 17  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_WDATA_PARITY      = 18  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_ADDRESS_PARITY    = 19  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_WDATA_PARITY = 20  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_P0          = 21  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_RDATA_PARITY       = 22  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_P0                 = 23  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_INTERFACE_MACHINE = 24  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_P2S_MACHINE = 25  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 26  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 27  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 28  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_WRITE_NVLD   = 29  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_READ_NVLD    = 30  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_ADDR_INVALID = 31  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_COMMAND_PARITY    = 32  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_GENERAL_TIMEOUT       = 33  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 34  ;
static const uint8_t P9N2_EQ_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 35  ;

static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_WDATA_PARITY  = 0   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_ADDRESS_PARITY = 1   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_WDATA_PARITY = 2   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_P0      = 3   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_RDATA_PARITY   = 4   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_P0             = 5   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_INTERFACE_MACHINE = 6   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_P2S_MACHINE = 7   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 8   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 9   ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 10  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_WRITE_NVLD = 11  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_READ_NVLD = 12  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_ADDR_INVALID = 13  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_COMMAND_PARITY = 14  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_GENERAL_TIMEOUT   = 15  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 16  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 17  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_WDATA_PARITY      = 18  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_ADDRESS_PARITY    = 19  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_WDATA_PARITY = 20  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_P0          = 21  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_RDATA_PARITY       = 22  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_P0                 = 23  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_INTERFACE_MACHINE = 24  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_P2S_MACHINE = 25  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 26  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 27  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 28  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_WRITE_NVLD   = 29  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_READ_NVLD    = 30  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_ADDR_INVALID = 31  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_COMMAND_PARITY    = 32  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_GENERAL_TIMEOUT       = 33  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 34  ;
static const uint8_t P9N2_EX_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 35  ;

static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_WDATA_PARITY   = 0   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_ADDRESS_PARITY = 1   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_WDATA_PARITY = 2   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_DL_RETURN_P0       = 3   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_RDATA_PARITY    = 4   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_UL_P0              = 5   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_INTERFACE_MACHINE = 6   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARITY_ON_P2S_MACHINE = 7   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 8   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 9   ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 10  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_WRITE_NVLD = 11  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_READ_NVLD = 12  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PARALLEL_ADDR_INVALID = 13  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_PCB_COMMAND_PARITY = 14  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_GENERAL_TIMEOUT    = 15  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 16  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_ACCUMULATED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 17  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_WDATA_PARITY       = 18  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_ADDRESS_PARITY     = 19  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_WDATA_PARITY = 20  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_DL_RETURN_P0           = 21  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_RDATA_PARITY        = 22  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_UL_P0                  = 23  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_INTERFACE_MACHINE = 24  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_PARITY_ON_P2S_MACHINE  = 25  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULCCH = 26  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_DLDCH_RETURN = 27  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_TIMEOUT_WHILE_WAITING_FOR_ULDCH = 28  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_WRITE_NVLD    = 29  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_READ_NVLD     = 30  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_PARALLEL_ADDR_INVALID  = 31  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_PCB_COMMAND_PARITY     = 32  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_GENERAL_TIMEOUT        = 33  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_ACCESS_VIOLATION = 34  ;
static const uint8_t P9N2_C_PSCOM_STATUS_ERROR_REG_TRAPPED_SATELLITE_ACKNOWLEDGE_INVALID_REGISTER = 35  ;

static const uint8_t P9N2_EX_L2_PWM_EVENTS_RESERVED_32                            = 32  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_FREQ_SCALE_A_THRESHOLD                 = 33  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_FREQ_SCALE_A_THRESHOLD_LEN             = 7   ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_RESERVED_40                            = 40  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_FREQ_SCALE_B_THRESHOLD                 = 41  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_FREQ_SCALE_B_THRESHOLD_LEN             = 7   ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_RESERVED_48                            = 48  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_PSTATE_A_THRESHOLD                     = 49  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_PSTATE_A_THRESHOLD_LEN                 = 3   ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_RESERVED_52                            = 52  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_PSTATE_B_THRESHOLD                     = 53  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_PSTATE_B_THRESHOLD_LEN                 = 3   ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_RESERVED_56                            = 56  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_RESERVED_57                            = 57  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_EVENT_MUX_SELECTS                      = 58  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_EVENT_MUX_SELECTS_LEN                  = 2   ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_RESERVED_60                            = 60  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_RESERVED_61                            = 61  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_PMCM_THRESHOLD                         = 62  ;
static const uint8_t P9N2_EX_L2_PWM_EVENTS_PMCM_THRESHOLD_LEN                     = 2   ;

static const uint8_t P9N2_C_PWM_EVENTS_RESERVED_32                                = 32  ;
static const uint8_t P9N2_C_PWM_EVENTS_FREQ_SCALE_A_THRESHOLD                     = 33  ;
static const uint8_t P9N2_C_PWM_EVENTS_FREQ_SCALE_A_THRESHOLD_LEN                 = 7   ;
static const uint8_t P9N2_C_PWM_EVENTS_RESERVED_40                                = 40  ;
static const uint8_t P9N2_C_PWM_EVENTS_FREQ_SCALE_B_THRESHOLD                     = 41  ;
static const uint8_t P9N2_C_PWM_EVENTS_FREQ_SCALE_B_THRESHOLD_LEN                 = 7   ;
static const uint8_t P9N2_C_PWM_EVENTS_RESERVED_48                                = 48  ;
static const uint8_t P9N2_C_PWM_EVENTS_PSTATE_A_THRESHOLD                         = 49  ;
static const uint8_t P9N2_C_PWM_EVENTS_PSTATE_A_THRESHOLD_LEN                     = 3   ;
static const uint8_t P9N2_C_PWM_EVENTS_RESERVED_52                                = 52  ;
static const uint8_t P9N2_C_PWM_EVENTS_PSTATE_B_THRESHOLD                         = 53  ;
static const uint8_t P9N2_C_PWM_EVENTS_PSTATE_B_THRESHOLD_LEN                     = 3   ;
static const uint8_t P9N2_C_PWM_EVENTS_RESERVED_56                                = 56  ;
static const uint8_t P9N2_C_PWM_EVENTS_RESERVED_57                                = 57  ;
static const uint8_t P9N2_C_PWM_EVENTS_EVENT_MUX_SELECTS                          = 58  ;
static const uint8_t P9N2_C_PWM_EVENTS_EVENT_MUX_SELECTS_LEN                      = 2   ;
static const uint8_t P9N2_C_PWM_EVENTS_RESERVED_60                                = 60  ;
static const uint8_t P9N2_C_PWM_EVENTS_RESERVED_61                                = 61  ;
static const uint8_t P9N2_C_PWM_EVENTS_PMCM_THRESHOLD                             = 62  ;
static const uint8_t P9N2_C_PWM_EVENTS_PMCM_THRESHOLD_LEN                         = 2   ;

static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_LOCK_SEL                              = 0   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_ENABLE_JUMP_PROTECT                   = 1   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_FF_BYPASS                             = 2   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_DCO_OVERRIDE                          = 3   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_DCO_INCR                              = 4   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_DCO_DECR                              = 5   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_FF_SLEWRATE                           = 6   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_FF_SLEWRATE_LEN                       = 10  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_SS_ENABLE                             = 16  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_RESERVED_17_19                        = 17  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_RESERVED_17_19_LEN                    = 3   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_SLEW_DN_SEL                           = 20  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_ENABLE_JUMP_TARGET_UPDATE             = 21  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_ENABLE_FMIN_TARGET                    = 22  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_ENABLE_FMAX_TARGET                    = 23  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_JUMP_VALUE_N_L                        = 33  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_JUMP_VALUE_N_L_LEN                    = 3   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_JUMP_VALUE_N_S                        = 37  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_JUMP_VALUE_N_S_LEN                    = 3   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_JUMP_VALUE_L_S                        = 41  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_JUMP_VALUE_L_S_LEN                    = 3   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_JUMP_VALUE_S_N                        = 45  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_CTRL_JUMP_VALUE_S_N_LEN                    = 3   ;

static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_FMAX                                  = 1   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_FMAX_LEN                              = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_HIRES_FMAX                            = 12  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_HIRES_FMAX_LEN                        = 4   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_FMULT                                 = 17  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_FMULT_LEN                             = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_HIRES_FMULT                           = 28  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_HIRES_FMULT_LEN                       = 4   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_FMIN                                  = 33  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_FMIN_LEN                              = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_HIRES_FMIN                            = 44  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_FREQ_HIRES_FMIN_LEN                        = 4   ;

static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_FREQIN_AVG                           = 1   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_FREQIN_AVG_LEN                       = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_HIRES_FREQIN_AVG                     = 12  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_HIRES_FREQIN_AVG_LEN                 = 5   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_FREQIN_MAX                           = 21  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_FREQIN_MAX_LEN                       = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_HIRES_FREQIN_MAX                     = 32  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_HIRES_FREQIN_MAX_LEN                 = 5   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_FREQIN_MIN                           = 41  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_FREQIN_MIN_LEN                       = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_HIRES_FREQIN_MIN                     = 52  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_ICHAR_HIRES_FREQIN_MIN_LEN                 = 5   ;

static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_FREQOUT_MAX                          = 1   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_FREQOUT_MAX_LEN                      = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_HIRES_FREQOUT_MAX                    = 12  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_HIRES_FREQOUT_MAX_LEN                = 5   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_FREQOUT_AVG                          = 21  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_FREQOUT_AVG_LEN                      = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_HIRES_FREQOUT_AVG                    = 32  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_HIRES_FREQOUT_AVG_LEN                = 5   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_FREQOUT_MIN                          = 41  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_FREQOUT_MIN_LEN                      = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_HIRES_FREQOUT_MIN                    = 52  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_OCHAR_HIRES_FREQOUT_MIN_LEN                = 5   ;

static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_FREQOUT                               = 1   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_FREQOUT_LEN                           = 11  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_HIRES_FREQOUT                         = 12  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_HIRES_FREQOUT_LEN                     = 5   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_RESERVED_57_59                        = 57  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_RESERVED_57_59_LEN                    = 2   ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_FSAFE_ACTIVE                          = 59  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_UPDATE_COMPLETE                       = 60  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_FREQ_CHANGE                           = 61  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_BLOCK_ACTIVE                          = 62  ;
static const uint8_t P9N2_EQ_QPPM_DPLL_STAT_LOCK                                  = 63  ;

static const uint8_t P9N2_EQ_QPPM_ERR_PCB_INTERRUPT_PROTOCOL                      = 0   ;
static const uint8_t P9N2_EQ_QPPM_ERR_SPECIAL_WKUP_PROTOCOL                       = 1   ;
static const uint8_t P9N2_EQ_QPPM_ERR_SPECIAL_WKUP_DONE_PROTOCOL                  = 2   ;
static const uint8_t P9N2_EQ_QPPM_ERR_PFET_SEQ_PROGRAM                            = 3   ;
static const uint8_t P9N2_EQ_QPPM_ERR_OCC_HEARTBEAT_LOSS                          = 4   ;
static const uint8_t P9N2_EQ_QPPM_ERR_L2_EX0_CLK_SYNC                             = 5   ;
static const uint8_t P9N2_EQ_QPPM_ERR_L2_EX1_CLK_SYNC                             = 6   ;
static const uint8_t P9N2_EQ_QPPM_ERR_EDRAM_SEQUENCE                              = 7   ;
static const uint8_t P9N2_EQ_QPPM_ERR_EDRAM_PGATE                                 = 8   ;
static const uint8_t P9N2_EQ_QPPM_ERR_DPLL_INT                                    = 9   ;
static const uint8_t P9N2_EQ_QPPM_ERR_DPLL_DYN_FMIN                               = 10  ;
static const uint8_t P9N2_EQ_QPPM_ERR_DPLL_DCO_FULL                               = 11  ;
static const uint8_t P9N2_EQ_QPPM_ERR_DPLL_DCO_EMPTY                              = 12  ;
static const uint8_t P9N2_EQ_QPPM_ERR_INVERTED_VDM_DATA                           = 13  ;
static const uint8_t P9N2_EQ_QPPM_ERR_INVERTED_VDM_DATA_LEN                       = 4   ;
static const uint8_t P9N2_EQ_QPPM_ERR_CME0_IVRM_DROPOUT                           = 17  ;
static const uint8_t P9N2_EQ_QPPM_ERR_CME1_IVRM_DROPOUT                           = 18  ;
static const uint8_t P9N2_EQ_QPPM_ERR_SPARE_19                                    = 19  ;
static const uint8_t P9N2_EQ_QPPM_ERR_SPARE_20_23                                 = 20  ;
static const uint8_t P9N2_EQ_QPPM_ERR_SPARE_20_23_LEN                             = 4   ;

static const uint8_t P9N2_EQ_QPPM_ERRMSK_RESERVED_0_23                            = 0   ;
static const uint8_t P9N2_EQ_QPPM_ERRMSK_RESERVED_0_23_LEN                        = 24  ;

static const uint8_t P9N2_EQ_QPPM_ERRSUM_PM_ERROR                                 = 0   ;

static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SB_STRENGTH                   = 0   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SB_STRENGTH_LEN               = 4   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SB_SPARE0                     = 4   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SB_PULSE_MODE_EN              = 5   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SB_PULSE_MODE                 = 6   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SB_PULSE_MODE_LEN             = 2   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SW_RESCLK                     = 8   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SW_RESCLK_LEN                 = 4   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SW_SPARE1                     = 12  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_RESERVED_13_15                           = 13  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_RESERVED_13_15_LEN                       = 3   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SB_STRENGTH                   = 16  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SB_STRENGTH_LEN               = 4   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SB_SPARE0                     = 20  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SB_PULSE_MODE_EN              = 21  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SB_PULSE_MODE                 = 22  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SB_PULSE_MODE_LEN             = 2   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SW_RESCLK                     = 24  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SW_RESCLK_LEN                 = 4   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SW_SPARE1                     = 28  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_RESERVED_29_31                           = 29  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_RESERVED_29_31_LEN                       = 3   ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLKGLM_ASYNC_RESET                = 32  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLKGLM_ASYNC_RESET                = 33  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLKGLM_SEL                        = 34  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLKGLM_SEL                        = 35  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SYNC_ENABLE                   = 36  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SYNC_ENABLE                   = 37  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SB_OVERRIDE                   = 38  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SB_OVERRIDE                   = 39  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX0_CLK_SW_OVERRIDE                   = 40  ;
static const uint8_t P9N2_EQ_QPPM_EXCGCR_L2_EX1_CLK_SW_OVERRIDE                   = 41  ;

static const uint8_t P9N2_EQ_QPPM_OCCHB_OCC_HEARTBEAT_COUNT                       = 0   ;
static const uint8_t P9N2_EQ_QPPM_OCCHB_OCC_HEARTBEAT_COUNT_LEN                   = 16  ;
static const uint8_t P9N2_EQ_QPPM_OCCHB_OCC_HEARTBEAT_ENABLE                      = 16  ;

static const uint8_t P9N2_EQ_QPPM_QACCR_COMMON_CLK_SB_STRENGTH                    = 0   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_COMMON_CLK_SB_STRENGTH_LEN                = 4   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_COMMON_CLK_SB_SPARE                       = 4   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_COMMON_CLK_SB_PULSE_MODE_EN               = 5   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_COMMON_CLK_SB_PULSE_MODE                  = 6   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_COMMON_CLK_SB_PULSE_MODE_LEN              = 2   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_COMMON_CLK_SW_RESCLK                      = 8   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_COMMON_CLK_SW_RESCLK_LEN                  = 4   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_COMMON_CLK_SW_SPARE                       = 12  ;
static const uint8_t P9N2_EQ_QPPM_QACCR_RESERVED_13_15                            = 13  ;
static const uint8_t P9N2_EQ_QPPM_QACCR_RESERVED_13_15_LEN                        = 3   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_L3_CLK_SB_STRENGTH                        = 16  ;
static const uint8_t P9N2_EQ_QPPM_QACCR_L3_CLK_SB_STRENGTH_LEN                    = 4   ;
static const uint8_t P9N2_EQ_QPPM_QACCR_L3_CLK_SB_SPARE0                          = 20  ;
static const uint8_t P9N2_EQ_QPPM_QACCR_L3_CLK_SB_PULSE_MODE_EN                   = 21  ;
static const uint8_t P9N2_EQ_QPPM_QACCR_L3_CLK_SB_PULSE_MODE                      = 22  ;
static const uint8_t P9N2_EQ_QPPM_QACCR_L3_CLK_SB_PULSE_MODE_LEN                  = 2   ;

static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX0_CLK_SB_STRENGTH             = 0   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX0_CLK_SB_STRENGTH_LEN         = 4   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX0_CLK_SB_SPARE0               = 4   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX0_CLK_SB_PULSE_MODE_EN        = 5   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX0_CLK_SB_PULSE_MODE           = 6   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX0_CLK_SB_PULSE_MODE_LEN       = 2   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX0_CLK_SW_RESCLK               = 8   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX0_CLK_SW_RESCLK_LEN           = 4   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX0_CLK_SW_SPARE1               = 12  ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX1_CLK_SB_STRENGTH             = 16  ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX1_CLK_SB_STRENGTH_LEN         = 4   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX1_CLK_SB_SPARE0               = 20  ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX1_CLK_SB_PULSE_MODE_EN        = 21  ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX1_CLK_SB_PULSE_MODE           = 22  ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX1_CLK_SB_PULSE_MODE_LEN       = 2   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX1_CLK_SW_RESCLK               = 24  ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX1_CLK_SW_RESCLK_LEN           = 4   ;
static const uint8_t P9N2_EQ_QPPM_QACSR_ACTUAL_L2_EX1_CLK_SW_SPARE1               = 28  ;
static const uint8_t P9N2_EQ_QPPM_QACSR_L2_EX0_CLK_SYNC_DONE                      = 36  ;
static const uint8_t P9N2_EQ_QPPM_QACSR_L2_EX1_CLK_SYNC_DONE                      = 37  ;

static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX0_EDRAM_ENABLE_ENCODE                 = 0   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX0_EDRAM_ENABLE_ENCODE_LEN             = 4   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX1_EDRAM_ENABLE_ENCODE                 = 4   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX1_EDRAM_ENABLE_ENCODE_LEN             = 4   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_SPARE_8_11                                 = 8   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_SPARE_8_11_LEN                             = 4   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_DROOP_PROTECT_DATA                         = 12  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_DROOP_PROTECT_DATA_LEN                     = 4   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_FORCE_DROOP_DATA                           = 16  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_FORCE_DROOP_DATA_LEN                       = 4   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_PULSE_DROOP_DATA                           = 20  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_PULSE_DROOP_DATA_LEN                       = 4   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_PULSE_DROOP_ENABLE                         = 24  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_PB_PURGE_REQ                               = 30  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_PB_PURGE_DONE_LVL                          = 31  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX0_EDRAM_ENABLE_ACTUAL                 = 32  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX0_EDRAM_ENABLE_ACTUAL_LEN             = 4   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX1_EDRAM_ENABLE_ACTUAL                 = 36  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX1_EDRAM_ENABLE_ACTUAL_LEN             = 4   ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EDRAM_SEQ_ERR                           = 40  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EDRAM_PGATE_ERR                         = 41  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX0_EDRAM_UNLOCKED                      = 42  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_L3_EX1_EDRAM_UNLOCKED                      = 43  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_PCB_RSP_OOB_9                              = 59  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_PCB_RSP_OOB_0123                           = 60  ;
static const uint8_t P9N2_EQ_QPPM_QCCR_PCB_RSP_OOB_0123_LEN                       = 4   ;

static const uint8_t P9N2_EQ_QPPM_QPMMR_FORCE_FSAFE                               = 0   ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_FSAFE                                     = 1   ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_FSAFE_LEN                                 = 11  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_ENABLE_FSAFE_UPON_HEARTBEAT_LOSS          = 12  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_ENABLE_DROOP_PROTECT_UPON_HEARTBEAT_LOSS  = 13  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_ENABLE_PFETS_UPON_IVRM_DROPOUT            = 14  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_ENABLE_PCB_INTR_UPON_HEARTBEAT_LOSS       = 16  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_ENABLE_PCB_INTR_UPON_IVRM_DROPOUT         = 17  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_ENABLE_PCB_INTR_UPON_LARGE_DROOP          = 18  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_ENABLE_PCB_INTR_UPON_EXTREME_DROOP        = 19  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_CME_INTERPPM_IVRM_ENABLE                  = 20  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_CME_INTERPPM_IVRM_SEL                     = 21  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_CME_INTERPPM_ACLK_ENABLE                  = 22  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_CME_INTERPPM_ACLK_SEL                     = 23  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_CME_INTERPPM_VDATA_ENABLE                 = 24  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_CME_INTERPPM_VDATA_SEL                    = 25  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_CME_INTERPPM_DPLL_ENABLE                  = 26  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_CME_INTERPPM_DPLL_SEL                     = 27  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_RESERVED28_31                             = 28  ;
static const uint8_t P9N2_EQ_QPPM_QPMMR_RESERVED28_31_LEN                         = 4   ;

static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_VID_COMPARE                         = 0   ;
static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_VID_COMPARE_LEN                     = 8   ;
static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_OVERVOLT                            = 8   ;
static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_OVERVOLT_LEN                        = 4   ;
static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_DROOP_SMALL                         = 12  ;
static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_DROOP_SMALL_LEN                     = 4   ;
static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_DROOP_LARGE                         = 16  ;
static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_DROOP_LARGE_LEN                     = 4   ;
static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_DROOP_XTREME                        = 20  ;
static const uint8_t P9N2_EQ_QPPM_VDMCFGR_VDM_DROOP_XTREME_LEN                    = 4   ;

static const uint8_t P9N2_EQ_QPPM_VOLT_CHAR_VID_COMPARE_MAX                       = 0   ;
static const uint8_t P9N2_EQ_QPPM_VOLT_CHAR_VID_COMPARE_MAX_LEN                   = 8   ;
static const uint8_t P9N2_EQ_QPPM_VOLT_CHAR_VID_COMPARE_MIN                       = 8   ;
static const uint8_t P9N2_EQ_QPPM_VOLT_CHAR_VID_COMPARE_MIN_LEN                   = 8   ;
static const uint8_t P9N2_EQ_QPPM_VOLT_CHAR_IVRM_ENABLED_HISTORY                  = 16  ;

static const uint8_t P9N2_EX_RAM_CTRL_RAM_VTID                                    = 0   ;
static const uint8_t P9N2_EX_RAM_CTRL_RAM_VTID_LEN                                = 2   ;
static const uint8_t P9N2_EX_RAM_CTRL_PPC_PREDCD                                  = 2   ;
static const uint8_t P9N2_EX_RAM_CTRL_PPC_PREDCD_LEN                              = 4   ;
static const uint8_t P9N2_EX_RAM_CTRL_SPARE                                       = 6   ;
static const uint8_t P9N2_EX_RAM_CTRL_SPARE_LEN                                   = 2   ;
static const uint8_t P9N2_EX_RAM_CTRL_PPC_INSTR                                   = 8   ;
static const uint8_t P9N2_EX_RAM_CTRL_PPC_INSTR_LEN                               = 32  ;

static const uint8_t P9N2_C_RAM_CTRL_RAM_VTID                                     = 0   ;
static const uint8_t P9N2_C_RAM_CTRL_RAM_VTID_LEN                                 = 2   ;
static const uint8_t P9N2_C_RAM_CTRL_PPC_PREDCD                                   = 2   ;
static const uint8_t P9N2_C_RAM_CTRL_PPC_PREDCD_LEN                               = 4   ;
static const uint8_t P9N2_C_RAM_CTRL_SPARE                                        = 6   ;
static const uint8_t P9N2_C_RAM_CTRL_SPARE_LEN                                    = 2   ;
static const uint8_t P9N2_C_RAM_CTRL_PPC_INSTR                                    = 8   ;
static const uint8_t P9N2_C_RAM_CTRL_PPC_INSTR_LEN                                = 32  ;

static const uint8_t P9N2_EX_RAM_MODEREG_MODE_ENABLE                              = 0   ;

static const uint8_t P9N2_C_RAM_MODEREG_MODE_ENABLE                               = 0   ;

static const uint8_t P9N2_EX_L2_RAM_STATUS_RAM_CONTROL_ACCESS_DURING_RECOV        = 0   ;
static const uint8_t P9N2_EX_L2_RAM_STATUS_RAM_COMPLETION                         = 1   ;
static const uint8_t P9N2_EX_L2_RAM_STATUS_RAM_EXCEPTION                          = 2   ;
static const uint8_t P9N2_EX_L2_RAM_STATUS_LSU_EMPTY                              = 3   ;

static const uint8_t P9N2_C_RAM_STATUS_RAM_CONTROL_ACCESS_DURING_RECOV            = 0   ;
static const uint8_t P9N2_C_RAM_STATUS_RAM_COMPLETION                             = 1   ;
static const uint8_t P9N2_C_RAM_STATUS_RAM_EXCEPTION                              = 2   ;
static const uint8_t P9N2_C_RAM_STATUS_LSU_EMPTY                                  = 3   ;

static const uint8_t P9N2_EX_L2_RAS_MODEREG_MR_DIS_PMON_INTR                      = 56  ;
static const uint8_t P9N2_EX_L2_RAS_MODEREG_MR_FENCE_INTERRUPTS                   = 57  ;
static const uint8_t P9N2_EX_L2_RAS_MODEREG_MR_BLOCK_HMI_IN_MAINT                 = 62  ;
static const uint8_t P9N2_EX_L2_RAS_MODEREG_MR_FENCE_INTR_ON_CHECKSTOP            = 63  ;

static const uint8_t P9N2_C_RAS_MODEREG_MR_DIS_PMON_INTR                          = 56  ;
static const uint8_t P9N2_C_RAS_MODEREG_MR_FENCE_INTERRUPTS                       = 57  ;
static const uint8_t P9N2_C_RAS_MODEREG_MR_BLOCK_HMI_IN_MAINT                     = 62  ;
static const uint8_t P9N2_C_RAS_MODEREG_MR_FENCE_INTR_ON_CHECKSTOP                = 63  ;

static const uint8_t P9N2_EX_L2_RAS_STATUS_VT0_CORE_MAINT                         = 0   ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT0_THREAD_QUIESCED                    = 1   ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT0_ICT_EMPTY                          = 2   ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT0_LSU_QUIESCED                       = 3   ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT0_STEP_SUCCESS                       = 4   ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT1_CORE_MAINT                         = 8   ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT1_THREAD_QUIESCED                    = 9   ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT1_ICT_EMPTY                          = 10  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT1_LSU_QUIESCED                       = 11  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT1_STEP_SUCCESS                       = 12  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT2_CORE_MAINT                         = 16  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT2_THREAD_QUIESCED                    = 17  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT2_ICT_EMPTY                          = 18  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT2_LSU_QUIESCED                       = 19  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT2_STEP_SUCCESS                       = 20  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT3_CORE_MAINT                         = 24  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT3_THREAD_QUIESCED                    = 25  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT3_ICT_EMPTY                          = 26  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT3_LSU_QUIESCED                       = 27  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_VT3_STEP_SUCCESS                       = 28  ;
static const uint8_t P9N2_EX_L2_RAS_STATUS_NEST_ACTIVE                            = 32  ;

static const uint8_t P9N2_C_RAS_STATUS_VT0_CORE_MAINT                             = 0   ;
static const uint8_t P9N2_C_RAS_STATUS_VT0_THREAD_QUIESCED                        = 1   ;
static const uint8_t P9N2_C_RAS_STATUS_VT0_ICT_EMPTY                              = 2   ;
static const uint8_t P9N2_C_RAS_STATUS_VT0_LSU_QUIESCED                           = 3   ;
static const uint8_t P9N2_C_RAS_STATUS_VT0_STEP_SUCCESS                           = 4   ;
static const uint8_t P9N2_C_RAS_STATUS_VT1_CORE_MAINT                             = 8   ;
static const uint8_t P9N2_C_RAS_STATUS_VT1_THREAD_QUIESCED                        = 9   ;
static const uint8_t P9N2_C_RAS_STATUS_VT1_ICT_EMPTY                              = 10  ;
static const uint8_t P9N2_C_RAS_STATUS_VT1_LSU_QUIESCED                           = 11  ;
static const uint8_t P9N2_C_RAS_STATUS_VT1_STEP_SUCCESS                           = 12  ;
static const uint8_t P9N2_C_RAS_STATUS_VT2_CORE_MAINT                             = 16  ;
static const uint8_t P9N2_C_RAS_STATUS_VT2_THREAD_QUIESCED                        = 17  ;
static const uint8_t P9N2_C_RAS_STATUS_VT2_ICT_EMPTY                              = 18  ;
static const uint8_t P9N2_C_RAS_STATUS_VT2_LSU_QUIESCED                           = 19  ;
static const uint8_t P9N2_C_RAS_STATUS_VT2_STEP_SUCCESS                           = 20  ;
static const uint8_t P9N2_C_RAS_STATUS_VT3_CORE_MAINT                             = 24  ;
static const uint8_t P9N2_C_RAS_STATUS_VT3_THREAD_QUIESCED                        = 25  ;
static const uint8_t P9N2_C_RAS_STATUS_VT3_ICT_EMPTY                              = 26  ;
static const uint8_t P9N2_C_RAS_STATUS_VT3_LSU_QUIESCED                           = 27  ;
static const uint8_t P9N2_C_RAS_STATUS_VT3_STEP_SUCCESS                           = 28  ;
static const uint8_t P9N2_C_RAS_STATUS_NEST_ACTIVE                                = 32  ;

static const uint8_t P9N2_EQ_RD_EPS_REG_TIER0_VALUE                               = 0   ;
static const uint8_t P9N2_EQ_RD_EPS_REG_TIER0_VALUE_LEN                           = 12  ;
static const uint8_t P9N2_EQ_RD_EPS_REG_TIER1_VALUE                               = 12  ;
static const uint8_t P9N2_EQ_RD_EPS_REG_TIER1_VALUE_LEN                           = 12  ;
static const uint8_t P9N2_EQ_RD_EPS_REG_TIER2_VALUE                               = 24  ;
static const uint8_t P9N2_EQ_RD_EPS_REG_TIER2_VALUE_LEN                           = 12  ;

static const uint8_t P9N2_EX_L2_RD_EPS_REG_TIER0_VALUE                            = 0   ;
static const uint8_t P9N2_EX_L2_RD_EPS_REG_TIER0_VALUE_LEN                        = 12  ;
static const uint8_t P9N2_EX_L2_RD_EPS_REG_TIER1_VALUE                            = 12  ;
static const uint8_t P9N2_EX_L2_RD_EPS_REG_TIER1_VALUE_LEN                        = 12  ;
static const uint8_t P9N2_EX_L2_RD_EPS_REG_TIER2_VALUE                            = 24  ;
static const uint8_t P9N2_EX_L2_RD_EPS_REG_TIER2_VALUE_LEN                        = 12  ;

static const uint8_t P9N2_EX_L2_RECOV_FWD_PROG_CTRL_RESET_FWD_PROG                = 0   ;
static const uint8_t P9N2_EX_L2_RECOV_FWD_PROG_CTRL_FWD_PROG_THOLD                = 1   ;
static const uint8_t P9N2_EX_L2_RECOV_FWD_PROG_CTRL_FWD_PROG_THOLD_LEN            = 3   ;

static const uint8_t P9N2_C_RECOV_FWD_PROG_CTRL_RESET_FWD_PROG                    = 0   ;
static const uint8_t P9N2_C_RECOV_FWD_PROG_CTRL_FWD_PROG_THOLD                    = 1   ;
static const uint8_t P9N2_C_RECOV_FWD_PROG_CTRL_FWD_PROG_THOLD_LEN                = 3   ;

static const uint8_t P9N2_EQ_RECOV_INTERRUPT_REG_RECOV                            = 0   ;

static const uint8_t P9N2_EX_RECOV_INTERRUPT_REG_RECOV                            = 0   ;

static const uint8_t P9N2_C_RECOV_INTERRUPT_REG_RECOV                             = 0   ;

static const uint8_t P9N2_EX_L2_RECOV_THOLD_THRESHOLD_LIMIT                       = 0   ;
static const uint8_t P9N2_EX_L2_RECOV_THOLD_THRESHOLD_LIMIT_LEN                   = 8   ;
static const uint8_t P9N2_EX_L2_RECOV_THOLD_THRESHOLD_RESET                       = 8   ;
static const uint8_t P9N2_EX_L2_RECOV_THOLD_THRESHOLD_RESET_LEN                   = 2   ;

static const uint8_t P9N2_C_RECOV_THOLD_THRESHOLD_LIMIT                           = 0   ;
static const uint8_t P9N2_C_RECOV_THOLD_THRESHOLD_LIMIT_LEN                       = 8   ;
static const uint8_t P9N2_C_RECOV_THOLD_THRESHOLD_RESET                           = 8   ;
static const uint8_t P9N2_C_RECOV_THOLD_THRESHOLD_RESET_LEN                       = 2   ;

static const uint8_t P9N2_EX_L2_RESET_KEEPER_RESET_KEEPER                         = 0   ;
static const uint8_t P9N2_EX_L2_RESET_KEEPER_CORE_SYS_ENABLE                      = 1   ;

static const uint8_t P9N2_C_RESET_KEEPER_RESET_KEEPER                             = 0   ;
static const uint8_t P9N2_C_RESET_KEEPER_CORE_SYS_ENABLE                          = 1   ;

static const uint8_t P9N2_EQ_RFIR_IN0                                             = 0   ;
static const uint8_t P9N2_EQ_RFIR_LFIR_RECOV_ERR                                  = 1   ;
static const uint8_t P9N2_EQ_RFIR_IN4                                             = 2   ;
static const uint8_t P9N2_EQ_RFIR_IN5                                             = 3   ;
static const uint8_t P9N2_EQ_RFIR_IN6                                             = 4   ;
static const uint8_t P9N2_EQ_RFIR_IN7                                             = 5   ;
static const uint8_t P9N2_EQ_RFIR_IN8                                             = 6   ;
static const uint8_t P9N2_EQ_RFIR_IN9                                             = 7   ;
static const uint8_t P9N2_EQ_RFIR_IN10                                            = 8   ;
static const uint8_t P9N2_EQ_RFIR_IN11                                            = 9   ;
static const uint8_t P9N2_EQ_RFIR_IN12                                            = 10  ;
static const uint8_t P9N2_EQ_RFIR_IN13                                            = 11  ;
static const uint8_t P9N2_EQ_RFIR_IN13_LEN                                        = 13  ;

static const uint8_t P9N2_EX_RFIR_IN0                                             = 0   ;
static const uint8_t P9N2_EX_RFIR_LFIR_RECOV_ERR                                  = 1   ;
static const uint8_t P9N2_EX_RFIR_IN4                                             = 2   ;
static const uint8_t P9N2_EX_RFIR_IN5                                             = 3   ;
static const uint8_t P9N2_EX_RFIR_IN5_LEN                                         = 21  ;

static const uint8_t P9N2_C_RFIR_IN0                                              = 0   ;
static const uint8_t P9N2_C_RFIR_LFIR_RECOV_ERR                                   = 1   ;
static const uint8_t P9N2_C_RFIR_IN4                                              = 2   ;
static const uint8_t P9N2_C_RFIR_IN5                                              = 3   ;
static const uint8_t P9N2_C_RFIR_IN5_LEN                                          = 21  ;

static const uint8_t P9N2_EQ_RING_FENCE_MASK_LATCH_REG_ENABLE                     = 1   ;
static const uint8_t P9N2_EQ_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN                 = 15  ;

static const uint8_t P9N2_EX_RING_FENCE_MASK_LATCH_REG_ENABLE                     = 1   ;
static const uint8_t P9N2_EX_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN                 = 15  ;

static const uint8_t P9N2_C_RING_FENCE_MASK_LATCH_REG_ENABLE                      = 1   ;
static const uint8_t P9N2_C_RING_FENCE_MASK_LATCH_REG_ENABLE_LEN                  = 15  ;

static const uint8_t P9N2_EQ_SCAN32_SCAN32_REG                                    = 0   ;
static const uint8_t P9N2_EQ_SCAN32_SCAN32_REG_LEN                                = 32  ;

static const uint8_t P9N2_EX_SCAN32_SCAN32_REG                                    = 0   ;
static const uint8_t P9N2_EX_SCAN32_SCAN32_REG_LEN                                = 32  ;

static const uint8_t P9N2_C_SCAN32_SCAN32_REG                                     = 0   ;
static const uint8_t P9N2_C_SCAN32_SCAN32_REG_LEN                                 = 32  ;

static const uint8_t P9N2_EQ_SCAN64_SCAN64_REG                                    = 0   ;
static const uint8_t P9N2_EQ_SCAN64_SCAN64_REG_LEN                                = 64  ;

static const uint8_t P9N2_EX_SCAN64_SCAN64_REG                                    = 0   ;
static const uint8_t P9N2_EX_SCAN64_SCAN64_REG_LEN                                = 64  ;

static const uint8_t P9N2_C_SCAN64_SCAN64_REG                                     = 0   ;
static const uint8_t P9N2_C_SCAN64_SCAN64_REG_LEN                                 = 64  ;

static const uint8_t P9N2_EQ_SCAN_CAPTUREDR_SCAN_CAPTUREDR_REG                    = 0   ;
static const uint8_t P9N2_EQ_SCAN_CAPTUREDR_SCAN_CAPTUREDR_REG_LEN                = 32  ;

static const uint8_t P9N2_EX_SCAN_CAPTUREDR_SCAN_CAPTUREDR_REG                    = 0   ;
static const uint8_t P9N2_EX_SCAN_CAPTUREDR_SCAN_CAPTUREDR_REG_LEN                = 32  ;

static const uint8_t P9N2_C_SCAN_CAPTUREDR_SCAN_CAPTUREDR_REG                     = 0   ;
static const uint8_t P9N2_C_SCAN_CAPTUREDR_SCAN_CAPTUREDR_REG_LEN                 = 32  ;

static const uint8_t P9N2_EQ_SCAN_CAPTUREDR_LONG_SCAN_CAPTUREDR_LONG_REG          = 0   ;
static const uint8_t P9N2_EQ_SCAN_CAPTUREDR_LONG_SCAN_CAPTUREDR_LONG_REG_LEN      = 32  ;

static const uint8_t P9N2_EX_SCAN_CAPTUREDR_LONG_SCAN_CAPTUREDR_LONG_REG          = 0   ;
static const uint8_t P9N2_EX_SCAN_CAPTUREDR_LONG_SCAN_CAPTUREDR_LONG_REG_LEN      = 32  ;

static const uint8_t P9N2_C_SCAN_CAPTUREDR_LONG_SCAN_CAPTUREDR_LONG_REG           = 0   ;
static const uint8_t P9N2_C_SCAN_CAPTUREDR_LONG_SCAN_CAPTUREDR_LONG_REG_LEN       = 32  ;

static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_SYSTEM_FAST_INIT                    = 0   ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_VITL                                = 3   ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_PERV                                = 4   ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT1                               = 5   ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT2                               = 6   ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT3                               = 7   ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT4                               = 8   ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT5                               = 9   ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT6                               = 10  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT7                               = 11  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT8                               = 12  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT9                               = 13  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_UNIT10                              = 14  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_FUNC                                = 48  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_CFG                                 = 49  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_CCFG_GPTR                           = 50  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_REGF                                = 51  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_LBIST                               = 52  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_ABIST                               = 53  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_REPR                                = 54  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_TIME                                = 55  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_BNDY                                = 56  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_FARR                                = 57  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_CMSK                                = 58  ;
static const uint8_t P9N2_EQ_SCAN_REGION_TYPE_INEX                                = 59  ;

static const uint8_t P9N2_EX_SCAN_REGION_TYPE_SYSTEM_FAST_INIT                    = 0   ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_VITL                                = 3   ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_PERV                                = 4   ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT1                               = 5   ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT2                               = 6   ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT3                               = 7   ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT4                               = 8   ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT5                               = 9   ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT6                               = 10  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT7                               = 11  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT8                               = 12  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT9                               = 13  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_UNIT10                              = 14  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_FUNC                                = 48  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_CFG                                 = 49  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_CCFG_GPTR                           = 50  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_REGF                                = 51  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_LBIST                               = 52  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_ABIST                               = 53  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_REPR                                = 54  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_TIME                                = 55  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_BNDY                                = 56  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_FARR                                = 57  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_CMSK                                = 58  ;
static const uint8_t P9N2_EX_SCAN_REGION_TYPE_INEX                                = 59  ;

static const uint8_t P9N2_C_SCAN_REGION_TYPE_SYSTEM_FAST_INIT                     = 0   ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_VITL                                 = 3   ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_PERV                                 = 4   ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT1                                = 5   ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT2                                = 6   ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT3                                = 7   ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT4                                = 8   ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT5                                = 9   ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT6                                = 10  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT7                                = 11  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT8                                = 12  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT9                                = 13  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_UNIT10                               = 14  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_FUNC                                 = 48  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_CFG                                  = 49  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_CCFG_GPTR                            = 50  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_REGF                                 = 51  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_LBIST                                = 52  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_ABIST                                = 53  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_REPR                                 = 54  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_TIME                                 = 55  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_BNDY                                 = 56  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_FARR                                 = 57  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_CMSK                                 = 58  ;
static const uint8_t P9N2_C_SCAN_REGION_TYPE_INEX                                 = 59  ;

static const uint8_t P9N2_EQ_SCAN_UPDATEDR_SCAN_UPDATEDR_REG                      = 0   ;
static const uint8_t P9N2_EQ_SCAN_UPDATEDR_SCAN_UPDATEDR_REG_LEN                  = 32  ;

static const uint8_t P9N2_EX_SCAN_UPDATEDR_SCAN_UPDATEDR_REG                      = 0   ;
static const uint8_t P9N2_EX_SCAN_UPDATEDR_SCAN_UPDATEDR_REG_LEN                  = 32  ;

static const uint8_t P9N2_C_SCAN_UPDATEDR_SCAN_UPDATEDR_REG                       = 0   ;
static const uint8_t P9N2_C_SCAN_UPDATEDR_SCAN_UPDATEDR_REG_LEN                   = 32  ;

static const uint8_t P9N2_EQ_SCAN_UPDATEDR_LONG_SCAN_UPDATEDR_LONG_REG            = 0   ;
static const uint8_t P9N2_EQ_SCAN_UPDATEDR_LONG_SCAN_UPDATEDR_LONG_REG_LEN        = 32  ;

static const uint8_t P9N2_EX_SCAN_UPDATEDR_LONG_SCAN_UPDATEDR_LONG_REG            = 0   ;
static const uint8_t P9N2_EX_SCAN_UPDATEDR_LONG_SCAN_UPDATEDR_LONG_REG_LEN        = 32  ;

static const uint8_t P9N2_C_SCAN_UPDATEDR_LONG_SCAN_UPDATEDR_LONG_REG             = 0   ;
static const uint8_t P9N2_C_SCAN_UPDATEDR_LONG_SCAN_UPDATEDR_LONG_REG_LEN         = 32  ;

static const uint8_t P9N2_EX_L2_SCOMC_MODE_CX                                     = 54  ;
static const uint8_t P9N2_EX_L2_SCOMC_MODE_CX_LEN                                 = 7   ;

static const uint8_t P9N2_C_SCOMC_MODE_CX                                         = 54  ;
static const uint8_t P9N2_C_SCOMC_MODE_CX_LEN                                     = 7   ;

static const uint8_t P9N2_EX_L2_SHID0_TRIG2_TRACE_EN                              = 0   ;
static const uint8_t P9N2_EX_L2_SHID0_DIS_TRACE_SPR                               = 1   ;

static const uint8_t P9N2_C_SHID0_TRIG2_TRACE_EN                                  = 0   ;
static const uint8_t P9N2_C_SHID0_DIS_TRACE_SPR                                   = 1   ;

static const uint8_t P9N2_EX_SIER_MASK_SIER_MASK_TBD                              = 0   ;
static const uint8_t P9N2_EX_SIER_MASK_SIER_MASK_TBD_LEN                          = 64  ;

static const uint8_t P9N2_C_SIER_MASK_SIER_MASK_TBD                               = 0   ;
static const uint8_t P9N2_C_SIER_MASK_SIER_MASK_TBD_LEN                           = 64  ;

static const uint8_t P9N2_EQ_SKITTER_CLKSRC_REG_SKITTER0                          = 0   ;
static const uint8_t P9N2_EQ_SKITTER_CLKSRC_REG_SKITTER0_LEN                      = 3   ;
static const uint8_t P9N2_EQ_SKITTER_CLKSRC_REG_SKITTER0_DELAY_SELECT             = 36  ;
static const uint8_t P9N2_EQ_SKITTER_CLKSRC_REG_SKITTER0_DELAY_SELECT_LEN         = 2   ;

static const uint8_t P9N2_EX_SKITTER_CLKSRC_REG_SKITTER0                          = 0   ;
static const uint8_t P9N2_EX_SKITTER_CLKSRC_REG_SKITTER0_LEN                      = 3   ;
static const uint8_t P9N2_EX_SKITTER_CLKSRC_REG_SKITTER0_DELAY_SELECT             = 36  ;
static const uint8_t P9N2_EX_SKITTER_CLKSRC_REG_SKITTER0_DELAY_SELECT_LEN         = 2   ;

static const uint8_t P9N2_C_SKITTER_CLKSRC_REG_SKITTER0                           = 0   ;
static const uint8_t P9N2_C_SKITTER_CLKSRC_REG_SKITTER0_LEN                       = 3   ;
static const uint8_t P9N2_C_SKITTER_CLKSRC_REG_SKITTER0_DELAY_SELECT              = 36  ;
static const uint8_t P9N2_C_SKITTER_CLKSRC_REG_SKITTER0_DELAY_SELECT_LEN          = 2   ;

static const uint8_t P9N2_EQ_SKITTER_FORCE_REG_F_READ                             = 0   ;

static const uint8_t P9N2_EX_SKITTER_FORCE_REG_F_READ                             = 0   ;

static const uint8_t P9N2_C_SKITTER_FORCE_REG_F_READ                              = 0   ;

static const uint8_t P9N2_EQ_SKITTER_MODE_REG_HOLD_SAMPLE                         = 0   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_DISABLE_STICKINESS                  = 1   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_UNUSED1                             = 2   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_UNUSED1_LEN                         = 2   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL                    = 4   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL_LEN                = 2   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_RESET_TRIG_SEL                      = 6   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_RESET_TRIG_SEL_LEN                  = 2   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_SAMPLE_GUTS                         = 8   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_SAMPLE_GUTS_LEN                     = 2   ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_HOLD_SAMPLE_WITH_TRIGGER            = 44  ;
static const uint8_t P9N2_EQ_SKITTER_MODE_REG_DATA_V_LT                           = 45  ;

static const uint8_t P9N2_EX_SKITTER_MODE_REG_HOLD_SAMPLE                         = 0   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_DISABLE_STICKINESS                  = 1   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_UNUSED1                             = 2   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_UNUSED1_LEN                         = 2   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL                    = 4   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL_LEN                = 2   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_RESET_TRIG_SEL                      = 6   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_RESET_TRIG_SEL_LEN                  = 2   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_SAMPLE_GUTS                         = 8   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_SAMPLE_GUTS_LEN                     = 2   ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_HOLD_SAMPLE_WITH_TRIGGER            = 44  ;
static const uint8_t P9N2_EX_SKITTER_MODE_REG_DATA_V_LT                           = 45  ;

static const uint8_t P9N2_C_SKITTER_MODE_REG_HOLD_SAMPLE                          = 0   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_DISABLE_STICKINESS                   = 1   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_UNUSED1                              = 2   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_UNUSED1_LEN                          = 2   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL                     = 4   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_HOLD_DBGTRIG_SEL_LEN                 = 2   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_RESET_TRIG_SEL                       = 6   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_RESET_TRIG_SEL_LEN                   = 2   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_SAMPLE_GUTS                          = 8   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_SAMPLE_GUTS_LEN                      = 2   ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_HOLD_SAMPLE_WITH_TRIGGER             = 44  ;
static const uint8_t P9N2_C_SKITTER_MODE_REG_DATA_V_LT                            = 45  ;

static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_CFG_DISABLE_PERV_THOLD_CHECK        = 0   ;
static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_CFG_DISABLE_MALF_PULSE_GEN          = 1   ;
static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_CFG_STOP_HANG_CNT_SYS_XSTP          = 2   ;
static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_CFG_DISABLE_CL_ATOMIC_LOCK          = 3   ;
static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_CFG_DISABLE_HEARTBEAT               = 4   ;
static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_CFG_DISABLE_FORCE_TO_ZERO           = 5   ;
static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_CFG_PM_DISABLE                      = 6   ;
static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_CFG_PM_MUX_DISABLE                  = 7   ;
static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_ERROR_MASK                          = 8   ;
static const uint8_t P9N2_EQ_SLAVE_CONFIG_REG_ERROR_MASK_LEN                      = 6   ;

static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_CFG_DISABLE_PERV_THOLD_CHECK        = 0   ;
static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_CFG_DISABLE_MALF_PULSE_GEN          = 1   ;
static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_CFG_STOP_HANG_CNT_SYS_XSTP          = 2   ;
static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_CFG_DISABLE_CL_ATOMIC_LOCK          = 3   ;
static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_CFG_DISABLE_HEARTBEAT               = 4   ;
static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_CFG_DISABLE_FORCE_TO_ZERO           = 5   ;
static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_CFG_PM_DISABLE                      = 6   ;
static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_CFG_PM_MUX_DISABLE                  = 7   ;
static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_ERROR_MASK                          = 8   ;
static const uint8_t P9N2_EX_SLAVE_CONFIG_REG_ERROR_MASK_LEN                      = 6   ;

static const uint8_t P9N2_C_SLAVE_CONFIG_REG_CFG_DISABLE_PERV_THOLD_CHECK         = 0   ;
static const uint8_t P9N2_C_SLAVE_CONFIG_REG_CFG_DISABLE_MALF_PULSE_GEN           = 1   ;
static const uint8_t P9N2_C_SLAVE_CONFIG_REG_CFG_STOP_HANG_CNT_SYS_XSTP           = 2   ;
static const uint8_t P9N2_C_SLAVE_CONFIG_REG_CFG_DISABLE_CL_ATOMIC_LOCK           = 3   ;
static const uint8_t P9N2_C_SLAVE_CONFIG_REG_CFG_DISABLE_HEARTBEAT                = 4   ;
static const uint8_t P9N2_C_SLAVE_CONFIG_REG_CFG_DISABLE_FORCE_TO_ZERO            = 5   ;
static const uint8_t P9N2_C_SLAVE_CONFIG_REG_CFG_PM_DISABLE                       = 6   ;
static const uint8_t P9N2_C_SLAVE_CONFIG_REG_CFG_PM_MUX_DISABLE                   = 7   ;
static const uint8_t P9N2_C_SLAVE_CONFIG_REG_ERROR_MASK                           = 8   ;
static const uint8_t P9N2_C_SLAVE_CONFIG_REG_ERROR_MASK_LEN                       = 6   ;

static const uint8_t P9N2_EQ_SPATTN_IN0                                           = 0   ;
static const uint8_t P9N2_EQ_SPATTN_IN1                                           = 1   ;
static const uint8_t P9N2_EQ_SPATTN_IN2                                           = 2   ;
static const uint8_t P9N2_EQ_SPATTN_IN3                                           = 3   ;
static const uint8_t P9N2_EQ_SPATTN_IN4                                           = 4   ;
static const uint8_t P9N2_EQ_SPATTN_IN5                                           = 5   ;
static const uint8_t P9N2_EQ_SPATTN_IN6                                           = 6   ;
static const uint8_t P9N2_EQ_SPATTN_IN7                                           = 7   ;
static const uint8_t P9N2_EQ_SPATTN_IN8                                           = 8   ;
static const uint8_t P9N2_EQ_SPATTN_IN9                                           = 9   ;

static const uint8_t P9N2_EX_SPATTN_LT0_SPR_INSTR_STOP                            = 0   ;
static const uint8_t P9N2_EX_SPATTN_LT0_ATTN_COMPLETE                             = 1   ;
static const uint8_t P9N2_EX_SPATTN_LT0_CORE_CHECKSTOP_RECOVERY_HANDSHAKE         = 2   ;
static const uint8_t P9N2_EX_SPATTN_LT0_CORE_CODE_TO_SP                           = 3   ;
static const uint8_t P9N2_EX_SPATTN_LT1_SPR_INSTR_STOP                            = 4   ;
static const uint8_t P9N2_EX_SPATTN_LT1_ATTN_COMPLETE                             = 5   ;
static const uint8_t P9N2_EX_SPATTN_LT1_CORE_CHECKSTOP_RECOVERY_HANDSHAKE         = 6   ;
static const uint8_t P9N2_EX_SPATTN_LT1_CORE_CODE_TO_SP                           = 7   ;
static const uint8_t P9N2_EX_SPATTN_LT2_SPR_INSTR_STOP                            = 8   ;
static const uint8_t P9N2_EX_SPATTN_LT2_ATTN_COMPLETE                             = 9   ;
static const uint8_t P9N2_EX_SPATTN_LT2_CORE_CHECKSTOP_RECOVERY_HANDSHAKE         = 10  ;
static const uint8_t P9N2_EX_SPATTN_LT2_CORE_CODE_TO_SP                           = 11  ;
static const uint8_t P9N2_EX_SPATTN_LT3_SPR_INSTR_STOP                            = 12  ;
static const uint8_t P9N2_EX_SPATTN_LT3_ATTN_COMPLETE                             = 13  ;
static const uint8_t P9N2_EX_SPATTN_LT3_CORE_CHECKSTOP_RECOVERY_HANDSHAKE         = 14  ;
static const uint8_t P9N2_EX_SPATTN_LT3_CORE_CODE_TO_SP                           = 15  ;
static const uint8_t P9N2_EX_SPATTN_LT4_SPR_INSTR_STOP                            = 16  ;
static const uint8_t P9N2_EX_SPATTN_LT4_ATTN_COMPLETE                             = 17  ;
static const uint8_t P9N2_EX_SPATTN_LT4_CORE_CHECKSTOP_RECOVERY_HANDSHAKE         = 18  ;
static const uint8_t P9N2_EX_SPATTN_LT4_CORE_CODE_TO_SP                           = 19  ;
static const uint8_t P9N2_EX_SPATTN_LT5_SPR_INSTR_STOP                            = 20  ;
static const uint8_t P9N2_EX_SPATTN_LT5_ATTN_COMPLETE                             = 21  ;
static const uint8_t P9N2_EX_SPATTN_LT5_CORE_CHECKSTOP_RECOVERY_HANDSHAKE         = 22  ;
static const uint8_t P9N2_EX_SPATTN_LT5_CORE_CODE_TO_SP                           = 23  ;
static const uint8_t P9N2_EX_SPATTN_LT6_SPR_INSTR_STOP                            = 24  ;
static const uint8_t P9N2_EX_SPATTN_LT6_ATTN_COMPLETE                             = 25  ;
static const uint8_t P9N2_EX_SPATTN_LT6_CORE_CHECKSTOP_RECOVERY_HANDSHAKE         = 26  ;
static const uint8_t P9N2_EX_SPATTN_LT6_CORE_CODE_TO_SP                           = 27  ;
static const uint8_t P9N2_EX_SPATTN_LT7_SPR_INSTR_STOP                            = 28  ;
static const uint8_t P9N2_EX_SPATTN_LT7_ATTN_COMPLETE                             = 29  ;
static const uint8_t P9N2_EX_SPATTN_LT7_CORE_CHECKSTOP_RECOVERY_HANDSHAKE         = 30  ;
static const uint8_t P9N2_EX_SPATTN_LT7_CORE_CODE_TO_SP                           = 31  ;

static const uint8_t P9N2_EX_L2_SPATTN_LT0_SPR_INSTR_STOP                         = 0   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT0_ATTN_COMPLETE                          = 1   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT0_CORE_CHECKSTOP_RECOVERY_HANDSHAKE      = 2   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT0_CORE_CODE_TO_SP                        = 3   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT1_SPR_INSTR_STOP                         = 4   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT1_ATTN_COMPLETE                          = 5   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT1_CORE_CHECKSTOP_RECOVERY_HANDSHAKE      = 6   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT1_CORE_CODE_TO_SP                        = 7   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT2_SPR_INSTR_STOP                         = 8   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT2_ATTN_COMPLETE                          = 9   ;
static const uint8_t P9N2_EX_L2_SPATTN_LT2_CORE_CHECKSTOP_RECOVERY_HANDSHAKE      = 10  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT2_CORE_CODE_TO_SP                        = 11  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT3_SPR_INSTR_STOP                         = 12  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT3_ATTN_COMPLETE                          = 13  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT3_CORE_CHECKSTOP_RECOVERY_HANDSHAKE      = 14  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT3_CORE_CODE_TO_SP                        = 15  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT4_SPR_INSTR_STOP                         = 16  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT4_ATTN_COMPLETE                          = 17  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT4_CORE_CHECKSTOP_RECOVERY_HANDSHAKE      = 18  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT4_CORE_CODE_TO_SP                        = 19  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT5_SPR_INSTR_STOP                         = 20  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT5_ATTN_COMPLETE                          = 21  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT5_CORE_CHECKSTOP_RECOVERY_HANDSHAKE      = 22  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT5_CORE_CODE_TO_SP                        = 23  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT6_SPR_INSTR_STOP                         = 24  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT6_ATTN_COMPLETE                          = 25  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT6_CORE_CHECKSTOP_RECOVERY_HANDSHAKE      = 26  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT6_CORE_CODE_TO_SP                        = 27  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT7_SPR_INSTR_STOP                         = 28  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT7_ATTN_COMPLETE                          = 29  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT7_CORE_CHECKSTOP_RECOVERY_HANDSHAKE      = 30  ;
static const uint8_t P9N2_EX_L2_SPATTN_LT7_CORE_CODE_TO_SP                        = 31  ;

static const uint8_t P9N2_C_SPATTN_LT0_SPR_INSTR_STOP                             = 0   ;
static const uint8_t P9N2_C_SPATTN_LT0_ATTN_COMPLETE                              = 1   ;
static const uint8_t P9N2_C_SPATTN_LT0_CORE_CHECKSTOP_RECOVERY_HANDSHAKE          = 2   ;
static const uint8_t P9N2_C_SPATTN_LT0_CORE_CODE_TO_SP                            = 3   ;
static const uint8_t P9N2_C_SPATTN_LT1_SPR_INSTR_STOP                             = 4   ;
static const uint8_t P9N2_C_SPATTN_LT1_ATTN_COMPLETE                              = 5   ;
static const uint8_t P9N2_C_SPATTN_LT1_CORE_CHECKSTOP_RECOVERY_HANDSHAKE          = 6   ;
static const uint8_t P9N2_C_SPATTN_LT1_CORE_CODE_TO_SP                            = 7   ;
static const uint8_t P9N2_C_SPATTN_LT2_SPR_INSTR_STOP                             = 8   ;
static const uint8_t P9N2_C_SPATTN_LT2_ATTN_COMPLETE                              = 9   ;
static const uint8_t P9N2_C_SPATTN_LT2_CORE_CHECKSTOP_RECOVERY_HANDSHAKE          = 10  ;
static const uint8_t P9N2_C_SPATTN_LT2_CORE_CODE_TO_SP                            = 11  ;
static const uint8_t P9N2_C_SPATTN_LT3_SPR_INSTR_STOP                             = 12  ;
static const uint8_t P9N2_C_SPATTN_LT3_ATTN_COMPLETE                              = 13  ;
static const uint8_t P9N2_C_SPATTN_LT3_CORE_CHECKSTOP_RECOVERY_HANDSHAKE          = 14  ;
static const uint8_t P9N2_C_SPATTN_LT3_CORE_CODE_TO_SP                            = 15  ;
static const uint8_t P9N2_C_SPATTN_LT4_SPR_INSTR_STOP                             = 16  ;
static const uint8_t P9N2_C_SPATTN_LT4_ATTN_COMPLETE                              = 17  ;
static const uint8_t P9N2_C_SPATTN_LT4_CORE_CHECKSTOP_RECOVERY_HANDSHAKE          = 18  ;
static const uint8_t P9N2_C_SPATTN_LT4_CORE_CODE_TO_SP                            = 19  ;
static const uint8_t P9N2_C_SPATTN_LT5_SPR_INSTR_STOP                             = 20  ;
static const uint8_t P9N2_C_SPATTN_LT5_ATTN_COMPLETE                              = 21  ;
static const uint8_t P9N2_C_SPATTN_LT5_CORE_CHECKSTOP_RECOVERY_HANDSHAKE          = 22  ;
static const uint8_t P9N2_C_SPATTN_LT5_CORE_CODE_TO_SP                            = 23  ;
static const uint8_t P9N2_C_SPATTN_LT6_SPR_INSTR_STOP                             = 24  ;
static const uint8_t P9N2_C_SPATTN_LT6_ATTN_COMPLETE                              = 25  ;
static const uint8_t P9N2_C_SPATTN_LT6_CORE_CHECKSTOP_RECOVERY_HANDSHAKE          = 26  ;
static const uint8_t P9N2_C_SPATTN_LT6_CORE_CODE_TO_SP                            = 27  ;
static const uint8_t P9N2_C_SPATTN_LT7_SPR_INSTR_STOP                             = 28  ;
static const uint8_t P9N2_C_SPATTN_LT7_ATTN_COMPLETE                              = 29  ;
static const uint8_t P9N2_C_SPATTN_LT7_CORE_CHECKSTOP_RECOVERY_HANDSHAKE          = 30  ;
static const uint8_t P9N2_C_SPATTN_LT7_CORE_CODE_TO_SP                            = 31  ;

static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT0_SPATTN_MASK                       = 0   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT0_SPATTN_MASK_LEN                   = 4   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT1_SPATTN_MASK                       = 4   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT1_SPATTN_MASK_LEN                   = 4   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT2_SPATTN_MASK                       = 8   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT2_SPATTN_MASK_LEN                   = 4   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT3_SPATTN_MASK                       = 12  ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT3_SPATTN_MASK_LEN                   = 4   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT4_SPATTN_MASK                       = 16  ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT4_SPATTN_MASK_LEN                   = 4   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT5_SPATTN_MASK                       = 20  ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT5_SPATTN_MASK_LEN                   = 4   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT6_SPATTN_MASK                       = 24  ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT6_SPATTN_MASK_LEN                   = 4   ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT7_SPATTN_MASK                       = 28  ;
static const uint8_t P9N2_EX_L2_SPATTN_MASK_LT7_SPATTN_MASK_LEN                   = 4   ;

static const uint8_t P9N2_C_SPATTN_MASK_LT0_SPATTN_MASK                           = 0   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT0_SPATTN_MASK_LEN                       = 4   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT1_SPATTN_MASK                           = 4   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT1_SPATTN_MASK_LEN                       = 4   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT2_SPATTN_MASK                           = 8   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT2_SPATTN_MASK_LEN                       = 4   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT3_SPATTN_MASK                           = 12  ;
static const uint8_t P9N2_C_SPATTN_MASK_LT3_SPATTN_MASK_LEN                       = 4   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT4_SPATTN_MASK                           = 16  ;
static const uint8_t P9N2_C_SPATTN_MASK_LT4_SPATTN_MASK_LEN                       = 4   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT5_SPATTN_MASK                           = 20  ;
static const uint8_t P9N2_C_SPATTN_MASK_LT5_SPATTN_MASK_LEN                       = 4   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT6_SPATTN_MASK                           = 24  ;
static const uint8_t P9N2_C_SPATTN_MASK_LT6_SPATTN_MASK_LEN                       = 4   ;
static const uint8_t P9N2_C_SPATTN_MASK_LT7_SPATTN_MASK                           = 28  ;
static const uint8_t P9N2_C_SPATTN_MASK_LT7_SPATTN_MASK_LEN                       = 4   ;

static const uint8_t P9N2_EQ_SPA_MASK_IN                                          = 0   ;
static const uint8_t P9N2_EQ_SPA_MASK_IN_LEN                                      = 10  ;

static const uint8_t P9N2_EX_SPA_MASK_IN                                          = 0   ;
static const uint8_t P9N2_EX_SPA_MASK_IN_LEN                                      = 10  ;

static const uint8_t P9N2_C_SPA_MASK_IN                                           = 0   ;
static const uint8_t P9N2_C_SPA_MASK_IN_LEN                                       = 10  ;

static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_ATTNREG_PAR_HOLD_OUT             = 0   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_CTRL_PAR_HOLD_OUT                = 1   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_HMEER_PAR_HOLD_OUT               = 2   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_L2_CHECKSTOP_HOLD_OUT            = 3   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_MODEREG_PAR_HOLD_OUT             = 4   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_CORE_POWSAV_STATE_HOLD_OUT       = 5   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_CORE_RECVY_THD_CHANGE_HOLD_OUT   = 6   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_FENCE_EN_PM_EXIT_HOLD_OUT        = 7   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_FENCE_EN_THD_SM_NONIDLE_HOLD_OUT = 8   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_L2_MCHK_PB_ADDR_HOLD_OUT         = 9   ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_L2_MCHK_PB_ALINK_HOLD_OUT        = 10  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_THD_POWSAV_STATE_HOLD_OUT        = 11  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT0_LPCR_PAR_HOLD_OUT            = 12  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT1_LPCR_PAR_HOLD_OUT            = 13  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT2_LPCR_PAR_HOLD_OUT            = 14  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT3_LPCR_PAR_HOLD_OUT            = 15  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT0_PSSCR_PAR_HOLD_OUT           = 16  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT1_PSSCR_PAR_HOLD_OUT           = 17  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT2_PSSCR_PAR_HOLD_OUT           = 18  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT3_PSSCR_PAR_HOLD_OUT           = 19  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT0_SMFCTRL_PAR_HOLD_OUT         = 20  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT1_SMFCTRL_PAR_HOLD_OUT         = 21  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT2_SMFCTRL_PAR_HOLD_OUT         = 22  ;
static const uint8_t P9N2_EX_SPR_COMMON_HOLD_OUT_VT3_SMFCTRL_PAR_HOLD_OUT         = 23  ;

static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_ATTNREG_PAR_HOLD_OUT              = 0   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_CTRL_PAR_HOLD_OUT                 = 1   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_HMEER_PAR_HOLD_OUT                = 2   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_L2_CHECKSTOP_HOLD_OUT             = 3   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_MODEREG_PAR_HOLD_OUT              = 4   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_CORE_POWSAV_STATE_HOLD_OUT        = 5   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_CORE_RECVY_THD_CHANGE_HOLD_OUT    = 6   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_FENCE_EN_PM_EXIT_HOLD_OUT         = 7   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_FENCE_EN_THD_SM_NONIDLE_HOLD_OUT  = 8   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_L2_MCHK_PB_ADDR_HOLD_OUT          = 9   ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_L2_MCHK_PB_ALINK_HOLD_OUT         = 10  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_THD_POWSAV_STATE_HOLD_OUT         = 11  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT0_LPCR_PAR_HOLD_OUT             = 12  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT1_LPCR_PAR_HOLD_OUT             = 13  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT2_LPCR_PAR_HOLD_OUT             = 14  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT3_LPCR_PAR_HOLD_OUT             = 15  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT0_PSSCR_PAR_HOLD_OUT            = 16  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT1_PSSCR_PAR_HOLD_OUT            = 17  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT2_PSSCR_PAR_HOLD_OUT            = 18  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT3_PSSCR_PAR_HOLD_OUT            = 19  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT0_SMFCTRL_PAR_HOLD_OUT          = 20  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT1_SMFCTRL_PAR_HOLD_OUT          = 21  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT2_SMFCTRL_PAR_HOLD_OUT          = 22  ;
static const uint8_t P9N2_C_SPR_COMMON_HOLD_OUT_VT3_SMFCTRL_PAR_HOLD_OUT          = 23  ;

static const uint8_t P9N2_EX_L2_SPR_CORE_HOLD_OUT_IMA_HOLD_OUT                    = 0   ;
static const uint8_t P9N2_EX_L2_SPR_CORE_HOLD_OUT_ITRACE_HOLD_OUT                 = 1   ;
static const uint8_t P9N2_EX_L2_SPR_CORE_HOLD_OUT_PTID_SWAP_SM_HOLD_OUT           = 2   ;
static const uint8_t P9N2_EX_L2_SPR_CORE_HOLD_OUT_VS_ERR_HOLD_OUT                 = 3   ;
static const uint8_t P9N2_EX_L2_SPR_CORE_HOLD_OUT_VS_ERR_HOLD_OUT_LEN             = 6   ;
static const uint8_t P9N2_EX_L2_SPR_CORE_HOLD_OUT_VT0_LPCR_ONL_PAR_HOLD_OUT       = 9   ;
static const uint8_t P9N2_EX_L2_SPR_CORE_HOLD_OUT_VT1_LPCR_ONL_PAR_HOLD_OUT       = 10  ;
static const uint8_t P9N2_EX_L2_SPR_CORE_HOLD_OUT_VT2_LPCR_ONL_PAR_HOLD_OUT       = 11  ;
static const uint8_t P9N2_EX_L2_SPR_CORE_HOLD_OUT_VT3_LPCR_ONL_PAR_HOLD_OUT       = 12  ;

static const uint8_t P9N2_C_SPR_CORE_HOLD_OUT_IMA_HOLD_OUT                        = 0   ;
static const uint8_t P9N2_C_SPR_CORE_HOLD_OUT_ITRACE_HOLD_OUT                     = 1   ;
static const uint8_t P9N2_C_SPR_CORE_HOLD_OUT_PTID_SWAP_SM_HOLD_OUT               = 2   ;
static const uint8_t P9N2_C_SPR_CORE_HOLD_OUT_VS_ERR_HOLD_OUT                     = 3   ;
static const uint8_t P9N2_C_SPR_CORE_HOLD_OUT_VS_ERR_HOLD_OUT_LEN                 = 6   ;
static const uint8_t P9N2_C_SPR_CORE_HOLD_OUT_VT0_LPCR_ONL_PAR_HOLD_OUT           = 9   ;
static const uint8_t P9N2_C_SPR_CORE_HOLD_OUT_VT1_LPCR_ONL_PAR_HOLD_OUT           = 10  ;
static const uint8_t P9N2_C_SPR_CORE_HOLD_OUT_VT2_LPCR_ONL_PAR_HOLD_OUT           = 11  ;
static const uint8_t P9N2_C_SPR_CORE_HOLD_OUT_VT3_LPCR_ONL_PAR_HOLD_OUT           = 12  ;

static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_TFAC_ERR_INJ                     = 10  ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_TFAC_ERR_INJ_LEN                 = 6   ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_SPRC_LT0_SEL                     = 20  ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_SPRC_LT1_SEL                     = 21  ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_SPRC_LT2_SEL                     = 22  ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_SPRC_LT3_SEL                     = 23  ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_SPRC_LT4_SEL                     = 24  ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_SPRC_LT5_SEL                     = 25  ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_SPRC_LT6_SEL                     = 26  ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_SPRC_LT7_SEL                     = 27  ;
static const uint8_t P9N2_EX_L2_SPR_MODE_MODEREG_SPRC_CY_DISABLE                  = 28  ;

static const uint8_t P9N2_C_SPR_MODE_MODEREG_TFAC_ERR_INJ                         = 10  ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_TFAC_ERR_INJ_LEN                     = 6   ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_SPRC_LT0_SEL                         = 20  ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_SPRC_LT1_SEL                         = 21  ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_SPRC_LT2_SEL                         = 22  ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_SPRC_LT3_SEL                         = 23  ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_SPRC_LT4_SEL                         = 24  ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_SPRC_LT5_SEL                         = 25  ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_SPRC_LT6_SEL                         = 26  ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_SPRC_LT7_SEL                         = 27  ;
static const uint8_t P9N2_C_SPR_MODE_MODEREG_SPRC_CY_DISABLE                      = 28  ;

static const uint8_t P9N2_EX_SPURR_FREQ_DETECT_CYC_CNT_CYCLE_COUNT                = 0   ;
static const uint8_t P9N2_EX_SPURR_FREQ_DETECT_CYC_CNT_CYCLE_COUNT_LEN            = 8   ;

static const uint8_t P9N2_C_SPURR_FREQ_DETECT_CYC_CNT_CYCLE_COUNT                 = 0   ;
static const uint8_t P9N2_C_SPURR_FREQ_DETECT_CYC_CNT_CYCLE_COUNT_LEN             = 8   ;

static const uint8_t P9N2_EX_L2_SPURR_FREQ_REF_FREQUENCY_REFERENCE                = 0   ;
static const uint8_t P9N2_EX_L2_SPURR_FREQ_REF_FREQUENCY_REFERENCE_LEN            = 8   ;

static const uint8_t P9N2_C_SPURR_FREQ_REF_FREQUENCY_REFERENCE                    = 0   ;
static const uint8_t P9N2_C_SPURR_FREQ_REF_FREQUENCY_REFERENCE_LEN                = 8   ;

static const uint8_t P9N2_EX_L2_SPURR_FREQ_SCALE_OVERRIDE_EN                      = 0   ;
static const uint8_t P9N2_EX_L2_SPURR_FREQ_SCALE_FACTOR                           = 1   ;
static const uint8_t P9N2_EX_L2_SPURR_FREQ_SCALE_FACTOR_LEN                       = 7   ;

static const uint8_t P9N2_C_SPURR_FREQ_SCALE_OVERRIDE_EN                          = 0   ;
static const uint8_t P9N2_C_SPURR_FREQ_SCALE_FACTOR                               = 1   ;
static const uint8_t P9N2_C_SPURR_FREQ_SCALE_FACTOR_LEN                           = 7   ;

static const uint8_t P9N2_EX_SRC_MASK_SRC_MASK_TBD                                = 0   ;
static const uint8_t P9N2_EX_SRC_MASK_SRC_MASK_TBD_LEN                            = 64  ;

static const uint8_t P9N2_C_SRC_MASK_SRC_MASK_TBD                                 = 0   ;
static const uint8_t P9N2_C_SRC_MASK_SRC_MASK_TBD_LEN                             = 64  ;

static const uint8_t P9N2_EQ_SUM_MASK_REG_SMASK_IN0                               = 0   ;
static const uint8_t P9N2_EQ_SUM_MASK_REG_SMASK_IN1                               = 1   ;
static const uint8_t P9N2_EQ_SUM_MASK_REG_SMASK_IN2                               = 2   ;
static const uint8_t P9N2_EQ_SUM_MASK_REG_SMASK_IN3                               = 3   ;
static const uint8_t P9N2_EQ_SUM_MASK_REG_SMASK_IN4                               = 4   ;

static const uint8_t P9N2_EX_SUM_MASK_REG_SMASK_IN0                               = 0   ;
static const uint8_t P9N2_EX_SUM_MASK_REG_SMASK_IN1                               = 1   ;
static const uint8_t P9N2_EX_SUM_MASK_REG_SMASK_IN2                               = 2   ;
static const uint8_t P9N2_EX_SUM_MASK_REG_SMASK_IN3                               = 3   ;
static const uint8_t P9N2_EX_SUM_MASK_REG_SMASK_IN4                               = 4   ;

static const uint8_t P9N2_C_SUM_MASK_REG_SMASK_IN0                                = 0   ;
static const uint8_t P9N2_C_SUM_MASK_REG_SMASK_IN1                                = 1   ;
static const uint8_t P9N2_C_SUM_MASK_REG_SMASK_IN2                                = 2   ;
static const uint8_t P9N2_C_SUM_MASK_REG_SMASK_IN3                                = 3   ;
static const uint8_t P9N2_C_SUM_MASK_REG_SMASK_IN4                                = 4   ;

static const uint8_t P9N2_EQ_SYNC_CONFIG_PULSE_DELAY                              = 0   ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_PULSE_DELAY_LEN                          = 4   ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_LISTEN_TO_PULSE_DIS                      = 4   ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_PULSE_INPUT_SEL                          = 5   ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_USE_FOR_SCAN                             = 6   ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_CLEAR_CHIPLET_IS_ALIGNED                 = 7   ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_UNIT_REGION_CLKCMD_ENABLE                = 8   ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_DISABLE_PCB_ITR                          = 9   ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_ENABLE_VITL_ALIGN_CHECK                  = 10  ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_PULSE_OUT_DIS                            = 11  ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_CHKSW_DD1_MODE                           = 12  ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_CHKSW_DD1_E1                             = 13  ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_CHKSW_DD1_E2                             = 14  ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_CHKSW_DD1_E3                             = 15  ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_PHASE_COUNTER_ON_CLKCHANGE               = 16  ;
static const uint8_t P9N2_EQ_SYNC_CONFIG_PHASE_COUNTER_ON_CLKCHANGE_LEN           = 8   ;

static const uint8_t P9N2_EX_SYNC_CONFIG_PULSE_DELAY                              = 0   ;
static const uint8_t P9N2_EX_SYNC_CONFIG_PULSE_DELAY_LEN                          = 4   ;
static const uint8_t P9N2_EX_SYNC_CONFIG_LISTEN_TO_PULSE_DIS                      = 4   ;
static const uint8_t P9N2_EX_SYNC_CONFIG_PULSE_INPUT_SEL                          = 5   ;
static const uint8_t P9N2_EX_SYNC_CONFIG_USE_FOR_SCAN                             = 6   ;
static const uint8_t P9N2_EX_SYNC_CONFIG_CLEAR_CHIPLET_IS_ALIGNED                 = 7   ;
static const uint8_t P9N2_EX_SYNC_CONFIG_UNIT_REGION_CLKCMD_ENABLE                = 8   ;
static const uint8_t P9N2_EX_SYNC_CONFIG_DISABLE_PCB_ITR                          = 9   ;
static const uint8_t P9N2_EX_SYNC_CONFIG_ENABLE_VITL_ALIGN_CHECK                  = 10  ;
static const uint8_t P9N2_EX_SYNC_CONFIG_PULSE_OUT_DIS                            = 11  ;
static const uint8_t P9N2_EX_SYNC_CONFIG_CHKSW_DD1_MODE                           = 12  ;
static const uint8_t P9N2_EX_SYNC_CONFIG_CHKSW_DD1_E1                             = 13  ;
static const uint8_t P9N2_EX_SYNC_CONFIG_CHKSW_DD1_E2                             = 14  ;
static const uint8_t P9N2_EX_SYNC_CONFIG_CHKSW_DD1_E3                             = 15  ;
static const uint8_t P9N2_EX_SYNC_CONFIG_PHASE_COUNTER_ON_CLKCHANGE               = 16  ;
static const uint8_t P9N2_EX_SYNC_CONFIG_PHASE_COUNTER_ON_CLKCHANGE_LEN           = 8   ;

static const uint8_t P9N2_C_SYNC_CONFIG_PULSE_DELAY                               = 0   ;
static const uint8_t P9N2_C_SYNC_CONFIG_PULSE_DELAY_LEN                           = 4   ;
static const uint8_t P9N2_C_SYNC_CONFIG_LISTEN_TO_PULSE_DIS                       = 4   ;
static const uint8_t P9N2_C_SYNC_CONFIG_PULSE_INPUT_SEL                           = 5   ;
static const uint8_t P9N2_C_SYNC_CONFIG_USE_FOR_SCAN                              = 6   ;
static const uint8_t P9N2_C_SYNC_CONFIG_CLEAR_CHIPLET_IS_ALIGNED                  = 7   ;
static const uint8_t P9N2_C_SYNC_CONFIG_UNIT_REGION_CLKCMD_ENABLE                 = 8   ;
static const uint8_t P9N2_C_SYNC_CONFIG_DISABLE_PCB_ITR                           = 9   ;
static const uint8_t P9N2_C_SYNC_CONFIG_ENABLE_VITL_ALIGN_CHECK                   = 10  ;
static const uint8_t P9N2_C_SYNC_CONFIG_PULSE_OUT_DIS                             = 11  ;
static const uint8_t P9N2_C_SYNC_CONFIG_CHKSW_DD1_MODE                            = 12  ;
static const uint8_t P9N2_C_SYNC_CONFIG_CHKSW_DD1_E1                              = 13  ;
static const uint8_t P9N2_C_SYNC_CONFIG_CHKSW_DD1_E2                              = 14  ;
static const uint8_t P9N2_C_SYNC_CONFIG_CHKSW_DD1_E3                              = 15  ;
static const uint8_t P9N2_C_SYNC_CONFIG_PHASE_COUNTER_ON_CLKCHANGE                = 16  ;
static const uint8_t P9N2_C_SYNC_CONFIG_PHASE_COUNTER_ON_CLKCHANGE_LEN            = 8   ;

static const uint8_t P9N2_EX_L2_T0_PMU_SCOM_IDLE_DELAY                            = 0   ;
static const uint8_t P9N2_EX_L2_T0_PMU_SCOM_IDLE_DELAY_LEN                        = 9   ;
static const uint8_t P9N2_EX_L2_T0_PMU_SCOM_COMPLETION_DELAY                      = 9   ;
static const uint8_t P9N2_EX_L2_T0_PMU_SCOM_COMPLETION_DELAY_LEN                  = 9   ;
static const uint8_t P9N2_EX_L2_T0_PMU_SCOM_SAMPLE_OVERRIDE                       = 18  ;
static const uint8_t P9N2_EX_L2_T0_PMU_SCOM_SPARE_CTRL                            = 19  ;
static const uint8_t P9N2_EX_L2_T0_PMU_SCOM_SPARE_CTRL_LEN                        = 5   ;

static const uint8_t P9N2_C_T0_PMU_SCOM_IDLE_DELAY                                = 0   ;
static const uint8_t P9N2_C_T0_PMU_SCOM_IDLE_DELAY_LEN                            = 9   ;
static const uint8_t P9N2_C_T0_PMU_SCOM_COMPLETION_DELAY                          = 9   ;
static const uint8_t P9N2_C_T0_PMU_SCOM_COMPLETION_DELAY_LEN                      = 9   ;
static const uint8_t P9N2_C_T0_PMU_SCOM_SAMPLE_OVERRIDE                           = 18  ;
static const uint8_t P9N2_C_T0_PMU_SCOM_SPARE_CTRL                                = 19  ;
static const uint8_t P9N2_C_T0_PMU_SCOM_SPARE_CTRL_LEN                            = 5   ;

static const uint8_t P9N2_EX_L2_T1_PMU_SCOM_IDLE_DELAY                            = 0   ;
static const uint8_t P9N2_EX_L2_T1_PMU_SCOM_IDLE_DELAY_LEN                        = 9   ;
static const uint8_t P9N2_EX_L2_T1_PMU_SCOM_COMPLETION_DELAY                      = 9   ;
static const uint8_t P9N2_EX_L2_T1_PMU_SCOM_COMPLETION_DELAY_LEN                  = 9   ;
static const uint8_t P9N2_EX_L2_T1_PMU_SCOM_SAMPLE_OVERRIDE                       = 18  ;
static const uint8_t P9N2_EX_L2_T1_PMU_SCOM_SPARE_CTRL                            = 19  ;
static const uint8_t P9N2_EX_L2_T1_PMU_SCOM_SPARE_CTRL_LEN                        = 5   ;

static const uint8_t P9N2_C_T1_PMU_SCOM_IDLE_DELAY                                = 0   ;
static const uint8_t P9N2_C_T1_PMU_SCOM_IDLE_DELAY_LEN                            = 9   ;
static const uint8_t P9N2_C_T1_PMU_SCOM_COMPLETION_DELAY                          = 9   ;
static const uint8_t P9N2_C_T1_PMU_SCOM_COMPLETION_DELAY_LEN                      = 9   ;
static const uint8_t P9N2_C_T1_PMU_SCOM_SAMPLE_OVERRIDE                           = 18  ;
static const uint8_t P9N2_C_T1_PMU_SCOM_SPARE_CTRL                                = 19  ;
static const uint8_t P9N2_C_T1_PMU_SCOM_SPARE_CTRL_LEN                            = 5   ;

static const uint8_t P9N2_EX_L2_T2_PMU_SCOM_IDLE_DELAY                            = 0   ;
static const uint8_t P9N2_EX_L2_T2_PMU_SCOM_IDLE_DELAY_LEN                        = 9   ;
static const uint8_t P9N2_EX_L2_T2_PMU_SCOM_COMPLETION_DELAY                      = 9   ;
static const uint8_t P9N2_EX_L2_T2_PMU_SCOM_COMPLETION_DELAY_LEN                  = 9   ;
static const uint8_t P9N2_EX_L2_T2_PMU_SCOM_SAMPLE_OVERRIDE                       = 18  ;
static const uint8_t P9N2_EX_L2_T2_PMU_SCOM_SPARE_CTRL                            = 19  ;
static const uint8_t P9N2_EX_L2_T2_PMU_SCOM_SPARE_CTRL_LEN                        = 5   ;

static const uint8_t P9N2_C_T2_PMU_SCOM_IDLE_DELAY                                = 0   ;
static const uint8_t P9N2_C_T2_PMU_SCOM_IDLE_DELAY_LEN                            = 9   ;
static const uint8_t P9N2_C_T2_PMU_SCOM_COMPLETION_DELAY                          = 9   ;
static const uint8_t P9N2_C_T2_PMU_SCOM_COMPLETION_DELAY_LEN                      = 9   ;
static const uint8_t P9N2_C_T2_PMU_SCOM_SAMPLE_OVERRIDE                           = 18  ;
static const uint8_t P9N2_C_T2_PMU_SCOM_SPARE_CTRL                                = 19  ;
static const uint8_t P9N2_C_T2_PMU_SCOM_SPARE_CTRL_LEN                            = 5   ;

static const uint8_t P9N2_EX_L2_T3_PMU_SCOM_IDLE_DELAY                            = 0   ;
static const uint8_t P9N2_EX_L2_T3_PMU_SCOM_IDLE_DELAY_LEN                        = 9   ;
static const uint8_t P9N2_EX_L2_T3_PMU_SCOM_COMPLETION_DELAY                      = 9   ;
static const uint8_t P9N2_EX_L2_T3_PMU_SCOM_COMPLETION_DELAY_LEN                  = 9   ;
static const uint8_t P9N2_EX_L2_T3_PMU_SCOM_SAMPLE_OVERRIDE                       = 18  ;
static const uint8_t P9N2_EX_L2_T3_PMU_SCOM_SPARE_CTRL                            = 19  ;
static const uint8_t P9N2_EX_L2_T3_PMU_SCOM_SPARE_CTRL_LEN                        = 5   ;

static const uint8_t P9N2_C_T3_PMU_SCOM_IDLE_DELAY                                = 0   ;
static const uint8_t P9N2_C_T3_PMU_SCOM_IDLE_DELAY_LEN                            = 9   ;
static const uint8_t P9N2_C_T3_PMU_SCOM_COMPLETION_DELAY                          = 9   ;
static const uint8_t P9N2_C_T3_PMU_SCOM_COMPLETION_DELAY_LEN                      = 9   ;
static const uint8_t P9N2_C_T3_PMU_SCOM_SAMPLE_OVERRIDE                           = 18  ;
static const uint8_t P9N2_C_T3_PMU_SCOM_SPARE_CTRL                                = 19  ;
static const uint8_t P9N2_C_T3_PMU_SCOM_SPARE_CTRL_LEN                            = 5   ;

static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFC_CONTROL_TB41_HOLD_OUT           = 0   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFC_CONTROL_TB41_HOLD_OUT_LEN       = 2   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFC_FIRMWARE_CONTROL_TB41_HOLD_OUT  = 2   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFC_FIRMWARE_CONTROL_TB41_HOLD_OUT_LEN = 7   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFC_PARITY_TB41_HOLD_OUT            = 9   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFC_PARITY_TB41_HOLD_OUT_LEN        = 6   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFC_SPR_TOD_STEP_CHECK_HOLD_OUT     = 15  ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFC_SPR_TOD_STEP_CHECK_HOLD_OUT_LEN = 3   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFD_DEC_RESIDUE_NOPSAV_HOLD_OUT     = 18  ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFD_DEC_RESIDUE_NOPSAV_HOLD_OUT_LEN = 4   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFD_HDEC_RESIDUE_NOPSAV_HOLD_OUT    = 22  ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFP_PARITY_NOPSAV_HOLD_OUT          = 23  ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFP_PARITY_NOPSAV_HOLD_OUT_LEN      = 3   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFP_PUR_ACCUM_OFLOW_HOLD_OUT        = 26  ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFP_PUR_ACCUM_OFLOW_HOLD_OUT_LEN    = 4   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFP_SPURR_SCALE_LIMIT_SCALE_HOLD_OUT = 30  ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFR_PARITY_NOPSAV_HOLD_OUT          = 31  ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFR_PARITY_NOPSAV_HOLD_OUT_LEN      = 8   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFR_TX_PUR_OVERFLOW_OFLOW_HOLD_OUT  = 39  ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFR_TX_PUR_OVERFLOW_OFLOW_HOLD_OUT_LEN = 4   ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFR_TX_SPUR_OVERFLOW_OFLOW_HOLD_OUT = 43  ;
static const uint8_t P9N2_EX_L2_TFAC_HOLD_OUT_TFR_TX_SPUR_OVERFLOW_OFLOW_HOLD_OUT_LEN = 4   ;

static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFC_CONTROL_TB41_HOLD_OUT               = 0   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFC_CONTROL_TB41_HOLD_OUT_LEN           = 2   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFC_FIRMWARE_CONTROL_TB41_HOLD_OUT      = 2   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFC_FIRMWARE_CONTROL_TB41_HOLD_OUT_LEN  = 7   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFC_PARITY_TB41_HOLD_OUT                = 9   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFC_PARITY_TB41_HOLD_OUT_LEN            = 6   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFC_SPR_TOD_STEP_CHECK_HOLD_OUT         = 15  ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFC_SPR_TOD_STEP_CHECK_HOLD_OUT_LEN     = 3   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFD_DEC_RESIDUE_NOPSAV_HOLD_OUT         = 18  ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFD_DEC_RESIDUE_NOPSAV_HOLD_OUT_LEN     = 4   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFD_HDEC_RESIDUE_NOPSAV_HOLD_OUT        = 22  ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFP_PARITY_NOPSAV_HOLD_OUT              = 23  ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFP_PARITY_NOPSAV_HOLD_OUT_LEN          = 3   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFP_PUR_ACCUM_OFLOW_HOLD_OUT            = 26  ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFP_PUR_ACCUM_OFLOW_HOLD_OUT_LEN        = 4   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFP_SPURR_SCALE_LIMIT_SCALE_HOLD_OUT    = 30  ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFR_PARITY_NOPSAV_HOLD_OUT              = 31  ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFR_PARITY_NOPSAV_HOLD_OUT_LEN          = 8   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFR_TX_PUR_OVERFLOW_OFLOW_HOLD_OUT      = 39  ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFR_TX_PUR_OVERFLOW_OFLOW_HOLD_OUT_LEN  = 4   ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFR_TX_SPUR_OVERFLOW_OFLOW_HOLD_OUT     = 43  ;
static const uint8_t P9N2_C_TFAC_HOLD_OUT_TFR_TX_SPUR_OVERFLOW_OFLOW_HOLD_OUT_LEN = 4   ;

static const uint8_t P9N2_EQ_THERM_MODE_REG_DIS_CPM_BUBBLE_CORR                   = 0   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_FORCE_THRES_ACT                       = 1   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_THRES_TRIP_ENA                        = 2   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_THRES_TRIP_ENA_LEN                    = 3   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_DTS_SAMPLE_ENA                        = 5   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_SAMPLE_PULSE_CNT                      = 6   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_SAMPLE_PULSE_CNT_LEN                  = 4   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_THRES_ENA                             = 10  ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_THRES_ENA_LEN                         = 2   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_DTS_TRIGGER                           = 12  ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_DTS_TRIGGER_SEL                       = 13  ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_THRES_OVERFLOW_MASK                   = 14  ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_UNUSED                                = 15  ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_DTS_READ_SEL                          = 16  ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_DTS_READ_SEL_LEN                      = 4   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_DTS_ENABLE_L1                         = 20  ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_DTS_ENABLE_L1_LEN                     = 2   ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_THERM_CPM_ENABLE_L1                   = 35  ;
static const uint8_t P9N2_EQ_THERM_MODE_REG_THERM_CPM_ENABLE_L1_LEN               = 2   ;

static const uint8_t P9N2_EX_THERM_MODE_REG_DIS_CPM_BUBBLE_CORR                   = 0   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_FORCE_THRES_ACT                       = 1   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_THRES_TRIP_ENA                        = 2   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_THRES_TRIP_ENA_LEN                    = 3   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_DTS_SAMPLE_ENA                        = 5   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_SAMPLE_PULSE_CNT                      = 6   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_SAMPLE_PULSE_CNT_LEN                  = 4   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_THRES_ENA                             = 10  ;
static const uint8_t P9N2_EX_THERM_MODE_REG_THRES_ENA_LEN                         = 2   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_DTS_TRIGGER                           = 12  ;
static const uint8_t P9N2_EX_THERM_MODE_REG_DTS_TRIGGER_SEL                       = 13  ;
static const uint8_t P9N2_EX_THERM_MODE_REG_THRES_OVERFLOW_MASK                   = 14  ;
static const uint8_t P9N2_EX_THERM_MODE_REG_UNUSED                                = 15  ;
static const uint8_t P9N2_EX_THERM_MODE_REG_DTS_READ_SEL                          = 16  ;
static const uint8_t P9N2_EX_THERM_MODE_REG_DTS_READ_SEL_LEN                      = 4   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_DTS_ENABLE_L1                         = 20  ;
static const uint8_t P9N2_EX_THERM_MODE_REG_DTS_ENABLE_L1_LEN                     = 2   ;
static const uint8_t P9N2_EX_THERM_MODE_REG_THERM_CPM_ENABLE_L1                   = 35  ;
static const uint8_t P9N2_EX_THERM_MODE_REG_THERM_CPM_ENABLE_L1_LEN               = 2   ;

static const uint8_t P9N2_C_THERM_MODE_REG_DIS_CPM_BUBBLE_CORR                    = 0   ;
static const uint8_t P9N2_C_THERM_MODE_REG_FORCE_THRES_ACT                        = 1   ;
static const uint8_t P9N2_C_THERM_MODE_REG_THRES_TRIP_ENA                         = 2   ;
static const uint8_t P9N2_C_THERM_MODE_REG_THRES_TRIP_ENA_LEN                     = 3   ;
static const uint8_t P9N2_C_THERM_MODE_REG_DTS_SAMPLE_ENA                         = 5   ;
static const uint8_t P9N2_C_THERM_MODE_REG_SAMPLE_PULSE_CNT                       = 6   ;
static const uint8_t P9N2_C_THERM_MODE_REG_SAMPLE_PULSE_CNT_LEN                   = 4   ;
static const uint8_t P9N2_C_THERM_MODE_REG_THRES_ENA                              = 10  ;
static const uint8_t P9N2_C_THERM_MODE_REG_THRES_ENA_LEN                          = 2   ;
static const uint8_t P9N2_C_THERM_MODE_REG_DTS_TRIGGER                            = 12  ;
static const uint8_t P9N2_C_THERM_MODE_REG_DTS_TRIGGER_SEL                        = 13  ;
static const uint8_t P9N2_C_THERM_MODE_REG_THRES_OVERFLOW_MASK                    = 14  ;
static const uint8_t P9N2_C_THERM_MODE_REG_UNUSED                                 = 15  ;
static const uint8_t P9N2_C_THERM_MODE_REG_DTS_READ_SEL                           = 16  ;
static const uint8_t P9N2_C_THERM_MODE_REG_DTS_READ_SEL_LEN                       = 4   ;
static const uint8_t P9N2_C_THERM_MODE_REG_DTS_ENABLE_L1                          = 20  ;
static const uint8_t P9N2_C_THERM_MODE_REG_DTS_ENABLE_L1_LEN                      = 2   ;
static const uint8_t P9N2_C_THERM_MODE_REG_THERM_CPM_ENABLE_L1                    = 35  ;
static const uint8_t P9N2_C_THERM_MODE_REG_THERM_CPM_ENABLE_L1_LEN                = 2   ;

static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_CORE_HANG_DETECT_HOLD_OUT      = 0   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_CORE_HUNG_HOLD_OUT             = 1   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_CORE_STEP_HOLD_OUT             = 2   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_HANG_DETECT_STATE_HOLD_OUT     = 3   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_HANG_RECOV_HOLD_OUT            = 4   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_NEST_HANG_DETECT_HOLD_OUT      = 5   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_PPC_COMPLETE_HOLD_OUT          = 6   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_QUIESCE_ARB_STATE_HOLD_OUT     = 7   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_RECOV_IN_MAINT_HOLD_OUT        = 8   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_STOP_COMPLETE_IN_SUSPEND_HOLD_OUT = 9   ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T0_THREAD_CTL_STATE_HOLD_OUT      = 10  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_CORE_HANG_DETECT_HOLD_OUT      = 11  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_CORE_HUNG_HOLD_OUT             = 12  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_CORE_STEP_HOLD_OUT             = 13  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_HANG_DETECT_STATE_HOLD_OUT     = 14  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_HANG_RECOV_HOLD_OUT            = 15  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_NEST_HANG_DETECT_HOLD_OUT      = 16  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_PPC_COMPLETE_HOLD_OUT          = 17  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_QUIESCE_ARB_STATE_HOLD_OUT     = 18  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_RECOV_IN_MAINT_HOLD_OUT        = 19  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_STOP_COMPLETE_IN_SUSPEND_HOLD_OUT = 20  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T1_THREAD_CTL_STATE_HOLD_OUT      = 21  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_CORE_HANG_DETECT_HOLD_OUT      = 22  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_CORE_HUNG_HOLD_OUT             = 23  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_CORE_STEP_HOLD_OUT             = 24  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_HANG_DETECT_STATE_HOLD_OUT     = 25  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_HANG_RECOV_HOLD_OUT            = 26  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_NEST_HANG_DETECT_HOLD_OUT      = 27  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_PPC_COMPLETE_HOLD_OUT          = 28  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_QUIESCE_ARB_STATE_HOLD_OUT     = 29  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_RECOV_IN_MAINT_HOLD_OUT        = 30  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_STOP_COMPLETE_IN_SUSPEND_HOLD_OUT = 31  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T2_THREAD_CTL_STATE_HOLD_OUT      = 32  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_CORE_HANG_DETECT_HOLD_OUT      = 33  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_CORE_HUNG_HOLD_OUT             = 34  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_CORE_STEP_HOLD_OUT             = 35  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_HANG_DETECT_STATE_HOLD_OUT     = 36  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_HANG_RECOV_HOLD_OUT            = 37  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_NEST_HANG_DETECT_HOLD_OUT      = 38  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_PPC_COMPLETE_HOLD_OUT          = 39  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_QUIESCE_ARB_STATE_HOLD_OUT     = 40  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_RECOV_IN_MAINT_HOLD_OUT        = 41  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_STOP_COMPLETE_IN_SUSPEND_HOLD_OUT = 42  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_T3_THREAD_CTL_STATE_HOLD_OUT      = 43  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_HID_PAR_HOLD_OUT                  = 44  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_THRCTL_SCOM_HOLD_OUT              = 45  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_VT0_PSSCR_ESL_PAR_HOLD_OUT        = 46  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_VT1_PSSCR_ESL_PAR_HOLD_OUT        = 47  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_VT2_PSSCR_ESL_PAR_HOLD_OUT        = 48  ;
static const uint8_t P9N2_EX_L2_THRCTL_HOLD_OUT_VT3_PSSCR_ESL_PAR_HOLD_OUT        = 49  ;

static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_CORE_HANG_DETECT_HOLD_OUT          = 0   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_CORE_HUNG_HOLD_OUT                 = 1   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_CORE_STEP_HOLD_OUT                 = 2   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_HANG_DETECT_STATE_HOLD_OUT         = 3   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_HANG_RECOV_HOLD_OUT                = 4   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_NEST_HANG_DETECT_HOLD_OUT          = 5   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_PPC_COMPLETE_HOLD_OUT              = 6   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_QUIESCE_ARB_STATE_HOLD_OUT         = 7   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_RECOV_IN_MAINT_HOLD_OUT            = 8   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_STOP_COMPLETE_IN_SUSPEND_HOLD_OUT  = 9   ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T0_THREAD_CTL_STATE_HOLD_OUT          = 10  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_CORE_HANG_DETECT_HOLD_OUT          = 11  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_CORE_HUNG_HOLD_OUT                 = 12  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_CORE_STEP_HOLD_OUT                 = 13  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_HANG_DETECT_STATE_HOLD_OUT         = 14  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_HANG_RECOV_HOLD_OUT                = 15  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_NEST_HANG_DETECT_HOLD_OUT          = 16  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_PPC_COMPLETE_HOLD_OUT              = 17  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_QUIESCE_ARB_STATE_HOLD_OUT         = 18  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_RECOV_IN_MAINT_HOLD_OUT            = 19  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_STOP_COMPLETE_IN_SUSPEND_HOLD_OUT  = 20  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T1_THREAD_CTL_STATE_HOLD_OUT          = 21  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_CORE_HANG_DETECT_HOLD_OUT          = 22  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_CORE_HUNG_HOLD_OUT                 = 23  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_CORE_STEP_HOLD_OUT                 = 24  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_HANG_DETECT_STATE_HOLD_OUT         = 25  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_HANG_RECOV_HOLD_OUT                = 26  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_NEST_HANG_DETECT_HOLD_OUT          = 27  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_PPC_COMPLETE_HOLD_OUT              = 28  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_QUIESCE_ARB_STATE_HOLD_OUT         = 29  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_RECOV_IN_MAINT_HOLD_OUT            = 30  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_STOP_COMPLETE_IN_SUSPEND_HOLD_OUT  = 31  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T2_THREAD_CTL_STATE_HOLD_OUT          = 32  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_CORE_HANG_DETECT_HOLD_OUT          = 33  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_CORE_HUNG_HOLD_OUT                 = 34  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_CORE_STEP_HOLD_OUT                 = 35  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_HANG_DETECT_STATE_HOLD_OUT         = 36  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_HANG_RECOV_HOLD_OUT                = 37  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_NEST_HANG_DETECT_HOLD_OUT          = 38  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_PPC_COMPLETE_HOLD_OUT              = 39  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_QUIESCE_ARB_STATE_HOLD_OUT         = 40  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_RECOV_IN_MAINT_HOLD_OUT            = 41  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_STOP_COMPLETE_IN_SUSPEND_HOLD_OUT  = 42  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_T3_THREAD_CTL_STATE_HOLD_OUT          = 43  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_HID_PAR_HOLD_OUT                      = 44  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_THRCTL_SCOM_HOLD_OUT                  = 45  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_VT0_PSSCR_ESL_PAR_HOLD_OUT            = 46  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_VT1_PSSCR_ESL_PAR_HOLD_OUT            = 47  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_VT2_PSSCR_ESL_PAR_HOLD_OUT            = 48  ;
static const uint8_t P9N2_C_THRCTL_HOLD_OUT_VT3_PSSCR_ESL_PAR_HOLD_OUT            = 49  ;

static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID0_V                               = 0   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID1_V                               = 1   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID2_V                               = 2   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID3_V                               = 3   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_PTID0_V                               = 4   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_PTID1_V                               = 5   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_PTID2_V                               = 6   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_PTID3_V                               = 7   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_SMT_MODE                              = 8   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_SMT_MODE_LEN                          = 2   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID0_TO_PTID_MAP                     = 10  ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID0_TO_PTID_MAP_LEN                 = 2   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID1_TO_PTID_MAP                     = 12  ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID1_TO_PTID_MAP_LEN                 = 2   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID2_TO_PTID_MAP                     = 14  ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID2_TO_PTID_MAP_LEN                 = 2   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID3_TO_PTID_MAP                     = 16  ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_VTID3_TO_PTID_MAP_LEN                 = 2   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_RAM_THREAD_ACTIVE                     = 18  ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_RAM_THREAD_ACTIVE_LEN                 = 4   ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_PSCOM_PURGE                           = 22  ;
static const uint8_t P9N2_EX_L2_THREAD_INFO_THREAD_ACTION_IN_PROGRESS             = 23  ;

static const uint8_t P9N2_C_THREAD_INFO_VTID0_V                                   = 0   ;
static const uint8_t P9N2_C_THREAD_INFO_VTID1_V                                   = 1   ;
static const uint8_t P9N2_C_THREAD_INFO_VTID2_V                                   = 2   ;
static const uint8_t P9N2_C_THREAD_INFO_VTID3_V                                   = 3   ;
static const uint8_t P9N2_C_THREAD_INFO_PTID0_V                                   = 4   ;
static const uint8_t P9N2_C_THREAD_INFO_PTID1_V                                   = 5   ;
static const uint8_t P9N2_C_THREAD_INFO_PTID2_V                                   = 6   ;
static const uint8_t P9N2_C_THREAD_INFO_PTID3_V                                   = 7   ;
static const uint8_t P9N2_C_THREAD_INFO_SMT_MODE                                  = 8   ;
static const uint8_t P9N2_C_THREAD_INFO_SMT_MODE_LEN                              = 2   ;
static const uint8_t P9N2_C_THREAD_INFO_VTID0_TO_PTID_MAP                         = 10  ;
static const uint8_t P9N2_C_THREAD_INFO_VTID0_TO_PTID_MAP_LEN                     = 2   ;
static const uint8_t P9N2_C_THREAD_INFO_VTID1_TO_PTID_MAP                         = 12  ;
static const uint8_t P9N2_C_THREAD_INFO_VTID1_TO_PTID_MAP_LEN                     = 2   ;
static const uint8_t P9N2_C_THREAD_INFO_VTID2_TO_PTID_MAP                         = 14  ;
static const uint8_t P9N2_C_THREAD_INFO_VTID2_TO_PTID_MAP_LEN                     = 2   ;
static const uint8_t P9N2_C_THREAD_INFO_VTID3_TO_PTID_MAP                         = 16  ;
static const uint8_t P9N2_C_THREAD_INFO_VTID3_TO_PTID_MAP_LEN                     = 2   ;
static const uint8_t P9N2_C_THREAD_INFO_RAM_THREAD_ACTIVE                         = 18  ;
static const uint8_t P9N2_C_THREAD_INFO_RAM_THREAD_ACTIVE_LEN                     = 4   ;
static const uint8_t P9N2_C_THREAD_INFO_PSCOM_PURGE                               = 22  ;
static const uint8_t P9N2_C_THREAD_INFO_THREAD_ACTION_IN_PROGRESS                 = 23  ;

static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_DIDT_THROTTLE                  = 0   ;
static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_DIDT_THROTTLE_LEN              = 2   ;
static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_DIDT_TRIGGER_ENABLE            = 2   ;
static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_CORE_SLOWDOWN                  = 3   ;
static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_FORCE_DYN_SUPPRESS             = 4   ;
static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_DYN_SUPPRESS_ON_THROTTLE       = 5   ;
static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_DISABLE_DROOP                  = 6   ;
static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_DISABLE_DROOP_LEN              = 3   ;
static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_DROOP_MODE_DISABLE             = 9   ;
static const uint8_t P9N2_EX_THROTTLE_CONTROL_SCOM_DROOP_MODE_DISABLE_LEN         = 2   ;

static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_DIDT_THROTTLE                   = 0   ;
static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_DIDT_THROTTLE_LEN               = 2   ;
static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_DIDT_TRIGGER_ENABLE             = 2   ;
static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_CORE_SLOWDOWN                   = 3   ;
static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_FORCE_DYN_SUPPRESS              = 4   ;
static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_DYN_SUPPRESS_ON_THROTTLE        = 5   ;
static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_DISABLE_DROOP                   = 6   ;
static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_DISABLE_DROOP_LEN               = 3   ;
static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_DROOP_MODE_DISABLE              = 9   ;
static const uint8_t P9N2_C_THROTTLE_CONTROL_SCOM_DROOP_MODE_DISABLE_LEN          = 2   ;

static const uint8_t P9N2_EQ_TIMEOUT_REG_INT_TIMEOUT                              = 0   ;
static const uint8_t P9N2_EQ_TIMEOUT_REG_INT_TIMEOUT_LEN                          = 2   ;

static const uint8_t P9N2_EX_TIMEOUT_REG_INT_TIMEOUT                              = 0   ;
static const uint8_t P9N2_EX_TIMEOUT_REG_INT_TIMEOUT_LEN                          = 2   ;

static const uint8_t P9N2_C_TIMEOUT_REG_INT_TIMEOUT                               = 0   ;
static const uint8_t P9N2_C_TIMEOUT_REG_INT_TIMEOUT_LEN                           = 2   ;

static const uint8_t P9N2_EQ_TIMESTAMP_COUNTER_READ_VALUE                         = 0   ;
static const uint8_t P9N2_EQ_TIMESTAMP_COUNTER_READ_VALUE_LEN                     = 44  ;
static const uint8_t P9N2_EQ_TIMESTAMP_COUNTER_READ_OVERFLOW_ERR                  = 44  ;

static const uint8_t P9N2_EX_TIMESTAMP_COUNTER_READ_VALUE                         = 0   ;
static const uint8_t P9N2_EX_TIMESTAMP_COUNTER_READ_VALUE_LEN                     = 44  ;
static const uint8_t P9N2_EX_TIMESTAMP_COUNTER_READ_OVERFLOW_ERR                  = 44  ;

static const uint8_t P9N2_C_TIMESTAMP_COUNTER_READ_VALUE                          = 0   ;
static const uint8_t P9N2_C_TIMESTAMP_COUNTER_READ_VALUE_LEN                      = 44  ;
static const uint8_t P9N2_C_TIMESTAMP_COUNTER_READ_OVERFLOW_ERR                   = 44  ;

static const uint8_t P9N2_EX_L2_TOD_READ_TIMEBASE                                 = 0   ;
static const uint8_t P9N2_EX_L2_TOD_READ_TIMEBASE_LEN                             = 60  ;

static const uint8_t P9N2_C_TOD_READ_TIMEBASE                                     = 0   ;
static const uint8_t P9N2_C_TOD_READ_TIMEBASE_LEN                                 = 60  ;

static const uint8_t P9N2_EX_L2_TOD_SYNC000_TIMEBASE                              = 0   ;
static const uint8_t P9N2_EX_L2_TOD_SYNC000_TIMEBASE_LEN                          = 55  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC000_CHIP_STATUS                           = 60  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC000_CHIP_STATUS_LEN                       = 4   ;

static const uint8_t P9N2_C_TOD_SYNC000_TIMEBASE                                  = 0   ;
static const uint8_t P9N2_C_TOD_SYNC000_TIMEBASE_LEN                              = 55  ;
static const uint8_t P9N2_C_TOD_SYNC000_CHIP_STATUS                               = 60  ;
static const uint8_t P9N2_C_TOD_SYNC000_CHIP_STATUS_LEN                           = 4   ;

static const uint8_t P9N2_EX_L2_TOD_SYNC001_TIMEBASE                              = 0   ;
static const uint8_t P9N2_EX_L2_TOD_SYNC001_TIMEBASE_LEN                          = 54  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC001_CHIP_STATUS                           = 60  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC001_CHIP_STATUS_LEN                       = 4   ;

static const uint8_t P9N2_C_TOD_SYNC001_TIMEBASE                                  = 0   ;
static const uint8_t P9N2_C_TOD_SYNC001_TIMEBASE_LEN                              = 54  ;
static const uint8_t P9N2_C_TOD_SYNC001_CHIP_STATUS                               = 60  ;
static const uint8_t P9N2_C_TOD_SYNC001_CHIP_STATUS_LEN                           = 4   ;

static const uint8_t P9N2_EX_L2_TOD_SYNC010_TIMEBASE                              = 0   ;
static const uint8_t P9N2_EX_L2_TOD_SYNC010_TIMEBASE_LEN                          = 53  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC010_CHIP_STATUS                           = 60  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC010_CHIP_STATUS_LEN                       = 4   ;

static const uint8_t P9N2_C_TOD_SYNC010_TIMEBASE                                  = 0   ;
static const uint8_t P9N2_C_TOD_SYNC010_TIMEBASE_LEN                              = 53  ;
static const uint8_t P9N2_C_TOD_SYNC010_CHIP_STATUS                               = 60  ;
static const uint8_t P9N2_C_TOD_SYNC010_CHIP_STATUS_LEN                           = 4   ;

static const uint8_t P9N2_EX_L2_TOD_SYNC011_TIMEBASE                              = 0   ;
static const uint8_t P9N2_EX_L2_TOD_SYNC011_TIMEBASE_LEN                          = 52  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC011_CHIP_STATUS                           = 60  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC011_CHIP_STATUS_LEN                       = 4   ;

static const uint8_t P9N2_C_TOD_SYNC011_TIMEBASE                                  = 0   ;
static const uint8_t P9N2_C_TOD_SYNC011_TIMEBASE_LEN                              = 52  ;
static const uint8_t P9N2_C_TOD_SYNC011_CHIP_STATUS                               = 60  ;
static const uint8_t P9N2_C_TOD_SYNC011_CHIP_STATUS_LEN                           = 4   ;

static const uint8_t P9N2_EX_L2_TOD_SYNC100_TIMEBASE                              = 0   ;
static const uint8_t P9N2_EX_L2_TOD_SYNC100_TIMEBASE_LEN                          = 51  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC100_CHIP_STATUS                           = 60  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC100_CHIP_STATUS_LEN                       = 4   ;

static const uint8_t P9N2_C_TOD_SYNC100_TIMEBASE                                  = 0   ;
static const uint8_t P9N2_C_TOD_SYNC100_TIMEBASE_LEN                              = 51  ;
static const uint8_t P9N2_C_TOD_SYNC100_CHIP_STATUS                               = 60  ;
static const uint8_t P9N2_C_TOD_SYNC100_CHIP_STATUS_LEN                           = 4   ;

static const uint8_t P9N2_EX_L2_TOD_SYNC101_TIMEBASE                              = 0   ;
static const uint8_t P9N2_EX_L2_TOD_SYNC101_TIMEBASE_LEN                          = 50  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC101_CHIP_STATUS                           = 60  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC101_CHIP_STATUS_LEN                       = 4   ;

static const uint8_t P9N2_C_TOD_SYNC101_TIMEBASE                                  = 0   ;
static const uint8_t P9N2_C_TOD_SYNC101_TIMEBASE_LEN                              = 50  ;
static const uint8_t P9N2_C_TOD_SYNC101_CHIP_STATUS                               = 60  ;
static const uint8_t P9N2_C_TOD_SYNC101_CHIP_STATUS_LEN                           = 4   ;

static const uint8_t P9N2_EX_L2_TOD_SYNC110_TIMEBASE                              = 0   ;
static const uint8_t P9N2_EX_L2_TOD_SYNC110_TIMEBASE_LEN                          = 49  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC110_CHIP_STATUS                           = 60  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC110_CHIP_STATUS_LEN                       = 4   ;

static const uint8_t P9N2_C_TOD_SYNC110_TIMEBASE                                  = 0   ;
static const uint8_t P9N2_C_TOD_SYNC110_TIMEBASE_LEN                              = 49  ;
static const uint8_t P9N2_C_TOD_SYNC110_CHIP_STATUS                               = 60  ;
static const uint8_t P9N2_C_TOD_SYNC110_CHIP_STATUS_LEN                           = 4   ;

static const uint8_t P9N2_EX_L2_TOD_SYNC111_TIMEBASE                              = 0   ;
static const uint8_t P9N2_EX_L2_TOD_SYNC111_TIMEBASE_LEN                          = 48  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC111_CHIP_STATUS                           = 60  ;
static const uint8_t P9N2_EX_L2_TOD_SYNC111_CHIP_STATUS_LEN                       = 4   ;

static const uint8_t P9N2_C_TOD_SYNC111_TIMEBASE                                  = 0   ;
static const uint8_t P9N2_C_TOD_SYNC111_TIMEBASE_LEN                              = 48  ;
static const uint8_t P9N2_C_TOD_SYNC111_CHIP_STATUS                               = 60  ;
static const uint8_t P9N2_C_TOD_SYNC111_CHIP_STATUS_LEN                           = 4   ;

static const uint8_t P9N2_EQ_TRACE_HI_DATA_REG_DATA                               = 0   ;
static const uint8_t P9N2_EQ_TRACE_HI_DATA_REG_DATA_LEN                           = 64  ;

static const uint8_t P9N2_EX_TRACE_HI_DATA_REG_DATA                               = 0   ;
static const uint8_t P9N2_EX_TRACE_HI_DATA_REG_DATA_LEN                           = 64  ;

static const uint8_t P9N2_C_TRACE_HI_DATA_REG_DATA                                = 0   ;
static const uint8_t P9N2_C_TRACE_HI_DATA_REG_DATA_LEN                            = 64  ;

static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_DATA                               = 0   ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_DATA_LEN                           = 32  ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_ADDRESS                            = 32  ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_ADDRESS_LEN                        = 10  ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_LAST_BANK                          = 42  ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_LAST_BANK_LEN                      = 9   ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_LAST_BANK_VALID                    = 51  ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_WRITE_ON_RUN                       = 52  ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_RUNNING                            = 53  ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_HOLD_ADDRESS                       = 54  ;
static const uint8_t P9N2_EQ_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN                   = 10  ;

static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_DATA                               = 0   ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_DATA_LEN                           = 32  ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_ADDRESS                            = 32  ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_ADDRESS_LEN                        = 10  ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_LAST_BANK                          = 42  ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_LAST_BANK_LEN                      = 9   ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_LAST_BANK_VALID                    = 51  ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_WRITE_ON_RUN                       = 52  ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_RUNNING                            = 53  ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_HOLD_ADDRESS                       = 54  ;
static const uint8_t P9N2_EX_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN                   = 10  ;

static const uint8_t P9N2_C_TRACE_LO_DATA_REG_DATA                                = 0   ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_DATA_LEN                            = 32  ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_ADDRESS                             = 32  ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_ADDRESS_LEN                         = 10  ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_LAST_BANK                           = 42  ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_LAST_BANK_LEN                       = 9   ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_LAST_BANK_VALID                     = 51  ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_WRITE_ON_RUN                        = 52  ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_RUNNING                             = 53  ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_HOLD_ADDRESS                        = 54  ;
static const uint8_t P9N2_C_TRACE_LO_DATA_REG_HOLD_ADDRESS_LEN                    = 10  ;

static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE               = 0   ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE                = 1   ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_EXTEND_TRIG_MODE                 = 2   ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_EXTEND_TRIG_MODE_LEN             = 8   ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_BANK_MODE                        = 10  ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_ENH_MODE                         = 11  ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_LOCAL_CLOCK_GATE_CONTROL         = 12  ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_LOCAL_CLOCK_GATE_CONTROL_LEN     = 2   ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_SELECT_CONTROL                   = 14  ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_SELECT_CONTROL_LEN               = 4   ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_RUN_HOLD_OFF                     = 18  ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_RUN_STATUS                       = 19  ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_RUN_STICKY                       = 20  ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_DISABLE_BANK_EDGE_DETECT         = 21  ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_CONTROL_UNUSED                   = 22  ;
static const uint8_t P9N2_EQ_TRACE_TRCTRL_CONFIG_CONTROL_UNUSED_LEN               = 6   ;

static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE               = 0   ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE                = 1   ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_EXTEND_TRIG_MODE                 = 2   ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_EXTEND_TRIG_MODE_LEN             = 8   ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_BANK_MODE                        = 10  ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_ENH_MODE                         = 11  ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_LOCAL_CLOCK_GATE_CONTROL         = 12  ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_LOCAL_CLOCK_GATE_CONTROL_LEN     = 2   ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_SELECT_CONTROL                   = 14  ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_SELECT_CONTROL_LEN               = 4   ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_RUN_HOLD_OFF                     = 18  ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_RUN_STATUS                       = 19  ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_RUN_STICKY                       = 20  ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_DISABLE_BANK_EDGE_DETECT         = 21  ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_CONTROL_UNUSED                   = 22  ;
static const uint8_t P9N2_EX_TRACE_TRCTRL_CONFIG_CONTROL_UNUSED_LEN               = 6   ;

static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_STORE_ON_TRIG_MODE                = 0   ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_WRITE_ON_RUN_MODE                 = 1   ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_EXTEND_TRIG_MODE                  = 2   ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_EXTEND_TRIG_MODE_LEN              = 8   ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_BANK_MODE                         = 10  ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_ENH_MODE                          = 11  ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_LOCAL_CLOCK_GATE_CONTROL          = 12  ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_LOCAL_CLOCK_GATE_CONTROL_LEN      = 2   ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_SELECT_CONTROL                    = 14  ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_SELECT_CONTROL_LEN                = 4   ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_RUN_HOLD_OFF                      = 18  ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_RUN_STATUS                        = 19  ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_RUN_STICKY                        = 20  ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_DISABLE_BANK_EDGE_DETECT          = 21  ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_CONTROL_UNUSED                    = 22  ;
static const uint8_t P9N2_C_TRACE_TRCTRL_CONFIG_CONTROL_UNUSED_LEN                = 6   ;

static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63             = 0   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN         = 64  ;

static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63             = 0   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN         = 64  ;

static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63              = 0   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_0_CMP_MSK_LT_B_TO_63_LEN          = 64  ;

static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87          = 0   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN      = 24  ;

static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87          = 0   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN      = 24  ;

static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87           = 0   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_1_CMP_MSK_LT_B_64_TO_87_LEN       = 24  ;

static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_2_PATTERNA                       = 0   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN                   = 24  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_2_PATTERNB                       = 24  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN                   = 24  ;

static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_2_PATTERNA                       = 0   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN                   = 24  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_2_PATTERNB                       = 24  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN                   = 24  ;

static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_2_PATTERNA                        = 0   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_2_PATTERNA_LEN                    = 24  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_2_PATTERNB                        = 24  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_2_PATTERNB_LEN                    = 24  ;

static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_3_PATTERNC                       = 0   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN                   = 24  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_3_PATTERND                       = 24  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_3_PATTERND_LEN                   = 24  ;

static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_3_PATTERNC                       = 0   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN                   = 24  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_3_PATTERND                       = 24  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_3_PATTERND_LEN                   = 24  ;

static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_3_PATTERNC                        = 0   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_3_PATTERNC_LEN                    = 24  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_3_PATTERND                        = 24  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_3_PATTERND_LEN                    = 24  ;

static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_4_MASKA                          = 0   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_4_MASKA_LEN                      = 24  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_4_MASKB                          = 24  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_4_MASKB_LEN                      = 24  ;

static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_4_MASKA                          = 0   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_4_MASKA_LEN                      = 24  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_4_MASKB                          = 24  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_4_MASKB_LEN                      = 24  ;

static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_4_MASKA                           = 0   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_4_MASKA_LEN                       = 24  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_4_MASKB                           = 24  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_4_MASKB_LEN                       = 24  ;

static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_5_MASKC                          = 0   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_5_MASKC_LEN                      = 24  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_5_MASKD                          = 24  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_5_MASKD_LEN                      = 24  ;

static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_5_MASKC                          = 0   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_5_MASKC_LEN                      = 24  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_5_MASKD                          = 24  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_5_MASKD_LEN                      = 24  ;

static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_5_MASKC                           = 0   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_5_MASKC_LEN                       = 24  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_5_MASKD                           = 24  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_5_MASKD_LEN                       = 24  ;

static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION            = 0   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK = 1   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL                  = 2   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN              = 2   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL                  = 4   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN              = 2   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL                  = 6   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN              = 2   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL                  = 8   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN              = 2   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK                  = 10  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN              = 4   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK                 = 14  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN             = 4   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK                  = 18  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN              = 4   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK                 = 22  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN             = 4   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE                 = 26  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE                 = 27  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE                 = 28  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN             = 4   ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_ERROR_CMP_MASK                 = 32  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_ERROR_CMP_PATTERN              = 33  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG0_ERR_CMP                  = 34  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_TRIG1_ERR_CMP                  = 35  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_DD1_STRETCH_TRIGGER_PULSES     = 36  ;
static const uint8_t P9N2_EQ_TRACE_TRDATA_CONFIG_9_SPARE_LT                       = 37  ;

static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION            = 0   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK = 1   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL                  = 2   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN              = 2   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL                  = 4   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN              = 2   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL                  = 6   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN              = 2   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL                  = 8   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN              = 2   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK                  = 10  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN              = 4   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK                 = 14  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN             = 4   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK                  = 18  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN              = 4   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK                 = 22  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN             = 4   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE                 = 26  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE                 = 27  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE                 = 28  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN             = 4   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_ERROR_MODE_LT                  = 32  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_ERROR_MODE_LT_LEN              = 4   ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_DD1_STRETCH_TRIGGER_PULSES     = 36  ;
static const uint8_t P9N2_EX_TRACE_TRDATA_CONFIG_9_SPARE_LT                       = 37  ;

static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_DISABLE_COMPRESSION             = 0   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_ERROR_BIT_COMPRESSION_CARE_MASK = 1   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL                   = 2   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCHA_MUXSEL_LEN               = 2   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL                   = 4   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCHB_MUXSEL_LEN               = 2   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL                   = 6   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCHC_MUXSEL_LEN               = 2   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL                   = 8   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCHD_MUXSEL_LEN               = 2   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK                   = 10  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG0_OR_MASK_LEN               = 4   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK                  = 14  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG0_AND_MASK_LEN              = 4   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK                   = 18  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG1_OR_MASK_LEN               = 4   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK                  = 22  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG1_AND_MASK_LEN              = 4   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG0_NOT_MODE                  = 26  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_TRIG1_NOT_MODE                  = 27  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE                  = 28  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_MATCH_NOT_MODE_LEN              = 4   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_ERROR_MODE_LT                   = 32  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_ERROR_MODE_LT_LEN               = 4   ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_DD1_STRETCH_TRIGGER_PULSES      = 36  ;
static const uint8_t P9N2_C_TRACE_TRDATA_CONFIG_9_SPARE_LT                        = 37  ;

static const uint8_t P9N2_EX_V0_HMER_MALFUNCTION_ALERT                            = 0   ;
static const uint8_t P9N2_EX_V0_HMER_CME_REQUEST                                  = 1   ;
static const uint8_t P9N2_EX_V0_HMER_PROC_RCVY_DONE                               = 2   ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_3                                      = 3   ;
static const uint8_t P9N2_EX_V0_HMER_TFAC_ERR                                     = 4   ;
static const uint8_t P9N2_EX_V0_HMER_TFMR_PARITY_ERR                              = 5   ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_6                                      = 6   ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_7                                      = 7   ;
static const uint8_t P9N2_EX_V0_HMER_XSCOM_FAIL                                   = 8   ;
static const uint8_t P9N2_EX_V0_HMER_XSCOM_DONE                                   = 9   ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_10                                     = 10  ;
static const uint8_t P9N2_EX_V0_HMER_PROC_RCVY_AGAIN                              = 11  ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_12                                     = 12  ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_13                                     = 13  ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_14                                     = 14  ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_15                                     = 15  ;
static const uint8_t P9N2_EX_V0_HMER_SCOM_FIR_HMI                                 = 16  ;
static const uint8_t P9N2_EX_V0_HMER_TRIG_FIR_HMI                                 = 17  ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_18                                     = 18  ;
static const uint8_t P9N2_EX_V0_HMER_SPARE_19                                     = 19  ;
static const uint8_t P9N2_EX_V0_HMER_HYP_RECOURCE_ERR                             = 20  ;
static const uint8_t P9N2_EX_V0_HMER_XSCOM_STATUS                                 = 21  ;
static const uint8_t P9N2_EX_V0_HMER_XSCOM_STATUS_LEN                             = 3   ;

static const uint8_t P9N2_EX_L2_V0_HMER_MALFUNCTION_ALERT                         = 0   ;
static const uint8_t P9N2_EX_L2_V0_HMER_CME_REQUEST                               = 1   ;
static const uint8_t P9N2_EX_L2_V0_HMER_PROC_RCVY_DONE                            = 2   ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_3                                   = 3   ;
static const uint8_t P9N2_EX_L2_V0_HMER_TFAC_ERR                                  = 4   ;
static const uint8_t P9N2_EX_L2_V0_HMER_TFMR_PARITY_ERR                           = 5   ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_6                                   = 6   ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_7                                   = 7   ;
static const uint8_t P9N2_EX_L2_V0_HMER_XSCOM_FAIL                                = 8   ;
static const uint8_t P9N2_EX_L2_V0_HMER_XSCOM_DONE                                = 9   ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_10                                  = 10  ;
static const uint8_t P9N2_EX_L2_V0_HMER_PROC_RCVY_AGAIN                           = 11  ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_12                                  = 12  ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_13                                  = 13  ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_14                                  = 14  ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_15                                  = 15  ;
static const uint8_t P9N2_EX_L2_V0_HMER_SCOM_FIR_HMI                              = 16  ;
static const uint8_t P9N2_EX_L2_V0_HMER_TRIG_FIR_HMI                              = 17  ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_18                                  = 18  ;
static const uint8_t P9N2_EX_L2_V0_HMER_SPARE_19                                  = 19  ;
static const uint8_t P9N2_EX_L2_V0_HMER_HYP_RECOURCE_ERR                          = 20  ;
static const uint8_t P9N2_EX_L2_V0_HMER_XSCOM_STATUS                              = 21  ;
static const uint8_t P9N2_EX_L2_V0_HMER_XSCOM_STATUS_LEN                          = 3   ;

static const uint8_t P9N2_C_V0_HMER_MALFUNCTION_ALERT                             = 0   ;
static const uint8_t P9N2_C_V0_HMER_CME_REQUEST                                   = 1   ;
static const uint8_t P9N2_C_V0_HMER_PROC_RCVY_DONE                                = 2   ;
static const uint8_t P9N2_C_V0_HMER_SPARE_3                                       = 3   ;
static const uint8_t P9N2_C_V0_HMER_TFAC_ERR                                      = 4   ;
static const uint8_t P9N2_C_V0_HMER_TFMR_PARITY_ERR                               = 5   ;
static const uint8_t P9N2_C_V0_HMER_SPARE_6                                       = 6   ;
static const uint8_t P9N2_C_V0_HMER_SPARE_7                                       = 7   ;
static const uint8_t P9N2_C_V0_HMER_XSCOM_FAIL                                    = 8   ;
static const uint8_t P9N2_C_V0_HMER_XSCOM_DONE                                    = 9   ;
static const uint8_t P9N2_C_V0_HMER_SPARE_10                                      = 10  ;
static const uint8_t P9N2_C_V0_HMER_PROC_RCVY_AGAIN                               = 11  ;
static const uint8_t P9N2_C_V0_HMER_SPARE_12                                      = 12  ;
static const uint8_t P9N2_C_V0_HMER_SPARE_13                                      = 13  ;
static const uint8_t P9N2_C_V0_HMER_SPARE_14                                      = 14  ;
static const uint8_t P9N2_C_V0_HMER_SPARE_15                                      = 15  ;
static const uint8_t P9N2_C_V0_HMER_SCOM_FIR_HMI                                  = 16  ;
static const uint8_t P9N2_C_V0_HMER_TRIG_FIR_HMI                                  = 17  ;
static const uint8_t P9N2_C_V0_HMER_SPARE_18                                      = 18  ;
static const uint8_t P9N2_C_V0_HMER_SPARE_19                                      = 19  ;
static const uint8_t P9N2_C_V0_HMER_HYP_RECOURCE_ERR                              = 20  ;
static const uint8_t P9N2_C_V0_HMER_XSCOM_STATUS                                  = 21  ;
static const uint8_t P9N2_C_V0_HMER_XSCOM_STATUS_LEN                              = 3   ;

static const uint8_t P9N2_EX_V1_HMER_MALFUNCTION_ALERT                            = 0   ;
static const uint8_t P9N2_EX_V1_HMER_CME_REQUEST                                  = 1   ;
static const uint8_t P9N2_EX_V1_HMER_PROC_RCVY_DONE                               = 2   ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_3                                      = 3   ;
static const uint8_t P9N2_EX_V1_HMER_TFAC_ERR                                     = 4   ;
static const uint8_t P9N2_EX_V1_HMER_TFMR_PARITY_ERR                              = 5   ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_6                                      = 6   ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_7                                      = 7   ;
static const uint8_t P9N2_EX_V1_HMER_XSCOM_FAIL                                   = 8   ;
static const uint8_t P9N2_EX_V1_HMER_XSCOM_DONE                                   = 9   ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_10                                     = 10  ;
static const uint8_t P9N2_EX_V1_HMER_PROC_RCVY_AGAIN                              = 11  ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_12                                     = 12  ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_13                                     = 13  ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_14                                     = 14  ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_15                                     = 15  ;
static const uint8_t P9N2_EX_V1_HMER_SCOM_FIR_HMI                                 = 16  ;
static const uint8_t P9N2_EX_V1_HMER_TRIG_FIR_HMI                                 = 17  ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_18                                     = 18  ;
static const uint8_t P9N2_EX_V1_HMER_SPARE_19                                     = 19  ;
static const uint8_t P9N2_EX_V1_HMER_HYP_RECOURCE_ERR                             = 20  ;
static const uint8_t P9N2_EX_V1_HMER_XSCOM_STATUS                                 = 21  ;
static const uint8_t P9N2_EX_V1_HMER_XSCOM_STATUS_LEN                             = 3   ;

static const uint8_t P9N2_EX_L2_V1_HMER_MALFUNCTION_ALERT                         = 0   ;
static const uint8_t P9N2_EX_L2_V1_HMER_CME_REQUEST                               = 1   ;
static const uint8_t P9N2_EX_L2_V1_HMER_PROC_RCVY_DONE                            = 2   ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_3                                   = 3   ;
static const uint8_t P9N2_EX_L2_V1_HMER_TFAC_ERR                                  = 4   ;
static const uint8_t P9N2_EX_L2_V1_HMER_TFMR_PARITY_ERR                           = 5   ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_6                                   = 6   ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_7                                   = 7   ;
static const uint8_t P9N2_EX_L2_V1_HMER_XSCOM_FAIL                                = 8   ;
static const uint8_t P9N2_EX_L2_V1_HMER_XSCOM_DONE                                = 9   ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_10                                  = 10  ;
static const uint8_t P9N2_EX_L2_V1_HMER_PROC_RCVY_AGAIN                           = 11  ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_12                                  = 12  ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_13                                  = 13  ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_14                                  = 14  ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_15                                  = 15  ;
static const uint8_t P9N2_EX_L2_V1_HMER_SCOM_FIR_HMI                              = 16  ;
static const uint8_t P9N2_EX_L2_V1_HMER_TRIG_FIR_HMI                              = 17  ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_18                                  = 18  ;
static const uint8_t P9N2_EX_L2_V1_HMER_SPARE_19                                  = 19  ;
static const uint8_t P9N2_EX_L2_V1_HMER_HYP_RECOURCE_ERR                          = 20  ;
static const uint8_t P9N2_EX_L2_V1_HMER_XSCOM_STATUS                              = 21  ;
static const uint8_t P9N2_EX_L2_V1_HMER_XSCOM_STATUS_LEN                          = 3   ;

static const uint8_t P9N2_C_V1_HMER_MALFUNCTION_ALERT                             = 0   ;
static const uint8_t P9N2_C_V1_HMER_CME_REQUEST                                   = 1   ;
static const uint8_t P9N2_C_V1_HMER_PROC_RCVY_DONE                                = 2   ;
static const uint8_t P9N2_C_V1_HMER_SPARE_3                                       = 3   ;
static const uint8_t P9N2_C_V1_HMER_TFAC_ERR                                      = 4   ;
static const uint8_t P9N2_C_V1_HMER_TFMR_PARITY_ERR                               = 5   ;
static const uint8_t P9N2_C_V1_HMER_SPARE_6                                       = 6   ;
static const uint8_t P9N2_C_V1_HMER_SPARE_7                                       = 7   ;
static const uint8_t P9N2_C_V1_HMER_XSCOM_FAIL                                    = 8   ;
static const uint8_t P9N2_C_V1_HMER_XSCOM_DONE                                    = 9   ;
static const uint8_t P9N2_C_V1_HMER_SPARE_10                                      = 10  ;
static const uint8_t P9N2_C_V1_HMER_PROC_RCVY_AGAIN                               = 11  ;
static const uint8_t P9N2_C_V1_HMER_SPARE_12                                      = 12  ;
static const uint8_t P9N2_C_V1_HMER_SPARE_13                                      = 13  ;
static const uint8_t P9N2_C_V1_HMER_SPARE_14                                      = 14  ;
static const uint8_t P9N2_C_V1_HMER_SPARE_15                                      = 15  ;
static const uint8_t P9N2_C_V1_HMER_SCOM_FIR_HMI                                  = 16  ;
static const uint8_t P9N2_C_V1_HMER_TRIG_FIR_HMI                                  = 17  ;
static const uint8_t P9N2_C_V1_HMER_SPARE_18                                      = 18  ;
static const uint8_t P9N2_C_V1_HMER_SPARE_19                                      = 19  ;
static const uint8_t P9N2_C_V1_HMER_HYP_RECOURCE_ERR                              = 20  ;
static const uint8_t P9N2_C_V1_HMER_XSCOM_STATUS                                  = 21  ;
static const uint8_t P9N2_C_V1_HMER_XSCOM_STATUS_LEN                              = 3   ;

static const uint8_t P9N2_EX_L2_V2_HMER_MALFUNCTION_ALERT                         = 0   ;
static const uint8_t P9N2_EX_L2_V2_HMER_CME_REQUEST                               = 1   ;
static const uint8_t P9N2_EX_L2_V2_HMER_PROC_RCVY_DONE                            = 2   ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_3                                   = 3   ;
static const uint8_t P9N2_EX_L2_V2_HMER_TFAC_ERR                                  = 4   ;
static const uint8_t P9N2_EX_L2_V2_HMER_TFMR_PARITY_ERR                           = 5   ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_6                                   = 6   ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_7                                   = 7   ;
static const uint8_t P9N2_EX_L2_V2_HMER_XSCOM_FAIL                                = 8   ;
static const uint8_t P9N2_EX_L2_V2_HMER_XSCOM_DONE                                = 9   ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_10                                  = 10  ;
static const uint8_t P9N2_EX_L2_V2_HMER_PROC_RCVY_AGAIN                           = 11  ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_12                                  = 12  ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_13                                  = 13  ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_14                                  = 14  ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_15                                  = 15  ;
static const uint8_t P9N2_EX_L2_V2_HMER_SCOM_FIR_HMI                              = 16  ;
static const uint8_t P9N2_EX_L2_V2_HMER_TRIG_FIR_HMI                              = 17  ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_18                                  = 18  ;
static const uint8_t P9N2_EX_L2_V2_HMER_SPARE_19                                  = 19  ;
static const uint8_t P9N2_EX_L2_V2_HMER_HYP_RECOURCE_ERR                          = 20  ;
static const uint8_t P9N2_EX_L2_V2_HMER_XSCOM_STATUS                              = 21  ;
static const uint8_t P9N2_EX_L2_V2_HMER_XSCOM_STATUS_LEN                          = 3   ;

static const uint8_t P9N2_C_V2_HMER_MALFUNCTION_ALERT                             = 0   ;
static const uint8_t P9N2_C_V2_HMER_CME_REQUEST                                   = 1   ;
static const uint8_t P9N2_C_V2_HMER_PROC_RCVY_DONE                                = 2   ;
static const uint8_t P9N2_C_V2_HMER_SPARE_3                                       = 3   ;
static const uint8_t P9N2_C_V2_HMER_TFAC_ERR                                      = 4   ;
static const uint8_t P9N2_C_V2_HMER_TFMR_PARITY_ERR                               = 5   ;
static const uint8_t P9N2_C_V2_HMER_SPARE_6                                       = 6   ;
static const uint8_t P9N2_C_V2_HMER_SPARE_7                                       = 7   ;
static const uint8_t P9N2_C_V2_HMER_XSCOM_FAIL                                    = 8   ;
static const uint8_t P9N2_C_V2_HMER_XSCOM_DONE                                    = 9   ;
static const uint8_t P9N2_C_V2_HMER_SPARE_10                                      = 10  ;
static const uint8_t P9N2_C_V2_HMER_PROC_RCVY_AGAIN                               = 11  ;
static const uint8_t P9N2_C_V2_HMER_SPARE_12                                      = 12  ;
static const uint8_t P9N2_C_V2_HMER_SPARE_13                                      = 13  ;
static const uint8_t P9N2_C_V2_HMER_SPARE_14                                      = 14  ;
static const uint8_t P9N2_C_V2_HMER_SPARE_15                                      = 15  ;
static const uint8_t P9N2_C_V2_HMER_SCOM_FIR_HMI                                  = 16  ;
static const uint8_t P9N2_C_V2_HMER_TRIG_FIR_HMI                                  = 17  ;
static const uint8_t P9N2_C_V2_HMER_SPARE_18                                      = 18  ;
static const uint8_t P9N2_C_V2_HMER_SPARE_19                                      = 19  ;
static const uint8_t P9N2_C_V2_HMER_HYP_RECOURCE_ERR                              = 20  ;
static const uint8_t P9N2_C_V2_HMER_XSCOM_STATUS                                  = 21  ;
static const uint8_t P9N2_C_V2_HMER_XSCOM_STATUS_LEN                              = 3   ;

static const uint8_t P9N2_EX_L2_V3_HMER_MALFUNCTION_ALERT                         = 0   ;
static const uint8_t P9N2_EX_L2_V3_HMER_CME_REQUEST                               = 1   ;
static const uint8_t P9N2_EX_L2_V3_HMER_PROC_RCVY_DONE                            = 2   ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_3                                   = 3   ;
static const uint8_t P9N2_EX_L2_V3_HMER_TFAC_ERR                                  = 4   ;
static const uint8_t P9N2_EX_L2_V3_HMER_TFMR_PARITY_ERR                           = 5   ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_6                                   = 6   ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_7                                   = 7   ;
static const uint8_t P9N2_EX_L2_V3_HMER_XSCOM_FAIL                                = 8   ;
static const uint8_t P9N2_EX_L2_V3_HMER_XSCOM_DONE                                = 9   ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_10                                  = 10  ;
static const uint8_t P9N2_EX_L2_V3_HMER_PROC_RCVY_AGAIN                           = 11  ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_12                                  = 12  ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_13                                  = 13  ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_14                                  = 14  ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_15                                  = 15  ;
static const uint8_t P9N2_EX_L2_V3_HMER_SCOM_FIR_HMI                              = 16  ;
static const uint8_t P9N2_EX_L2_V3_HMER_TRIG_FIR_HMI                              = 17  ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_18                                  = 18  ;
static const uint8_t P9N2_EX_L2_V3_HMER_SPARE_19                                  = 19  ;
static const uint8_t P9N2_EX_L2_V3_HMER_HYP_RECOURCE_ERR                          = 20  ;
static const uint8_t P9N2_EX_L2_V3_HMER_XSCOM_STATUS                              = 21  ;
static const uint8_t P9N2_EX_L2_V3_HMER_XSCOM_STATUS_LEN                          = 3   ;

static const uint8_t P9N2_C_V3_HMER_MALFUNCTION_ALERT                             = 0   ;
static const uint8_t P9N2_C_V3_HMER_CME_REQUEST                                   = 1   ;
static const uint8_t P9N2_C_V3_HMER_PROC_RCVY_DONE                                = 2   ;
static const uint8_t P9N2_C_V3_HMER_SPARE_3                                       = 3   ;
static const uint8_t P9N2_C_V3_HMER_TFAC_ERR                                      = 4   ;
static const uint8_t P9N2_C_V3_HMER_TFMR_PARITY_ERR                               = 5   ;
static const uint8_t P9N2_C_V3_HMER_SPARE_6                                       = 6   ;
static const uint8_t P9N2_C_V3_HMER_SPARE_7                                       = 7   ;
static const uint8_t P9N2_C_V3_HMER_XSCOM_FAIL                                    = 8   ;
static const uint8_t P9N2_C_V3_HMER_XSCOM_DONE                                    = 9   ;
static const uint8_t P9N2_C_V3_HMER_SPARE_10                                      = 10  ;
static const uint8_t P9N2_C_V3_HMER_PROC_RCVY_AGAIN                               = 11  ;
static const uint8_t P9N2_C_V3_HMER_SPARE_12                                      = 12  ;
static const uint8_t P9N2_C_V3_HMER_SPARE_13                                      = 13  ;
static const uint8_t P9N2_C_V3_HMER_SPARE_14                                      = 14  ;
static const uint8_t P9N2_C_V3_HMER_SPARE_15                                      = 15  ;
static const uint8_t P9N2_C_V3_HMER_SCOM_FIR_HMI                                  = 16  ;
static const uint8_t P9N2_C_V3_HMER_TRIG_FIR_HMI                                  = 17  ;
static const uint8_t P9N2_C_V3_HMER_SPARE_18                                      = 18  ;
static const uint8_t P9N2_C_V3_HMER_SPARE_19                                      = 19  ;
static const uint8_t P9N2_C_V3_HMER_HYP_RECOURCE_ERR                              = 20  ;
static const uint8_t P9N2_C_V3_HMER_XSCOM_STATUS                                  = 21  ;
static const uint8_t P9N2_C_V3_HMER_XSCOM_STATUS_LEN                              = 3   ;

static const uint8_t P9N2_EQ_WRITE_PROTECT_ENABLE_REG_RING_LOCKING                = 0   ;
static const uint8_t P9N2_EQ_WRITE_PROTECT_ENABLE_REG_RESERVED_RING_LOCKING       = 1   ;

static const uint8_t P9N2_EX_WRITE_PROTECT_ENABLE_REG_RING_LOCKING                = 0   ;
static const uint8_t P9N2_EX_WRITE_PROTECT_ENABLE_REG_RESERVED_RING_LOCKING       = 1   ;

static const uint8_t P9N2_C_WRITE_PROTECT_ENABLE_REG_RING_LOCKING                 = 0   ;
static const uint8_t P9N2_C_WRITE_PROTECT_ENABLE_REG_RESERVED_RING_LOCKING        = 1   ;

static const uint8_t P9N2_EQ_WRITE_PROTECT_RINGS_REG_RINGS                        = 0   ;
static const uint8_t P9N2_EQ_WRITE_PROTECT_RINGS_REG_RINGS_LEN                    = 16  ;

static const uint8_t P9N2_EX_WRITE_PROTECT_RINGS_REG_RINGS                        = 0   ;
static const uint8_t P9N2_EX_WRITE_PROTECT_RINGS_REG_RINGS_LEN                    = 16  ;

static const uint8_t P9N2_C_WRITE_PROTECT_RINGS_REG_RINGS                         = 0   ;
static const uint8_t P9N2_C_WRITE_PROTECT_RINGS_REG_RINGS_LEN                     = 16  ;

static const uint8_t P9N2_EQ_WR_EPS_REG_TIER1_VALUE                               = 0   ;
static const uint8_t P9N2_EQ_WR_EPS_REG_TIER1_VALUE_LEN                           = 12  ;
static const uint8_t P9N2_EQ_WR_EPS_REG_TIER2_VALUE                               = 12  ;
static const uint8_t P9N2_EQ_WR_EPS_REG_TIER2_VALUE_LEN                           = 12  ;
static const uint8_t P9N2_EQ_WR_EPS_REG_DIVIDER_MODE                              = 24  ;
static const uint8_t P9N2_EQ_WR_EPS_REG_DIVIDER_MODE_LEN                          = 4   ;
static const uint8_t P9N2_EQ_WR_EPS_REG_MODE_SEL                                  = 28  ;
static const uint8_t P9N2_EQ_WR_EPS_REG_CNT_USE_L2_DIVIDER_EN                     = 29  ;
static const uint8_t P9N2_EQ_WR_EPS_REG_L2_STEP_MODE                              = 30  ;
static const uint8_t P9N2_EQ_WR_EPS_REG_L2_STEP_MODE_LEN                          = 4   ;

static const uint8_t P9N2_EX_L2_WR_EPS_REG_TIER1_VALUE                            = 0   ;
static const uint8_t P9N2_EX_L2_WR_EPS_REG_TIER1_VALUE_LEN                        = 12  ;
static const uint8_t P9N2_EX_L2_WR_EPS_REG_TIER2_VALUE                            = 12  ;
static const uint8_t P9N2_EX_L2_WR_EPS_REG_TIER2_VALUE_LEN                        = 12  ;
static const uint8_t P9N2_EX_L2_WR_EPS_REG_DIVIDER_MODE                           = 24  ;
static const uint8_t P9N2_EX_L2_WR_EPS_REG_DIVIDER_MODE_LEN                       = 4   ;
static const uint8_t P9N2_EX_L2_WR_EPS_REG_MODE_SEL                               = 28  ;
static const uint8_t P9N2_EX_L2_WR_EPS_REG_CNT_USE_L2_DIVIDER_EN                  = 29  ;
static const uint8_t P9N2_EX_L2_WR_EPS_REG_L2_STEP_MODE                           = 30  ;
static const uint8_t P9N2_EX_L2_WR_EPS_REG_L2_STEP_MODE_LEN                       = 4   ;

static const uint8_t P9N2_EQ_XFIR_IN0                                             = 0   ;
static const uint8_t P9N2_EQ_XFIR_IN1                                             = 1   ;
static const uint8_t P9N2_EQ_XFIR_IN2                                             = 2   ;
static const uint8_t P9N2_EQ_XFIR_IN3                                             = 3   ;
static const uint8_t P9N2_EQ_XFIR_IN4                                             = 4   ;
static const uint8_t P9N2_EQ_XFIR_IN5                                             = 5   ;
static const uint8_t P9N2_EQ_XFIR_IN6                                             = 6   ;
static const uint8_t P9N2_EQ_XFIR_IN7                                             = 7   ;
static const uint8_t P9N2_EQ_XFIR_IN8                                             = 8   ;
static const uint8_t P9N2_EQ_XFIR_IN9                                             = 9   ;
static const uint8_t P9N2_EQ_XFIR_IN10                                            = 10  ;
static const uint8_t P9N2_EQ_XFIR_IN11                                            = 11  ;
static const uint8_t P9N2_EQ_XFIR_IN12                                            = 12  ;
static const uint8_t P9N2_EQ_XFIR_IN13                                            = 13  ;
static const uint8_t P9N2_EQ_XFIR_IN13_LEN                                        = 13  ;
static const uint8_t P9N2_EQ_XFIR_IN26                                            = 26  ;

static const uint8_t P9N2_EX_XFIR_IN0                                             = 0   ;
static const uint8_t P9N2_EX_XFIR_IN1                                             = 1   ;
static const uint8_t P9N2_EX_XFIR_IN2                                             = 2   ;
static const uint8_t P9N2_EX_XFIR_IN3                                             = 3   ;
static const uint8_t P9N2_EX_XFIR_IN4                                             = 4   ;
static const uint8_t P9N2_EX_XFIR_IN5                                             = 5   ;
static const uint8_t P9N2_EX_XFIR_IN5_LEN                                         = 21  ;
static const uint8_t P9N2_EX_XFIR_IN26                                            = 26  ;

static const uint8_t P9N2_C_XFIR_IN0                                              = 0   ;
static const uint8_t P9N2_C_XFIR_IN1                                              = 1   ;
static const uint8_t P9N2_C_XFIR_IN2                                              = 2   ;
static const uint8_t P9N2_C_XFIR_IN3                                              = 3   ;
static const uint8_t P9N2_C_XFIR_IN4                                              = 4   ;
static const uint8_t P9N2_C_XFIR_IN5                                              = 5   ;
static const uint8_t P9N2_C_XFIR_IN5_LEN                                          = 21  ;
static const uint8_t P9N2_C_XFIR_IN26                                             = 26  ;

static const uint8_t P9N2_EQ_XSTOP1_MASK_B                                        = 0   ;
static const uint8_t P9N2_EQ_XSTOP1_ALIGNED                                       = 1   ;
static const uint8_t P9N2_EQ_XSTOP1_TRIGGER_OPCG_ON                               = 2   ;
static const uint8_t P9N2_EQ_XSTOP1_WAIT_ALLWAYS                                  = 3   ;
static const uint8_t P9N2_EQ_XSTOP1_PERV                                          = 4   ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT1                                         = 5   ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT2                                         = 6   ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT3                                         = 7   ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT4                                         = 8   ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT5                                         = 9   ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT6                                         = 10  ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT7                                         = 11  ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT8                                         = 12  ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT9                                         = 13  ;
static const uint8_t P9N2_EQ_XSTOP1_UNIT10                                        = 14  ;
static const uint8_t P9N2_EQ_XSTOP1_WAIT_CYCLES                                   = 48  ;
static const uint8_t P9N2_EQ_XSTOP1_WAIT_CYCLES_LEN                               = 12  ;

static const uint8_t P9N2_EX_XSTOP1_MASK_B                                        = 0   ;
static const uint8_t P9N2_EX_XSTOP1_ALIGNED                                       = 1   ;
static const uint8_t P9N2_EX_XSTOP1_TRIGGER_OPCG_ON                               = 2   ;
static const uint8_t P9N2_EX_XSTOP1_WAIT_ALLWAYS                                  = 3   ;
static const uint8_t P9N2_EX_XSTOP1_PERV                                          = 4   ;
static const uint8_t P9N2_EX_XSTOP1_UNIT1                                         = 5   ;
static const uint8_t P9N2_EX_XSTOP1_UNIT2                                         = 6   ;
static const uint8_t P9N2_EX_XSTOP1_UNIT3                                         = 7   ;
static const uint8_t P9N2_EX_XSTOP1_UNIT4                                         = 8   ;
static const uint8_t P9N2_EX_XSTOP1_UNIT5                                         = 9   ;
static const uint8_t P9N2_EX_XSTOP1_UNIT6                                         = 10  ;
static const uint8_t P9N2_EX_XSTOP1_UNIT7                                         = 11  ;
static const uint8_t P9N2_EX_XSTOP1_UNIT8                                         = 12  ;
static const uint8_t P9N2_EX_XSTOP1_UNIT9                                         = 13  ;
static const uint8_t P9N2_EX_XSTOP1_UNIT10                                        = 14  ;
static const uint8_t P9N2_EX_XSTOP1_WAIT_CYCLES                                   = 48  ;
static const uint8_t P9N2_EX_XSTOP1_WAIT_CYCLES_LEN                               = 12  ;

static const uint8_t P9N2_C_XSTOP1_MASK_B                                         = 0   ;
static const uint8_t P9N2_C_XSTOP1_ALIGNED                                        = 1   ;
static const uint8_t P9N2_C_XSTOP1_TRIGGER_OPCG_ON                                = 2   ;
static const uint8_t P9N2_C_XSTOP1_WAIT_ALLWAYS                                   = 3   ;
static const uint8_t P9N2_C_XSTOP1_PERV                                           = 4   ;
static const uint8_t P9N2_C_XSTOP1_UNIT1                                          = 5   ;
static const uint8_t P9N2_C_XSTOP1_UNIT2                                          = 6   ;
static const uint8_t P9N2_C_XSTOP1_UNIT3                                          = 7   ;
static const uint8_t P9N2_C_XSTOP1_UNIT4                                          = 8   ;
static const uint8_t P9N2_C_XSTOP1_UNIT5                                          = 9   ;
static const uint8_t P9N2_C_XSTOP1_UNIT6                                          = 10  ;
static const uint8_t P9N2_C_XSTOP1_UNIT7                                          = 11  ;
static const uint8_t P9N2_C_XSTOP1_UNIT8                                          = 12  ;
static const uint8_t P9N2_C_XSTOP1_UNIT9                                          = 13  ;
static const uint8_t P9N2_C_XSTOP1_UNIT10                                         = 14  ;
static const uint8_t P9N2_C_XSTOP1_WAIT_CYCLES                                    = 48  ;
static const uint8_t P9N2_C_XSTOP1_WAIT_CYCLES_LEN                                = 12  ;

static const uint8_t P9N2_EQ_XSTOP2_MASK_B                                        = 0   ;
static const uint8_t P9N2_EQ_XSTOP2_ALIGNED                                       = 1   ;
static const uint8_t P9N2_EQ_XSTOP2_TRIGGER_OPCG_ON                               = 2   ;
static const uint8_t P9N2_EQ_XSTOP2_WAIT_ALLWAYS                                  = 3   ;
static const uint8_t P9N2_EQ_XSTOP2_PERV                                          = 4   ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT1                                         = 5   ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT2                                         = 6   ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT3                                         = 7   ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT4                                         = 8   ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT5                                         = 9   ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT6                                         = 10  ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT7                                         = 11  ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT8                                         = 12  ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT9                                         = 13  ;
static const uint8_t P9N2_EQ_XSTOP2_UNIT10                                        = 14  ;
static const uint8_t P9N2_EQ_XSTOP2_WAIT_CYCLES                                   = 48  ;
static const uint8_t P9N2_EQ_XSTOP2_WAIT_CYCLES_LEN                               = 12  ;

static const uint8_t P9N2_EX_XSTOP2_MASK_B                                        = 0   ;
static const uint8_t P9N2_EX_XSTOP2_ALIGNED                                       = 1   ;
static const uint8_t P9N2_EX_XSTOP2_TRIGGER_OPCG_ON                               = 2   ;
static const uint8_t P9N2_EX_XSTOP2_WAIT_ALLWAYS                                  = 3   ;
static const uint8_t P9N2_EX_XSTOP2_PERV                                          = 4   ;
static const uint8_t P9N2_EX_XSTOP2_UNIT1                                         = 5   ;
static const uint8_t P9N2_EX_XSTOP2_UNIT2                                         = 6   ;
static const uint8_t P9N2_EX_XSTOP2_UNIT3                                         = 7   ;
static const uint8_t P9N2_EX_XSTOP2_UNIT4                                         = 8   ;
static const uint8_t P9N2_EX_XSTOP2_UNIT5                                         = 9   ;
static const uint8_t P9N2_EX_XSTOP2_UNIT6                                         = 10  ;
static const uint8_t P9N2_EX_XSTOP2_UNIT7                                         = 11  ;
static const uint8_t P9N2_EX_XSTOP2_UNIT8                                         = 12  ;
static const uint8_t P9N2_EX_XSTOP2_UNIT9                                         = 13  ;
static const uint8_t P9N2_EX_XSTOP2_UNIT10                                        = 14  ;
static const uint8_t P9N2_EX_XSTOP2_WAIT_CYCLES                                   = 48  ;
static const uint8_t P9N2_EX_XSTOP2_WAIT_CYCLES_LEN                               = 12  ;

static const uint8_t P9N2_C_XSTOP2_MASK_B                                         = 0   ;
static const uint8_t P9N2_C_XSTOP2_ALIGNED                                        = 1   ;
static const uint8_t P9N2_C_XSTOP2_TRIGGER_OPCG_ON                                = 2   ;
static const uint8_t P9N2_C_XSTOP2_WAIT_ALLWAYS                                   = 3   ;
static const uint8_t P9N2_C_XSTOP2_PERV                                           = 4   ;
static const uint8_t P9N2_C_XSTOP2_UNIT1                                          = 5   ;
static const uint8_t P9N2_C_XSTOP2_UNIT2                                          = 6   ;
static const uint8_t P9N2_C_XSTOP2_UNIT3                                          = 7   ;
static const uint8_t P9N2_C_XSTOP2_UNIT4                                          = 8   ;
static const uint8_t P9N2_C_XSTOP2_UNIT5                                          = 9   ;
static const uint8_t P9N2_C_XSTOP2_UNIT6                                          = 10  ;
static const uint8_t P9N2_C_XSTOP2_UNIT7                                          = 11  ;
static const uint8_t P9N2_C_XSTOP2_UNIT8                                          = 12  ;
static const uint8_t P9N2_C_XSTOP2_UNIT9                                          = 13  ;
static const uint8_t P9N2_C_XSTOP2_UNIT10                                         = 14  ;
static const uint8_t P9N2_C_XSTOP2_WAIT_CYCLES                                    = 48  ;
static const uint8_t P9N2_C_XSTOP2_WAIT_CYCLES_LEN                                = 12  ;

static const uint8_t P9N2_EQ_XSTOP3_MASK_B                                        = 0   ;
static const uint8_t P9N2_EQ_XSTOP3_ALIGNED                                       = 1   ;
static const uint8_t P9N2_EQ_XSTOP3_TRIGGER_OPCG_ON                               = 2   ;
static const uint8_t P9N2_EQ_XSTOP3_WAIT_ALLWAYS                                  = 3   ;
static const uint8_t P9N2_EQ_XSTOP3_PERV                                          = 4   ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT1                                         = 5   ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT2                                         = 6   ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT3                                         = 7   ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT4                                         = 8   ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT5                                         = 9   ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT6                                         = 10  ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT7                                         = 11  ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT8                                         = 12  ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT9                                         = 13  ;
static const uint8_t P9N2_EQ_XSTOP3_UNIT10                                        = 14  ;
static const uint8_t P9N2_EQ_XSTOP3_WAIT_CYCLES                                   = 48  ;
static const uint8_t P9N2_EQ_XSTOP3_WAIT_CYCLES_LEN                               = 12  ;

static const uint8_t P9N2_EX_XSTOP3_MASK_B                                        = 0   ;
static const uint8_t P9N2_EX_XSTOP3_ALIGNED                                       = 1   ;
static const uint8_t P9N2_EX_XSTOP3_TRIGGER_OPCG_ON                               = 2   ;
static const uint8_t P9N2_EX_XSTOP3_WAIT_ALLWAYS                                  = 3   ;
static const uint8_t P9N2_EX_XSTOP3_PERV                                          = 4   ;
static const uint8_t P9N2_EX_XSTOP3_UNIT1                                         = 5   ;
static const uint8_t P9N2_EX_XSTOP3_UNIT2                                         = 6   ;
static const uint8_t P9N2_EX_XSTOP3_UNIT3                                         = 7   ;
static const uint8_t P9N2_EX_XSTOP3_UNIT4                                         = 8   ;
static const uint8_t P9N2_EX_XSTOP3_UNIT5                                         = 9   ;
static const uint8_t P9N2_EX_XSTOP3_UNIT6                                         = 10  ;
static const uint8_t P9N2_EX_XSTOP3_UNIT7                                         = 11  ;
static const uint8_t P9N2_EX_XSTOP3_UNIT8                                         = 12  ;
static const uint8_t P9N2_EX_XSTOP3_UNIT9                                         = 13  ;
static const uint8_t P9N2_EX_XSTOP3_UNIT10                                        = 14  ;
static const uint8_t P9N2_EX_XSTOP3_WAIT_CYCLES                                   = 48  ;
static const uint8_t P9N2_EX_XSTOP3_WAIT_CYCLES_LEN                               = 12  ;

static const uint8_t P9N2_C_XSTOP3_MASK_B                                         = 0   ;
static const uint8_t P9N2_C_XSTOP3_ALIGNED                                        = 1   ;
static const uint8_t P9N2_C_XSTOP3_TRIGGER_OPCG_ON                                = 2   ;
static const uint8_t P9N2_C_XSTOP3_WAIT_ALLWAYS                                   = 3   ;
static const uint8_t P9N2_C_XSTOP3_PERV                                           = 4   ;
static const uint8_t P9N2_C_XSTOP3_UNIT1                                          = 5   ;
static const uint8_t P9N2_C_XSTOP3_UNIT2                                          = 6   ;
static const uint8_t P9N2_C_XSTOP3_UNIT3                                          = 7   ;
static const uint8_t P9N2_C_XSTOP3_UNIT4                                          = 8   ;
static const uint8_t P9N2_C_XSTOP3_UNIT5                                          = 9   ;
static const uint8_t P9N2_C_XSTOP3_UNIT6                                          = 10  ;
static const uint8_t P9N2_C_XSTOP3_UNIT7                                          = 11  ;
static const uint8_t P9N2_C_XSTOP3_UNIT8                                          = 12  ;
static const uint8_t P9N2_C_XSTOP3_UNIT9                                          = 13  ;
static const uint8_t P9N2_C_XSTOP3_UNIT10                                         = 14  ;
static const uint8_t P9N2_C_XSTOP3_WAIT_CYCLES                                    = 48  ;
static const uint8_t P9N2_C_XSTOP3_WAIT_CYCLES_LEN                                = 12  ;

static const uint8_t P9N2_EQ_XSTOP_INTERRUPT_REG_XSTOP                            = 0   ;

static const uint8_t P9N2_EX_XSTOP_INTERRUPT_REG_XSTOP                            = 0   ;

static const uint8_t P9N2_C_XSTOP_INTERRUPT_REG_XSTOP                             = 0   ;

static const uint8_t P9N2_EQ_XTRA_TRACE_MODE_DATA                                 = 0   ;
static const uint8_t P9N2_EQ_XTRA_TRACE_MODE_DATA_LEN                             = 42  ;

static const uint8_t P9N2_EX_XTRA_TRACE_MODE_DATA                                 = 0   ;
static const uint8_t P9N2_EX_XTRA_TRACE_MODE_DATA_LEN                             = 42  ;

static const uint8_t P9N2_C_XTRA_TRACE_MODE_DATA                                  = 0   ;
static const uint8_t P9N2_C_XTRA_TRACE_MODE_DATA_LEN                              = 42  ;

#endif
