/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* $Source: import/chips/centaur/common/include/cen_gen_scom_template.H $ */
/*                                                                        */
/* OpenPOWER HCODE Project                                                */
/*                                                                        */
/* COPYRIGHT 2016,2017                                                    */
/* [+] International Business Machines Corp.                              */
/*                                                                        */
/*                                                                        */
/* Licensed under the Apache License, Version 2.0 (the "License");        */
/* you may not use this file except in compliance with the License.       */
/* You may obtain a copy of the License at                                */
/*                                                                        */
/*     http://www.apache.org/licenses/LICENSE-2.0                         */
/*                                                                        */
/* Unless required by applicable law or agreed to in writing, software    */
/* distributed under the License is distributed on an "AS IS" BASIS,      */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
/* implied. See the License for the specific language governing           */
/* permissions and limitations under the License.                         */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
#ifndef CEN_GEN_SCOM_TEMPLATE_H
#define CEN_GEN_SCOM_TEMPLATE_H
static const uint64_t IDX_CEN_TX_CLK_MODE_PG = 0;
static const uint64_t IDX_CEN_TX_SPARE_MODE_PG = 1;
static const uint64_t IDX_CEN_TX_MODE_PG = 2;
static const uint64_t IDX_CEN_TX_RESET_ACT_PG_NCX = 3;
static const uint64_t IDX_CEN_TX_BIST_STAT_PG = 4;
static const uint64_t IDX_CEN_TX_FIR_PG = 5;
static const uint64_t IDX_CEN_TX_FIR_MASK_PG = 6;
static const uint64_t IDX_CEN_TX_FIR_ERROR_INJECT_PG = 7;
static const uint64_t IDX_CEN_TX_ID1_PG = 8;
static const uint64_t IDX_CEN_TX_ID2_PG = 9;
static const uint64_t IDX_CEN_TX_ID3_PG = 10;
static const uint64_t IDX_CEN_TX_CLK_CNTL_GCRMSG_PG = 11;
static const uint64_t IDX_CEN_TX_FFE_MODE_PG = 12;
static const uint64_t IDX_CEN_TX_FFE_MAIN_PG = 13;
static const uint64_t IDX_CEN_TX_FFE_POST_PG = 14;
static const uint64_t IDX_CEN_TX_FFE_MARGIN_PG = 15;
static const uint64_t IDX_CEN_TX_BAD_LANE_ENC_GCRMSG_PG = 16;
static const uint64_t IDX_CEN_TX_SLS_LANE_ENC_GCRMSG_PG = 17;
static const uint64_t IDX_CEN_TX_WT_SEG_ENABLE_PG = 18;
static const uint64_t IDX_CEN_TX_LANE_DISABLED_VEC_0_15_PG = 19;
static const uint64_t IDX_CEN_TX_LANE_DISABLED_VEC_16_31_PG = 20;
static const uint64_t IDX_CEN_TX_SLS_LANE_MUX_GCRMSG_PG = 21;
static const uint64_t IDX_CEN_TX_SLV_MV_SLS_LN_REQ_GCRMSG_PG = 22;
static const uint64_t IDX_CEN_TX_WIRETEST_PP = 23;
static const uint64_t IDX_CEN_TX_MODE_PP = 24;
static const uint64_t IDX_CEN_TX_SLS_GCRMSG_PP = 25;
static const uint64_t IDX_CEN_TX_BER_CNTL_A_PP = 26;
static const uint64_t IDX_CEN_TX_BER_CNTL_B_PP = 27;
static const uint64_t IDX_CEN_TX_DYN_RECAL_TIMEOUTS_PP = 28;
static const uint64_t IDX_CEN_TX_BIST_CNTL_PP = 29;
static const uint64_t IDX_CEN_TX_BER_CNTL_SLS_PP = 30;
static const uint64_t IDX_CEN_TX_CNTL_PP = 31;
static const uint64_t IDX_CEN_TX_RESET_CFG_PP = 32;
static const uint64_t IDX_CEN_TX_TDR_CNTL1_PP = 33;
static const uint64_t IDX_CEN_TX_TDR_CNTL2_PP = 34;
static const uint64_t IDX_CEN_TX_TDR_CNTL3_PP = 35;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_PL = 36;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_SPARE_MODE_PL = 37;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_BIST_STAT_PL = 38;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_PRBS_MODE_PL = 39;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_DATA_CNTL_GCRMSG_PL = 40;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_FIR_PL = 41;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_FIR_MASK_PL = 42;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_FIR_ERROR_INJECT_PL = 43;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_MODE_FAST_PL_NCX = 44;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE0_TX_CNTL_GCRMSG_PL = 45;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_WIRETEST_PP_WOX = 46;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_MODE_PP_WOX = 47;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_SLS_GCRMSG_PP_WOX = 48;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_A_PP_WOX = 49;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_B_PP_WOX = 50;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_DYN_RECAL_TIMEOUTS_PP_WOX = 51;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BIST_CNTL_PP_WOX = 52;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_BER_CNTL_SLS_PP_WOX = 53;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_CNTL_PP_WOX = 54;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_RESET_CFG_PP_WOX = 55;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL1_PP_WOX = 56;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL2_PP_WOX = 57;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_TX_TDR_CNTL3_PP_WOX = 58;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_PL = 59;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_SPARE_MODE_PL = 60;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_BIST_STAT_PL = 61;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_PRBS_MODE_PL = 62;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_DATA_CNTL_GCRMSG_PL = 63;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_FIR_PL = 64;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_FIR_MASK_PL = 65;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_FIR_ERROR_INJECT_PL = 66;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_MODE_FAST_PL_NCX = 67;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE1_TX_CNTL_GCRMSG_PL = 68;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_PL = 69;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_SPARE_MODE_PL = 70;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_BIST_STAT_PL = 71;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_PRBS_MODE_PL = 72;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_DATA_CNTL_GCRMSG_PL = 73;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_FIR_PL = 74;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_FIR_MASK_PL = 75;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_FIR_ERROR_INJECT_PL = 76;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_MODE_FAST_PL_NCX = 77;
static const uint64_t IDX_CEN_TXPACKS0_TXPACK_0_SLICE2_TX_CNTL_GCRMSG_PL = 78;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_PL = 79;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_SPARE_MODE_PL = 80;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_BIST_STAT_PL = 81;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_PRBS_MODE_PL = 82;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_DATA_CNTL_GCRMSG_PL = 83;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_FIR_PL = 84;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_FIR_MASK_PL = 85;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_FIR_ERROR_INJECT_PL = 86;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_MODE_FAST_PL_NCX = 87;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE0_TX_CNTL_GCRMSG_PL = 88;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_WIRETEST_PP_WOX = 89;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_MODE_PP_WOX = 90;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_SLS_GCRMSG_PP_WOX = 91;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_A_PP_WOX = 92;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_B_PP_WOX = 93;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_DYN_RECAL_TIMEOUTS_PP_WOX = 94;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BIST_CNTL_PP_WOX = 95;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_BER_CNTL_SLS_PP_WOX = 96;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_CNTL_PP_WOX = 97;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_RESET_CFG_PP_WOX = 98;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL1_PP_WOX = 99;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL2_PP_WOX = 100;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_TX_TDR_CNTL3_PP_WOX = 101;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_PL = 102;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_SPARE_MODE_PL = 103;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_BIST_STAT_PL = 104;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_PRBS_MODE_PL = 105;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_DATA_CNTL_GCRMSG_PL = 106;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_FIR_PL = 107;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_FIR_MASK_PL = 108;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_FIR_ERROR_INJECT_PL = 109;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_MODE_FAST_PL_NCX = 110;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE1_TX_CNTL_GCRMSG_PL = 111;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_PL = 112;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_SPARE_MODE_PL = 113;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_BIST_STAT_PL = 114;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_PRBS_MODE_PL = 115;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_DATA_CNTL_GCRMSG_PL = 116;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_FIR_PL = 117;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_FIR_MASK_PL = 118;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_FIR_ERROR_INJECT_PL = 119;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_MODE_FAST_PL_NCX = 120;
static const uint64_t IDX_CEN_TXPACKS1_TXPACK_1_SLICE2_TX_CNTL_GCRMSG_PL = 121;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_PL = 122;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_SPARE_MODE_PL = 123;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_BIST_STAT_PL = 124;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_PRBS_MODE_PL = 125;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_DATA_CNTL_GCRMSG_PL = 126;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_FIR_PL = 127;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_FIR_MASK_PL = 128;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_FIR_ERROR_INJECT_PL = 129;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_MODE_FAST_PL_NCX = 130;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_TX_CNTL_GCRMSG_PL = 131;
static const uint64_t IDX_CEN_TXPACKS2_TX_WIRETEST_PP_WOX = 132;
static const uint64_t IDX_CEN_TXPACKS2_TX_MODE_PP_WOX = 133;
static const uint64_t IDX_CEN_TXPACKS2_TX_SLS_GCRMSG_PP_WOX = 134;
static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_A_PP_WOX = 135;
static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_B_PP_WOX = 136;
static const uint64_t IDX_CEN_TXPACKS2_TX_DYN_RECAL_TIMEOUTS_PP_WOX = 137;
static const uint64_t IDX_CEN_TXPACKS2_TX_BIST_CNTL_PP_WOX = 138;
static const uint64_t IDX_CEN_TXPACKS2_TX_BER_CNTL_SLS_PP_WOX = 139;
static const uint64_t IDX_CEN_TXPACKS2_TX_CNTL_PP_WOX = 140;
static const uint64_t IDX_CEN_TXPACKS2_TX_RESET_CFG_PP_WOX = 141;
static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL1_PP_WOX = 142;
static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL2_PP_WOX = 143;
static const uint64_t IDX_CEN_TXPACKS2_TX_TDR_CNTL3_PP_WOX = 144;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_PL = 145;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_SPARE_MODE_PL = 146;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_BIST_STAT_PL = 147;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_PRBS_MODE_PL = 148;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_DATA_CNTL_GCRMSG_PL = 149;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_FIR_PL = 150;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_FIR_MASK_PL = 151;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_FIR_ERROR_INJECT_PL = 152;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_MODE_FAST_PL_NCX = 153;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_TX_CNTL_GCRMSG_PL = 154;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_PL = 155;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_SPARE_MODE_PL = 156;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_BIST_STAT_PL = 157;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_PRBS_MODE_PL = 158;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_DATA_CNTL_GCRMSG_PL = 159;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_FIR_PL = 160;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_FIR_MASK_PL = 161;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_FIR_ERROR_INJECT_PL = 162;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_MODE_FAST_PL_NCX = 163;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_TX_CNTL_GCRMSG_PL = 164;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_PL = 165;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_SPARE_MODE_PL = 166;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_BIST_STAT_PL = 167;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_PRBS_MODE_PL = 168;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_DATA_CNTL_GCRMSG_PL = 169;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_FIR_PL = 170;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_FIR_MASK_PL = 171;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_FIR_ERROR_INJECT_PL = 172;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_MODE_FAST_PL_NCX = 173;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_TX_CNTL_GCRMSG_PL = 174;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_PL = 175;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_SPARE_MODE_PL = 176;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_BIST_STAT_PL = 177;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_PRBS_MODE_PL = 178;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_DATA_CNTL_GCRMSG_PL = 179;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_FIR_PL = 180;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_FIR_MASK_PL = 181;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_FIR_ERROR_INJECT_PL = 182;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_MODE_FAST_PL_NCX = 183;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_TX_CNTL_GCRMSG_PL = 184;
static const uint64_t IDX_CEN_TXPACKS3_TX_WIRETEST_PP_WOX = 185;
static const uint64_t IDX_CEN_TXPACKS3_TX_MODE_PP_WOX = 186;
static const uint64_t IDX_CEN_TXPACKS3_TX_SLS_GCRMSG_PP_WOX = 187;
static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_A_PP_WOX = 188;
static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_B_PP_WOX = 189;
static const uint64_t IDX_CEN_TXPACKS3_TX_DYN_RECAL_TIMEOUTS_PP_WOX = 190;
static const uint64_t IDX_CEN_TXPACKS3_TX_BIST_CNTL_PP_WOX = 191;
static const uint64_t IDX_CEN_TXPACKS3_TX_BER_CNTL_SLS_PP_WOX = 192;
static const uint64_t IDX_CEN_TXPACKS3_TX_CNTL_PP_WOX = 193;
static const uint64_t IDX_CEN_TXPACKS3_TX_RESET_CFG_PP_WOX = 194;
static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL1_PP_WOX = 195;
static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL2_PP_WOX = 196;
static const uint64_t IDX_CEN_TXPACKS3_TX_TDR_CNTL3_PP_WOX = 197;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_PL = 198;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_SPARE_MODE_PL = 199;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_BIST_STAT_PL = 200;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_PRBS_MODE_PL = 201;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_DATA_CNTL_GCRMSG_PL = 202;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_FIR_PL = 203;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_FIR_MASK_PL = 204;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_FIR_ERROR_INJECT_PL = 205;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_MODE_FAST_PL_NCX = 206;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_TX_CNTL_GCRMSG_PL = 207;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_PL = 208;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_SPARE_MODE_PL = 209;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_BIST_STAT_PL = 210;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_PRBS_MODE_PL = 211;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_DATA_CNTL_GCRMSG_PL = 212;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_FIR_PL = 213;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_FIR_MASK_PL = 214;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_FIR_ERROR_INJECT_PL = 215;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_MODE_FAST_PL_NCX = 216;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_TX_CNTL_GCRMSG_PL = 217;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_PL = 218;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_SPARE_MODE_PL = 219;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_BIST_STAT_PL = 220;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_PRBS_MODE_PL = 221;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_DATA_CNTL_GCRMSG_PL = 222;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_FIR_PL = 223;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_FIR_MASK_PL = 224;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_FIR_ERROR_INJECT_PL = 225;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_MODE_FAST_PL_NCX = 226;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_TX_CNTL_GCRMSG_PL = 227;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_PL = 228;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_SPARE_MODE_PL = 229;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_BIST_STAT_PL = 230;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_PRBS_MODE_PL = 231;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_DATA_CNTL_GCRMSG_PL = 232;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_FIR_PL = 233;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_FIR_MASK_PL = 234;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_FIR_ERROR_INJECT_PL = 235;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_MODE_FAST_PL_NCX = 236;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE0_TX_CNTL_GCRMSG_PL = 237;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_WIRETEST_PP_WOX = 238;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_MODE_PP_WOX = 239;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_SLS_GCRMSG_PP_WOX = 240;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_A_PP_WOX = 241;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_B_PP_WOX = 242;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_DYN_RECAL_TIMEOUTS_PP_WOX = 243;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BIST_CNTL_PP_WOX = 244;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_BER_CNTL_SLS_PP_WOX = 245;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_CNTL_PP_WOX = 246;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_RESET_CFG_PP_WOX = 247;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL1_PP_WOX = 248;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL2_PP_WOX = 249;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_TX_TDR_CNTL3_PP_WOX = 250;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_PL = 251;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_SPARE_MODE_PL = 252;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_BIST_STAT_PL = 253;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_PRBS_MODE_PL = 254;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_DATA_CNTL_GCRMSG_PL = 255;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_FIR_PL = 256;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_FIR_MASK_PL = 257;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_FIR_ERROR_INJECT_PL = 258;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_MODE_FAST_PL_NCX = 259;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE1_TX_CNTL_GCRMSG_PL = 260;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_PL = 261;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_SPARE_MODE_PL = 262;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_BIST_STAT_PL = 263;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_PRBS_MODE_PL = 264;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_DATA_CNTL_GCRMSG_PL = 265;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_FIR_PL = 266;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_FIR_MASK_PL = 267;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_FIR_ERROR_INJECT_PL = 268;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_MODE_FAST_PL_NCX = 269;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE2_TX_CNTL_GCRMSG_PL = 270;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_PL = 271;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_SPARE_MODE_PL = 272;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_BIST_STAT_PL = 273;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_PRBS_MODE_PL = 274;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_DATA_CNTL_GCRMSG_PL = 275;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_FIR_PL = 276;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_FIR_MASK_PL = 277;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_FIR_ERROR_INJECT_PL = 278;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_MODE_FAST_PL_NCX = 279;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE3_TX_CNTL_GCRMSG_PL = 280;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_PL = 281;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_SPARE_MODE_PL = 282;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_BIST_STAT_PL = 283;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_PRBS_MODE_PL = 284;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_DATA_CNTL_GCRMSG_PL = 285;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_FIR_PL = 286;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_FIR_MASK_PL = 287;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_FIR_ERROR_INJECT_PL = 288;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_MODE_FAST_PL_NCX = 289;
static const uint64_t IDX_CEN_TXPACKS4_TXPACK_4_SLICE4_TX_CNTL_GCRMSG_PL = 290;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_PL = 291;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_SPARE_MODE_PL = 292;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_BIST_STAT_PL = 293;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_PRBS_MODE_PL = 294;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_DATA_CNTL_GCRMSG_PL = 295;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_FIR_PL = 296;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_FIR_MASK_PL = 297;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_FIR_ERROR_INJECT_PL = 298;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_MODE_FAST_PL_NCX = 299;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE0_TX_CNTL_GCRMSG_PL = 300;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_WIRETEST_PP_WOX = 301;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_MODE_PP_WOX = 302;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_SLS_GCRMSG_PP_WOX = 303;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_A_PP_WOX = 304;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_B_PP_WOX = 305;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_DYN_RECAL_TIMEOUTS_PP_WOX = 306;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BIST_CNTL_PP_WOX = 307;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_BER_CNTL_SLS_PP_WOX = 308;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_CNTL_PP_WOX = 309;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_RESET_CFG_PP_WOX = 310;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL1_PP_WOX = 311;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL2_PP_WOX = 312;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_TX_TDR_CNTL3_PP_WOX = 313;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_PL = 314;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_SPARE_MODE_PL = 315;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_BIST_STAT_PL = 316;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_PRBS_MODE_PL = 317;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_DATA_CNTL_GCRMSG_PL = 318;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_FIR_PL = 319;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_FIR_MASK_PL = 320;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_FIR_ERROR_INJECT_PL = 321;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_MODE_FAST_PL_NCX = 322;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE1_TX_CNTL_GCRMSG_PL = 323;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_PL = 324;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_SPARE_MODE_PL = 325;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_BIST_STAT_PL = 326;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_PRBS_MODE_PL = 327;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_DATA_CNTL_GCRMSG_PL = 328;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_FIR_PL = 329;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_FIR_MASK_PL = 330;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_FIR_ERROR_INJECT_PL = 331;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_MODE_FAST_PL_NCX = 332;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE2_TX_CNTL_GCRMSG_PL = 333;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_PL = 334;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_SPARE_MODE_PL = 335;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_BIST_STAT_PL = 336;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_PRBS_MODE_PL = 337;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_DATA_CNTL_GCRMSG_PL = 338;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_FIR_PL = 339;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_FIR_MASK_PL = 340;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_FIR_ERROR_INJECT_PL = 341;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_MODE_FAST_PL_NCX = 342;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE3_TX_CNTL_GCRMSG_PL = 343;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_PL = 344;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_SPARE_MODE_PL = 345;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_BIST_STAT_PL = 346;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_PRBS_MODE_PL = 347;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_DATA_CNTL_GCRMSG_PL = 348;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_FIR_PL = 349;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_FIR_MASK_PL = 350;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_FIR_ERROR_INJECT_PL = 351;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_MODE_FAST_PL_NCX = 352;
static const uint64_t IDX_CEN_TXPACKS5_TXPACK_5_SLICE4_TX_CNTL_GCRMSG_PL = 353;
static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL0 = 354;
static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL1 = 355;
static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL2_RO = 356;
static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP0 = 357;
static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP1 = 358;
static const uint64_t IDX_CEN_DMIPLL_PLL_CNTRL_SETUP2_RO = 359;
static const uint64_t IDX_CEN_CUPLL_CTL = 360;
static const uint64_t IDX_CEN_CUPLL_CTL_SETUP_RO = 361;
static const uint64_t IDX_CEN_RX_CLK_MODE_PG = 362;
static const uint64_t IDX_CEN_RX_SPARE_MODE_PG = 363;
static const uint64_t IDX_CEN_RX_MODE_PG = 364;
static const uint64_t IDX_CEN_RX_RESET_ACT_PG_NCX = 365;
static const uint64_t IDX_CEN_RX_ID1_PG = 366;
static const uint64_t IDX_CEN_RX_ID2_PG = 367;
static const uint64_t IDX_CEN_RX_ID3_PG = 368;
static const uint64_t IDX_CEN_RX_MINIKERF_PG = 369;
static const uint64_t IDX_CEN_RX_DYN_RPR_DEBUG2_PG = 370;
static const uint64_t IDX_CEN_RX_SLS_MODE_PG = 371;
static const uint64_t IDX_CEN_RX_TRAINING_START_PG = 372;
static const uint64_t IDX_CEN_RX_TRAINING_STATUS_PG = 373;
static const uint64_t IDX_CEN_RX_RECAL_STATUS_PG = 374;
static const uint64_t IDX_CEN_RX_TIMEOUT_SEL_PG = 375;
static const uint64_t IDX_CEN_RX_FIFO_MODE_PG = 376;
static const uint64_t IDX_CEN_RX_DYN_RPR_MODE_PG = 377;
static const uint64_t IDX_CEN_RX_FIR1_PG = 378;
static const uint64_t IDX_CEN_RX_FIR2_PG = 379;
static const uint64_t IDX_CEN_RX_FIR1_MASK_PG = 380;
static const uint64_t IDX_CEN_RX_FIR2_MASK_PG = 381;
static const uint64_t IDX_CEN_RX_FIR1_ERROR_INJECT_PG = 382;
static const uint64_t IDX_CEN_RX_FIR2_ERROR_INJECT_PG = 383;
static const uint64_t IDX_CEN_RX_FIR_TRAINING_PG = 384;
static const uint64_t IDX_CEN_RX_FIR_TRAINING_MASK_PG = 385;
static const uint64_t IDX_CEN_RX_TIMEOUT_SEL1_PG = 386;
static const uint64_t IDX_CEN_RX_LANE_BAD_VEC_0_15_PG = 387;
static const uint64_t IDX_CEN_RX_LANE_BAD_VEC_16_31_PG = 388;
static const uint64_t IDX_CEN_RX_LANE_DISABLED_VEC_0_15_PG = 389;
static const uint64_t IDX_CEN_RX_LANE_DISABLED_VEC_16_31_PG = 390;
static const uint64_t IDX_CEN_RX_LANE_SWAPPED_VEC_0_15_PG = 391;
static const uint64_t IDX_CEN_RX_LANE_SWAPPED_VEC_16_31_PG = 392;
static const uint64_t IDX_CEN_RX_WIRETEST_LANEINFO_PG_ROX = 393;
static const uint64_t IDX_CEN_RX_WIRETEST_GCRMSG_PG = 394;
static const uint64_t IDX_CEN_RX_DESKEW_GCRMSG_PG = 395;
static const uint64_t IDX_CEN_RX_DESKEW_MODE_PG = 396;
static const uint64_t IDX_CEN_RX_DESKEW_STATUS_PG = 397;
static const uint64_t IDX_CEN_RX_BAD_LANE_ENC_GCRMSG_PG = 398;
static const uint64_t IDX_CEN_RX_TX_BUS_INFO_PG = 399;
static const uint64_t IDX_CEN_RX_SLS_LANE_ENC_GCRMSG_PG = 400;
static const uint64_t IDX_CEN_RX_FENCE_PG = 401;
static const uint64_t IDX_CEN_RX_TIMEOUT_SEL2_PG = 402;
static const uint64_t IDX_CEN_RX_MISC_ANALOG_PG = 403;
static const uint64_t IDX_CEN_RX_DYN_RPR_GCRMSG_PG = 404;
static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING1_PG = 405;
static const uint64_t IDX_CEN_RX_EO_FINAL_L2U_GCRMSG_PG = 406;
static const uint64_t IDX_CEN_RX_DYN_RECAL_PG = 407;
static const uint64_t IDX_CEN_RX_WT_CLK_STATUS_PG = 408;
static const uint64_t IDX_CEN_RX_DYN_RECAL_CONFIG_PG = 409;
static const uint64_t IDX_CEN_RX_DYN_RECAL_GCRMSG_PG = 410;
static const uint64_t IDX_CEN_RX_WIRETEST_PLL_CNTL_PG = 411;
static const uint64_t IDX_CEN_RX_EO_STEP_CNTL_PG = 412;
static const uint64_t IDX_CEN_RX_EO_STEP_STAT_PG = 413;
static const uint64_t IDX_CEN_RX_AP_PG = 414;
static const uint64_t IDX_CEN_RX_AN_PG = 415;
static const uint64_t IDX_CEN_RX_AMIN_PG = 416;
static const uint64_t IDX_CEN_RX_AMAX_PG = 417;
static const uint64_t IDX_CEN_RX_AMP_VAL_PG = 418;
static const uint64_t IDX_CEN_RX_AMP_OFFSET_PG = 419;
static const uint64_t IDX_CEN_RX_EO_CONVERGENCE_PG = 420;
static const uint64_t IDX_CEN_RX_SLS_RCVY_PG = 421;
static const uint64_t IDX_CEN_RX_SLS_RCVY_GCRMSG_PG = 422;
static const uint64_t IDX_CEN_RX_TX_LANE_INFO_GCRMSG_PG = 423;
static const uint64_t IDX_CEN_RX_ERR_TALLYING_GCRMSG_PG = 424;
static const uint64_t IDX_CEN_RX_TRACE_PG = 425;
static const uint64_t IDX_CEN_RX_RC_STEP_CNTL_PG = 426;
static const uint64_t IDX_CEN_RX_SERVO_BER_COUNT_PG = 427;
static const uint64_t IDX_CEN_RX_DYN_RPR_DEBUG_PG_NCX = 428;
static const uint64_t IDX_CEN_RX_DYN_RPR_ERR_TALLYING2_PG = 429;
static const uint64_t IDX_CEN_RX_RESULT_CHK_PG = 430;
static const uint64_t IDX_CEN_RX_BER_CHK_PG = 431;
static const uint64_t IDX_CEN_RX_SLS_RCVY_FIN_GCRMSG_PG = 432;
static const uint64_t IDX_CEN_RX_MODE1_PP = 433;
static const uint64_t IDX_CEN_RX_CNTL_FAST_PP = 434;
static const uint64_t IDX_CEN_RX_DYN_RECAL_TIMEOUTS_PP = 435;
static const uint64_t IDX_CEN_RX_BER_CNTL_PP = 436;
static const uint64_t IDX_CEN_RX_BER_MODE_PP = 437;
static const uint64_t IDX_CEN_RX_SERVO_TO1_PP = 438;
static const uint64_t IDX_CEN_RX_SERVO_TO2_PP = 439;
static const uint64_t IDX_CEN_RX_SERVO_TO3_PP = 440;
static const uint64_t IDX_CEN_RX_DFE_CONFIG_PP = 441;
static const uint64_t IDX_CEN_RX_DFE_TIMERS_PP = 442;
static const uint64_t IDX_CEN_RX_RESET_CFG_PP = 443;
static const uint64_t IDX_CEN_RX_RECAL_TO1_PP = 444;
static const uint64_t IDX_CEN_RX_RECAL_TO2_PP = 445;
static const uint64_t IDX_CEN_RX_RECAL_TO3_PP = 446;
static const uint64_t IDX_CEN_RX_MODE2_PP = 447;
static const uint64_t IDX_CEN_RX_BIST_GCRMSG_PP = 448;
static const uint64_t IDX_CEN_RX_SCOPE_CNTL_PP = 449;
static const uint64_t IDX_CEN_RX_MODE3_PP = 450;
static const uint64_t IDX_CEN_RX_STOP_CNTL_STAT_PG = 451;
static const uint64_t IDX_CEN_RX_STOP_ADDR_LSB_PG = 452;
static const uint64_t IDX_CEN_RX_STOP_MASK_LSB_PG = 453;
static const uint64_t IDX_CEN_RX_WT_CONFIG_PG = 454;
static const uint64_t IDX_CEN_TXPACKS0_RX_MODE1_PP_WOX = 455;
static const uint64_t IDX_CEN_TXPACKS0_RX_CNTL_FAST_PP_WOX = 456;
static const uint64_t IDX_CEN_TXPACKS0_RX_DYN_RECAL_TIMEOUTS_PP_WOX = 457;
static const uint64_t IDX_CEN_TXPACKS0_RX_BER_CNTL_PP_WOX = 458;
static const uint64_t IDX_CEN_TXPACKS0_RX_BER_MODE_PP_WOX = 459;
static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO1_PP_WOX = 460;
static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO2_PP_WOX = 461;
static const uint64_t IDX_CEN_TXPACKS0_RX_SERVO_TO3_PP_WOX = 462;
static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_CONFIG_PP_WOX = 463;
static const uint64_t IDX_CEN_TXPACKS0_RX_DFE_TIMERS_PP_WOX = 464;
static const uint64_t IDX_CEN_TXPACKS0_RX_RESET_CFG_PP_WOX = 465;
static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO1_PP_WOX = 466;
static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO2_PP_WOX = 467;
static const uint64_t IDX_CEN_TXPACKS0_RX_RECAL_TO3_PP_WOX = 468;
static const uint64_t IDX_CEN_TXPACKS0_RX_MODE2_PP_WOX = 469;
static const uint64_t IDX_CEN_TXPACKS0_RX_BIST_GCRMSG_PP_WOX = 470;
static const uint64_t IDX_CEN_TXPACKS0_RX_SCOPE_CNTL_PP_WOX = 471;
static const uint64_t IDX_CEN_TXPACKS0_RX_MODE3_PP_WOX = 472;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_MODE_PL = 473;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_CNTL_PL = 474;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SPARE_MODE_PL = 475;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_BIST_STAT_PL = 476;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_EVEN_PL = 477;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_OFFSET_ODD_PL = 478;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMP_VAL_PL = 479;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMP_CNTL_PL = 480;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_PROT_MODE_PL = 481;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIFO_STAT_PL = 482;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AP_PL = 483;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AN_PL = 484;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_AMIN_PL = 485;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_EVEN_PL = 486;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_H1_ODD_PL = 487;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_PRBS_MODE_PL = 488;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_DESKEW_STAT_PL = 489;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIR_PL = 490;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIR_MASK_PL = 491;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_FIR_ERROR_INJECT_PL = 492;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SLS_PL = 493;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_WT_STATUS_PL = 494;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_SERVO_CNTL_PL = 495;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_DFE_CLKADJ_PL = 496;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_TRACE_PL = 497;
static const uint64_t IDX_CEN_TXPACKS0_SLICE0_RX_EYE_OPT_STAT_PL = 498;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_MODE_PL = 499;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_CNTL_PL = 500;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SPARE_MODE_PL = 501;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_BIST_STAT_PL = 502;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_EVEN_PL = 503;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_OFFSET_ODD_PL = 504;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMP_VAL_PL = 505;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMP_CNTL_PL = 506;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_PROT_MODE_PL = 507;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIFO_STAT_PL = 508;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AP_PL = 509;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AN_PL = 510;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_AMIN_PL = 511;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_EVEN_PL = 512;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_H1_ODD_PL = 513;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_PRBS_MODE_PL = 514;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_DESKEW_STAT_PL = 515;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIR_PL = 516;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIR_MASK_PL = 517;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_FIR_ERROR_INJECT_PL = 518;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SLS_PL = 519;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_WT_STATUS_PL = 520;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_SERVO_CNTL_PL = 521;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_DFE_CLKADJ_PL = 522;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_TRACE_PL = 523;
static const uint64_t IDX_CEN_TXPACKS0_SLICE1_RX_EYE_OPT_STAT_PL = 524;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_MODE_PL = 525;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_CNTL_PL = 526;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SPARE_MODE_PL = 527;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_BIST_STAT_PL = 528;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_EVEN_PL = 529;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_OFFSET_ODD_PL = 530;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMP_VAL_PL = 531;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMP_CNTL_PL = 532;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_PROT_MODE_PL = 533;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIFO_STAT_PL = 534;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AP_PL = 535;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AN_PL = 536;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_AMIN_PL = 537;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_EVEN_PL = 538;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_H1_ODD_PL = 539;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_PRBS_MODE_PL = 540;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_DESKEW_STAT_PL = 541;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIR_PL = 542;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIR_MASK_PL = 543;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_FIR_ERROR_INJECT_PL = 544;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SLS_PL = 545;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_WT_STATUS_PL = 546;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_SERVO_CNTL_PL = 547;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_DFE_CLKADJ_PL = 548;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_TRACE_PL = 549;
static const uint64_t IDX_CEN_TXPACKS0_SLICE2_RX_EYE_OPT_STAT_PL = 550;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_MODE_PL = 551;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_CNTL_PL = 552;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SPARE_MODE_PL = 553;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_BIST_STAT_PL = 554;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_EVEN_PL = 555;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_OFFSET_ODD_PL = 556;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMP_VAL_PL = 557;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMP_CNTL_PL = 558;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_PROT_MODE_PL = 559;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIFO_STAT_PL = 560;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AP_PL = 561;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AN_PL = 562;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_AMIN_PL = 563;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_EVEN_PL = 564;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_H1_ODD_PL = 565;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_PRBS_MODE_PL = 566;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_DESKEW_STAT_PL = 567;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIR_PL = 568;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIR_MASK_PL = 569;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_FIR_ERROR_INJECT_PL = 570;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SLS_PL = 571;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_WT_STATUS_PL = 572;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_SERVO_CNTL_PL = 573;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_DFE_CLKADJ_PL = 574;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_TRACE_PL = 575;
static const uint64_t IDX_CEN_TXPACKS0_SLICE3_RX_EYE_OPT_STAT_PL = 576;
static const uint64_t IDX_CEN_TXPACKS1_RX_MODE1_PP_WOX = 577;
static const uint64_t IDX_CEN_TXPACKS1_RX_CNTL_FAST_PP_WOX = 578;
static const uint64_t IDX_CEN_TXPACKS1_RX_DYN_RECAL_TIMEOUTS_PP_WOX = 579;
static const uint64_t IDX_CEN_TXPACKS1_RX_BER_CNTL_PP_WOX = 580;
static const uint64_t IDX_CEN_TXPACKS1_RX_BER_MODE_PP_WOX = 581;
static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO1_PP_WOX = 582;
static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO2_PP_WOX = 583;
static const uint64_t IDX_CEN_TXPACKS1_RX_SERVO_TO3_PP_WOX = 584;
static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_CONFIG_PP_WOX = 585;
static const uint64_t IDX_CEN_TXPACKS1_RX_DFE_TIMERS_PP_WOX = 586;
static const uint64_t IDX_CEN_TXPACKS1_RX_RESET_CFG_PP_WOX = 587;
static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO1_PP_WOX = 588;
static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO2_PP_WOX = 589;
static const uint64_t IDX_CEN_TXPACKS1_RX_RECAL_TO3_PP_WOX = 590;
static const uint64_t IDX_CEN_TXPACKS1_RX_MODE2_PP_WOX = 591;
static const uint64_t IDX_CEN_TXPACKS1_RX_BIST_GCRMSG_PP_WOX = 592;
static const uint64_t IDX_CEN_TXPACKS1_RX_SCOPE_CNTL_PP_WOX = 593;
static const uint64_t IDX_CEN_TXPACKS1_RX_MODE3_PP_WOX = 594;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_MODE_PL = 595;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_CNTL_PL = 596;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SPARE_MODE_PL = 597;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_BIST_STAT_PL = 598;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_EVEN_PL = 599;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_OFFSET_ODD_PL = 600;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMP_VAL_PL = 601;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMP_CNTL_PL = 602;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_PROT_MODE_PL = 603;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIFO_STAT_PL = 604;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AP_PL = 605;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AN_PL = 606;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_AMIN_PL = 607;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_EVEN_PL = 608;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_H1_ODD_PL = 609;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_PRBS_MODE_PL = 610;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_DESKEW_STAT_PL = 611;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIR_PL = 612;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIR_MASK_PL = 613;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_FIR_ERROR_INJECT_PL = 614;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SLS_PL = 615;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_WT_STATUS_PL = 616;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_SERVO_CNTL_PL = 617;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_DFE_CLKADJ_PL = 618;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_TRACE_PL = 619;
static const uint64_t IDX_CEN_TXPACKS1_SLICE0_RX_EYE_OPT_STAT_PL = 620;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_MODE_PL = 621;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_CNTL_PL = 622;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SPARE_MODE_PL = 623;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_BIST_STAT_PL = 624;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_EVEN_PL = 625;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_OFFSET_ODD_PL = 626;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMP_VAL_PL = 627;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMP_CNTL_PL = 628;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_PROT_MODE_PL = 629;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIFO_STAT_PL = 630;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AP_PL = 631;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AN_PL = 632;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_AMIN_PL = 633;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_EVEN_PL = 634;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_H1_ODD_PL = 635;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_PRBS_MODE_PL = 636;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_DESKEW_STAT_PL = 637;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIR_PL = 638;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIR_MASK_PL = 639;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_FIR_ERROR_INJECT_PL = 640;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SLS_PL = 641;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_WT_STATUS_PL = 642;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_SERVO_CNTL_PL = 643;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_DFE_CLKADJ_PL = 644;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_TRACE_PL = 645;
static const uint64_t IDX_CEN_TXPACKS1_SLICE1_RX_EYE_OPT_STAT_PL = 646;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_MODE_PL = 647;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_CNTL_PL = 648;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SPARE_MODE_PL = 649;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_BIST_STAT_PL = 650;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_EVEN_PL = 651;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_OFFSET_ODD_PL = 652;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMP_VAL_PL = 653;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMP_CNTL_PL = 654;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_PROT_MODE_PL = 655;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIFO_STAT_PL = 656;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AP_PL = 657;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AN_PL = 658;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_AMIN_PL = 659;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_EVEN_PL = 660;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_H1_ODD_PL = 661;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_PRBS_MODE_PL = 662;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_DESKEW_STAT_PL = 663;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIR_PL = 664;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIR_MASK_PL = 665;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_FIR_ERROR_INJECT_PL = 666;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SLS_PL = 667;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_WT_STATUS_PL = 668;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_SERVO_CNTL_PL = 669;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_DFE_CLKADJ_PL = 670;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_TRACE_PL = 671;
static const uint64_t IDX_CEN_TXPACKS1_SLICE2_RX_EYE_OPT_STAT_PL = 672;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_MODE_PL = 673;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_CNTL_PL = 674;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SPARE_MODE_PL = 675;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_BIST_STAT_PL = 676;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_EVEN_PL = 677;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_OFFSET_ODD_PL = 678;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMP_VAL_PL = 679;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMP_CNTL_PL = 680;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_PROT_MODE_PL = 681;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIFO_STAT_PL = 682;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AP_PL = 683;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AN_PL = 684;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_AMIN_PL = 685;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_EVEN_PL = 686;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_H1_ODD_PL = 687;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_PRBS_MODE_PL = 688;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_DESKEW_STAT_PL = 689;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIR_PL = 690;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIR_MASK_PL = 691;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_FIR_ERROR_INJECT_PL = 692;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SLS_PL = 693;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_WT_STATUS_PL = 694;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_SERVO_CNTL_PL = 695;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_DFE_CLKADJ_PL = 696;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_TRACE_PL = 697;
static const uint64_t IDX_CEN_TXPACKS1_SLICE3_RX_EYE_OPT_STAT_PL = 698;
static const uint64_t IDX_CEN_TXPACKS2_RX_MODE1_PP_WOX = 699;
static const uint64_t IDX_CEN_TXPACKS2_RX_CNTL_FAST_PP_WOX = 700;
static const uint64_t IDX_CEN_TXPACKS2_RX_DYN_RECAL_TIMEOUTS_PP_WOX = 701;
static const uint64_t IDX_CEN_TXPACKS2_RX_BER_CNTL_PP_WOX = 702;
static const uint64_t IDX_CEN_TXPACKS2_RX_BER_MODE_PP_WOX = 703;
static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO1_PP_WOX = 704;
static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO2_PP_WOX = 705;
static const uint64_t IDX_CEN_TXPACKS2_RX_SERVO_TO3_PP_WOX = 706;
static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_CONFIG_PP_WOX = 707;
static const uint64_t IDX_CEN_TXPACKS2_RX_DFE_TIMERS_PP_WOX = 708;
static const uint64_t IDX_CEN_TXPACKS2_RX_RESET_CFG_PP_WOX = 709;
static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO1_PP_WOX = 710;
static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO2_PP_WOX = 711;
static const uint64_t IDX_CEN_TXPACKS2_RX_RECAL_TO3_PP_WOX = 712;
static const uint64_t IDX_CEN_TXPACKS2_RX_MODE2_PP_WOX = 713;
static const uint64_t IDX_CEN_TXPACKS2_RX_BIST_GCRMSG_PP_WOX = 714;
static const uint64_t IDX_CEN_TXPACKS2_RX_SCOPE_CNTL_PP_WOX = 715;
static const uint64_t IDX_CEN_TXPACKS2_RX_MODE3_PP_WOX = 716;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_MODE_PL = 717;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_CNTL_PL = 718;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SPARE_MODE_PL = 719;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_BIST_STAT_PL = 720;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_EVEN_PL = 721;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_OFFSET_ODD_PL = 722;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMP_VAL_PL = 723;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMP_CNTL_PL = 724;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_PROT_MODE_PL = 725;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIFO_STAT_PL = 726;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AP_PL = 727;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AN_PL = 728;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_AMIN_PL = 729;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_EVEN_PL = 730;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_H1_ODD_PL = 731;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_PRBS_MODE_PL = 732;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_DESKEW_STAT_PL = 733;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIR_PL = 734;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIR_MASK_PL = 735;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_FIR_ERROR_INJECT_PL = 736;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SLS_PL = 737;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_WT_STATUS_PL = 738;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_SERVO_CNTL_PL = 739;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_DFE_CLKADJ_PL = 740;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_TRACE_PL = 741;
static const uint64_t IDX_CEN_TXPACKS2_SLICE0_RX_EYE_OPT_STAT_PL = 742;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_MODE_PL = 743;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_CNTL_PL = 744;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SPARE_MODE_PL = 745;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_BIST_STAT_PL = 746;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_EVEN_PL = 747;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_OFFSET_ODD_PL = 748;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMP_VAL_PL = 749;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMP_CNTL_PL = 750;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_PROT_MODE_PL = 751;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIFO_STAT_PL = 752;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AP_PL = 753;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AN_PL = 754;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_AMIN_PL = 755;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_EVEN_PL = 756;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_H1_ODD_PL = 757;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_PRBS_MODE_PL = 758;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_DESKEW_STAT_PL = 759;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIR_PL = 760;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIR_MASK_PL = 761;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_FIR_ERROR_INJECT_PL = 762;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SLS_PL = 763;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_WT_STATUS_PL = 764;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_SERVO_CNTL_PL = 765;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_DFE_CLKADJ_PL = 766;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_TRACE_PL = 767;
static const uint64_t IDX_CEN_TXPACKS2_SLICE1_RX_EYE_OPT_STAT_PL = 768;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_MODE_PL = 769;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_CNTL_PL = 770;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SPARE_MODE_PL = 771;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_BIST_STAT_PL = 772;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_EVEN_PL = 773;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_OFFSET_ODD_PL = 774;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMP_VAL_PL = 775;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMP_CNTL_PL = 776;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_PROT_MODE_PL = 777;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIFO_STAT_PL = 778;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AP_PL = 779;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AN_PL = 780;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_AMIN_PL = 781;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_EVEN_PL = 782;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_H1_ODD_PL = 783;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_PRBS_MODE_PL = 784;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_DESKEW_STAT_PL = 785;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIR_PL = 786;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIR_MASK_PL = 787;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_FIR_ERROR_INJECT_PL = 788;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SLS_PL = 789;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_WT_STATUS_PL = 790;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_SERVO_CNTL_PL = 791;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_DFE_CLKADJ_PL = 792;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_TRACE_PL = 793;
static const uint64_t IDX_CEN_TXPACKS2_SLICE2_RX_EYE_OPT_STAT_PL = 794;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_MODE_PL = 795;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_CNTL_PL = 796;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SPARE_MODE_PL = 797;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_BIST_STAT_PL = 798;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_EVEN_PL = 799;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_OFFSET_ODD_PL = 800;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMP_VAL_PL = 801;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMP_CNTL_PL = 802;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_PROT_MODE_PL = 803;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIFO_STAT_PL = 804;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AP_PL = 805;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AN_PL = 806;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_AMIN_PL = 807;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_EVEN_PL = 808;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_H1_ODD_PL = 809;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_PRBS_MODE_PL = 810;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_DESKEW_STAT_PL = 811;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIR_PL = 812;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIR_MASK_PL = 813;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_FIR_ERROR_INJECT_PL = 814;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SLS_PL = 815;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_WT_STATUS_PL = 816;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_SERVO_CNTL_PL = 817;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_DFE_CLKADJ_PL = 818;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_TRACE_PL = 819;
static const uint64_t IDX_CEN_TXPACKS2_SLICE3_RX_EYE_OPT_STAT_PL = 820;
static const uint64_t IDX_CEN_TXPACKS3_RX_MODE1_PP_WOX = 821;
static const uint64_t IDX_CEN_TXPACKS3_RX_CNTL_FAST_PP_WOX = 822;
static const uint64_t IDX_CEN_TXPACKS3_RX_DYN_RECAL_TIMEOUTS_PP_WOX = 823;
static const uint64_t IDX_CEN_TXPACKS3_RX_BER_CNTL_PP_WOX = 824;
static const uint64_t IDX_CEN_TXPACKS3_RX_BER_MODE_PP_WOX = 825;
static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO1_PP_WOX = 826;
static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO2_PP_WOX = 827;
static const uint64_t IDX_CEN_TXPACKS3_RX_SERVO_TO3_PP_WOX = 828;
static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_CONFIG_PP_WOX = 829;
static const uint64_t IDX_CEN_TXPACKS3_RX_DFE_TIMERS_PP_WOX = 830;
static const uint64_t IDX_CEN_TXPACKS3_RX_RESET_CFG_PP_WOX = 831;
static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO1_PP_WOX = 832;
static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO2_PP_WOX = 833;
static const uint64_t IDX_CEN_TXPACKS3_RX_RECAL_TO3_PP_WOX = 834;
static const uint64_t IDX_CEN_TXPACKS3_RX_MODE2_PP_WOX = 835;
static const uint64_t IDX_CEN_TXPACKS3_RX_BIST_GCRMSG_PP_WOX = 836;
static const uint64_t IDX_CEN_TXPACKS3_RX_SCOPE_CNTL_PP_WOX = 837;
static const uint64_t IDX_CEN_TXPACKS3_RX_MODE3_PP_WOX = 838;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_MODE_PL = 839;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_CNTL_PL = 840;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SPARE_MODE_PL = 841;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_BIST_STAT_PL = 842;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_EVEN_PL = 843;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_OFFSET_ODD_PL = 844;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMP_VAL_PL = 845;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMP_CNTL_PL = 846;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_PROT_MODE_PL = 847;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIFO_STAT_PL = 848;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AP_PL = 849;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AN_PL = 850;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_AMIN_PL = 851;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_EVEN_PL = 852;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_H1_ODD_PL = 853;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_PRBS_MODE_PL = 854;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_DESKEW_STAT_PL = 855;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIR_PL = 856;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIR_MASK_PL = 857;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_FIR_ERROR_INJECT_PL = 858;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SLS_PL = 859;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_WT_STATUS_PL = 860;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_SERVO_CNTL_PL = 861;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_DFE_CLKADJ_PL = 862;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_TRACE_PL = 863;
static const uint64_t IDX_CEN_TXPACKS3_SLICE0_RX_EYE_OPT_STAT_PL = 864;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_MODE_PL = 865;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_CNTL_PL = 866;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SPARE_MODE_PL = 867;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_BIST_STAT_PL = 868;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_EVEN_PL = 869;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_OFFSET_ODD_PL = 870;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMP_VAL_PL = 871;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMP_CNTL_PL = 872;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_PROT_MODE_PL = 873;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIFO_STAT_PL = 874;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AP_PL = 875;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AN_PL = 876;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_AMIN_PL = 877;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_EVEN_PL = 878;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_H1_ODD_PL = 879;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_PRBS_MODE_PL = 880;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_DESKEW_STAT_PL = 881;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIR_PL = 882;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIR_MASK_PL = 883;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_FIR_ERROR_INJECT_PL = 884;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SLS_PL = 885;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_WT_STATUS_PL = 886;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_SERVO_CNTL_PL = 887;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_DFE_CLKADJ_PL = 888;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_TRACE_PL = 889;
static const uint64_t IDX_CEN_TXPACKS3_SLICE1_RX_EYE_OPT_STAT_PL = 890;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_MODE_PL = 891;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_CNTL_PL = 892;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SPARE_MODE_PL = 893;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_BIST_STAT_PL = 894;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_EVEN_PL = 895;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_OFFSET_ODD_PL = 896;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMP_VAL_PL = 897;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMP_CNTL_PL = 898;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_PROT_MODE_PL = 899;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIFO_STAT_PL = 900;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AP_PL = 901;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AN_PL = 902;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_AMIN_PL = 903;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_EVEN_PL = 904;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_H1_ODD_PL = 905;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_PRBS_MODE_PL = 906;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_DESKEW_STAT_PL = 907;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIR_PL = 908;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIR_MASK_PL = 909;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_FIR_ERROR_INJECT_PL = 910;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SLS_PL = 911;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_WT_STATUS_PL = 912;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_SERVO_CNTL_PL = 913;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_DFE_CLKADJ_PL = 914;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_TRACE_PL = 915;
static const uint64_t IDX_CEN_TXPACKS3_SLICE2_RX_EYE_OPT_STAT_PL = 916;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_MODE_PL = 917;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_CNTL_PL = 918;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SPARE_MODE_PL = 919;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_BIST_STAT_PL = 920;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_EVEN_PL = 921;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_OFFSET_ODD_PL = 922;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMP_VAL_PL = 923;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMP_CNTL_PL = 924;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_PROT_MODE_PL = 925;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIFO_STAT_PL = 926;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AP_PL = 927;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AN_PL = 928;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_AMIN_PL = 929;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_EVEN_PL = 930;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_H1_ODD_PL = 931;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_PRBS_MODE_PL = 932;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_DESKEW_STAT_PL = 933;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIR_PL = 934;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIR_MASK_PL = 935;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_FIR_ERROR_INJECT_PL = 936;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SLS_PL = 937;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_WT_STATUS_PL = 938;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_SERVO_CNTL_PL = 939;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_DFE_CLKADJ_PL = 940;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_TRACE_PL = 941;
static const uint64_t IDX_CEN_TXPACKS3_SLICE3_RX_EYE_OPT_STAT_PL = 942;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE1_PP_WOX = 943;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_CNTL_FAST_PP_WOX = 944;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DYN_RECAL_TIMEOUTS_PP_WOX = 945;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_CNTL_PP_WOX = 946;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BER_MODE_PP_WOX = 947;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO1_PP_WOX = 948;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO2_PP_WOX = 949;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SERVO_TO3_PP_WOX = 950;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_CONFIG_PP_WOX = 951;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_DFE_TIMERS_PP_WOX = 952;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RESET_CFG_PP_WOX = 953;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO1_PP_WOX = 954;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO2_PP_WOX = 955;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_RECAL_TO3_PP_WOX = 956;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE2_PP_WOX = 957;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_BIST_GCRMSG_PP_WOX = 958;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_SCOPE_CNTL_PP_WOX = 959;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_RX_MODE3_PP_WOX = 960;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_MODE_PL = 961;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_CNTL_PL = 962;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SPARE_MODE_PL = 963;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_BIST_STAT_PL = 964;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_EVEN_PL = 965;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_OFFSET_ODD_PL = 966;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_VAL_PL = 967;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMP_CNTL_PL = 968;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PROT_MODE_PL = 969;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIFO_STAT_PL = 970;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AP_PL = 971;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AN_PL = 972;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_AMIN_PL = 973;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_EVEN_PL = 974;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_H1_ODD_PL = 975;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_PRBS_MODE_PL = 976;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DESKEW_STAT_PL = 977;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_PL = 978;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_MASK_PL = 979;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_FIR_ERROR_INJECT_PL = 980;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SLS_PL = 981;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_WT_STATUS_PL = 982;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_SERVO_CNTL_PL = 983;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_DFE_CLKADJ_PL = 984;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_TRACE_PL = 985;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE0_RX_EYE_OPT_STAT_PL = 986;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_MODE_PL = 987;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_CNTL_PL = 988;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SPARE_MODE_PL = 989;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_BIST_STAT_PL = 990;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_EVEN_PL = 991;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_OFFSET_ODD_PL = 992;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_VAL_PL = 993;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMP_CNTL_PL = 994;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PROT_MODE_PL = 995;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIFO_STAT_PL = 996;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AP_PL = 997;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AN_PL = 998;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_AMIN_PL = 999;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_EVEN_PL = 1000;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_H1_ODD_PL = 1001;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_PRBS_MODE_PL = 1002;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DESKEW_STAT_PL = 1003;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_PL = 1004;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_MASK_PL = 1005;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_FIR_ERROR_INJECT_PL = 1006;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SLS_PL = 1007;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_WT_STATUS_PL = 1008;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_SERVO_CNTL_PL = 1009;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_DFE_CLKADJ_PL = 1010;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_TRACE_PL = 1011;
static const uint64_t IDX_CEN_TXPACKS4_RXPACK_4_SLICE1_RX_EYE_OPT_STAT_PL = 1012;
static const uint64_t IDX_CEN_SCOM_MODE_PB = 1013;
static const uint64_t IDX_CEN_FIR_REG = 1014;
static const uint64_t IDX_CEN_FIR_REG_WOX_AND = 1015;
static const uint64_t IDX_CEN_FIR_REG_WOX_OR = 1016;
static const uint64_t IDX_CEN_FIR_MASK_REG = 1017;
static const uint64_t IDX_CEN_FIR_MASK_REG_WOX_AND = 1018;
static const uint64_t IDX_CEN_FIR_MASK_REG_WOX_OR = 1019;
static const uint64_t IDX_CEN_FIR_ACTION0_REG = 1020;
static const uint64_t IDX_CEN_FIR_ACTION1_REG = 1021;
static const uint64_t IDX_CEN_FIR_WOF_REG = 1022;
static const uint64_t IDX_CEN_TX_IMPCAL_NVAL_PB = 1023;
static const uint64_t IDX_CEN_TX_IMPCAL_PVAL_PB = 1024;
static const uint64_t IDX_CEN_TX_IMPCAL_P_4X_PB = 1025;
static const uint64_t IDX_CEN_TX_IMPCAL_SWO1_PB = 1026;
static const uint64_t IDX_CEN_TX_IMPCAL_SWO2_PB = 1027;
static const uint64_t IDX_CEN_TX_ANALOG_IREF_PB = 1028;
static const uint64_t IDX_CEN_TX_MINIKERF_PB = 1029;
static const uint64_t IDX_CEN_TX_INIT_VERSION_PB = 1030;
static const uint64_t IDX_CEN_TX_SCRATCH_REG_PB = 1031;
static const uint64_t IDX_CEN_RX_FIR_RESET_PB = 1032;
static const uint64_t IDX_CEN_RX_FIR_PB = 1033;
static const uint64_t IDX_CEN_RX_FIR_MASK_PB = 1034;
static const uint64_t IDX_CEN_RX_FIR_ERROR_INJECT_PB = 1035;
static const uint64_t IDX_CEN_MBCCFGQ = 1036;
static const uint64_t IDX_CEN_MBCDCPMQ = 1037;
static const uint64_t IDX_CEN_MBCELOGQ = 1038;
static const uint64_t IDX_CEN_MBCPGQ = 1039;
static const uint64_t IDX_CEN_MBCPRGQ = 1040;
static const uint64_t IDX_CEN_MBCPRGSQ_ROX = 1041;
static const uint64_t IDX_CEN_MBSACUMQ = 1042;
static const uint64_t IDX_CEN_MBSCERR1Q = 1043;
static const uint64_t IDX_CEN_MBSCERR2Q = 1044;
static const uint64_t IDX_CEN_MBSCFGQ = 1045;
static const uint64_t IDX_CEN_MBSDBG0CTLQ = 1046;
static const uint64_t IDX_CEN_MBSDBG0DATQ_ROX = 1047;
static const uint64_t IDX_CEN_MBSDBG1CTLQ = 1048;
static const uint64_t IDX_CEN_MBSDBG1DATQ_ROX = 1049;
static const uint64_t IDX_CEN_MBSDBGXDATQ_ROX = 1050;
static const uint64_t IDX_CEN_MBSEINJQ = 1051;
static const uint64_t IDX_CEN_MBSEMERTHROQ = 1052;
static const uint64_t IDX_CEN_MBSIBERR0Q = 1053;
static const uint64_t IDX_CEN_MBSIBERR1Q = 1054;
static const uint64_t IDX_CEN_MBSIBWRSTATQ = 1055;
static const uint64_t IDX_CEN_MBSOCC01HQ_ROX = 1056;
static const uint64_t IDX_CEN_MBSOCC23HQ_ROX = 1057;
static const uint64_t IDX_CEN_MBSOCCITCQ = 1058;
static const uint64_t IDX_CEN_MBSOCCSCANQ_ROX = 1059;
static const uint64_t IDX_CEN_MBSPMU0CFGQ = 1060;
static const uint64_t IDX_CEN_MBSPMU0CNTQ_ROX = 1061;
static const uint64_t IDX_CEN_MBSPMUSELQ = 1062;
static const uint64_t IDX_CEN_MBSSQ_ROX = 1063;
static const uint64_t IDX_CEN_MBS_FIR_ACTION0_REG_RO = 1064;
static const uint64_t IDX_CEN_MBS_FIR_ACTION1_REG_RO = 1065;
static const uint64_t IDX_CEN_MBS_FIR_MASK_REG = 1066;
static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_WO_AND = 1067;
static const uint64_t IDX_CEN_MBS_FIR_MASK_REG_WO_OR = 1068;
static const uint64_t IDX_CEN_MBS_FIR_REG = 1069;
static const uint64_t IDX_CEN_MBS_FIR_REG_WOX_AND = 1070;
static const uint64_t IDX_CEN_MBS_FIR_REG_WOX_OR = 1071;
static const uint64_t IDX_CEN_MBS_FIR_WOF = 1072;
static const uint64_t IDX_CEN_MBAXCR01Q = 1073;
static const uint64_t IDX_CEN_MBAXCR23Q = 1074;
static const uint64_t IDX_CEN_MBAXCRMSQ = 1075;
static const uint64_t IDX_CEN_MBSSIRACT0_RO = 1076;
static const uint64_t IDX_CEN_MBSSIRACT1_RO = 1077;
static const uint64_t IDX_CEN_MBSSIRMASK_RO = 1078;
static const uint64_t IDX_CEN_MBSSIRQ = 1079;
static const uint64_t IDX_CEN_MBSSIRQ_WO_AND = 1080;
static const uint64_t IDX_CEN_MBSSIRQ_WO_OR = 1081;
static const uint64_t IDX_CEN_MBSXCRQ = 1082;
static const uint64_t IDX_CEN_MCBISTS01_MBMPERQ = 1083;
static const uint64_t IDX_CEN_MCBISTS01_MBNCERQ = 1084;
static const uint64_t IDX_CEN_MCBISTS01_MBRCERQ = 1085;
static const uint64_t IDX_CEN_MCBISTS01_MBSEC0Q = 1086;
static const uint64_t IDX_CEN_MCBISTS01_MBSEC1Q = 1087;
static const uint64_t IDX_CEN_MCBISTS01_MBSEVRQ = 1088;
static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT0 = 1089;
static const uint64_t IDX_CEN_MCBISTS01_MBSFIRACT1 = 1090;
static const uint64_t IDX_CEN_MCBISTS01_MBSFIRMASK = 1091;
static const uint64_t IDX_CEN_MCBISTS01_MBSFIRMASK_WO_AND = 1092;
static const uint64_t IDX_CEN_MCBISTS01_MBSFIRMASK_WO_OR = 1093;
static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ = 1094;
static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_WOX_AND = 1095;
static const uint64_t IDX_CEN_MCBISTS01_MBSFIRQ_WOX_OR = 1096;
static const uint64_t IDX_CEN_MCBISTS01_MBSFIRWOF_ROX = 1097;
static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC0Q = 1098;
static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC1Q = 1099;
static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC2Q = 1100;
static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC3Q = 1101;
static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC4Q = 1102;
static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC5Q = 1103;
static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC6Q = 1104;
static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC7Q = 1105;
static const uint64_t IDX_CEN_MCBISTS01_MBSSYMEC8Q = 1106;
static const uint64_t IDX_CEN_MCBISTS01_MBSTRQ = 1107;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRCRQ = 1108;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBDRSRQ = 1109;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD0Q = 1110;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD1Q = 1111;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD2Q = 1112;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD3Q = 1113;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD4Q = 1114;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD5Q = 1115;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD6Q = 1116;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFD7Q = 1117;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDQ = 1118;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBFDSPQ = 1119;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS0Q = 1120;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS1Q = 1121;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS2Q = 1122;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS3Q = 1123;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS4Q = 1124;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS5Q = 1125;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS6Q = 1126;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS7Q = 1127;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDS8Q = 1128;
static const uint64_t IDX_CEN_MCBISTS01_MBS_MCBRDSSPQ = 1129;
static const uint64_t IDX_CEN_MCBISTS01_MBUERQ = 1130;
static const uint64_t IDX_CEN_MCBISTS01_MBXERRINJQ = 1131;
static const uint64_t IDX_CEN_MCBISTS01_MBXERRSTATQ_ROX = 1132;
static const uint64_t IDX_CEN_MCBISTS01_MCBCMA1Q = 1133;
static const uint64_t IDX_CEN_MCBISTS01_MCBCMABQ = 1134;
static const uint64_t IDX_CEN_MCBISTS01_MCBCMB1Q = 1135;
static const uint64_t IDX_CEN_MCBISTS01_MCBEMA1Q = 1136;
static const uint64_t IDX_CEN_MCBISTS01_MCBEMA2Q = 1137;
static const uint64_t IDX_CEN_MCBISTS01_MCBEMA3Q = 1138;
static const uint64_t IDX_CEN_MCBISTS01_MCBEMB1Q = 1139;
static const uint64_t IDX_CEN_MCBISTS01_MCBEMB2Q = 1140;
static const uint64_t IDX_CEN_MCBISTS01_MCBEMB3Q = 1141;
static const uint64_t IDX_CEN_MCBISTS01_MCBSTATAQ_ROX = 1142;
static const uint64_t IDX_CEN_MCBISTS01_MCBSTATBQ_ROX = 1143;
static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA1Q = 1144;
static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA2Q = 1145;
static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTA3Q = 1146;
static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB1Q = 1147;
static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB2Q = 1148;
static const uint64_t IDX_CEN_MCBISTS01_MCB_ERRCNTB3Q = 1149;
static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_ROX = 1150;
static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_ROX = 1151;
static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_ROX = 1152;
static const uint64_t IDX_CEN_IBB_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_ROX = 1153;
static const uint64_t IDX_CEN_ECC01_MBECCFIR = 1154;
static const uint64_t IDX_CEN_ECC01_MBECCFIR_WOX_AND = 1155;
static const uint64_t IDX_CEN_ECC01_MBECCFIR_WOX_OR = 1156;
static const uint64_t IDX_CEN_ECC01_MBECCFIR_ACTION0_RO = 1157;
static const uint64_t IDX_CEN_ECC01_MBECCFIR_ACTION1_RO = 1158;
static const uint64_t IDX_CEN_ECC01_MBECCFIR_MASK = 1159;
static const uint64_t IDX_CEN_ECC01_MBECCFIR_MASK_WO_AND = 1160;
static const uint64_t IDX_CEN_ECC01_MBECCFIR_MASK_WO_OR = 1161;
static const uint64_t IDX_CEN_ECC01_MBECCFIR_WOF = 1162;
static const uint64_t IDX_CEN_ECC01_MBMMRQ = 1163;
static const uint64_t IDX_CEN_ECC01_MBMS0 = 1164;
static const uint64_t IDX_CEN_ECC01_MBMS1 = 1165;
static const uint64_t IDX_CEN_ECC01_MBMS2 = 1166;
static const uint64_t IDX_CEN_ECC01_MBMS3 = 1167;
static const uint64_t IDX_CEN_ECC01_MBMS4 = 1168;
static const uint64_t IDX_CEN_ECC01_MBMS5 = 1169;
static const uint64_t IDX_CEN_ECC01_MBMS6 = 1170;
static const uint64_t IDX_CEN_ECC01_MBMS7 = 1171;
static const uint64_t IDX_CEN_ECC01_MBRCEICRQ = 1172;
static const uint64_t IDX_CEN_ECC01_MBSBS0 = 1173;
static const uint64_t IDX_CEN_ECC01_MBSBS1 = 1174;
static const uint64_t IDX_CEN_ECC01_MBSBS2 = 1175;
static const uint64_t IDX_CEN_ECC01_MBSBS3 = 1176;
static const uint64_t IDX_CEN_ECC01_MBSBS4 = 1177;
static const uint64_t IDX_CEN_ECC01_MBSBS5 = 1178;
static const uint64_t IDX_CEN_ECC01_MBSBS6 = 1179;
static const uint64_t IDX_CEN_ECC01_MBSBS7 = 1180;
static const uint64_t IDX_CEN_ECC01_MBSECCERR0_ROX = 1181;
static const uint64_t IDX_CEN_ECC01_MBSECCERR1_ROX = 1182;
static const uint64_t IDX_CEN_ECC01_MBSECCQ = 1183;
static const uint64_t IDX_CEN_ECC01_MBSMSRQ_RO = 1184;
static const uint64_t IDX_CEN_ECC23_MBECCFIR = 1185;
static const uint64_t IDX_CEN_ECC23_MBECCFIR_WOX_AND = 1186;
static const uint64_t IDX_CEN_ECC23_MBECCFIR_WOX_OR = 1187;
static const uint64_t IDX_CEN_ECC23_MBECCFIR_ACTION0_RO = 1188;
static const uint64_t IDX_CEN_ECC23_MBECCFIR_ACTION1_RO = 1189;
static const uint64_t IDX_CEN_ECC23_MBECCFIR_MASK = 1190;
static const uint64_t IDX_CEN_ECC23_MBECCFIR_MASK_WO_AND = 1191;
static const uint64_t IDX_CEN_ECC23_MBECCFIR_MASK_WO_OR = 1192;
static const uint64_t IDX_CEN_ECC23_MBECCFIR_WOF = 1193;
static const uint64_t IDX_CEN_ECC23_MBMMRQ = 1194;
static const uint64_t IDX_CEN_ECC23_MBMS0 = 1195;
static const uint64_t IDX_CEN_ECC23_MBMS1 = 1196;
static const uint64_t IDX_CEN_ECC23_MBMS2 = 1197;
static const uint64_t IDX_CEN_ECC23_MBMS3 = 1198;
static const uint64_t IDX_CEN_ECC23_MBMS4 = 1199;
static const uint64_t IDX_CEN_ECC23_MBMS5 = 1200;
static const uint64_t IDX_CEN_ECC23_MBMS6 = 1201;
static const uint64_t IDX_CEN_ECC23_MBMS7 = 1202;
static const uint64_t IDX_CEN_ECC23_MBRCEICRQ = 1203;
static const uint64_t IDX_CEN_ECC23_MBSBS0 = 1204;
static const uint64_t IDX_CEN_ECC23_MBSBS1 = 1205;
static const uint64_t IDX_CEN_ECC23_MBSBS2 = 1206;
static const uint64_t IDX_CEN_ECC23_MBSBS3 = 1207;
static const uint64_t IDX_CEN_ECC23_MBSBS4 = 1208;
static const uint64_t IDX_CEN_ECC23_MBSBS5 = 1209;
static const uint64_t IDX_CEN_ECC23_MBSBS6 = 1210;
static const uint64_t IDX_CEN_ECC23_MBSBS7 = 1211;
static const uint64_t IDX_CEN_ECC23_MBSECCERR0_ROX = 1212;
static const uint64_t IDX_CEN_ECC23_MBSECCERR1_ROX = 1213;
static const uint64_t IDX_CEN_ECC23_MBSECCQ = 1214;
static const uint64_t IDX_CEN_ECC23_MBSMSRQ_RO = 1215;
static const uint64_t IDX_CEN_MCBISTS23_MBMPERQ = 1216;
static const uint64_t IDX_CEN_MCBISTS23_MBNCERQ = 1217;
static const uint64_t IDX_CEN_MCBISTS23_MBRCERQ = 1218;
static const uint64_t IDX_CEN_MCBISTS23_MBSEC0Q = 1219;
static const uint64_t IDX_CEN_MCBISTS23_MBSEC1Q = 1220;
static const uint64_t IDX_CEN_MCBISTS23_MBSEVRQ = 1221;
static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT0 = 1222;
static const uint64_t IDX_CEN_MCBISTS23_MBSFIRACT1 = 1223;
static const uint64_t IDX_CEN_MCBISTS23_MBSFIRMASK = 1224;
static const uint64_t IDX_CEN_MCBISTS23_MBSFIRMASK_WO_AND = 1225;
static const uint64_t IDX_CEN_MCBISTS23_MBSFIRMASK_WO_OR = 1226;
static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ = 1227;
static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_WOX_AND = 1228;
static const uint64_t IDX_CEN_MCBISTS23_MBSFIRQ_WOX_OR = 1229;
static const uint64_t IDX_CEN_MCBISTS23_MBSFIRWOF_ROX = 1230;
static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC0Q = 1231;
static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC1Q = 1232;
static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC2Q = 1233;
static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC3Q = 1234;
static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC4Q = 1235;
static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC5Q = 1236;
static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC6Q = 1237;
static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC7Q = 1238;
static const uint64_t IDX_CEN_MCBISTS23_MBSSYMEC8Q = 1239;
static const uint64_t IDX_CEN_MCBISTS23_MBSTRQ = 1240;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRCRQ = 1241;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBDRSRQ = 1242;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD0Q = 1243;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD1Q = 1244;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD2Q = 1245;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD3Q = 1246;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD4Q = 1247;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD5Q = 1248;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD6Q = 1249;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFD7Q = 1250;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDQ = 1251;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBFDSPQ = 1252;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS0Q = 1253;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS1Q = 1254;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS2Q = 1255;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS3Q = 1256;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS4Q = 1257;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS5Q = 1258;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS6Q = 1259;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS7Q = 1260;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDS8Q = 1261;
static const uint64_t IDX_CEN_MCBISTS23_MBS_MCBRDSSPQ = 1262;
static const uint64_t IDX_CEN_MCBISTS23_MBUERQ = 1263;
static const uint64_t IDX_CEN_MCBISTS23_MBXERRINJQ = 1264;
static const uint64_t IDX_CEN_MCBISTS23_MBXERRSTATQ_ROX = 1265;
static const uint64_t IDX_CEN_MCBISTS23_MCBCMA1Q = 1266;
static const uint64_t IDX_CEN_MCBISTS23_MCBCMABQ = 1267;
static const uint64_t IDX_CEN_MCBISTS23_MCBCMB1Q = 1268;
static const uint64_t IDX_CEN_MCBISTS23_MCBEMA1Q = 1269;
static const uint64_t IDX_CEN_MCBISTS23_MCBEMA2Q = 1270;
static const uint64_t IDX_CEN_MCBISTS23_MCBEMA3Q = 1271;
static const uint64_t IDX_CEN_MCBISTS23_MCBEMB1Q = 1272;
static const uint64_t IDX_CEN_MCBISTS23_MCBEMB2Q = 1273;
static const uint64_t IDX_CEN_MCBISTS23_MCBEMB3Q = 1274;
static const uint64_t IDX_CEN_MCBISTS23_MCBSTATAQ_ROX = 1275;
static const uint64_t IDX_CEN_MCBISTS23_MCBSTATBQ_ROX = 1276;
static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA1Q = 1277;
static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA2Q = 1278;
static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTA3Q = 1279;
static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB1Q = 1280;
static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB2Q = 1281;
static const uint64_t IDX_CEN_MCBISTS23_MCB_ERRCNTB3Q = 1282;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA0_RO = 1283;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA1_RO = 1284;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA2_RO = 1285;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA3_RO = 1286;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA4_RO = 1287;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA5_RO = 1288;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA6_RO = 1289;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF0_DATA7_RO = 1290;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA0_RO = 1291;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA1_RO = 1292;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA2_RO = 1293;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA3_RO = 1294;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA4_RO = 1295;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA5_RO = 1296;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA6_RO = 1297;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF1_DATA7_RO = 1298;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA0_RO = 1299;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA1_RO = 1300;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA2_RO = 1301;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA3_RO = 1302;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA4_RO = 1303;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA5_RO = 1304;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA6_RO = 1305;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF2_DATA7_RO = 1306;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA0_RO = 1307;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA1_RO = 1308;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA2_RO = 1309;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA3_RO = 1310;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA4_RO = 1311;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA5_RO = 1312;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA6_RO = 1313;
static const uint64_t IDX_CEN_MBS01_SRB_BUFF3_DATA7_RO = 1314;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA0_RO = 1315;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA1_RO = 1316;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA2_RO = 1317;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA3_RO = 1318;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA4_RO = 1319;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA5_RO = 1320;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA6_RO = 1321;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF0_DATA7_RO = 1322;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA0_RO = 1323;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA1_RO = 1324;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA2_RO = 1325;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA3_RO = 1326;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA4_RO = 1327;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA5_RO = 1328;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA6_RO = 1329;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF1_DATA7_RO = 1330;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA0_RO = 1331;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA1_RO = 1332;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA2_RO = 1333;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA3_RO = 1334;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA4_RO = 1335;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA5_RO = 1336;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA6_RO = 1337;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF2_DATA7_RO = 1338;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA0_RO = 1339;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA1_RO = 1340;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA2_RO = 1341;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA3_RO = 1342;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA4_RO = 1343;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA5_RO = 1344;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA6_RO = 1345;
static const uint64_t IDX_CEN_MBS23_SRB_BUFF3_DATA7_RO = 1346;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA0_RO = 1347;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA1_RO = 1348;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA2_RO = 1349;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA3_RO = 1350;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA4_RO = 1351;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA5_RO = 1352;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA6_RO = 1353;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF0_DATA7_RO = 1354;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA0_RO = 1355;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA1_RO = 1356;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA2_RO = 1357;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA3_RO = 1358;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA4_RO = 1359;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA5_RO = 1360;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA6_RO = 1361;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF1_DATA7_RO = 1362;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA0_RO = 1363;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA1_RO = 1364;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA2_RO = 1365;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA3_RO = 1366;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA4_RO = 1367;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA5_RO = 1368;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA6_RO = 1369;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF2_DATA7_RO = 1370;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA0_RO = 1371;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA1_RO = 1372;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA2_RO = 1373;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA3_RO = 1374;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA4_RO = 1375;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA5_RO = 1376;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA6_RO = 1377;
static const uint64_t IDX_CEN_MBS01_PFB_BUFF3_DATA7_RO = 1378;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA0_RO = 1379;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA1_RO = 1380;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA2_RO = 1381;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA3_RO = 1382;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA4_RO = 1383;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA5_RO = 1384;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA6_RO = 1385;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF0_DATA7_RO = 1386;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA0_RO = 1387;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA1_RO = 1388;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA2_RO = 1389;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA3_RO = 1390;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA4_RO = 1391;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA5_RO = 1392;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA6_RO = 1393;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF1_DATA7_RO = 1394;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA0_RO = 1395;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA1_RO = 1396;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA2_RO = 1397;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA3_RO = 1398;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA4_RO = 1399;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA5_RO = 1400;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA6_RO = 1401;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF2_DATA7_RO = 1402;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA0_RO = 1403;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA1_RO = 1404;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA2_RO = 1405;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA3_RO = 1406;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA4_RO = 1407;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA5_RO = 1408;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA6_RO = 1409;
static const uint64_t IDX_CEN_MBS23_PFB_BUFF3_DATA7_RO = 1410;
static const uint64_t IDX_CEN_MBIERPT0_ROX = 1411;
static const uint64_t IDX_CEN_MBICFGQ = 1412;
static const uint64_t IDX_CEN_MBICRCSYNQ = 1413;
static const uint64_t IDX_CEN_MBIERRINJQ = 1414;
static const uint64_t IDX_CEN_MBIFIRACT0 = 1415;
static const uint64_t IDX_CEN_MBIFIRACT1 = 1416;
static const uint64_t IDX_CEN_MBIFIRMASK = 1417;
static const uint64_t IDX_CEN_MBIFIRMASK_WO_AND = 1418;
static const uint64_t IDX_CEN_MBIFIRMASK_WO_OR = 1419;
static const uint64_t IDX_CEN_MBIFIRQ = 1420;
static const uint64_t IDX_CEN_MBIFIRQ_WOX_AND = 1421;
static const uint64_t IDX_CEN_MBIFIRQ_WOX_OR = 1422;
static const uint64_t IDX_CEN_MBIFPGAINTRQ = 1423;
static const uint64_t IDX_CEN_MBISTATQ = 1424;
static const uint64_t IDX_CEN_MBIFIRWOF = 1425;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA0_WO = 1426;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA0_RO = 1427;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA1_WO = 1428;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA1_RO = 1429;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA2_WO = 1430;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA2_RO = 1431;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA3_WO = 1432;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA3_RO = 1433;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA4_WO = 1434;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA4_RO = 1435;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA5_WO = 1436;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA5_RO = 1437;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA6_WO = 1438;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA6_RO = 1439;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA7_WO = 1440;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA7_RO = 1441;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC0_WO = 1442;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA_ECC0_RO = 1443;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC1_WO = 1444;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA_ECC1_RO = 1445;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC2_WO = 1446;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA_ECC2_RO = 1447;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC3_WO = 1448;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA_ECC3_RO = 1449;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC4_WO = 1450;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA_ECC4_RO = 1451;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC5_WO = 1452;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA_ECC5_RO = 1453;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC6_WO = 1454;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA_ECC6_RO = 1455;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF0_DATA_ECC7_WO = 1456;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF0_DATA_ECC7_RO = 1457;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA0_WO = 1458;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA0_RO = 1459;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA1_WO = 1460;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA1_RO = 1461;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA2_WO = 1462;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA2_RO = 1463;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA3_WO = 1464;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA3_RO = 1465;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA4_WO = 1466;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA4_RO = 1467;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA5_WO = 1468;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA5_RO = 1469;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA6_WO = 1470;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA6_RO = 1471;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA7_WO = 1472;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA7_RO = 1473;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC0_WO = 1474;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA_ECC0_RO = 1475;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC1_WO = 1476;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA_ECC1_RO = 1477;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC2_WO = 1478;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA_ECC2_RO = 1479;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC3_WO = 1480;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA_ECC3_RO = 1481;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC4_WO = 1482;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA_ECC4_RO = 1483;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC5_WO = 1484;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA_ECC5_RO = 1485;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC6_WO = 1486;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA_ECC6_RO = 1487;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF1_DATA_ECC7_WO = 1488;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF1_DATA_ECC7_RO = 1489;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA0_WO = 1490;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA0_RO = 1491;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA1_WO = 1492;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA1_RO = 1493;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA2_WO = 1494;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA2_RO = 1495;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA3_WO = 1496;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA3_RO = 1497;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA4_WO = 1498;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA4_RO = 1499;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA5_WO = 1500;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA5_RO = 1501;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA6_WO = 1502;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA6_RO = 1503;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA7_WO = 1504;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA7_RO = 1505;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC0_WO = 1506;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA_ECC0_RO = 1507;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC1_WO = 1508;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA_ECC1_RO = 1509;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC2_WO = 1510;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA_ECC2_RO = 1511;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC3_WO = 1512;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA_ECC3_RO = 1513;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC4_WO = 1514;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA_ECC4_RO = 1515;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC5_WO = 1516;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA_ECC5_RO = 1517;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC6_WO = 1518;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA_ECC6_RO = 1519;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF2_DATA_ECC7_WO = 1520;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF2_DATA_ECC7_RO = 1521;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA0_WO = 1522;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA0_RO = 1523;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA1_WO = 1524;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA1_RO = 1525;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA2_WO = 1526;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA2_RO = 1527;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA3_WO = 1528;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA3_RO = 1529;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA4_WO = 1530;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA4_RO = 1531;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA5_WO = 1532;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA5_RO = 1533;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA6_WO = 1534;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA6_RO = 1535;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA7_WO = 1536;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA7_RO = 1537;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC0_WO = 1538;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA_ECC0_RO = 1539;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC1_WO = 1540;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA_ECC1_RO = 1541;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC2_WO = 1542;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA_ECC2_RO = 1543;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC3_WO = 1544;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA_ECC3_RO = 1545;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC4_WO = 1546;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA_ECC4_RO = 1547;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC5_WO = 1548;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA_ECC5_RO = 1549;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC6_WO = 1550;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA_ECC6_RO = 1551;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF3_DATA_ECC7_WO = 1552;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF3_DATA_ECC7_RO = 1553;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_WO = 1554;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC0_RO = 1555;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_WO = 1556;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC1_RO = 1557;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_WO = 1558;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC2_RO = 1559;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_WO = 1560;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC3_RO = 1561;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_WO = 1562;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC4_RO = 1563;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_WO = 1564;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC5_RO = 1565;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_WO = 1566;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC6_RO = 1567;
static const uint64_t IDX_CEN_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_WO = 1568;
static const uint64_t IDX_CEN_MBA_1_MAINT1_MAINT_BUFF_65TH_BYTE_64B_ECC7_RO = 1569;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA0_WO = 1570;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA0_RO = 1571;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA0_RO = 1572;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA1_WO = 1573;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA1_RO = 1574;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA1_RO = 1575;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA2_WO = 1576;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA2_RO = 1577;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA2_RO = 1578;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA3_WO = 1579;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA3_RO = 1580;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA3_RO = 1581;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA4_WO = 1582;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA4_RO = 1583;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA4_RO = 1584;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA5_WO = 1585;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA5_RO = 1586;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA5_RO = 1587;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA6_WO = 1588;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA6_RO = 1589;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA6_RO = 1590;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA7_WO = 1591;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA7_RO = 1592;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA7_RO = 1593;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA_ECC0_WO = 1594;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC0_RO = 1595;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA_ECC0_RO = 1596;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA_ECC1_WO = 1597;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC1_RO = 1598;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA_ECC1_RO = 1599;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA_ECC2_WO = 1600;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC2_RO = 1601;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA_ECC2_RO = 1602;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA_ECC3_WO = 1603;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC3_RO = 1604;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA_ECC3_RO = 1605;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA_ECC4_WO = 1606;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC4_RO = 1607;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA_ECC4_RO = 1608;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA_ECC5_WO = 1609;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC5_RO = 1610;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA_ECC5_RO = 1611;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA_ECC6_WO = 1612;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC6_RO = 1613;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA_ECC6_RO = 1614;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF0_DATA_ECC7_WO = 1615;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF0_DATA_ECC7_RO = 1616;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF0_DATA_ECC7_RO = 1617;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA0_WO = 1618;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA0_RO = 1619;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA0_RO = 1620;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA1_WO = 1621;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA1_RO = 1622;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA1_RO = 1623;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA2_WO = 1624;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA2_RO = 1625;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA2_RO = 1626;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA3_WO = 1627;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA3_RO = 1628;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA3_RO = 1629;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA4_WO = 1630;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA4_RO = 1631;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA4_RO = 1632;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA5_WO = 1633;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA5_RO = 1634;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA5_RO = 1635;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA6_WO = 1636;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA6_RO = 1637;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA6_RO = 1638;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA7_WO = 1639;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA7_RO = 1640;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA7_RO = 1641;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA_ECC0_WO = 1642;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC0_RO = 1643;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA_ECC0_RO = 1644;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA_ECC1_WO = 1645;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC1_RO = 1646;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA_ECC1_RO = 1647;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA_ECC2_WO = 1648;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC2_RO = 1649;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA_ECC2_RO = 1650;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA_ECC3_WO = 1651;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC3_RO = 1652;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA_ECC3_RO = 1653;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA_ECC4_WO = 1654;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC4_RO = 1655;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA_ECC4_RO = 1656;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA_ECC5_WO = 1657;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC5_RO = 1658;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA_ECC5_RO = 1659;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA_ECC6_WO = 1660;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC6_RO = 1661;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA_ECC6_RO = 1662;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF1_DATA_ECC7_WO = 1663;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF1_DATA_ECC7_RO = 1664;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF1_DATA_ECC7_RO = 1665;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA0_WO = 1666;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA0_RO = 1667;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA0_RO = 1668;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA1_WO = 1669;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA1_RO = 1670;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA1_RO = 1671;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA2_WO = 1672;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA2_RO = 1673;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA2_RO = 1674;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA3_WO = 1675;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA3_RO = 1676;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA3_RO = 1677;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA4_WO = 1678;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA4_RO = 1679;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA4_RO = 1680;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA5_WO = 1681;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA5_RO = 1682;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA5_RO = 1683;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA6_WO = 1684;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA6_RO = 1685;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA6_RO = 1686;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA7_WO = 1687;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA7_RO = 1688;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA7_RO = 1689;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA_ECC0_WO = 1690;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC0_RO = 1691;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA_ECC0_RO = 1692;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA_ECC1_WO = 1693;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC1_RO = 1694;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA_ECC1_RO = 1695;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA_ECC2_WO = 1696;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC2_RO = 1697;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA_ECC2_RO = 1698;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA_ECC3_WO = 1699;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC3_RO = 1700;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA_ECC3_RO = 1701;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA_ECC4_WO = 1702;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC4_RO = 1703;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA_ECC4_RO = 1704;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA_ECC5_WO = 1705;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC5_RO = 1706;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA_ECC5_RO = 1707;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA_ECC6_WO = 1708;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC6_RO = 1709;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA_ECC6_RO = 1710;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF2_DATA_ECC7_WO = 1711;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF2_DATA_ECC7_RO = 1712;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF2_DATA_ECC7_RO = 1713;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA0_WO = 1714;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA0_RO = 1715;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA0_RO = 1716;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA1_WO = 1717;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA1_RO = 1718;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA1_RO = 1719;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA2_WO = 1720;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA2_RO = 1721;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA2_RO = 1722;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA3_WO = 1723;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA3_RO = 1724;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA3_RO = 1725;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA4_WO = 1726;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA4_RO = 1727;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA4_RO = 1728;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA5_WO = 1729;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA5_RO = 1730;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA5_RO = 1731;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA6_WO = 1732;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA6_RO = 1733;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA6_RO = 1734;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA7_WO = 1735;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA7_RO = 1736;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA7_RO = 1737;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA_ECC0_WO = 1738;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC0_RO = 1739;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA_ECC0_RO = 1740;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA_ECC1_WO = 1741;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC1_RO = 1742;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA_ECC1_RO = 1743;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA_ECC2_WO = 1744;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC2_RO = 1745;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA_ECC2_RO = 1746;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA_ECC3_WO = 1747;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC3_RO = 1748;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA_ECC3_RO = 1749;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA_ECC4_WO = 1750;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC4_RO = 1751;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA_ECC4_RO = 1752;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA_ECC5_WO = 1753;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC5_RO = 1754;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA_ECC5_RO = 1755;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA_ECC6_WO = 1756;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC6_RO = 1757;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA_ECC6_RO = 1758;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF3_DATA_ECC7_WO = 1759;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF3_DATA_ECC7_RO = 1760;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF3_DATA_ECC7_RO = 1761;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_WO = 1762;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_RO = 1763;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC0_RO = 1764;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_WO = 1765;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_RO = 1766;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC1_RO = 1767;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_WO = 1768;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_RO = 1769;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC2_RO = 1770;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_WO = 1771;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_RO = 1772;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC3_RO = 1773;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_WO = 1774;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_RO = 1775;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC4_RO = 1776;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_WO = 1777;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_RO = 1778;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC5_RO = 1779;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_WO = 1780;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_RO = 1781;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC6_RO = 1782;
static const uint64_t IDX_CEN_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_WO = 1783;
static const uint64_t IDX_CEN_MBA_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_RO = 1784;
static const uint64_t IDX_CEN_MBA_0_MAINT0_MAINT_BUFF_65TH_BYTE_64B_ECC7_RO = 1785;
static const uint64_t IDX_CEN_MBA_MBABS0 = 1786;
static const uint64_t IDX_CEN_MBA_0_MBABS0 = 1787;
static const uint64_t IDX_CEN_MBA_MBABS1 = 1788;
static const uint64_t IDX_CEN_MBA_0_MBABS1 = 1789;
static const uint64_t IDX_CEN_MBA_MBABS2 = 1790;
static const uint64_t IDX_CEN_MBA_0_MBABS2 = 1791;
static const uint64_t IDX_CEN_MBA_MBABS3 = 1792;
static const uint64_t IDX_CEN_MBA_0_MBABS3 = 1793;
static const uint64_t IDX_CEN_MBA_MBABS4 = 1794;
static const uint64_t IDX_CEN_MBA_0_MBABS4 = 1795;
static const uint64_t IDX_CEN_MBA_MBABS5 = 1796;
static const uint64_t IDX_CEN_MBA_0_MBABS5 = 1797;
static const uint64_t IDX_CEN_MBA_MBABS6 = 1798;
static const uint64_t IDX_CEN_MBA_0_MBABS6 = 1799;
static const uint64_t IDX_CEN_MBA_MBABS7 = 1800;
static const uint64_t IDX_CEN_MBA_0_MBABS7 = 1801;
static const uint64_t IDX_CEN_MBA_MBA_INJQ = 1802;
static const uint64_t IDX_CEN_MBA_0_MBA_INJQ = 1803;
static const uint64_t IDX_CEN_MBA_MBA_WRD_MODE = 1804;
static const uint64_t IDX_CEN_MBA_0_MBA_WRD_MODE = 1805;
static const uint64_t IDX_CEN_MBA_CCSARRERRINJQ = 1806;
static const uint64_t IDX_CEN_MBA_0_CCSARRERRINJQ = 1807;
static const uint64_t IDX_CEN_MBA_CCS_CNTLQ = 1808;
static const uint64_t IDX_CEN_MBA_0_CCS_CNTLQ = 1809;
static const uint64_t IDX_CEN_MBA_CCS_FIXED_DATA0Q = 1810;
static const uint64_t IDX_CEN_MBA_0_CCS_FIXED_DATA0Q = 1811;
static const uint64_t IDX_CEN_MBA_CCS_FIXED_DATA1Q = 1812;
static const uint64_t IDX_CEN_MBA_0_CCS_FIXED_DATA1Q = 1813;
static const uint64_t IDX_CEN_MBA_CCS_MODEQ = 1814;
static const uint64_t IDX_CEN_MBA_0_CCS_MODEQ = 1815;
static const uint64_t IDX_CEN_MBA_CCS_STATQ = 1816;
static const uint64_t IDX_CEN_MBA_0_CCS_STATQ = 1817;
static const uint64_t IDX_CEN_MBA_MBAFIRACT0 = 1818;
static const uint64_t IDX_CEN_MBA_0_MBAFIRACT0 = 1819;
static const uint64_t IDX_CEN_MBA_MBAFIRACT1 = 1820;
static const uint64_t IDX_CEN_MBA_0_MBAFIRACT1 = 1821;
static const uint64_t IDX_CEN_MBA_MBAFIRMASK = 1822;
static const uint64_t IDX_CEN_MBA_0_MBAFIRMASK = 1823;
static const uint64_t IDX_CEN_MBA_MBAFIRMASK_WO_AND = 1824;
static const uint64_t IDX_CEN_MBA_0_MBAFIRMASK_WO_AND = 1825;
static const uint64_t IDX_CEN_MBA_MBAFIRMASK_WO_OR = 1826;
static const uint64_t IDX_CEN_MBA_0_MBAFIRMASK_WO_OR = 1827;
static const uint64_t IDX_CEN_MBA_MBAFIRQ = 1828;
static const uint64_t IDX_CEN_MBA_0_MBAFIRQ = 1829;
static const uint64_t IDX_CEN_MBA_MBAFIRQ_WOX_AND = 1830;
static const uint64_t IDX_CEN_MBA_0_MBAFIRQ_WOX_AND = 1831;
static const uint64_t IDX_CEN_MBA_MBAFIRQ_WOX_OR = 1832;
static const uint64_t IDX_CEN_MBA_0_MBAFIRQ_WOX_OR = 1833;
static const uint64_t IDX_CEN_MBA_MBAFIRWOF_ROX = 1834;
static const uint64_t IDX_CEN_MBA_0_MBAFIRWOF_ROX = 1835;
static const uint64_t IDX_CEN_MBA_MBASCTLQ = 1836;
static const uint64_t IDX_CEN_MBA_0_MBASCTLQ = 1837;
static const uint64_t IDX_CEN_MBA_MBA_MCBERRPTQ_ROX = 1838;
static const uint64_t IDX_CEN_MBA_0_MBA_MCBERRPTQ_ROX = 1839;
static const uint64_t IDX_CEN_MBA_MBECTLQ = 1840;
static const uint64_t IDX_CEN_MBA_0_MBECTLQ = 1841;
static const uint64_t IDX_CEN_MBA_MBMACAQ = 1842;
static const uint64_t IDX_CEN_MBA_0_MBMACAQ = 1843;
static const uint64_t IDX_CEN_MBA_MBMCCQ = 1844;
static const uint64_t IDX_CEN_MBA_0_MBMCCQ = 1845;
static const uint64_t IDX_CEN_MBA_MBMCTQ = 1846;
static const uint64_t IDX_CEN_MBA_0_MBMCTQ = 1847;
static const uint64_t IDX_CEN_MBA_MBMEAQ = 1848;
static const uint64_t IDX_CEN_MBA_0_MBMEAQ = 1849;
static const uint64_t IDX_CEN_MBA_MBMSRQ = 1850;
static const uint64_t IDX_CEN_MBA_0_MBMSRQ = 1851;
static const uint64_t IDX_CEN_MBA_MBSPAMSKQ = 1852;
static const uint64_t IDX_CEN_MBA_0_MBSPAMSKQ = 1853;
static const uint64_t IDX_CEN_MBA_MBSPAQ = 1854;
static const uint64_t IDX_CEN_MBA_0_MBSPAQ = 1855;
static const uint64_t IDX_CEN_MBA_MBSPAQ_WOX_AND = 1856;
static const uint64_t IDX_CEN_MBA_0_MBSPAQ_WOX_AND = 1857;
static const uint64_t IDX_CEN_MBA_MBSPAQ_WOX_OR = 1858;
static const uint64_t IDX_CEN_MBA_0_MBSPAQ_WOX_OR = 1859;
static const uint64_t IDX_CEN_MBA_MCBAGRAQ = 1860;
static const uint64_t IDX_CEN_MBA_0_MCBAGRAQ = 1861;
static const uint64_t IDX_CEN_MBA_MCBAMR0A0Q = 1862;
static const uint64_t IDX_CEN_MBA_0_MCBAMR0A0Q = 1863;
static const uint64_t IDX_CEN_MBA_MCBAMR0A1Q = 1864;
static const uint64_t IDX_CEN_MBA_0_MCBAMR0A1Q = 1865;
static const uint64_t IDX_CEN_MBA_MCBAMR1A0Q = 1866;
static const uint64_t IDX_CEN_MBA_0_MCBAMR1A0Q = 1867;
static const uint64_t IDX_CEN_MBA_MCBAMR1A1Q = 1868;
static const uint64_t IDX_CEN_MBA_0_MCBAMR1A1Q = 1869;
static const uint64_t IDX_CEN_MBA_MCBAMR2A0Q = 1870;
static const uint64_t IDX_CEN_MBA_0_MCBAMR2A0Q = 1871;
static const uint64_t IDX_CEN_MBA_MCBAMR2A1Q = 1872;
static const uint64_t IDX_CEN_MBA_0_MCBAMR2A1Q = 1873;
static const uint64_t IDX_CEN_MBA_MCBAMR3A0Q = 1874;
static const uint64_t IDX_CEN_MBA_0_MCBAMR3A0Q = 1875;
static const uint64_t IDX_CEN_MBA_MCBAMR3A1Q = 1876;
static const uint64_t IDX_CEN_MBA_0_MCBAMR3A1Q = 1877;
static const uint64_t IDX_CEN_MBA_MCBCFGQ = 1878;
static const uint64_t IDX_CEN_MBA_0_MCBCFGQ = 1879;
static const uint64_t IDX_CEN_MBA_MCBDRCRQ = 1880;
static const uint64_t IDX_CEN_MBA_0_MCBDRCRQ = 1881;
static const uint64_t IDX_CEN_MBA_MCBDRSRQ = 1882;
static const uint64_t IDX_CEN_MBA_0_MCBDRSRQ = 1883;
static const uint64_t IDX_CEN_MBA_MCBFD0Q = 1884;
static const uint64_t IDX_CEN_MBA_0_MCBFD0Q = 1885;
static const uint64_t IDX_CEN_MBA_MCBFD1Q = 1886;
static const uint64_t IDX_CEN_MBA_0_MCBFD1Q = 1887;
static const uint64_t IDX_CEN_MBA_MCBFD2Q = 1888;
static const uint64_t IDX_CEN_MBA_0_MCBFD2Q = 1889;
static const uint64_t IDX_CEN_MBA_MCBFD3Q = 1890;
static const uint64_t IDX_CEN_MBA_0_MCBFD3Q = 1891;
static const uint64_t IDX_CEN_MBA_MCBFD4Q = 1892;
static const uint64_t IDX_CEN_MBA_0_MCBFD4Q = 1893;
static const uint64_t IDX_CEN_MBA_MCBFD5Q = 1894;
static const uint64_t IDX_CEN_MBA_0_MCBFD5Q = 1895;
static const uint64_t IDX_CEN_MBA_MCBFD6Q = 1896;
static const uint64_t IDX_CEN_MBA_0_MCBFD6Q = 1897;
static const uint64_t IDX_CEN_MBA_MCBFD7Q = 1898;
static const uint64_t IDX_CEN_MBA_0_MCBFD7Q = 1899;
static const uint64_t IDX_CEN_MBA_MCBFDQ = 1900;
static const uint64_t IDX_CEN_MBA_0_MCBFDQ = 1901;
static const uint64_t IDX_CEN_MBA_MCBFDSPQ = 1902;
static const uint64_t IDX_CEN_MBA_0_MCBFDSPQ = 1903;
static const uint64_t IDX_CEN_MBA_MCBLFSRA0Q = 1904;
static const uint64_t IDX_CEN_MBA_0_MCBLFSRA0Q = 1905;
static const uint64_t IDX_CEN_MBA_MCBLFSRA1Q = 1906;
static const uint64_t IDX_CEN_MBA_0_MCBLFSRA1Q = 1907;
static const uint64_t IDX_CEN_MBA_MCBMR0Q = 1908;
static const uint64_t IDX_CEN_MBA_0_MCBMR0Q = 1909;
static const uint64_t IDX_CEN_MBA_MCBMR1Q = 1910;
static const uint64_t IDX_CEN_MBA_0_MCBMR1Q = 1911;
static const uint64_t IDX_CEN_MBA_MCBMR2Q = 1912;
static const uint64_t IDX_CEN_MBA_0_MCBMR2Q = 1913;
static const uint64_t IDX_CEN_MBA_MCBMR3Q = 1914;
static const uint64_t IDX_CEN_MBA_0_MCBMR3Q = 1915;
static const uint64_t IDX_CEN_MBA_MCBMR4Q = 1916;
static const uint64_t IDX_CEN_MBA_0_MCBMR4Q = 1917;
static const uint64_t IDX_CEN_MBA_MCBMR5Q = 1918;
static const uint64_t IDX_CEN_MBA_0_MCBMR5Q = 1919;
static const uint64_t IDX_CEN_MBA_MCBMR6Q = 1920;
static const uint64_t IDX_CEN_MBA_0_MCBMR6Q = 1921;
static const uint64_t IDX_CEN_MBA_MCBMR7Q = 1922;
static const uint64_t IDX_CEN_MBA_0_MCBMR7Q = 1923;
static const uint64_t IDX_CEN_MBA_MCBPARMQ = 1924;
static const uint64_t IDX_CEN_MBA_0_MCBPARMQ = 1925;
static const uint64_t IDX_CEN_MBA_MCBRCRQ = 1926;
static const uint64_t IDX_CEN_MBA_0_MCBRCRQ = 1927;
static const uint64_t IDX_CEN_MBA_MCBRDS0Q = 1928;
static const uint64_t IDX_CEN_MBA_0_MCBRDS0Q = 1929;
static const uint64_t IDX_CEN_MBA_MCBRDS1Q = 1930;
static const uint64_t IDX_CEN_MBA_0_MCBRDS1Q = 1931;
static const uint64_t IDX_CEN_MBA_MCBRDS2Q = 1932;
static const uint64_t IDX_CEN_MBA_0_MCBRDS2Q = 1933;
static const uint64_t IDX_CEN_MBA_MCBRDS3Q = 1934;
static const uint64_t IDX_CEN_MBA_0_MCBRDS3Q = 1935;
static const uint64_t IDX_CEN_MBA_MCBRDS4Q = 1936;
static const uint64_t IDX_CEN_MBA_0_MCBRDS4Q = 1937;
static const uint64_t IDX_CEN_MBA_MCBRDS5Q = 1938;
static const uint64_t IDX_CEN_MBA_0_MCBRDS5Q = 1939;
static const uint64_t IDX_CEN_MBA_MCBRDS6Q = 1940;
static const uint64_t IDX_CEN_MBA_0_MCBRDS6Q = 1941;
static const uint64_t IDX_CEN_MBA_MCBRDS7Q = 1942;
static const uint64_t IDX_CEN_MBA_0_MCBRDS7Q = 1943;
static const uint64_t IDX_CEN_MBA_MCBRDS8Q = 1944;
static const uint64_t IDX_CEN_MBA_0_MCBRDS8Q = 1945;
static const uint64_t IDX_CEN_MBA_MCBRDSSPQ = 1946;
static const uint64_t IDX_CEN_MBA_0_MCBRDSSPQ = 1947;
static const uint64_t IDX_CEN_MBA_MCBREARA0Q = 1948;
static const uint64_t IDX_CEN_MBA_0_MCBREARA0Q = 1949;
static const uint64_t IDX_CEN_MBA_MCBREARA1Q = 1950;
static const uint64_t IDX_CEN_MBA_0_MCBREARA1Q = 1951;
static const uint64_t IDX_CEN_MBA_MCBRSARA0Q = 1952;
static const uint64_t IDX_CEN_MBA_0_MCBRSARA0Q = 1953;
static const uint64_t IDX_CEN_MBA_MCBRSARA1Q = 1954;
static const uint64_t IDX_CEN_MBA_0_MCBRSARA1Q = 1955;
static const uint64_t IDX_CEN_MBA_MCBSEARA0Q = 1956;
static const uint64_t IDX_CEN_MBA_0_MCBSEARA0Q = 1957;
static const uint64_t IDX_CEN_MBA_MCBSEARA1Q = 1958;
static const uint64_t IDX_CEN_MBA_0_MCBSEARA1Q = 1959;
static const uint64_t IDX_CEN_MBA_MCBSSARA0Q = 1960;
static const uint64_t IDX_CEN_MBA_0_MCBSSARA0Q = 1961;
static const uint64_t IDX_CEN_MBA_MCBSSARA1Q = 1962;
static const uint64_t IDX_CEN_MBA_0_MCBSSARA1Q = 1963;
static const uint64_t IDX_CEN_MBA_MCB_CNTLQ = 1964;
static const uint64_t IDX_CEN_MBA_0_MCB_CNTLQ = 1965;
static const uint64_t IDX_CEN_MBA_MCB_CNTLSTATQ = 1966;
static const uint64_t IDX_CEN_MBA_0_MCB_CNTLSTATQ = 1967;
static const uint64_t IDX_CEN_MBA_RCD_LRDIM_CNTL_WORD0_15Q = 1968;
static const uint64_t IDX_CEN_MBA_0_RCD_LRDIM_CNTL_WORD0_15Q = 1969;
static const uint64_t IDX_CEN_MBA_RUNTIMECTRQ = 1970;
static const uint64_t IDX_CEN_MBA_0_RUNTIMECTRQ = 1971;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_0 = 1972;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_0 = 1973;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_1 = 1974;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_1 = 1975;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_10 = 1976;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_10 = 1977;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_11 = 1978;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_11 = 1979;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_12 = 1980;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_12 = 1981;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_13 = 1982;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_13 = 1983;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_14 = 1984;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_14 = 1985;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_15 = 1986;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_15 = 1987;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_16 = 1988;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_16 = 1989;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_17 = 1990;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_17 = 1991;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_18 = 1992;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_18 = 1993;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_19 = 1994;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_19 = 1995;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_2 = 1996;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_2 = 1997;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_20 = 1998;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_20 = 1999;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_21 = 2000;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_21 = 2001;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_22 = 2002;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_22 = 2003;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_23 = 2004;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_23 = 2005;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_24 = 2006;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_24 = 2007;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_25 = 2008;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_25 = 2009;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_26 = 2010;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_26 = 2011;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_27 = 2012;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_27 = 2013;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_28 = 2014;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_28 = 2015;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_29 = 2016;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_29 = 2017;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_3 = 2018;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_3 = 2019;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_30 = 2020;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_30 = 2021;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_31 = 2022;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_31 = 2023;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_4 = 2024;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_4 = 2025;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_5 = 2026;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_5 = 2027;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_6 = 2028;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_6 = 2029;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_7 = 2030;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_7 = 2031;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_8 = 2032;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_8 = 2033;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR0_9 = 2034;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR0_9 = 2035;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_0 = 2036;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_0 = 2037;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_1 = 2038;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_1 = 2039;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_10 = 2040;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_10 = 2041;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_11 = 2042;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_11 = 2043;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_12 = 2044;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_12 = 2045;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_13 = 2046;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_13 = 2047;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_14 = 2048;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_14 = 2049;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_15 = 2050;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_15 = 2051;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_16 = 2052;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_16 = 2053;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_17 = 2054;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_17 = 2055;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_18 = 2056;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_18 = 2057;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_19 = 2058;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_19 = 2059;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_2 = 2060;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_2 = 2061;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_20 = 2062;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_20 = 2063;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_21 = 2064;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_21 = 2065;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_22 = 2066;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_22 = 2067;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_23 = 2068;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_23 = 2069;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_24 = 2070;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_24 = 2071;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_25 = 2072;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_25 = 2073;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_26 = 2074;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_26 = 2075;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_27 = 2076;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_27 = 2077;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_28 = 2078;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_28 = 2079;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_29 = 2080;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_29 = 2081;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_3 = 2082;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_3 = 2083;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_30 = 2084;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_30 = 2085;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_31 = 2086;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_31 = 2087;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_4 = 2088;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_4 = 2089;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_5 = 2090;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_5 = 2091;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_6 = 2092;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_6 = 2093;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_7 = 2094;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_7 = 2095;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_8 = 2096;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_8 = 2097;
static const uint64_t IDX_CEN_MBA_CCS_INST_ARR1_9 = 2098;
static const uint64_t IDX_CEN_MBA_0_CCS_INST_ARR1_9 = 2099;
static const uint64_t IDX_CEN_MBA_MBACALFIRQ = 2100;
static const uint64_t IDX_CEN_MBA_0_MBACALFIRQ = 2101;
static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WOX_AND = 2102;
static const uint64_t IDX_CEN_MBA_0_MBACALFIRQ_WOX_AND = 2103;
static const uint64_t IDX_CEN_MBA_MBACALFIRQ_WOX_OR = 2104;
static const uint64_t IDX_CEN_MBA_0_MBACALFIRQ_WOX_OR = 2105;
static const uint64_t IDX_CEN_MBA_MBACALFIR_ACTION0 = 2106;
static const uint64_t IDX_CEN_MBA_0_MBACALFIR_ACTION0 = 2107;
static const uint64_t IDX_CEN_MBA_MBACALFIR_ACTION1 = 2108;
static const uint64_t IDX_CEN_MBA_0_MBACALFIR_ACTION1 = 2109;
static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK = 2110;
static const uint64_t IDX_CEN_MBA_0_MBACALFIR_MASK = 2111;
static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WO_AND = 2112;
static const uint64_t IDX_CEN_MBA_0_MBACALFIR_MASK_WO_AND = 2113;
static const uint64_t IDX_CEN_MBA_MBACALFIR_MASK_WO_OR = 2114;
static const uint64_t IDX_CEN_MBA_0_MBACALFIR_MASK_WO_OR = 2115;
static const uint64_t IDX_CEN_MBA_MBASIRACT0_RO = 2116;
static const uint64_t IDX_CEN_MBA_0_MBASIRACT0_RO = 2117;
static const uint64_t IDX_CEN_MBA_MBASIRACT1_RO = 2118;
static const uint64_t IDX_CEN_MBA_0_MBASIRACT1_RO = 2119;
static const uint64_t IDX_CEN_MBA_MBASIRMASK_RO = 2120;
static const uint64_t IDX_CEN_MBA_0_MBASIRMASK_RO = 2121;
static const uint64_t IDX_CEN_MBA_MBASIRQ = 2122;
static const uint64_t IDX_CEN_MBA_0_MBASIRQ = 2123;
static const uint64_t IDX_CEN_MBA_MBASIRQ_WOX_AND = 2124;
static const uint64_t IDX_CEN_MBA_0_MBASIRQ_WOX_AND = 2125;
static const uint64_t IDX_CEN_MBA_MBASIRQ_WOX_OR = 2126;
static const uint64_t IDX_CEN_MBA_0_MBASIRQ_WOX_OR = 2127;
static const uint64_t IDX_CEN_MBA_MBA_CAL0Q = 2128;
static const uint64_t IDX_CEN_MBA_0_MBA_CAL0Q = 2129;
static const uint64_t IDX_CEN_MBA_MBA_CAL1Q = 2130;
static const uint64_t IDX_CEN_MBA_0_MBA_CAL1Q = 2131;
static const uint64_t IDX_CEN_MBA_MBA_CAL2Q = 2132;
static const uint64_t IDX_CEN_MBA_0_MBA_CAL2Q = 2133;
static const uint64_t IDX_CEN_MBA_MBA_CAL3Q = 2134;
static const uint64_t IDX_CEN_MBA_0_MBA_CAL3Q = 2135;
static const uint64_t IDX_CEN_MBA_MBA_DSM0Q = 2136;
static const uint64_t IDX_CEN_MBA_0_MBA_DSM0Q = 2137;
static const uint64_t IDX_CEN_MBA_MBA_ERR_REPORTQ_ROX = 2138;
static const uint64_t IDX_CEN_MBA_0_MBA_ERR_REPORTQ_ROX = 2139;
static const uint64_t IDX_CEN_MBA_MBA_FARB0Q = 2140;
static const uint64_t IDX_CEN_MBA_0_MBA_FARB0Q = 2141;
static const uint64_t IDX_CEN_MBA_MBA_FARB1Q = 2142;
static const uint64_t IDX_CEN_MBA_0_MBA_FARB1Q = 2143;
static const uint64_t IDX_CEN_MBA_MBA_FARB2Q = 2144;
static const uint64_t IDX_CEN_MBA_0_MBA_FARB2Q = 2145;
static const uint64_t IDX_CEN_MBA_MBA_FARB3Q = 2146;
static const uint64_t IDX_CEN_MBA_0_MBA_FARB3Q = 2147;
static const uint64_t IDX_CEN_MBA_MBA_FARB4Q = 2148;
static const uint64_t IDX_CEN_MBA_0_MBA_FARB4Q = 2149;
static const uint64_t IDX_CEN_MBA_MBA_PMU0Q_ROX = 2150;
static const uint64_t IDX_CEN_MBA_0_MBA_PMU0Q_ROX = 2151;
static const uint64_t IDX_CEN_MBA_MBA_PMU1Q_ROX = 2152;
static const uint64_t IDX_CEN_MBA_0_MBA_PMU1Q_ROX = 2153;
static const uint64_t IDX_CEN_MBA_MBA_PMU2Q_ROX = 2154;
static const uint64_t IDX_CEN_MBA_0_MBA_PMU2Q_ROX = 2155;
static const uint64_t IDX_CEN_MBA_MBA_PMU3Q = 2156;
static const uint64_t IDX_CEN_MBA_0_MBA_PMU3Q = 2157;
static const uint64_t IDX_CEN_MBA_MBA_PMU4Q_ROX = 2158;
static const uint64_t IDX_CEN_MBA_0_MBA_PMU4Q_ROX = 2159;
static const uint64_t IDX_CEN_MBA_MBA_PMU5Q_ROX = 2160;
static const uint64_t IDX_CEN_MBA_0_MBA_PMU5Q_ROX = 2161;
static const uint64_t IDX_CEN_MBA_MBA_PMU6Q = 2162;
static const uint64_t IDX_CEN_MBA_0_MBA_PMU6Q = 2163;
static const uint64_t IDX_CEN_MBA_MBA_RRQ0Q = 2164;
static const uint64_t IDX_CEN_MBA_0_MBA_RRQ0Q = 2165;
static const uint64_t IDX_CEN_MBA_MBA_TMR0Q = 2166;
static const uint64_t IDX_CEN_MBA_0_MBA_TMR0Q = 2167;
static const uint64_t IDX_CEN_MBA_MBA_TMR1Q = 2168;
static const uint64_t IDX_CEN_MBA_0_MBA_TMR1Q = 2169;
static const uint64_t IDX_CEN_MBA_MBA_WRQ0Q = 2170;
static const uint64_t IDX_CEN_MBA_0_MBA_WRQ0Q = 2171;
static const uint64_t IDX_CEN_MBA_MBAREF0Q = 2172;
static const uint64_t IDX_CEN_MBA_0_MBAREF0Q = 2173;
static const uint64_t IDX_CEN_MBA_MBAREF1Q = 2174;
static const uint64_t IDX_CEN_MBA_0_MBAREF1Q = 2175;
static const uint64_t IDX_CEN_MBA_MBAREFAQ = 2176;
static const uint64_t IDX_CEN_MBA_0_MBAREFAQ = 2177;
static const uint64_t IDX_CEN_MBA_MBARPC0Q = 2178;
static const uint64_t IDX_CEN_MBA_0_MBARPC0Q = 2179;
static const uint64_t IDX_CEN_MBA_MBARPC1Q = 2180;
static const uint64_t IDX_CEN_MBA_0_MBARPC1Q = 2181;
static const uint64_t IDX_CEN_MBA_1_MBABS0 = 2182;
static const uint64_t IDX_CEN_MBA_1_MBABS1 = 2183;
static const uint64_t IDX_CEN_MBA_1_MBABS2 = 2184;
static const uint64_t IDX_CEN_MBA_1_MBABS3 = 2185;
static const uint64_t IDX_CEN_MBA_1_MBABS4 = 2186;
static const uint64_t IDX_CEN_MBA_1_MBABS5 = 2187;
static const uint64_t IDX_CEN_MBA_1_MBABS6 = 2188;
static const uint64_t IDX_CEN_MBA_1_MBABS7 = 2189;
static const uint64_t IDX_CEN_MBA_1_MBA_INJQ = 2190;
static const uint64_t IDX_CEN_MBA_1_MBA_WRD_MODE = 2191;
static const uint64_t IDX_CEN_MBA_1_CCSARRERRINJQ = 2192;
static const uint64_t IDX_CEN_MBA_1_CCS_CNTLQ = 2193;
static const uint64_t IDX_CEN_MBA_1_CCS_FIXED_DATA0Q = 2194;
static const uint64_t IDX_CEN_MBA_1_CCS_FIXED_DATA1Q = 2195;
static const uint64_t IDX_CEN_MBA_1_CCS_MODEQ = 2196;
static const uint64_t IDX_CEN_MBA_1_CCS_STATQ = 2197;
static const uint64_t IDX_CEN_MBA_1_MBAFIRACT0 = 2198;
static const uint64_t IDX_CEN_MBA_1_MBAFIRACT1 = 2199;
static const uint64_t IDX_CEN_MBA_1_MBAFIRMASK = 2200;
static const uint64_t IDX_CEN_MBA_1_MBAFIRMASK_WO_AND = 2201;
static const uint64_t IDX_CEN_MBA_1_MBAFIRMASK_WO_OR = 2202;
static const uint64_t IDX_CEN_MBA_1_MBAFIRQ = 2203;
static const uint64_t IDX_CEN_MBA_1_MBAFIRQ_WOX_AND = 2204;
static const uint64_t IDX_CEN_MBA_1_MBAFIRQ_WOX_OR = 2205;
static const uint64_t IDX_CEN_MBA_1_MBAFIRWOF_ROX = 2206;
static const uint64_t IDX_CEN_MBA_1_MBASCTLQ = 2207;
static const uint64_t IDX_CEN_MBA_1_MBA_MCBERRPTQ_ROX = 2208;
static const uint64_t IDX_CEN_MBA_1_MBECTLQ = 2209;
static const uint64_t IDX_CEN_MBA_1_MBMACAQ = 2210;
static const uint64_t IDX_CEN_MBA_1_MBMCCQ = 2211;
static const uint64_t IDX_CEN_MBA_1_MBMCTQ = 2212;
static const uint64_t IDX_CEN_MBA_1_MBMEAQ = 2213;
static const uint64_t IDX_CEN_MBA_1_MBMSRQ = 2214;
static const uint64_t IDX_CEN_MBA_1_MBSPAMSKQ = 2215;
static const uint64_t IDX_CEN_MBA_1_MBSPAQ = 2216;
static const uint64_t IDX_CEN_MBA_1_MBSPAQ_WOX_AND = 2217;
static const uint64_t IDX_CEN_MBA_1_MBSPAQ_WOX_OR = 2218;
static const uint64_t IDX_CEN_MBA_1_MCBAGRAQ = 2219;
static const uint64_t IDX_CEN_MBA_1_MCBAMR0A0Q = 2220;
static const uint64_t IDX_CEN_MBA_1_MCBAMR0A1Q = 2221;
static const uint64_t IDX_CEN_MBA_1_MCBAMR1A0Q = 2222;
static const uint64_t IDX_CEN_MBA_1_MCBAMR1A1Q = 2223;
static const uint64_t IDX_CEN_MBA_1_MCBAMR2A0Q = 2224;
static const uint64_t IDX_CEN_MBA_1_MCBAMR2A1Q = 2225;
static const uint64_t IDX_CEN_MBA_1_MCBAMR3A0Q = 2226;
static const uint64_t IDX_CEN_MBA_1_MCBAMR3A1Q = 2227;
static const uint64_t IDX_CEN_MBA_1_MCBCFGQ = 2228;
static const uint64_t IDX_CEN_MBA_1_MCBDRCRQ = 2229;
static const uint64_t IDX_CEN_MBA_1_MCBDRSRQ = 2230;
static const uint64_t IDX_CEN_MBA_1_MCBFD0Q = 2231;
static const uint64_t IDX_CEN_MBA_1_MCBFD1Q = 2232;
static const uint64_t IDX_CEN_MBA_1_MCBFD2Q = 2233;
static const uint64_t IDX_CEN_MBA_1_MCBFD3Q = 2234;
static const uint64_t IDX_CEN_MBA_1_MCBFD4Q = 2235;
static const uint64_t IDX_CEN_MBA_1_MCBFD5Q = 2236;
static const uint64_t IDX_CEN_MBA_1_MCBFD6Q = 2237;
static const uint64_t IDX_CEN_MBA_1_MCBFD7Q = 2238;
static const uint64_t IDX_CEN_MBA_1_MCBFDQ = 2239;
static const uint64_t IDX_CEN_MBA_1_MCBFDSPQ = 2240;
static const uint64_t IDX_CEN_MBA_1_MCBLFSRA0Q = 2241;
static const uint64_t IDX_CEN_MBA_1_MCBLFSRA1Q = 2242;
static const uint64_t IDX_CEN_MBA_1_MCBMR0Q = 2243;
static const uint64_t IDX_CEN_MBA_1_MCBMR1Q = 2244;
static const uint64_t IDX_CEN_MBA_1_MCBMR2Q = 2245;
static const uint64_t IDX_CEN_MBA_1_MCBMR3Q = 2246;
static const uint64_t IDX_CEN_MBA_1_MCBMR4Q = 2247;
static const uint64_t IDX_CEN_MBA_1_MCBMR5Q = 2248;
static const uint64_t IDX_CEN_MBA_1_MCBMR6Q = 2249;
static const uint64_t IDX_CEN_MBA_1_MCBMR7Q = 2250;
static const uint64_t IDX_CEN_MBA_1_MCBPARMQ = 2251;
static const uint64_t IDX_CEN_MBA_1_MCBRCRQ = 2252;
static const uint64_t IDX_CEN_MBA_1_MCBRDS0Q = 2253;
static const uint64_t IDX_CEN_MBA_1_MCBRDS1Q = 2254;
static const uint64_t IDX_CEN_MBA_1_MCBRDS2Q = 2255;
static const uint64_t IDX_CEN_MBA_1_MCBRDS3Q = 2256;
static const uint64_t IDX_CEN_MBA_1_MCBRDS4Q = 2257;
static const uint64_t IDX_CEN_MBA_1_MCBRDS5Q = 2258;
static const uint64_t IDX_CEN_MBA_1_MCBRDS6Q = 2259;
static const uint64_t IDX_CEN_MBA_1_MCBRDS7Q = 2260;
static const uint64_t IDX_CEN_MBA_1_MCBRDS8Q = 2261;
static const uint64_t IDX_CEN_MBA_1_MCBRDSSPQ = 2262;
static const uint64_t IDX_CEN_MBA_1_MCBREARA0Q = 2263;
static const uint64_t IDX_CEN_MBA_1_MCBREARA1Q = 2264;
static const uint64_t IDX_CEN_MBA_1_MCBRSARA0Q = 2265;
static const uint64_t IDX_CEN_MBA_1_MCBRSARA1Q = 2266;
static const uint64_t IDX_CEN_MBA_1_MCBSEARA0Q = 2267;
static const uint64_t IDX_CEN_MBA_1_MCBSEARA1Q = 2268;
static const uint64_t IDX_CEN_MBA_1_MCBSSARA0Q = 2269;
static const uint64_t IDX_CEN_MBA_1_MCBSSARA1Q = 2270;
static const uint64_t IDX_CEN_MBA_1_MCB_CNTLQ = 2271;
static const uint64_t IDX_CEN_MBA_1_MCB_CNTLSTATQ = 2272;
static const uint64_t IDX_CEN_MBA_1_RCD_LRDIM_CNTL_WORD0_15Q = 2273;
static const uint64_t IDX_CEN_MBA_1_RUNTIMECTRQ = 2274;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_0 = 2275;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_1 = 2276;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_10 = 2277;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_11 = 2278;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_12 = 2279;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_13 = 2280;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_14 = 2281;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_15 = 2282;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_16 = 2283;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_17 = 2284;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_18 = 2285;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_19 = 2286;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_2 = 2287;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_20 = 2288;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_21 = 2289;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_22 = 2290;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_23 = 2291;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_24 = 2292;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_25 = 2293;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_26 = 2294;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_27 = 2295;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_28 = 2296;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_29 = 2297;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_3 = 2298;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_30 = 2299;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_31 = 2300;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_4 = 2301;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_5 = 2302;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_6 = 2303;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_7 = 2304;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_8 = 2305;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR0_9 = 2306;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_0 = 2307;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_1 = 2308;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_10 = 2309;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_11 = 2310;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_12 = 2311;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_13 = 2312;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_14 = 2313;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_15 = 2314;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_16 = 2315;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_17 = 2316;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_18 = 2317;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_19 = 2318;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_2 = 2319;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_20 = 2320;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_21 = 2321;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_22 = 2322;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_23 = 2323;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_24 = 2324;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_25 = 2325;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_26 = 2326;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_27 = 2327;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_28 = 2328;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_29 = 2329;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_3 = 2330;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_30 = 2331;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_31 = 2332;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_4 = 2333;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_5 = 2334;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_6 = 2335;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_7 = 2336;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_8 = 2337;
static const uint64_t IDX_CEN_MBA_1_CCS_INST_ARR1_9 = 2338;
static const uint64_t IDX_CEN_MBA_1_MBACALFIRQ = 2339;
static const uint64_t IDX_CEN_MBA_1_MBACALFIRQ_WOX_AND = 2340;
static const uint64_t IDX_CEN_MBA_1_MBACALFIRQ_WOX_OR = 2341;
static const uint64_t IDX_CEN_MBA_1_MBACALFIR_ACTION0 = 2342;
static const uint64_t IDX_CEN_MBA_1_MBACALFIR_ACTION1 = 2343;
static const uint64_t IDX_CEN_MBA_1_MBACALFIR_MASK = 2344;
static const uint64_t IDX_CEN_MBA_1_MBACALFIR_MASK_WO_AND = 2345;
static const uint64_t IDX_CEN_MBA_1_MBACALFIR_MASK_WO_OR = 2346;
static const uint64_t IDX_CEN_MBA_1_MBASIRACT0_RO = 2347;
static const uint64_t IDX_CEN_MBA_1_MBASIRACT1_RO = 2348;
static const uint64_t IDX_CEN_MBA_1_MBASIRMASK_RO = 2349;
static const uint64_t IDX_CEN_MBA_1_MBASIRQ = 2350;
static const uint64_t IDX_CEN_MBA_1_MBASIRQ_WOX_AND = 2351;
static const uint64_t IDX_CEN_MBA_1_MBASIRQ_WOX_OR = 2352;
static const uint64_t IDX_CEN_MBA_1_MBA_CAL0Q = 2353;
static const uint64_t IDX_CEN_MBA_1_MBA_CAL1Q = 2354;
static const uint64_t IDX_CEN_MBA_1_MBA_CAL2Q = 2355;
static const uint64_t IDX_CEN_MBA_1_MBA_CAL3Q = 2356;
static const uint64_t IDX_CEN_MBA_1_MBA_DSM0Q = 2357;
static const uint64_t IDX_CEN_MBA_1_MBA_ERR_REPORTQ_ROX = 2358;
static const uint64_t IDX_CEN_MBA_1_MBA_FARB0Q = 2359;
static const uint64_t IDX_CEN_MBA_1_MBA_FARB1Q = 2360;
static const uint64_t IDX_CEN_MBA_1_MBA_FARB2Q = 2361;
static const uint64_t IDX_CEN_MBA_1_MBA_FARB3Q = 2362;
static const uint64_t IDX_CEN_MBA_1_MBA_FARB4Q = 2363;
static const uint64_t IDX_CEN_MBA_1_MBA_PMU0Q_ROX = 2364;
static const uint64_t IDX_CEN_MBA_1_MBA_PMU1Q_ROX = 2365;
static const uint64_t IDX_CEN_MBA_1_MBA_PMU2Q_ROX = 2366;
static const uint64_t IDX_CEN_MBA_1_MBA_PMU3Q = 2367;
static const uint64_t IDX_CEN_MBA_1_MBA_PMU4Q_ROX = 2368;
static const uint64_t IDX_CEN_MBA_1_MBA_PMU5Q_ROX = 2369;
static const uint64_t IDX_CEN_MBA_1_MBA_PMU6Q = 2370;
static const uint64_t IDX_CEN_MBA_1_MBA_RRQ0Q = 2371;
static const uint64_t IDX_CEN_MBA_1_MBA_TMR0Q = 2372;
static const uint64_t IDX_CEN_MBA_1_MBA_TMR1Q = 2373;
static const uint64_t IDX_CEN_MBA_1_MBA_WRQ0Q = 2374;
static const uint64_t IDX_CEN_MBA_1_MBAREF0Q = 2375;
static const uint64_t IDX_CEN_MBA_1_MBAREF1Q = 2376;
static const uint64_t IDX_CEN_MBA_1_MBAREFAQ = 2377;
static const uint64_t IDX_CEN_MBA_1_MBARPC0Q = 2378;
static const uint64_t IDX_CEN_MBA_1_MBARPC1Q = 2379;
static const uint64_t IDX_CEN_TCN_SYNC_CONFIG_PCB = 2380;
static const uint64_t IDX_CEN_TCN_PHASE_SHADOW_PCB = 2381;
static const uint64_t IDX_CEN_TCN_OPCG_REG0_PCB = 2382;
static const uint64_t IDX_CEN_TCN_OPCG_REG1_PCB = 2383;
static const uint64_t IDX_CEN_TCN_OPCG_REG2_PCB = 2384;
static const uint64_t IDX_CEN_TCN_OPCG_REG3_PCB = 2385;
static const uint64_t IDX_CEN_TCN_CLK_REGION_PCB = 2386;
static const uint64_t IDX_CEN_TCN_SCANSELQ_PCB = 2387;
static const uint64_t IDX_CEN_TCN_CLOCK_STAT_PCB = 2388;
static const uint64_t IDX_CEN_TCN_ERROR_STATUS_PCB = 2389;
static const uint64_t IDX_CEN_TCN_CC_PROTECT_MODE_REG_PCB = 2390;
static const uint64_t IDX_CEN_TCN_CC_ATOMIC_LOCK_REG_PCB = 2391;
static const uint64_t IDX_CEN_TCN_GP0_PCB = 2392;
static const uint64_t IDX_CEN_TCN_GP0_PCB1 = 2393;
static const uint64_t IDX_CEN_TCN_GP0_PCB2 = 2394;
static const uint64_t IDX_CEN_TCN_GP1_PCB = 2395;
static const uint64_t IDX_CEN_TCN_GP2_PCB = 2396;
static const uint64_t IDX_CEN_TCN_GP4_PCB = 2397;
static const uint64_t IDX_CEN_TCN_GP4_PCB1 = 2398;
static const uint64_t IDX_CEN_TCN_GP4_PCB2 = 2399;
static const uint64_t IDX_CEN_TCN_GPIO_PROTECT_MODE_REG_PCB = 2400;
static const uint64_t IDX_CEN_TCN_GPIO_ATOMIC_LOCK_REG_PCB = 2401;
static const uint64_t IDX_CEN_TCN_XFIR_PCB = 2402;
static const uint64_t IDX_CEN_TCN_RFIR_PCB = 2403;
static const uint64_t IDX_CEN_TCN_FIR_MASK_PCB = 2404;
static const uint64_t IDX_CEN_TCN_LOCAL_FIR_PCB = 2405;
static const uint64_t IDX_CEN_TCN_LOCAL_FIR_PCB1 = 2406;
static const uint64_t IDX_CEN_TCN_LOCAL_FIR_PCB2 = 2407;
static const uint64_t IDX_CEN_TCN_PSCOM_MODE_REG_PCB = 2408;
static const uint64_t IDX_CEN_TCN_PSCOM_STATUS_ERROR_REG_PCB = 2409;
static const uint64_t IDX_CEN_TCN_PSCOM_ERROR_MASK_PCB = 2410;
static const uint64_t IDX_CEN_TCN_ADDR_TRAP_REG_PCB = 2411;
static const uint64_t IDX_CEN_TCN_DEBUG_STATUS_REG_PCB = 2412;
static const uint64_t IDX_CEN_TCN_PSCOM_WRITE_PROTECT_REG_PCB = 2413;
static const uint64_t IDX_CEN_TCN_ATOMIC_LOCK_REG_PCB = 2414;
static const uint64_t IDX_CEN_TCN_SPATTN_PCB = 2415;
static const uint64_t IDX_CEN_TCN_SPATTN_PCB1 = 2416;
static const uint64_t IDX_CEN_TCN_SPATTN_PCB2 = 2417;
static const uint64_t IDX_CEN_TCN_SPA_MASK_PCB = 2418;
static const uint64_t IDX_CEN_TCN_MODE_REG_PCB = 2419;
static const uint64_t IDX_CEN_TCN_LOCAL_FIR_ACTION0_PCB = 2420;
static const uint64_t IDX_CEN_TCN_LOCAL_FIR_ACTION1_PCB = 2421;
static const uint64_t IDX_CEN_TCN_LOCAL_FIR_MASK_PCB = 2422;
static const uint64_t IDX_CEN_TCN_LOCAL_FIR_MASK_PCB1 = 2423;
static const uint64_t IDX_CEN_TCN_LOCAL_FIR_MASK_PCB2 = 2424;
static const uint64_t IDX_CEN_TCN_DTS_RESULT0_PCB = 2425;
static const uint64_t IDX_CEN_TCN_DTS_TRC_RESULT_PCB = 2426;
static const uint64_t IDX_CEN_TCN_ENC_CPM_RESULT0_PCB = 2427;
static const uint64_t IDX_CEN_TCN_VOLT_READ0_PCB = 2428;
static const uint64_t IDX_CEN_TCN_THERM_MODE_REG_PCB = 2429;
static const uint64_t IDX_CEN_TCN_SKITTER_MODE_REG_PCB = 2430;
static const uint64_t IDX_CEN_TCN_SKITTER_CLKSRC_REG_PCB = 2431;
static const uint64_t IDX_CEN_TCN_INJECT_REG_PCB = 2432;
static const uint64_t IDX_CEN_TCN_CONTROL_REG_PCB = 2433;
static const uint64_t IDX_CEN_TCN_ERR_STATUS_REG_PCB = 2434;
static const uint64_t IDX_CEN_TCN_SKITTER_FORCE_REG_PCB = 2435;
static const uint64_t IDX_CEN_TCN_VOLT_MODE_REG_PCB = 2436;
static const uint64_t IDX_CEN_TCN_SKITTER_DATA0_PCB = 2437;
static const uint64_t IDX_CEN_TCN_SKITTER_DATA1_PCB = 2438;
static const uint64_t IDX_CEN_TCN_SKITTER_DATA2_PCB = 2439;
static const uint64_t IDX_CEN_TCN_TIMESTAMP_COUNTER_READ_PCB = 2440;
static const uint64_t IDX_CEN_TCN_DBG_MODE_REG = 2441;
static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_1 = 2442;
static const uint64_t IDX_CEN_TCN_DBG_INST1_COND_REG_2 = 2443;
static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_1 = 2444;
static const uint64_t IDX_CEN_TCN_DBG_INST2_COND_REG_2 = 2445;
static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_0 = 2446;
static const uint64_t IDX_CEN_TCN_DBG_TRACE_REG_1 = 2447;
static const uint64_t IDX_CEN_TCN_DBG_TRACE_MODE_REG_2 = 2448;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRCTRL_CONFIG = 2449;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_0 = 2450;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_1 = 2451;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_2 = 2452;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_3 = 2453;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_4 = 2454;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_5 = 2455;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_TRDATA_CONFIG_9 = 2456;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_HI_DATA_REG_ROX = 2457;
static const uint64_t IDX_CEN_TCN_TRA_MBS2TRA_TRACE_LO_DATA_REG_ROX = 2458;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRCTRL_CONFIG = 2459;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_0 = 2460;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_1 = 2461;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_2 = 2462;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_3 = 2463;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_4 = 2464;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_5 = 2465;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_TRDATA_CONFIG_9 = 2466;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_HI_DATA_REG_ROX = 2467;
static const uint64_t IDX_CEN_TCN_TRA_MBS1TRA_TRACE_LO_DATA_REG_ROX = 2468;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRCTRL_CONFIG = 2469;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_0 = 2470;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_1 = 2471;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_2 = 2472;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_3 = 2473;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_4 = 2474;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_5 = 2475;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_TRDATA_CONFIG_9 = 2476;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_HI_DATA_REG_ROX = 2477;
static const uint64_t IDX_CEN_TCN_TRA_MBITRA_TRACE_LO_DATA_REG_ROX = 2478;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P0 = 2479;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_ATEST_MUX_SEL_P0 = 2480;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ATEST_MUX_SEL_P1 = 2481;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_ATEST_MUX_SEL_P1 = 2482;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P0 = 2483;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_CONFIG0_P0 = 2484;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_CONFIG0_P1 = 2485;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_CONFIG0_P1 = 2486;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_MASK0_P0 = 2487;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_ERROR_MASK0_P0 = 2488;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_MASK0_P1 = 2489;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_ERROR_MASK0_P1 = 2490;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P0_ROX = 2491;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_ERROR_STATUS0_P0_ROX = 2492;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_ERROR_STATUS0_P1_ROX = 2493;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_ERROR_STATUS0_P1_ROX = 2494;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P0_ROX = 2495;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_FIR_ERR0_P0_ROX = 2496;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR0_P1_ROX = 2497;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_FIR_ERR0_P1_ROX = 2498;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P0_ROX = 2499;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_FIR_ERR1_P0_ROX = 2500;
static const uint64_t IDX_CEN_MBA_DDRPHY_APB_FIR_ERR1_P1_ROX = 2501;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_APB_FIR_ERR1_P1_ROX = 2502;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P0_ROX = 2503;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P0_ROX = 2504;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P1_ROX = 2505;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P1_ROX = 2506;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR0_P0_ROX = 2507;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_BASE_CNTR0_P0_ROX = 2508;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR0_P1_ROX = 2509;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_BASE_CNTR0_P1_ROX = 2510;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR1_P0_ROX = 2511;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_BASE_CNTR1_P0_ROX = 2512;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_BASE_CNTR1_P1_ROX = 2513;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_BASE_CNTR1_P1_ROX = 2514;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P0 = 2515;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P0 = 2516;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P1 = 2517;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P1 = 2518;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_P0_ROX = 2519;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CAL_TIMER_P0_ROX = 2520;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CAL_TIMER_P1_ROX = 2521;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CAL_TIMER_P1_ROX = 2522;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P0 = 2523;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CONFIG0_P0 = 2524;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG0_P1 = 2525;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CONFIG0_P1 = 2526;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P0 = 2527;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CONFIG1_P0 = 2528;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CONFIG1_P1 = 2529;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CONFIG1_P1 = 2530;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P0 = 2531;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CSID_CFG_P0 = 2532;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_CSID_CFG_P1 = 2533;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_CSID_CFG_P1 = 2534;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P0_ROX = 2535;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P0_ROX = 2536;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P1_ROX = 2537;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P1_ROX = 2538;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P0 = 2539;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_ERROR_MASK0_P0 = 2540;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_MASK0_P1 = 2541;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_ERROR_MASK0_P1 = 2542;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P0_ROX = 2543;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_ERROR_STATUS0_P0_ROX = 2544;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ERROR_STATUS0_P1_ROX = 2545;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_ERROR_STATUS0_P1_ROX = 2546;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P0 = 2547;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_CONFIG0_P0 = 2548;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG0_P1 = 2549;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_CONFIG0_P1 = 2550;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P0 = 2551;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_CONFIG1_P0 = 2552;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_CONFIG1_P1 = 2553;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_CONFIG1_P1 = 2554;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P0_ROX = 2555;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_ERROR_P0_ROX = 2556;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_ERROR_P1_ROX = 2557;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_ERROR_P1_ROX = 2558;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P0 = 2559;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_MASK_P0 = 2560;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_MASK_P1 = 2561;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_MASK_P1 = 2562;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P0_ROX = 2563;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_STATUS_P0_ROX = 2564;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_INIT_CAL_STATUS_P1_ROX = 2565;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_INIT_CAL_STATUS_P1_ROX = 2566;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P0 = 2567;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_IO_PVT_FET_CONTROL_P0 = 2568;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_CONTROL_P1 = 2569;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_IO_PVT_FET_CONTROL_P1 = 2570;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P0_ROX = 2571;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_IO_PVT_FET_STATUS_P0_ROX = 2572;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_IO_PVT_FET_STATUS_P1_ROX = 2573;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_IO_PVT_FET_STATUS_P1_ROX = 2574;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P0 = 2575;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_PRI_RP0_P0 = 2576;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP0_P1 = 2577;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_PRI_RP0_P1 = 2578;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P0 = 2579;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_PRI_RP1_P0 = 2580;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP1_P1 = 2581;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_PRI_RP1_P1 = 2582;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P0 = 2583;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_PRI_RP2_P0 = 2584;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP2_P1 = 2585;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_PRI_RP2_P1 = 2586;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P0 = 2587;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_PRI_RP3_P0 = 2588;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_PRI_RP3_P1 = 2589;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_PRI_RP3_P1 = 2590;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P0 = 2591;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_SEC_RP0_P0 = 2592;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP0_P1 = 2593;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_SEC_RP0_P1 = 2594;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P0 = 2595;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_SEC_RP1_P0 = 2596;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP1_P1 = 2597;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_SEC_RP1_P1 = 2598;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P0 = 2599;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_SEC_RP2_P0 = 2600;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP2_P1 = 2601;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_SEC_RP2_P1 = 2602;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P0 = 2603;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_SEC_RP3_P0 = 2604;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR0_SEC_RP3_P1 = 2605;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR0_SEC_RP3_P1 = 2606;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P0 = 2607;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_PRI_RP0_P0 = 2608;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP0_P1 = 2609;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_PRI_RP0_P1 = 2610;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P0 = 2611;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_PRI_RP1_P0 = 2612;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP1_P1 = 2613;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_PRI_RP1_P1 = 2614;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P0 = 2615;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_PRI_RP2_P0 = 2616;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP2_P1 = 2617;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_PRI_RP2_P1 = 2618;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P0 = 2619;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_PRI_RP3_P0 = 2620;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_PRI_RP3_P1 = 2621;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_PRI_RP3_P1 = 2622;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P0 = 2623;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_SEC_RP0_P0 = 2624;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP0_P1 = 2625;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_SEC_RP0_P1 = 2626;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P0 = 2627;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_SEC_RP1_P0 = 2628;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP1_P1 = 2629;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_SEC_RP1_P1 = 2630;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P0 = 2631;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_SEC_RP2_P0 = 2632;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP2_P1 = 2633;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_SEC_RP2_P1 = 2634;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P0 = 2635;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_SEC_RP3_P0 = 2636;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR1_SEC_RP3_P1 = 2637;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR1_SEC_RP3_P1 = 2638;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P0 = 2639;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_PRI_RP0_P0 = 2640;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP0_P1 = 2641;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_PRI_RP0_P1 = 2642;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P0 = 2643;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_PRI_RP1_P0 = 2644;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP1_P1 = 2645;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_PRI_RP1_P1 = 2646;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P0 = 2647;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_PRI_RP2_P0 = 2648;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP2_P1 = 2649;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_PRI_RP2_P1 = 2650;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P0 = 2651;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_PRI_RP3_P0 = 2652;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_PRI_RP3_P1 = 2653;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_PRI_RP3_P1 = 2654;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P0 = 2655;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_SEC_RP0_P0 = 2656;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP0_P1 = 2657;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_SEC_RP0_P1 = 2658;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P0 = 2659;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_SEC_RP1_P0 = 2660;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP1_P1 = 2661;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_SEC_RP1_P1 = 2662;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P0 = 2663;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_SEC_RP2_P0 = 2664;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP2_P1 = 2665;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_SEC_RP2_P1 = 2666;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P0 = 2667;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_SEC_RP3_P0 = 2668;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR2_SEC_RP3_P1 = 2669;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR2_SEC_RP3_P1 = 2670;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P0 = 2671;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_PRI_RP0_P0 = 2672;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP0_P1 = 2673;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_PRI_RP0_P1 = 2674;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P0 = 2675;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_PRI_RP1_P0 = 2676;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP1_P1 = 2677;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_PRI_RP1_P1 = 2678;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P0 = 2679;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_PRI_RP2_P0 = 2680;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP2_P1 = 2681;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_PRI_RP2_P1 = 2682;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P0 = 2683;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_PRI_RP3_P0 = 2684;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_PRI_RP3_P1 = 2685;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_PRI_RP3_P1 = 2686;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P0 = 2687;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_SEC_RP0_P0 = 2688;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP0_P1 = 2689;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_SEC_RP0_P1 = 2690;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P0 = 2691;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_SEC_RP1_P0 = 2692;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP1_P1 = 2693;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_SEC_RP1_P1 = 2694;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P0 = 2695;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_SEC_RP2_P0 = 2696;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP2_P1 = 2697;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_SEC_RP2_P1 = 2698;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P0 = 2699;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_SEC_RP3_P0 = 2700;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_MR3_SEC_RP3_P1 = 2701;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_MR3_SEC_RP3_P1 = 2702;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P0 = 2703;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_PER_CAL_CONFIG_P0 = 2704;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_CAL_CONFIG_P1 = 2705;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_PER_CAL_CONFIG_P1 = 2706;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P0 = 2707;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_PER_ZCAL_CONFIG_P0 = 2708;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_PER_ZCAL_CONFIG_P1 = 2709;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_PER_ZCAL_CONFIG_P1 = 2710;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P0 = 2711;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_POWERDOWN_1_P0 = 2712;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_POWERDOWN_1_P1 = 2713;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_POWERDOWN_1_P1 = 2714;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P0 = 2715;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_GROUP_EXT_P0 = 2716;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_EXT_P1 = 2717;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_GROUP_EXT_P1 = 2718;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P0 = 2719;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_GROUP_P0 = 2720;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_GROUP_P1 = 2721;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_GROUP_P1 = 2722;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P0 = 2723;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_PAIR0_P0 = 2724;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR0_P1 = 2725;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_PAIR0_P1 = 2726;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P0 = 2727;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_PAIR1_P0 = 2728;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR1_P1 = 2729;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_PAIR1_P1 = 2730;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P0 = 2731;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_PAIR2_P0 = 2732;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR2_P1 = 2733;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_PAIR2_P1 = 2734;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P0 = 2735;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_PAIR3_P0 = 2736;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RANK_PAIR3_P1 = 2737;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RANK_PAIR3_P1 = 2738;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P0 = 2739;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RELOAD_VALUE0_P0 = 2740;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RELOAD_VALUE0_P1 = 2741;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RELOAD_VALUE0_P1 = 2742;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RESETS_P0 = 2743;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RESETS_P0 = 2744;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_RESETS_P1 = 2745;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_RESETS_P1 = 2746;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P0 = 2747;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_VREF_DRV_CONTROL_P0 = 2748;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_VREF_DRV_CONTROL_P1 = 2749;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_VREF_DRV_CONTROL_P1 = 2750;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P0 = 2751;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P0 = 2752;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P1 = 2753;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P1 = 2754;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P0_ROX = 2755;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_ZCAL_TIMER_P0_ROX = 2756;
static const uint64_t IDX_CEN_MBA_DDRPHY_PC_ZCAL_TIMER_P1_ROX = 2757;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_PC_ZCAL_TIMER_P1_ROX = 2758;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P0 = 2759;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_CONFIG0_P0 = 2760;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG0_P1 = 2761;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_CONFIG0_P1 = 2762;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG1_P0 = 2763;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_CONFIG1_P0 = 2764;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG1_P1 = 2765;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_CONFIG1_P1 = 2766;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P0 = 2767;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_CONFIG2_P0 = 2768;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG2_P1 = 2769;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_CONFIG2_P1 = 2770;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P0 = 2771;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_CONFIG3_P0 = 2772;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_CONFIG3_P1 = 2773;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_CONFIG3_P1 = 2774;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_ERROR_MASK0_P0 = 2775;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_ERROR_MASK0_P0 = 2776;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_ERROR_MASK0_P1 = 2777;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_ERROR_MASK0_P1 = 2778;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_ERROR_STATUS0_P0_ROX = 2779;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_ERROR_STATUS0_P0_ROX = 2780;
static const uint64_t IDX_CEN_MBA_DDRPHY_RC_ERROR_STATUS0_P1_ROX = 2781;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_RC_ERROR_STATUS0_P1_ROX = 2782;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P0 = 2783;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_CONFIG0_P0 = 2784;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_CONFIG0_P1 = 2785;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_CONFIG0_P1 = 2786;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P0 = 2787;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ERROR_MASK0_P0 = 2788;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_MASK0_P1 = 2789;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ERROR_MASK0_P1 = 2790;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P0_ROX = 2791;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ERROR_STATUS0_P0_ROX = 2792;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ERROR_STATUS0_P1_ROX = 2793;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ERROR_STATUS0_P1_ROX = 2794;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P0 = 2795;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_LPT_ADDR2_P0 = 2796;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR2_P1 = 2797;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_LPT_ADDR2_P1 = 2798;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P0 = 2799;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_LPT_ADDR3_P0 = 2800;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR3_P1 = 2801;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_LPT_ADDR3_P1 = 2802;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P0 = 2803;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_LPT_ADDR4_P0 = 2804;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_LPT_ADDR4_P1 = 2805;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_LPT_ADDR4_P1 = 2806;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0 = 2807;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0 = 2808;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1 = 2809;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1 = 2810;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0 = 2811;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0 = 2812;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1 = 2813;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1 = 2814;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0 = 2815;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0 = 2816;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1 = 2817;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1 = 2818;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P0 = 2819;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_DEFAULT_CFG_P0 = 2820;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_DEFAULT_CFG_P1 = 2821;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_DEFAULT_CFG_P1 = 2822;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P0 = 2823;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_RD_CONFIG0_P0 = 2824;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG0_P1 = 2825;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_RD_CONFIG0_P1 = 2826;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P0 = 2827;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_RD_CONFIG1_P0 = 2828;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG1_P1 = 2829;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_RD_CONFIG1_P1 = 2830;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P0 = 2831;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_RD_CONFIG2_P0 = 2832;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG2_P1 = 2833;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_RD_CONFIG2_P1 = 2834;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P0 = 2835;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_RD_CONFIG3_P0 = 2836;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_RD_CONFIG3_P1 = 2837;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_RD_CONFIG3_P1 = 2838;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P0 = 2839;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_WR_CONFIG0_P0 = 2840;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG0_P1 = 2841;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_WR_CONFIG0_P1 = 2842;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P0 = 2843;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_WR_CONFIG1_P0 = 2844;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG1_P1 = 2845;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_WR_CONFIG1_P1 = 2846;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P0 = 2847;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_WR_CONFIG2_P0 = 2848;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG2_P1 = 2849;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_WR_CONFIG2_P1 = 2850;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P0 = 2851;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_WR_CONFIG3_P0 = 2852;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ODT_WR_CONFIG3_P1 = 2853;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ODT_WR_CONFIG3_P1 = 2854;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P0 = 2855;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RD_WR_DATA0_P0 = 2856;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA0_P1 = 2857;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RD_WR_DATA0_P1 = 2858;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P0 = 2859;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RD_WR_DATA1_P0 = 2860;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RD_WR_DATA1_P1 = 2861;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RD_WR_DATA1_P1 = 2862;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P0 = 2863;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR0_P0 = 2864;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR0_P1 = 2865;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR0_P1 = 2866;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P0 = 2867;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR1_P0 = 2868;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR1_P1 = 2869;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR1_P1 = 2870;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P0 = 2871;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR2_P0 = 2872;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR2_P1 = 2873;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR2_P1 = 2874;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P0 = 2875;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR3_P0 = 2876;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR3_P1 = 2877;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR3_P1 = 2878;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P0 = 2879;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR4_P0 = 2880;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_RESERVED_ADDR4_P1 = 2881;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_RESERVED_ADDR4_P1 = 2882;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0 = 2883;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0 = 2884;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1 = 2885;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1 = 2886;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0 = 2887;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0 = 2888;
static const uint64_t IDX_CEN_MBA_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1 = 2889;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1 = 2890;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P0 = 2891;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_CONFIG0_P0 = 2892;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG0_P1 = 2893;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_CONFIG0_P1 = 2894;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P0 = 2895;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_CONFIG1_P0 = 2896;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG1_P1 = 2897;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_CONFIG1_P1 = 2898;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P0 = 2899;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_CONFIG2_P0 = 2900;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG2_P1 = 2901;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_CONFIG2_P1 = 2902;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P0 = 2903;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_CONFIG3_P0 = 2904;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_CONFIG3_P1 = 2905;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_CONFIG3_P1 = 2906;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_ERROR_MASK0_P0 = 2907;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_ERROR_MASK0_P0 = 2908;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_ERROR_MASK0_P1 = 2909;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_ERROR_MASK0_P1 = 2910;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_ERROR_STATUS0_P0_ROX = 2911;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_ERROR_STATUS0_P0_ROX = 2912;
static const uint64_t IDX_CEN_MBA_DDRPHY_WC_ERROR_STATUS0_P1_ROX = 2913;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_WC_ERROR_STATUS0_P1_ROX = 2914;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_0 = 2915;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P0_0 = 2916;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_1 = 2917;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P0_1 = 2918;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_0 = 2919;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P1_0 = 2920;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_1 = 2921;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P1_1 = 2922;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_2 = 2923;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P0_2 = 2924;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_3 = 2925;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P0_3 = 2926;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_2 = 2927;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P1_2 = 2928;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_3 = 2929;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P1_3 = 2930;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P0_4 = 2931;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P0_4 = 2932;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR0_P1_4 = 2933;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR0_P1_4 = 2934;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_0 = 2935;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P0_0 = 2936;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_1 = 2937;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P0_1 = 2938;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_0 = 2939;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P1_0 = 2940;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_1 = 2941;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P1_1 = 2942;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_2 = 2943;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P0_2 = 2944;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_3 = 2945;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P0_3 = 2946;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_2 = 2947;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P1_2 = 2948;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_3 = 2949;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P1_3 = 2950;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P0_4 = 2951;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P0_4 = 2952;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DIR1_P1_4 = 2953;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DIR1_P1_4 = 2954;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_0 = 2955;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_0 = 2956;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_1 = 2957;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_1 = 2958;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_0 = 2959;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_0 = 2960;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_1 = 2961;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_1 = 2962;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_2 = 2963;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_2 = 2964;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_3 = 2965;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_3 = 2966;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_2 = 2967;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_2 = 2968;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_3 = 2969;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_3 = 2970;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_4 = 2971;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_4 = 2972;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_4 = 2973;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_4 = 2974;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_0 = 2975;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_0 = 2976;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_1 = 2977;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_1 = 2978;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_0 = 2979;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_0 = 2980;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_1 = 2981;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_1 = 2982;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_2 = 2983;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_2 = 2984;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_3 = 2985;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_3 = 2986;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_2 = 2987;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_2 = 2988;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_3 = 2989;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_3 = 2990;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_4 = 2991;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_4 = 2992;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_4 = 2993;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_4 = 2994;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_0 = 2995;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_0 = 2996;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_1 = 2997;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_1 = 2998;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_0 = 2999;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_0 = 3000;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_1 = 3001;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_1 = 3002;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_2 = 3003;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_2 = 3004;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_3 = 3005;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_3 = 3006;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_2 = 3007;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_2 = 3008;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_3 = 3009;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_3 = 3010;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_4 = 3011;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_4 = 3012;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_4 = 3013;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_4 = 3014;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_0 = 3015;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_0 = 3016;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_1 = 3017;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_1 = 3018;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_0 = 3019;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_0 = 3020;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_1 = 3021;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_1 = 3022;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_2 = 3023;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_2 = 3024;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_3 = 3025;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_3 = 3026;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_2 = 3027;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_2 = 3028;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_3 = 3029;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_3 = 3030;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_4 = 3031;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_4 = 3032;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_4 = 3033;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_4 = 3034;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_0 = 3035;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_0 = 3036;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_1 = 3037;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_1 = 3038;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_0 = 3039;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_0 = 3040;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_1 = 3041;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_1 = 3042;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_2 = 3043;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_2 = 3044;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_3 = 3045;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_3 = 3046;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_2 = 3047;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_2 = 3048;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_3 = 3049;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_3 = 3050;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_4 = 3051;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_4 = 3052;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_4 = 3053;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_4 = 3054;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_0 = 3055;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_0 = 3056;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_1 = 3057;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_1 = 3058;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_0 = 3059;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_0 = 3060;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_1 = 3061;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_1 = 3062;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_2 = 3063;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_2 = 3064;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_3 = 3065;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_3 = 3066;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_2 = 3067;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_2 = 3068;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_3 = 3069;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_3 = 3070;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_4 = 3071;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_4 = 3072;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_4 = 3073;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_4 = 3074;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_0 = 3075;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_0 = 3076;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_1 = 3077;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_1 = 3078;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_0 = 3079;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_0 = 3080;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_1 = 3081;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_1 = 3082;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_2 = 3083;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_2 = 3084;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_3 = 3085;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_3 = 3086;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_2 = 3087;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_2 = 3088;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_3 = 3089;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_3 = 3090;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_4 = 3091;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_4 = 3092;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_4 = 3093;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_4 = 3094;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_0 = 3095;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_0 = 3096;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_1 = 3097;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_1 = 3098;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_0 = 3099;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_0 = 3100;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_1 = 3101;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_1 = 3102;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_2 = 3103;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_2 = 3104;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_3 = 3105;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_3 = 3106;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_2 = 3107;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_2 = 3108;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_3 = 3109;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_3 = 3110;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_4 = 3111;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_4 = 3112;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_4 = 3113;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_4 = 3114;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_0 = 3115;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_0 = 3116;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_1 = 3117;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_1 = 3118;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_0 = 3119;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_0 = 3120;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_1 = 3121;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_1 = 3122;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_2 = 3123;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_2 = 3124;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_3 = 3125;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_3 = 3126;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_2 = 3127;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_2 = 3128;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_3 = 3129;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_3 = 3130;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_4 = 3131;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_4 = 3132;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_4 = 3133;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_4 = 3134;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0 = 3135;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0 = 3136;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1 = 3137;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1 = 3138;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0 = 3139;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0 = 3140;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1 = 3141;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1 = 3142;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2 = 3143;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2 = 3144;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3 = 3145;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3 = 3146;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2 = 3147;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2 = 3148;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3 = 3149;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3 = 3150;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4 = 3151;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4 = 3152;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4 = 3153;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4 = 3154;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_0 = 3155;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P0_0 = 3156;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_1 = 3157;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P0_1 = 3158;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_0 = 3159;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P1_0 = 3160;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_1 = 3161;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P1_1 = 3162;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_2 = 3163;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P0_2 = 3164;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_3 = 3165;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P0_3 = 3166;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_2 = 3167;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P1_2 = 3168;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_3 = 3169;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P1_3 = 3170;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P0_4 = 3171;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P0_4 = 3172;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DEBUG_SEL_P1_4 = 3173;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DEBUG_SEL_P1_4 = 3174;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_0 = 3175;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P0_0 = 3176;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_1 = 3177;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P0_1 = 3178;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_0 = 3179;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P1_0 = 3180;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_1 = 3181;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P1_1 = 3182;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_2 = 3183;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P0_2 = 3184;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_3 = 3185;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P0_3 = 3186;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_2 = 3187;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P1_2 = 3188;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_3 = 3189;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P1_3 = 3190;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P0_4 = 3191;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P0_4 = 3192;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_DIG_EYE_P1_4 = 3193;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_DIG_EYE_P1_4 = 3194;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0 = 3195;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0 = 3196;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1 = 3197;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1 = 3198;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0 = 3199;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0 = 3200;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1 = 3201;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1 = 3202;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2 = 3203;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2 = 3204;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3 = 3205;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3 = 3206;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2 = 3207;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2 = 3208;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3 = 3209;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3 = 3210;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4 = 3211;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4 = 3212;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4 = 3213;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4 = 3214;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_0 = 3215;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P0_0 = 3216;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_1 = 3217;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P0_1 = 3218;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_0 = 3219;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P1_0 = 3220;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_1 = 3221;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P1_1 = 3222;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_2 = 3223;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P0_2 = 3224;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_3 = 3225;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P0_3 = 3226;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_2 = 3227;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P1_2 = 3228;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_3 = 3229;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P1_3 = 3230;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P0_4 = 3231;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P0_4 = 3232;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_OFFSET_P1_4 = 3233;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_OFFSET_P1_4 = 3234;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0 = 3235;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0 = 3236;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1 = 3237;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1 = 3238;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0 = 3239;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0 = 3240;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1 = 3241;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1 = 3242;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2 = 3243;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2 = 3244;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3 = 3245;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3 = 3246;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2 = 3247;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2 = 3248;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3 = 3249;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3 = 3250;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4 = 3251;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4 = 3252;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4 = 3253;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4 = 3254;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0 = 3255;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0 = 3256;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1 = 3257;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1 = 3258;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0 = 3259;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0 = 3260;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1 = 3261;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1 = 3262;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2 = 3263;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2 = 3264;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3 = 3265;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3 = 3266;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2 = 3267;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2 = 3268;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3 = 3269;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3 = 3270;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4 = 3271;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4 = 3272;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4 = 3273;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4 = 3274;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0 = 3275;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0 = 3276;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1 = 3277;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1 = 3278;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0 = 3279;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0 = 3280;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1 = 3281;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1 = 3282;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2 = 3283;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2 = 3284;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3 = 3285;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3 = 3286;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2 = 3287;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2 = 3288;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3 = 3289;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3 = 3290;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4 = 3291;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4 = 3292;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4 = 3293;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4 = 3294;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0 = 3295;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0 = 3296;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1 = 3297;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1 = 3298;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0 = 3299;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0 = 3300;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1 = 3301;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1 = 3302;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2 = 3303;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2 = 3304;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3 = 3305;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3 = 3306;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2 = 3307;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2 = 3308;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3 = 3309;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3 = 3310;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4 = 3311;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4 = 3312;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4 = 3313;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4 = 3314;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0 = 3315;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0 = 3316;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1 = 3317;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1 = 3318;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0 = 3319;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0 = 3320;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1 = 3321;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1 = 3322;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2 = 3323;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2 = 3324;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3 = 3325;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3 = 3326;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2 = 3327;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2 = 3328;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3 = 3329;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3 = 3330;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4 = 3331;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4 = 3332;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4 = 3333;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4 = 3334;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0 = 3335;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0 = 3336;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1 = 3337;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1 = 3338;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0 = 3339;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0 = 3340;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1 = 3341;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1 = 3342;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2 = 3343;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2 = 3344;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3 = 3345;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3 = 3346;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2 = 3347;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2 = 3348;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3 = 3349;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3 = 3350;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4 = 3351;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4 = 3352;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4 = 3353;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4 = 3354;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0 = 3355;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0 = 3356;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1 = 3357;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1 = 3358;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0 = 3359;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0 = 3360;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1 = 3361;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1 = 3362;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2 = 3363;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2 = 3364;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3 = 3365;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3 = 3366;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2 = 3367;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2 = 3368;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3 = 3369;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3 = 3370;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4 = 3371;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4 = 3372;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4 = 3373;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4 = 3374;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0 = 3375;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0 = 3376;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1 = 3377;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1 = 3378;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0 = 3379;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0 = 3380;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1 = 3381;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1 = 3382;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2 = 3383;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2 = 3384;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3 = 3385;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3 = 3386;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2 = 3387;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2 = 3388;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3 = 3389;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3 = 3390;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4 = 3391;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4 = 3392;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4 = 3393;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4 = 3394;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0 = 3395;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0 = 3396;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1 = 3397;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1 = 3398;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0 = 3399;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0 = 3400;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1 = 3401;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1 = 3402;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2 = 3403;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2 = 3404;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3 = 3405;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3 = 3406;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2 = 3407;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2 = 3408;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3 = 3409;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3 = 3410;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4 = 3411;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4 = 3412;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4 = 3413;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4 = 3414;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0 = 3415;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0 = 3416;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1 = 3417;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1 = 3418;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0 = 3419;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0 = 3420;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1 = 3421;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1 = 3422;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2 = 3423;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2 = 3424;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3 = 3425;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3 = 3426;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2 = 3427;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2 = 3428;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3 = 3429;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3 = 3430;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4 = 3431;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4 = 3432;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4 = 3433;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4 = 3434;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0 = 3435;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0 = 3436;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1 = 3437;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1 = 3438;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0 = 3439;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0 = 3440;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1 = 3441;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1 = 3442;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2 = 3443;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2 = 3444;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3 = 3445;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3 = 3446;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2 = 3447;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2 = 3448;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3 = 3449;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3 = 3450;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4 = 3451;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4 = 3452;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4 = 3453;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4 = 3454;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0 = 3455;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0 = 3456;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1 = 3457;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1 = 3458;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0 = 3459;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0 = 3460;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1 = 3461;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1 = 3462;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2 = 3463;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2 = 3464;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3 = 3465;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3 = 3466;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2 = 3467;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2 = 3468;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3 = 3469;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3 = 3470;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4 = 3471;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4 = 3472;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4 = 3473;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4 = 3474;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0 = 3475;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0 = 3476;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1 = 3477;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1 = 3478;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0 = 3479;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0 = 3480;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1 = 3481;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1 = 3482;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2 = 3483;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2 = 3484;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3 = 3485;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3 = 3486;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2 = 3487;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2 = 3488;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3 = 3489;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3 = 3490;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4 = 3491;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4 = 3492;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4 = 3493;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4 = 3494;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0 = 3495;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0 = 3496;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1 = 3497;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1 = 3498;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0 = 3499;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0 = 3500;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1 = 3501;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1 = 3502;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2 = 3503;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2 = 3504;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3 = 3505;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3 = 3506;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2 = 3507;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2 = 3508;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3 = 3509;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3 = 3510;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4 = 3511;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4 = 3512;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4 = 3513;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4 = 3514;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0 = 3515;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0 = 3516;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1 = 3517;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1 = 3518;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0 = 3519;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0 = 3520;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1 = 3521;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1 = 3522;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2 = 3523;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2 = 3524;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3 = 3525;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3 = 3526;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2 = 3527;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2 = 3528;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3 = 3529;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3 = 3530;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4 = 3531;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4 = 3532;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4 = 3533;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4 = 3534;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0 = 3535;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0 = 3536;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1 = 3537;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1 = 3538;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0 = 3539;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0 = 3540;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1 = 3541;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1 = 3542;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2 = 3543;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2 = 3544;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3 = 3545;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3 = 3546;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2 = 3547;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2 = 3548;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3 = 3549;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3 = 3550;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4 = 3551;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4 = 3552;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4 = 3553;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4 = 3554;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0 = 3555;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0 = 3556;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1 = 3557;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1 = 3558;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0 = 3559;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0 = 3560;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1 = 3561;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1 = 3562;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2 = 3563;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2 = 3564;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3 = 3565;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3 = 3566;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2 = 3567;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2 = 3568;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3 = 3569;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3 = 3570;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4 = 3571;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4 = 3572;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4 = 3573;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4 = 3574;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0 = 3575;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0 = 3576;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1 = 3577;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1 = 3578;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0 = 3579;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0 = 3580;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1 = 3581;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1 = 3582;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2 = 3583;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2 = 3584;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3 = 3585;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3 = 3586;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2 = 3587;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2 = 3588;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3 = 3589;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3 = 3590;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4 = 3591;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4 = 3592;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4 = 3593;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4 = 3594;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0 = 3595;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0 = 3596;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1 = 3597;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1 = 3598;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0 = 3599;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0 = 3600;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1 = 3601;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1 = 3602;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2 = 3603;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2 = 3604;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3 = 3605;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3 = 3606;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2 = 3607;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2 = 3608;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3 = 3609;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3 = 3610;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4 = 3611;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4 = 3612;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4 = 3613;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4 = 3614;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0 = 3615;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0 = 3616;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1 = 3617;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1 = 3618;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0 = 3619;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0 = 3620;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1 = 3621;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1 = 3622;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2 = 3623;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2 = 3624;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3 = 3625;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3 = 3626;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2 = 3627;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2 = 3628;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3 = 3629;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3 = 3630;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4 = 3631;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4 = 3632;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4 = 3633;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4 = 3634;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_0 = 3635;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P0_0 = 3636;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_1 = 3637;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P0_1 = 3638;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_0 = 3639;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P1_0 = 3640;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_1 = 3641;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P1_1 = 3642;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_2 = 3643;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P0_2 = 3644;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_3 = 3645;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P0_3 = 3646;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_2 = 3647;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P1_2 = 3648;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_3 = 3649;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P1_3 = 3650;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P0_4 = 3651;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P0_4 = 3652;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DRIFT_LIMITS_P1_4 = 3653;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DRIFT_LIMITS_P1_4 = 3654;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_0_RO = 3655;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_0_RO = 3656;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_1_RO = 3657;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_1_RO = 3658;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_0_RO = 3659;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_0_RO = 3660;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_1_RO = 3661;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_1_RO = 3662;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_2_RO = 3663;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_2_RO = 3664;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_3_RO = 3665;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_3_RO = 3666;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_2_RO = 3667;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_2_RO = 3668;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_3_RO = 3669;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_3_RO = 3670;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_4_RO = 3671;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_4_RO = 3672;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_4_RO = 3673;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_4_RO = 3674;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_0_RO = 3675;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_0_RO = 3676;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_1_RO = 3677;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_1_RO = 3678;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_0_RO = 3679;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_0_RO = 3680;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_1_RO = 3681;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_1_RO = 3682;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_2_RO = 3683;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_2_RO = 3684;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_3_RO = 3685;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_3_RO = 3686;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_2_RO = 3687;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_2_RO = 3688;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_3_RO = 3689;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_3_RO = 3690;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_4_RO = 3691;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_4_RO = 3692;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_4_RO = 3693;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_4_RO = 3694;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_0_RO = 3695;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_0_RO = 3696;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_1_RO = 3697;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_1_RO = 3698;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_0_RO = 3699;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_0_RO = 3700;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_1_RO = 3701;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_1_RO = 3702;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_2_RO = 3703;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_2_RO = 3704;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_3_RO = 3705;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_3_RO = 3706;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_2_RO = 3707;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_2_RO = 3708;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_3_RO = 3709;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_3_RO = 3710;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_4_RO = 3711;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_4_RO = 3712;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_4_RO = 3713;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_4_RO = 3714;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_0_RO = 3715;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_0_RO = 3716;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_1_RO = 3717;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_1_RO = 3718;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_0_RO = 3719;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_0_RO = 3720;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_1_RO = 3721;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_1_RO = 3722;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_2_RO = 3723;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_2_RO = 3724;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_3_RO = 3725;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_3_RO = 3726;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_2_RO = 3727;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_2_RO = 3728;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_3_RO = 3729;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_3_RO = 3730;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_4_RO = 3731;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_4_RO = 3732;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_4_RO = 3733;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_4_RO = 3734;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_0_RO = 3735;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_0_RO = 3736;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_1_RO = 3737;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_1_RO = 3738;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_0_RO = 3739;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_0_RO = 3740;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_1_RO = 3741;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_1_RO = 3742;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_2_RO = 3743;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_2_RO = 3744;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_3_RO = 3745;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_3_RO = 3746;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_2_RO = 3747;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_2_RO = 3748;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_3_RO = 3749;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_3_RO = 3750;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_4_RO = 3751;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_4_RO = 3752;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_4_RO = 3753;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_4_RO = 3754;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_0_RO = 3755;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_0_RO = 3756;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_1_RO = 3757;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_1_RO = 3758;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_0_RO = 3759;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_0_RO = 3760;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_1_RO = 3761;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_1_RO = 3762;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_2_RO = 3763;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_2_RO = 3764;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_3_RO = 3765;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_3_RO = 3766;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_2_RO = 3767;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_2_RO = 3768;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_3_RO = 3769;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_3_RO = 3770;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_4_RO = 3771;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_4_RO = 3772;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_4_RO = 3773;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_4_RO = 3774;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_0_RO = 3775;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_0_RO = 3776;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_1_RO = 3777;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_1_RO = 3778;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_0_RO = 3779;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_0_RO = 3780;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_1_RO = 3781;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_1_RO = 3782;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_2_RO = 3783;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_2_RO = 3784;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_3_RO = 3785;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_3_RO = 3786;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_2_RO = 3787;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_2_RO = 3788;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_3_RO = 3789;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_3_RO = 3790;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_4_RO = 3791;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_4_RO = 3792;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_4_RO = 3793;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_4_RO = 3794;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_0_RO = 3795;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_0_RO = 3796;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_1_RO = 3797;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_1_RO = 3798;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_0_RO = 3799;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_0_RO = 3800;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_1_RO = 3801;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_1_RO = 3802;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_2_RO = 3803;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_2_RO = 3804;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_3_RO = 3805;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_3_RO = 3806;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_2_RO = 3807;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_2_RO = 3808;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_3_RO = 3809;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_3_RO = 3810;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_4_RO = 3811;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_4_RO = 3812;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_4_RO = 3813;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_4_RO = 3814;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_0 = 3815;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P0_0 = 3816;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_1 = 3817;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P0_1 = 3818;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_0 = 3819;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P1_0 = 3820;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_1 = 3821;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P1_1 = 3822;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_2 = 3823;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P0_2 = 3824;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_3 = 3825;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P0_3 = 3826;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_2 = 3827;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P1_2 = 3828;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_3 = 3829;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P1_3 = 3830;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P0_4 = 3831;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P0_4 = 3832;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_CONFIG0_P1_4 = 3833;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_CONFIG0_P1_4 = 3834;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_0 = 3835;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_0 = 3836;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_1 = 3837;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_1 = 3838;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_0 = 3839;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_0 = 3840;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_1 = 3841;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_1 = 3842;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_2 = 3843;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_2 = 3844;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_3 = 3845;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_3 = 3846;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_2 = 3847;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_2 = 3848;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_3 = 3849;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_3 = 3850;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_4 = 3851;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_4 = 3852;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_4 = 3853;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_4 = 3854;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_0 = 3855;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P0_0 = 3856;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_1 = 3857;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P0_1 = 3858;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_0 = 3859;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P1_0 = 3860;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_1 = 3861;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P1_1 = 3862;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_2 = 3863;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P0_2 = 3864;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_3 = 3865;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P0_3 = 3866;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_2 = 3867;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P1_2 = 3868;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_3 = 3869;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P1_3 = 3870;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P0_4 = 3871;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P0_4 = 3872;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_NFET_TERM_P1_4 = 3873;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_NFET_TERM_P1_4 = 3874;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_0 = 3875;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_0 = 3876;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_1 = 3877;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_1 = 3878;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_0 = 3879;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_0 = 3880;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_1 = 3881;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_1 = 3882;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_2 = 3883;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_2 = 3884;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_3 = 3885;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_3 = 3886;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_2 = 3887;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_2 = 3888;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_3 = 3889;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_3 = 3890;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_4 = 3891;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_4 = 3892;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_4 = 3893;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_4 = 3894;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_0 = 3895;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P0_0 = 3896;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_1 = 3897;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P0_1 = 3898;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_0 = 3899;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P1_0 = 3900;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_1 = 3901;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P1_1 = 3902;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_2 = 3903;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P0_2 = 3904;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_3 = 3905;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P0_3 = 3906;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_2 = 3907;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P1_2 = 3908;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_3 = 3909;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P1_3 = 3910;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P0_4 = 3911;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P0_4 = 3912;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_IO_TX_PFET_TERM_P1_4 = 3913;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_IO_TX_PFET_TERM_P1_4 = 3914;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_0 = 3915;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P0_0 = 3916;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_1 = 3917;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P0_1 = 3918;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_0 = 3919;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P1_0 = 3920;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_1 = 3921;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P1_1 = 3922;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_2 = 3923;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P0_2 = 3924;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_3 = 3925;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P0_3 = 3926;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_2 = 3927;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P1_2 = 3928;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_3 = 3929;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P1_3 = 3930;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P0_4 = 3931;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P0_4 = 3932;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_0_P1_4 = 3933;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_0_P1_4 = 3934;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_0 = 3935;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P0_0 = 3936;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_1 = 3937;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P0_1 = 3938;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_0 = 3939;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P1_0 = 3940;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_1 = 3941;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P1_1 = 3942;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_2 = 3943;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P0_2 = 3944;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_3 = 3945;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P0_3 = 3946;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_2 = 3947;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P1_2 = 3948;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_3 = 3949;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P1_3 = 3950;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P0_4 = 3951;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P0_4 = 3952;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_1_P1_4 = 3953;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_1_P1_4 = 3954;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_0 = 3955;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P0_0 = 3956;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_1 = 3957;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P0_1 = 3958;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_0 = 3959;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P1_0 = 3960;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_1 = 3961;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P1_1 = 3962;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_2 = 3963;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P0_2 = 3964;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_3 = 3965;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P0_3 = 3966;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_2 = 3967;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P1_2 = 3968;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_3 = 3969;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P1_3 = 3970;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P0_4 = 3971;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P0_4 = 3972;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PATTERN_POS_2_P1_4 = 3973;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PATTERN_POS_2_P1_4 = 3974;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_0 = 3975;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P0_0 = 3976;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_1 = 3977;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P0_1 = 3978;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_0 = 3979;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P1_0 = 3980;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_1 = 3981;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P1_1 = 3982;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_2 = 3983;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P0_2 = 3984;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_3 = 3985;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P0_3 = 3986;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_2 = 3987;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P1_2 = 3988;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_3 = 3989;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P1_3 = 3990;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P0_4 = 3991;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P0_4 = 3992;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG0_P1_4 = 3993;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG0_P1_4 = 3994;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_0 = 3995;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P0_0 = 3996;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_1 = 3997;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P0_1 = 3998;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_0 = 3999;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P1_0 = 4000;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_1 = 4001;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P1_1 = 4002;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_2 = 4003;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P0_2 = 4004;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_3 = 4005;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P0_3 = 4006;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_2 = 4007;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P1_2 = 4008;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_3 = 4009;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P1_3 = 4010;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P0_4 = 4011;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P0_4 = 4012;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_PLL_CONFIG1_P1_4 = 4013;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_PLL_CONFIG1_P1_4 = 4014;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_0 = 4015;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P0_0 = 4016;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_1 = 4017;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P0_1 = 4018;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_0 = 4019;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P1_0 = 4020;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_1 = 4021;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P1_1 = 4022;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_2 = 4023;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P0_2 = 4024;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_3 = 4025;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P0_3 = 4026;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_2 = 4027;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P1_2 = 4028;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_3 = 4029;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P1_3 = 4030;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P0_4 = 4031;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P0_4 = 4032;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_ERROR_MASK0_P1_4 = 4033;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_ERROR_MASK0_P1_4 = 4034;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_0_RO = 4035;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P0_0_RO = 4036;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_1_RO = 4037;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P0_1_RO = 4038;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_0_RO = 4039;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P1_0_RO = 4040;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_1_RO = 4041;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P1_1_RO = 4042;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_2_RO = 4043;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P0_2_RO = 4044;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_3_RO = 4045;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P0_3_RO = 4046;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_2_RO = 4047;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P1_2_RO = 4048;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_3_RO = 4049;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P1_3_RO = 4050;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P0_4_RO = 4051;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P0_4_RO = 4052;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS0_P1_4_RO = 4053;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS0_P1_4_RO = 4054;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_0_RO = 4055;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P0_0_RO = 4056;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_1_RO = 4057;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P0_1_RO = 4058;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_0_RO = 4059;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P1_0_RO = 4060;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_1_RO = 4061;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P1_1_RO = 4062;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_2_RO = 4063;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P0_2_RO = 4064;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_3_RO = 4065;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P0_3_RO = 4066;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_2_RO = 4067;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P1_2_RO = 4068;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_3_RO = 4069;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P1_3_RO = 4070;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P0_4_RO = 4071;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P0_4_RO = 4072;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS1_P1_4_RO = 4073;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS1_P1_4_RO = 4074;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_0_RO = 4075;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P0_0_RO = 4076;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_1_RO = 4077;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P0_1_RO = 4078;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_0_RO = 4079;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P1_0_RO = 4080;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_1_RO = 4081;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P1_1_RO = 4082;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_2_RO = 4083;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P0_2_RO = 4084;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_3_RO = 4085;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P0_3_RO = 4086;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_2_RO = 4087;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P1_2_RO = 4088;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_3_RO = 4089;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P1_3_RO = 4090;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P0_4_RO = 4091;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P0_4_RO = 4092;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS2_P1_4_RO = 4093;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS2_P1_4_RO = 4094;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_0_RO = 4095;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P0_0_RO = 4096;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_1_RO = 4097;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P0_1_RO = 4098;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_0_RO = 4099;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P1_0_RO = 4100;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_1_RO = 4101;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P1_1_RO = 4102;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_2_RO = 4103;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P0_2_RO = 4104;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_3_RO = 4105;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P0_3_RO = 4106;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_2_RO = 4107;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P1_2_RO = 4108;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_3_RO = 4109;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P1_3_RO = 4110;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P0_4_RO = 4111;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P0_4_RO = 4112;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_LVL_STATUS3_P1_4_RO = 4113;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_LVL_STATUS3_P1_4_RO = 4114;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_0 = 4115;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P0_0 = 4116;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_1 = 4117;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P0_1 = 4118;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_0 = 4119;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P1_0 = 4120;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_1 = 4121;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P1_1 = 4122;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_2 = 4123;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P0_2 = 4124;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_3 = 4125;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P0_3 = 4126;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_2 = 4127;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P1_2 = 4128;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_3 = 4129;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P1_3 = 4130;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P0_4 = 4131;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P0_4 = 4132;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_STATUS0_P1_4 = 4133;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_STATUS0_P1_4 = 4134;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0 = 4135;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0 = 4136;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1 = 4137;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1 = 4138;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0 = 4139;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0 = 4140;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1 = 4141;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1 = 4142;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2 = 4143;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2 = 4144;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3 = 4145;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3 = 4146;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2 = 4147;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2 = 4148;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3 = 4149;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3 = 4150;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4 = 4151;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4 = 4152;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4 = 4153;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4 = 4154;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0 = 4155;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0 = 4156;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1 = 4157;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1 = 4158;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0 = 4159;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0 = 4160;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1 = 4161;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1 = 4162;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2 = 4163;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2 = 4164;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3 = 4165;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3 = 4166;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2 = 4167;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2 = 4168;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3 = 4169;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3 = 4170;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4 = 4171;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4 = 4172;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4 = 4173;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4 = 4174;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0 = 4175;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0 = 4176;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1 = 4177;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1 = 4178;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0 = 4179;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0 = 4180;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1 = 4181;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1 = 4182;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2 = 4183;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2 = 4184;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3 = 4185;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3 = 4186;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2 = 4187;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2 = 4188;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3 = 4189;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3 = 4190;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4 = 4191;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4 = 4192;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4 = 4193;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4 = 4194;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0 = 4195;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0 = 4196;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1 = 4197;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1 = 4198;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0 = 4199;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0 = 4200;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1 = 4201;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1 = 4202;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2 = 4203;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2 = 4204;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3 = 4205;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3 = 4206;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2 = 4207;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2 = 4208;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3 = 4209;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3 = 4210;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4 = 4211;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4 = 4212;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4 = 4213;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4 = 4214;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_0 = 4215;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_0 = 4216;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_1 = 4217;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_1 = 4218;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_0 = 4219;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_0 = 4220;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_1 = 4221;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_1 = 4222;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_2 = 4223;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_2 = 4224;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_3 = 4225;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_3 = 4226;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_2 = 4227;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_2 = 4228;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_3 = 4229;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_3 = 4230;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_4 = 4231;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_4 = 4232;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_4 = 4233;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_4 = 4234;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_0 = 4235;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_0 = 4236;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_1 = 4237;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_1 = 4238;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_0 = 4239;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_0 = 4240;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_1 = 4241;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_1 = 4242;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_2 = 4243;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_2 = 4244;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_3 = 4245;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_3 = 4246;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_2 = 4247;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_2 = 4248;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_3 = 4249;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_3 = 4250;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_4 = 4251;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_4 = 4252;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_4 = 4253;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_4 = 4254;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_0 = 4255;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_0 = 4256;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_1 = 4257;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_1 = 4258;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_0 = 4259;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_0 = 4260;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_1 = 4261;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_1 = 4262;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_2 = 4263;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_2 = 4264;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_3 = 4265;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_3 = 4266;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_2 = 4267;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_2 = 4268;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_3 = 4269;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_3 = 4270;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_4 = 4271;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_4 = 4272;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_4 = 4273;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_4 = 4274;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_0 = 4275;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_0 = 4276;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_1 = 4277;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_1 = 4278;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_0 = 4279;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_0 = 4280;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_1 = 4281;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_1 = 4282;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_2 = 4283;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_2 = 4284;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_3 = 4285;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_3 = 4286;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_2 = 4287;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_2 = 4288;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_3 = 4289;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_3 = 4290;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_4 = 4291;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_4 = 4292;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_4 = 4293;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_4 = 4294;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_0 = 4295;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_0 = 4296;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_1 = 4297;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_1 = 4298;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_0 = 4299;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_0 = 4300;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_1 = 4301;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_1 = 4302;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_2 = 4303;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_2 = 4304;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_3 = 4305;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_3 = 4306;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_2 = 4307;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_2 = 4308;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_3 = 4309;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_3 = 4310;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_4 = 4311;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_4 = 4312;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_4 = 4313;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_4 = 4314;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_0 = 4315;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_0 = 4316;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_1 = 4317;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_1 = 4318;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_0 = 4319;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_0 = 4320;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_1 = 4321;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_1 = 4322;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_2 = 4323;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_2 = 4324;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_3 = 4325;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_3 = 4326;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_2 = 4327;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_2 = 4328;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_3 = 4329;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_3 = 4330;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_4 = 4331;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_4 = 4332;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_4 = 4333;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_4 = 4334;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_0 = 4335;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_0 = 4336;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_1 = 4337;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_1 = 4338;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_0 = 4339;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_0 = 4340;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_1 = 4341;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_1 = 4342;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_2 = 4343;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_2 = 4344;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_3 = 4345;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_3 = 4346;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_2 = 4347;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_2 = 4348;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_3 = 4349;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_3 = 4350;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_4 = 4351;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_4 = 4352;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_4 = 4353;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_4 = 4354;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_0 = 4355;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_0 = 4356;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_1 = 4357;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_1 = 4358;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_0 = 4359;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_0 = 4360;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_1 = 4361;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_1 = 4362;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_2 = 4363;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_2 = 4364;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_3 = 4365;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_3 = 4366;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_2 = 4367;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_2 = 4368;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_3 = 4369;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_3 = 4370;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_4 = 4371;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_4 = 4372;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_4 = 4373;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_4 = 4374;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_0 = 4375;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_0 = 4376;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_1 = 4377;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_1 = 4378;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_0 = 4379;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_0 = 4380;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_1 = 4381;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_1 = 4382;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_2 = 4383;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_2 = 4384;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_3 = 4385;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_3 = 4386;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_2 = 4387;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_2 = 4388;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_3 = 4389;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_3 = 4390;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_4 = 4391;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_4 = 4392;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_4 = 4393;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_4 = 4394;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_0 = 4395;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_0 = 4396;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_1 = 4397;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_1 = 4398;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_0 = 4399;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_0 = 4400;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_1 = 4401;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_1 = 4402;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_2 = 4403;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_2 = 4404;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_3 = 4405;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_3 = 4406;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_2 = 4407;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_2 = 4408;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_3 = 4409;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_3 = 4410;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_4 = 4411;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_4 = 4412;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_4 = 4413;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_4 = 4414;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_0 = 4415;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_0 = 4416;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_1 = 4417;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_1 = 4418;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_0 = 4419;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_0 = 4420;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_1 = 4421;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_1 = 4422;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_2 = 4423;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_2 = 4424;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_3 = 4425;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_3 = 4426;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_2 = 4427;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_2 = 4428;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_3 = 4429;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_3 = 4430;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_4 = 4431;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_4 = 4432;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_4 = 4433;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_4 = 4434;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_0 = 4435;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_0 = 4436;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_1 = 4437;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_1 = 4438;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_0 = 4439;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_0 = 4440;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_1 = 4441;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_1 = 4442;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_2 = 4443;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_2 = 4444;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_3 = 4445;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_3 = 4446;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_2 = 4447;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_2 = 4448;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_3 = 4449;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_3 = 4450;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_4 = 4451;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_4 = 4452;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_4 = 4453;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_4 = 4454;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_0 = 4455;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_0 = 4456;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_1 = 4457;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_1 = 4458;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_0 = 4459;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_0 = 4460;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_1 = 4461;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_1 = 4462;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_2 = 4463;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_2 = 4464;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_3 = 4465;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_3 = 4466;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_2 = 4467;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_2 = 4468;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_3 = 4469;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_3 = 4470;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_4 = 4471;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_4 = 4472;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_4 = 4473;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_4 = 4474;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_0 = 4475;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_0 = 4476;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_1 = 4477;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_1 = 4478;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_0 = 4479;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_0 = 4480;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_1 = 4481;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_1 = 4482;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_2 = 4483;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_2 = 4484;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_3 = 4485;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_3 = 4486;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_2 = 4487;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_2 = 4488;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_3 = 4489;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_3 = 4490;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_4 = 4491;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_4 = 4492;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_4 = 4493;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_4 = 4494;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_0 = 4495;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_0 = 4496;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_1 = 4497;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_1 = 4498;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_0 = 4499;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_0 = 4500;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_1 = 4501;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_1 = 4502;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_2 = 4503;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_2 = 4504;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_3 = 4505;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_3 = 4506;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_2 = 4507;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_2 = 4508;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_3 = 4509;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_3 = 4510;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_4 = 4511;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_4 = 4512;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_4 = 4513;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_4 = 4514;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_0 = 4515;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_0 = 4516;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_1 = 4517;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_1 = 4518;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_0 = 4519;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_0 = 4520;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_1 = 4521;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_1 = 4522;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_2 = 4523;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_2 = 4524;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_3 = 4525;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_3 = 4526;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_2 = 4527;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_2 = 4528;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_3 = 4529;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_3 = 4530;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_4 = 4531;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_4 = 4532;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_4 = 4533;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_4 = 4534;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_0 = 4535;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_0 = 4536;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_1 = 4537;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_1 = 4538;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_0 = 4539;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_0 = 4540;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_1 = 4541;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_1 = 4542;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_2 = 4543;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_2 = 4544;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_3 = 4545;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_3 = 4546;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_2 = 4547;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_2 = 4548;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_3 = 4549;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_3 = 4550;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_4 = 4551;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_4 = 4552;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_4 = 4553;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_4 = 4554;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_0 = 4555;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_0 = 4556;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_1 = 4557;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_1 = 4558;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_0 = 4559;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_0 = 4560;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_1 = 4561;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_1 = 4562;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_2 = 4563;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_2 = 4564;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_3 = 4565;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_3 = 4566;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_2 = 4567;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_2 = 4568;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_3 = 4569;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_3 = 4570;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_4 = 4571;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_4 = 4572;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_4 = 4573;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_4 = 4574;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_0 = 4575;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_0 = 4576;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_1 = 4577;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_1 = 4578;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_0 = 4579;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_0 = 4580;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_1 = 4581;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_1 = 4582;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_2 = 4583;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_2 = 4584;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_3 = 4585;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_3 = 4586;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_2 = 4587;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_2 = 4588;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_3 = 4589;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_3 = 4590;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_4 = 4591;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_4 = 4592;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_4 = 4593;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_4 = 4594;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_0 = 4595;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_0 = 4596;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_1 = 4597;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_1 = 4598;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_0 = 4599;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_0 = 4600;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_1 = 4601;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_1 = 4602;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_2 = 4603;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_2 = 4604;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_3 = 4605;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_3 = 4606;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_2 = 4607;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_2 = 4608;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_3 = 4609;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_3 = 4610;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_4 = 4611;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_4 = 4612;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_4 = 4613;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_4 = 4614;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_0 = 4615;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_0 = 4616;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_1 = 4617;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_1 = 4618;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_0 = 4619;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_0 = 4620;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_1 = 4621;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_1 = 4622;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_2 = 4623;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_2 = 4624;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_3 = 4625;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_3 = 4626;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_2 = 4627;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_2 = 4628;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_3 = 4629;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_3 = 4630;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_4 = 4631;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_4 = 4632;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_4 = 4633;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_4 = 4634;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_0 = 4635;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_0 = 4636;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_1 = 4637;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_1 = 4638;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_0 = 4639;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_0 = 4640;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_1 = 4641;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_1 = 4642;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_2 = 4643;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_2 = 4644;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_3 = 4645;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_3 = 4646;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_2 = 4647;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_2 = 4648;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_3 = 4649;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_3 = 4650;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_4 = 4651;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_4 = 4652;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_4 = 4653;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_4 = 4654;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_0 = 4655;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_0 = 4656;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_1 = 4657;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_1 = 4658;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_0 = 4659;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_0 = 4660;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_1 = 4661;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_1 = 4662;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_2 = 4663;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_2 = 4664;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_3 = 4665;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_3 = 4666;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_2 = 4667;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_2 = 4668;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_3 = 4669;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_3 = 4670;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_4 = 4671;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_4 = 4672;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_4 = 4673;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_4 = 4674;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_0 = 4675;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_0 = 4676;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_1 = 4677;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_1 = 4678;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_0 = 4679;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_0 = 4680;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_1 = 4681;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_1 = 4682;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_2 = 4683;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_2 = 4684;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_3 = 4685;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_3 = 4686;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_2 = 4687;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_2 = 4688;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_3 = 4689;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_3 = 4690;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_4 = 4691;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_4 = 4692;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_4 = 4693;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_4 = 4694;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_0 = 4695;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_0 = 4696;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_1 = 4697;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_1 = 4698;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_0 = 4699;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_0 = 4700;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_1 = 4701;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_1 = 4702;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_2 = 4703;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_2 = 4704;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_3 = 4705;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_3 = 4706;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_2 = 4707;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_2 = 4708;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_3 = 4709;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_3 = 4710;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_4 = 4711;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_4 = 4712;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_4 = 4713;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_4 = 4714;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_0 = 4715;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_0 = 4716;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_1 = 4717;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_1 = 4718;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_0 = 4719;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_0 = 4720;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_1 = 4721;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_1 = 4722;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_2 = 4723;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_2 = 4724;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_3 = 4725;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_3 = 4726;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_2 = 4727;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_2 = 4728;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_3 = 4729;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_3 = 4730;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_4 = 4731;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_4 = 4732;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_4 = 4733;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_4 = 4734;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_0 = 4735;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_0 = 4736;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_1 = 4737;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_1 = 4738;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_0 = 4739;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_0 = 4740;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_1 = 4741;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_1 = 4742;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_2 = 4743;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_2 = 4744;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_3 = 4745;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_3 = 4746;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_2 = 4747;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_2 = 4748;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_3 = 4749;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_3 = 4750;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_4 = 4751;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_4 = 4752;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_4 = 4753;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_4 = 4754;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_0 = 4755;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_0 = 4756;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_1 = 4757;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_1 = 4758;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_0 = 4759;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_0 = 4760;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_1 = 4761;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_1 = 4762;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_2 = 4763;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_2 = 4764;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_3 = 4765;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_3 = 4766;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_2 = 4767;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_2 = 4768;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_3 = 4769;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_3 = 4770;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_4 = 4771;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_4 = 4772;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_4 = 4773;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_4 = 4774;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_0 = 4775;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_0 = 4776;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_1 = 4777;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_1 = 4778;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_0 = 4779;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_0 = 4780;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_1 = 4781;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_1 = 4782;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_2 = 4783;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_2 = 4784;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_3 = 4785;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_3 = 4786;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_2 = 4787;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_2 = 4788;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_3 = 4789;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_3 = 4790;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_4 = 4791;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_4 = 4792;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_4 = 4793;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_4 = 4794;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_0 = 4795;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_0 = 4796;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_1 = 4797;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_1 = 4798;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_0 = 4799;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_0 = 4800;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_1 = 4801;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_1 = 4802;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_2 = 4803;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_2 = 4804;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_3 = 4805;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_3 = 4806;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_2 = 4807;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_2 = 4808;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_3 = 4809;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_3 = 4810;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_4 = 4811;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_4 = 4812;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_4 = 4813;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_4 = 4814;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_0 = 4815;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_0 = 4816;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_1 = 4817;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_1 = 4818;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_0 = 4819;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_0 = 4820;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_1 = 4821;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_1 = 4822;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_2 = 4823;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_2 = 4824;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_3 = 4825;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_3 = 4826;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_2 = 4827;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_2 = 4828;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_3 = 4829;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_3 = 4830;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_4 = 4831;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_4 = 4832;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_4 = 4833;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_4 = 4834;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_0 = 4835;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_0 = 4836;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_1 = 4837;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_1 = 4838;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_0 = 4839;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_0 = 4840;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_1 = 4841;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_1 = 4842;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_2 = 4843;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_2 = 4844;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_3 = 4845;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_3 = 4846;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_2 = 4847;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_2 = 4848;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_3 = 4849;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_3 = 4850;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_4 = 4851;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_4 = 4852;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_4 = 4853;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_4 = 4854;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_0 = 4855;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_0 = 4856;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_1 = 4857;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_1 = 4858;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_0 = 4859;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_0 = 4860;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_1 = 4861;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_1 = 4862;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_2 = 4863;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_2 = 4864;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_3 = 4865;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_3 = 4866;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_2 = 4867;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_2 = 4868;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_3 = 4869;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_3 = 4870;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_4 = 4871;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_4 = 4872;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_4 = 4873;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_4 = 4874;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_0 = 4875;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_0 = 4876;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_1 = 4877;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_1 = 4878;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_0 = 4879;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_0 = 4880;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_1 = 4881;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_1 = 4882;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_2 = 4883;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_2 = 4884;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_3 = 4885;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_3 = 4886;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_2 = 4887;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_2 = 4888;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_3 = 4889;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_3 = 4890;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_4 = 4891;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_4 = 4892;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_4 = 4893;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_4 = 4894;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_0 = 4895;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_0 = 4896;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_1 = 4897;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_1 = 4898;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_0 = 4899;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_0 = 4900;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_1 = 4901;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_1 = 4902;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_2 = 4903;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_2 = 4904;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_3 = 4905;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_3 = 4906;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_2 = 4907;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_2 = 4908;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_3 = 4909;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_3 = 4910;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_4 = 4911;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_4 = 4912;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_4 = 4913;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_4 = 4914;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_0 = 4915;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_0 = 4916;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_1 = 4917;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_1 = 4918;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_0 = 4919;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_0 = 4920;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_1 = 4921;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_1 = 4922;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_2 = 4923;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_2 = 4924;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_3 = 4925;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_3 = 4926;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_2 = 4927;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_2 = 4928;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_3 = 4929;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_3 = 4930;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_4 = 4931;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_4 = 4932;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_4 = 4933;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_4 = 4934;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_0 = 4935;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_0 = 4936;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_1 = 4937;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_1 = 4938;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_0 = 4939;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_0 = 4940;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_1 = 4941;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_1 = 4942;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_2 = 4943;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_2 = 4944;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_3 = 4945;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_3 = 4946;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_2 = 4947;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_2 = 4948;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_3 = 4949;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_3 = 4950;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_4 = 4951;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_4 = 4952;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_4 = 4953;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_4 = 4954;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_0 = 4955;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_0 = 4956;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_1 = 4957;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_1 = 4958;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_0 = 4959;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_0 = 4960;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_1 = 4961;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_1 = 4962;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_2 = 4963;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_2 = 4964;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_3 = 4965;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_3 = 4966;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_2 = 4967;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_2 = 4968;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_3 = 4969;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_3 = 4970;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_4 = 4971;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_4 = 4972;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_4 = 4973;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_4 = 4974;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_0 = 4975;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_0 = 4976;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_1 = 4977;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_1 = 4978;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_0 = 4979;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_0 = 4980;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_1 = 4981;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_1 = 4982;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_2 = 4983;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_2 = 4984;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_3 = 4985;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_3 = 4986;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_2 = 4987;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_2 = 4988;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_3 = 4989;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_3 = 4990;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_4 = 4991;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_4 = 4992;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_4 = 4993;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_4 = 4994;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_0 = 4995;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_0 = 4996;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_1 = 4997;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_1 = 4998;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_0 = 4999;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_0 = 5000;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_1 = 5001;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_1 = 5002;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_2 = 5003;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_2 = 5004;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_3 = 5005;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_3 = 5006;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_2 = 5007;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_2 = 5008;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_3 = 5009;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_3 = 5010;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_4 = 5011;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_4 = 5012;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_4 = 5013;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_4 = 5014;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_0 = 5015;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_0 = 5016;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_1 = 5017;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_1 = 5018;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_0 = 5019;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_0 = 5020;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_1 = 5021;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_1 = 5022;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_2 = 5023;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_2 = 5024;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_3 = 5025;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_3 = 5026;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_2 = 5027;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_2 = 5028;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_3 = 5029;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_3 = 5030;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_4 = 5031;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_4 = 5032;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_4 = 5033;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_4 = 5034;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_0 = 5035;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_0 = 5036;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_1 = 5037;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_1 = 5038;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_0 = 5039;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_0 = 5040;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_1 = 5041;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_1 = 5042;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_2 = 5043;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_2 = 5044;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_3 = 5045;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_3 = 5046;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_2 = 5047;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_2 = 5048;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_3 = 5049;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_3 = 5050;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_4 = 5051;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_4 = 5052;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_4 = 5053;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_4 = 5054;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_0 = 5055;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_0 = 5056;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_1 = 5057;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_1 = 5058;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_0 = 5059;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_0 = 5060;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_1 = 5061;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_1 = 5062;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_2 = 5063;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_2 = 5064;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_3 = 5065;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_3 = 5066;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_2 = 5067;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_2 = 5068;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_3 = 5069;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_3 = 5070;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_4 = 5071;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_4 = 5072;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_4 = 5073;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_4 = 5074;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_0 = 5075;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_0 = 5076;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_1 = 5077;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_1 = 5078;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_0 = 5079;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_0 = 5080;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_1 = 5081;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_1 = 5082;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_2 = 5083;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_2 = 5084;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_3 = 5085;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_3 = 5086;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_2 = 5087;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_2 = 5088;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_3 = 5089;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_3 = 5090;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_4 = 5091;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_4 = 5092;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_4 = 5093;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_4 = 5094;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_0 = 5095;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_0 = 5096;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_1 = 5097;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_1 = 5098;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_0 = 5099;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_0 = 5100;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_1 = 5101;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_1 = 5102;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_2 = 5103;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_2 = 5104;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_3 = 5105;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_3 = 5106;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_2 = 5107;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_2 = 5108;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_3 = 5109;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_3 = 5110;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_4 = 5111;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_4 = 5112;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_4 = 5113;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_4 = 5114;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_0 = 5115;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_0 = 5116;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_1 = 5117;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_1 = 5118;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_0 = 5119;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_0 = 5120;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_1 = 5121;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_1 = 5122;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_2 = 5123;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_2 = 5124;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_3 = 5125;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_3 = 5126;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_2 = 5127;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_2 = 5128;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_3 = 5129;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_3 = 5130;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_4 = 5131;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_4 = 5132;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_4 = 5133;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_4 = 5134;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_0 = 5135;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_0 = 5136;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_1 = 5137;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_1 = 5138;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_0 = 5139;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_0 = 5140;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_1 = 5141;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_1 = 5142;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_2 = 5143;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_2 = 5144;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_3 = 5145;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_3 = 5146;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_2 = 5147;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_2 = 5148;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_3 = 5149;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_3 = 5150;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_4 = 5151;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_4 = 5152;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_4 = 5153;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_4 = 5154;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_0 = 5155;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_0 = 5156;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_1 = 5157;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_1 = 5158;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_0 = 5159;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_0 = 5160;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_1 = 5161;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_1 = 5162;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_2 = 5163;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_2 = 5164;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_3 = 5165;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_3 = 5166;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_2 = 5167;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_2 = 5168;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_3 = 5169;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_3 = 5170;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_4 = 5171;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_4 = 5172;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_4 = 5173;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_4 = 5174;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_0 = 5175;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_0 = 5176;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_1 = 5177;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_1 = 5178;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_0 = 5179;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_0 = 5180;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_1 = 5181;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_1 = 5182;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_2 = 5183;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_2 = 5184;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_3 = 5185;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_3 = 5186;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_2 = 5187;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_2 = 5188;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_3 = 5189;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_3 = 5190;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_4 = 5191;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_4 = 5192;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_4 = 5193;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_4 = 5194;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_0 = 5195;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_0 = 5196;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_1 = 5197;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_1 = 5198;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_0 = 5199;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_0 = 5200;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_1 = 5201;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_1 = 5202;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_2 = 5203;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_2 = 5204;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_3 = 5205;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_3 = 5206;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_2 = 5207;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_2 = 5208;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_3 = 5209;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_3 = 5210;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_4 = 5211;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_4 = 5212;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_4 = 5213;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_4 = 5214;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_0 = 5215;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_0 = 5216;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_1 = 5217;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_1 = 5218;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_0 = 5219;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_0 = 5220;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_1 = 5221;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_1 = 5222;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_2 = 5223;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_2 = 5224;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_3 = 5225;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_3 = 5226;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_2 = 5227;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_2 = 5228;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_3 = 5229;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_3 = 5230;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_4 = 5231;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_4 = 5232;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_4 = 5233;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_4 = 5234;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_0 = 5235;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_0 = 5236;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_1 = 5237;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_1 = 5238;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_0 = 5239;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_0 = 5240;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_1 = 5241;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_1 = 5242;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_2 = 5243;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_2 = 5244;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_3 = 5245;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_3 = 5246;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_2 = 5247;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_2 = 5248;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_3 = 5249;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_3 = 5250;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_4 = 5251;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_4 = 5252;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_4 = 5253;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_4 = 5254;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_0 = 5255;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_0 = 5256;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_1 = 5257;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_1 = 5258;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_0 = 5259;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_0 = 5260;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_1 = 5261;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_1 = 5262;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_2 = 5263;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_2 = 5264;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_3 = 5265;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_3 = 5266;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_2 = 5267;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_2 = 5268;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_3 = 5269;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_3 = 5270;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_4 = 5271;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_4 = 5272;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_4 = 5273;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_4 = 5274;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_0 = 5275;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_0 = 5276;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_1 = 5277;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_1 = 5278;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_0 = 5279;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_0 = 5280;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_1 = 5281;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_1 = 5282;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_2 = 5283;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_2 = 5284;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_3 = 5285;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_3 = 5286;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_2 = 5287;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_2 = 5288;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_3 = 5289;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_3 = 5290;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_4 = 5291;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_4 = 5292;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_4 = 5293;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_4 = 5294;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_0 = 5295;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_0 = 5296;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_1 = 5297;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_1 = 5298;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_0 = 5299;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_0 = 5300;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_1 = 5301;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_1 = 5302;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_2 = 5303;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_2 = 5304;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_3 = 5305;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_3 = 5306;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_2 = 5307;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_2 = 5308;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_3 = 5309;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_3 = 5310;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_4 = 5311;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_4 = 5312;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_4 = 5313;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_4 = 5314;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_0 = 5315;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_0 = 5316;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_1 = 5317;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_1 = 5318;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_0 = 5319;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_0 = 5320;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_1 = 5321;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_1 = 5322;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_2 = 5323;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_2 = 5324;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_3 = 5325;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_3 = 5326;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_2 = 5327;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_2 = 5328;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_3 = 5329;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_3 = 5330;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_4 = 5331;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_4 = 5332;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_4 = 5333;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_4 = 5334;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_0 = 5335;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_0 = 5336;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_1 = 5337;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_1 = 5338;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_0 = 5339;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_0 = 5340;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_1 = 5341;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_1 = 5342;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_2 = 5343;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_2 = 5344;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_3 = 5345;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_3 = 5346;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_2 = 5347;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_2 = 5348;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_3 = 5349;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_3 = 5350;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_4 = 5351;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_4 = 5352;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_4 = 5353;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_4 = 5354;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_0 = 5355;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_0 = 5356;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_1 = 5357;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_1 = 5358;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_0 = 5359;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_0 = 5360;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_1 = 5361;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_1 = 5362;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_2 = 5363;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_2 = 5364;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_3 = 5365;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_3 = 5366;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_2 = 5367;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_2 = 5368;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_3 = 5369;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_3 = 5370;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_4 = 5371;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_4 = 5372;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_4 = 5373;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_4 = 5374;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_0 = 5375;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_0 = 5376;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_1 = 5377;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_1 = 5378;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_0 = 5379;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_0 = 5380;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_1 = 5381;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_1 = 5382;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_2 = 5383;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_2 = 5384;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_3 = 5385;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_3 = 5386;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_2 = 5387;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_2 = 5388;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_3 = 5389;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_3 = 5390;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_4 = 5391;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_4 = 5392;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_4 = 5393;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_4 = 5394;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_0 = 5395;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_0 = 5396;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_1 = 5397;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_1 = 5398;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_0 = 5399;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_0 = 5400;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_1 = 5401;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_1 = 5402;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_2 = 5403;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_2 = 5404;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_3 = 5405;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_3 = 5406;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_2 = 5407;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_2 = 5408;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_3 = 5409;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_3 = 5410;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_4 = 5411;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_4 = 5412;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_4 = 5413;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_4 = 5414;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_0 = 5415;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_0 = 5416;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_1 = 5417;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_1 = 5418;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_0 = 5419;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_0 = 5420;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_1 = 5421;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_1 = 5422;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_2 = 5423;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_2 = 5424;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_3 = 5425;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_3 = 5426;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_2 = 5427;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_2 = 5428;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_3 = 5429;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_3 = 5430;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_4 = 5431;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_4 = 5432;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_4 = 5433;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_4 = 5434;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_0 = 5435;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_0 = 5436;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_1 = 5437;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_1 = 5438;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_0 = 5439;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_0 = 5440;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_1 = 5441;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_1 = 5442;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_2 = 5443;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_2 = 5444;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_3 = 5445;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_3 = 5446;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_2 = 5447;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_2 = 5448;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_3 = 5449;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_3 = 5450;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_4 = 5451;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_4 = 5452;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_4 = 5453;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_4 = 5454;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_0 = 5455;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_0 = 5456;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_1 = 5457;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_1 = 5458;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_0 = 5459;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_0 = 5460;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_1 = 5461;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_1 = 5462;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_2 = 5463;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_2 = 5464;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_3 = 5465;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_3 = 5466;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_2 = 5467;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_2 = 5468;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_3 = 5469;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_3 = 5470;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_4 = 5471;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_4 = 5472;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_4 = 5473;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_4 = 5474;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_0 = 5475;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_0 = 5476;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_1 = 5477;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_1 = 5478;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_0 = 5479;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_0 = 5480;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_1 = 5481;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_1 = 5482;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_2 = 5483;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_2 = 5484;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_3 = 5485;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_3 = 5486;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_2 = 5487;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_2 = 5488;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_3 = 5489;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_3 = 5490;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_4 = 5491;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_4 = 5492;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_4 = 5493;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_4 = 5494;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_0 = 5495;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_0 = 5496;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_1 = 5497;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_1 = 5498;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_0 = 5499;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_0 = 5500;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_1 = 5501;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_1 = 5502;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_2 = 5503;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_2 = 5504;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_3 = 5505;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_3 = 5506;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_2 = 5507;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_2 = 5508;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_3 = 5509;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_3 = 5510;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_4 = 5511;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_4 = 5512;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_4 = 5513;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_4 = 5514;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_0 = 5515;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_0 = 5516;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_1 = 5517;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_1 = 5518;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_0 = 5519;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_0 = 5520;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_1 = 5521;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_1 = 5522;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_2 = 5523;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_2 = 5524;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_3 = 5525;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_3 = 5526;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_2 = 5527;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_2 = 5528;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_3 = 5529;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_3 = 5530;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_4 = 5531;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_4 = 5532;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_4 = 5533;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_4 = 5534;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_0 = 5535;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_0 = 5536;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_1 = 5537;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_1 = 5538;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_0 = 5539;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_0 = 5540;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_1 = 5541;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_1 = 5542;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_2 = 5543;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_2 = 5544;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_3 = 5545;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_3 = 5546;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_2 = 5547;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_2 = 5548;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_3 = 5549;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_3 = 5550;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_4 = 5551;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_4 = 5552;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_4 = 5553;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_4 = 5554;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_0 = 5555;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_0 = 5556;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_1 = 5557;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_1 = 5558;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_0 = 5559;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_0 = 5560;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_1 = 5561;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_1 = 5562;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_2 = 5563;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_2 = 5564;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_3 = 5565;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_3 = 5566;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_2 = 5567;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_2 = 5568;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_3 = 5569;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_3 = 5570;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_4 = 5571;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_4 = 5572;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_4 = 5573;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_4 = 5574;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_0 = 5575;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_0 = 5576;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_1 = 5577;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_1 = 5578;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_0 = 5579;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_0 = 5580;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_1 = 5581;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_1 = 5582;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_2 = 5583;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_2 = 5584;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_3 = 5585;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_3 = 5586;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_2 = 5587;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_2 = 5588;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_3 = 5589;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_3 = 5590;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_4 = 5591;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_4 = 5592;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_4 = 5593;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_4 = 5594;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_0 = 5595;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_0 = 5596;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_1 = 5597;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_1 = 5598;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_0 = 5599;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_0 = 5600;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_1 = 5601;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_1 = 5602;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_2 = 5603;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_2 = 5604;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_3 = 5605;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_3 = 5606;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_2 = 5607;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_2 = 5608;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_3 = 5609;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_3 = 5610;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_4 = 5611;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_4 = 5612;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_4 = 5613;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_4 = 5614;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_0 = 5615;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_0 = 5616;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_1 = 5617;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_1 = 5618;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_0 = 5619;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_0 = 5620;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_1 = 5621;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_1 = 5622;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_2 = 5623;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_2 = 5624;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_3 = 5625;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_3 = 5626;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_2 = 5627;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_2 = 5628;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_3 = 5629;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_3 = 5630;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_4 = 5631;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_4 = 5632;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_4 = 5633;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_4 = 5634;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_0 = 5635;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_0 = 5636;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_1 = 5637;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_1 = 5638;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_0 = 5639;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_0 = 5640;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_1 = 5641;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_1 = 5642;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_2 = 5643;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_2 = 5644;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_3 = 5645;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_3 = 5646;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_2 = 5647;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_2 = 5648;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_3 = 5649;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_3 = 5650;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_4 = 5651;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_4 = 5652;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_4 = 5653;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_4 = 5654;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_0 = 5655;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_0 = 5656;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_1 = 5657;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_1 = 5658;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_0 = 5659;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_0 = 5660;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_1 = 5661;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_1 = 5662;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_2 = 5663;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_2 = 5664;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_3 = 5665;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_3 = 5666;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_2 = 5667;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_2 = 5668;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_3 = 5669;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_3 = 5670;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_4 = 5671;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_4 = 5672;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_4 = 5673;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_4 = 5674;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_0 = 5675;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_0 = 5676;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_1 = 5677;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_1 = 5678;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_0 = 5679;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_0 = 5680;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_1 = 5681;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_1 = 5682;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_2 = 5683;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_2 = 5684;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_3 = 5685;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_3 = 5686;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_2 = 5687;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_2 = 5688;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_3 = 5689;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_3 = 5690;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_4 = 5691;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_4 = 5692;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_4 = 5693;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_4 = 5694;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_0 = 5695;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_0 = 5696;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_1 = 5697;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_1 = 5698;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_0 = 5699;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_0 = 5700;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_1 = 5701;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_1 = 5702;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_2 = 5703;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_2 = 5704;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_3 = 5705;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_3 = 5706;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_2 = 5707;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_2 = 5708;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_3 = 5709;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_3 = 5710;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_4 = 5711;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_4 = 5712;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_4 = 5713;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_4 = 5714;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_0 = 5715;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_0 = 5716;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_1 = 5717;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_1 = 5718;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_0 = 5719;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_0 = 5720;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_1 = 5721;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_1 = 5722;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_2 = 5723;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_2 = 5724;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_3 = 5725;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_3 = 5726;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_2 = 5727;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_2 = 5728;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_3 = 5729;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_3 = 5730;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_4 = 5731;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_4 = 5732;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_4 = 5733;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_4 = 5734;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_0 = 5735;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_0 = 5736;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_1 = 5737;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_1 = 5738;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_0 = 5739;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_0 = 5740;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_1 = 5741;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_1 = 5742;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_2 = 5743;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_2 = 5744;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_3 = 5745;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_3 = 5746;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_2 = 5747;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_2 = 5748;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_3 = 5749;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_3 = 5750;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_4 = 5751;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_4 = 5752;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_4 = 5753;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_4 = 5754;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_0 = 5755;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_0 = 5756;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_1 = 5757;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_1 = 5758;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_0 = 5759;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_0 = 5760;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_1 = 5761;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_1 = 5762;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_2 = 5763;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_2 = 5764;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_3 = 5765;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_3 = 5766;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_2 = 5767;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_2 = 5768;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_3 = 5769;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_3 = 5770;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_4 = 5771;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_4 = 5772;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_4 = 5773;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_4 = 5774;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_0 = 5775;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_0 = 5776;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_1 = 5777;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_1 = 5778;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_0 = 5779;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_0 = 5780;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_1 = 5781;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_1 = 5782;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_2 = 5783;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_2 = 5784;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_3 = 5785;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_3 = 5786;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_2 = 5787;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_2 = 5788;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_3 = 5789;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_3 = 5790;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_4 = 5791;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_4 = 5792;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_4 = 5793;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_4 = 5794;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_0 = 5795;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_0 = 5796;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_1 = 5797;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_1 = 5798;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_0 = 5799;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_0 = 5800;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_1 = 5801;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_1 = 5802;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_2 = 5803;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_2 = 5804;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_3 = 5805;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_3 = 5806;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_2 = 5807;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_2 = 5808;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_3 = 5809;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_3 = 5810;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_4 = 5811;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_4 = 5812;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_4 = 5813;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_4 = 5814;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_0 = 5815;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_0 = 5816;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_1 = 5817;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_1 = 5818;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_0 = 5819;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_0 = 5820;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_1 = 5821;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_1 = 5822;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_2 = 5823;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_2 = 5824;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_3 = 5825;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_3 = 5826;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_2 = 5827;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_2 = 5828;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_3 = 5829;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_3 = 5830;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_4 = 5831;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_4 = 5832;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_4 = 5833;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_4 = 5834;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_0 = 5835;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_0 = 5836;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_1 = 5837;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_1 = 5838;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_0 = 5839;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_0 = 5840;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_1 = 5841;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_1 = 5842;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_2 = 5843;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_2 = 5844;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_3 = 5845;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_3 = 5846;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_2 = 5847;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_2 = 5848;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_3 = 5849;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_3 = 5850;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_4 = 5851;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_4 = 5852;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_4 = 5853;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_4 = 5854;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_0 = 5855;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_0 = 5856;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_1 = 5857;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_1 = 5858;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_0 = 5859;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_0 = 5860;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_1 = 5861;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_1 = 5862;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_2 = 5863;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_2 = 5864;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_3 = 5865;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_3 = 5866;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_2 = 5867;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_2 = 5868;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_3 = 5869;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_3 = 5870;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_4 = 5871;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_4 = 5872;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_4 = 5873;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_4 = 5874;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_0 = 5875;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_0 = 5876;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_1 = 5877;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_1 = 5878;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_0 = 5879;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_0 = 5880;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_1 = 5881;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_1 = 5882;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_2 = 5883;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_2 = 5884;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_3 = 5885;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_3 = 5886;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_2 = 5887;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_2 = 5888;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_3 = 5889;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_3 = 5890;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_4 = 5891;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_4 = 5892;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_4 = 5893;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_4 = 5894;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_0 = 5895;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_0 = 5896;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_1 = 5897;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_1 = 5898;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_0 = 5899;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_0 = 5900;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_1 = 5901;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_1 = 5902;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_2 = 5903;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_2 = 5904;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_3 = 5905;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_3 = 5906;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_2 = 5907;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_2 = 5908;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_3 = 5909;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_3 = 5910;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_4 = 5911;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_4 = 5912;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_4 = 5913;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_4 = 5914;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_0 = 5915;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_0 = 5916;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_1 = 5917;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_1 = 5918;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_0 = 5919;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_0 = 5920;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_1 = 5921;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_1 = 5922;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_2 = 5923;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_2 = 5924;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_3 = 5925;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_3 = 5926;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_2 = 5927;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_2 = 5928;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_3 = 5929;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_3 = 5930;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_4 = 5931;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_4 = 5932;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_4 = 5933;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_4 = 5934;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_0 = 5935;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_0 = 5936;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_1 = 5937;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_1 = 5938;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_0 = 5939;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_0 = 5940;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_1 = 5941;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_1 = 5942;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_2 = 5943;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_2 = 5944;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_3 = 5945;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_3 = 5946;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_2 = 5947;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_2 = 5948;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_3 = 5949;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_3 = 5950;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_4 = 5951;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_4 = 5952;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_4 = 5953;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_4 = 5954;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_0 = 5955;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_0 = 5956;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_1 = 5957;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_1 = 5958;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_0 = 5959;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_0 = 5960;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_1 = 5961;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_1 = 5962;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_2 = 5963;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_2 = 5964;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_3 = 5965;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_3 = 5966;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_2 = 5967;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_2 = 5968;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_3 = 5969;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_3 = 5970;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_4 = 5971;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_4 = 5972;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_4 = 5973;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_4 = 5974;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_0 = 5975;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_0 = 5976;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_1 = 5977;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_1 = 5978;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_0 = 5979;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_0 = 5980;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_1 = 5981;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_1 = 5982;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_2 = 5983;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_2 = 5984;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_3 = 5985;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_3 = 5986;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_2 = 5987;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_2 = 5988;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_3 = 5989;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_3 = 5990;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_4 = 5991;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_4 = 5992;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_4 = 5993;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_4 = 5994;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_0 = 5995;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_0 = 5996;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_1 = 5997;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_1 = 5998;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_0 = 5999;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_0 = 6000;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_1 = 6001;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_1 = 6002;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_2 = 6003;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_2 = 6004;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_3 = 6005;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_3 = 6006;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_2 = 6007;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_2 = 6008;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_3 = 6009;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_3 = 6010;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_4 = 6011;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_4 = 6012;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_4 = 6013;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_4 = 6014;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_0 = 6015;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_0 = 6016;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_1 = 6017;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_1 = 6018;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_0 = 6019;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_0 = 6020;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_1 = 6021;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_1 = 6022;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_2 = 6023;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_2 = 6024;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_3 = 6025;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_3 = 6026;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_2 = 6027;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_2 = 6028;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_3 = 6029;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_3 = 6030;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_4 = 6031;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_4 = 6032;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_4 = 6033;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_4 = 6034;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_0 = 6035;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P0_0 = 6036;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_1 = 6037;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P0_1 = 6038;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_0 = 6039;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P1_0 = 6040;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_1 = 6041;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P1_1 = 6042;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_2 = 6043;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P0_2 = 6044;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_3 = 6045;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P0_3 = 6046;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_2 = 6047;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P1_2 = 6048;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_3 = 6049;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P1_3 = 6050;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P0_4 = 6051;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P0_4 = 6052;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RX_PEAK_AMP_P1_4 = 6053;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RX_PEAK_AMP_P1_4 = 6054;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_0_ROX = 6055;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_0_ROX = 6056;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_1_ROX = 6057;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_1_ROX = 6058;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_0_ROX = 6059;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_0_ROX = 6060;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_1_ROX = 6061;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_1_ROX = 6062;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_2_ROX = 6063;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_2_ROX = 6064;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_3_ROX = 6065;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_3_ROX = 6066;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_2_ROX = 6067;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_2_ROX = 6068;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_3_ROX = 6069;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_3_ROX = 6070;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_4_ROX = 6071;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_4_ROX = 6072;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_4_ROX = 6073;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_4_ROX = 6074;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_0 = 6075;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P0_0 = 6076;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_1 = 6077;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P0_1 = 6078;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_0 = 6079;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P1_0 = 6080;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_1 = 6081;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P1_1 = 6082;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_2 = 6083;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P0_2 = 6084;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_3 = 6085;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P0_3 = 6086;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_2 = 6087;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P1_2 = 6088;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_3 = 6089;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P1_3 = 6090;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P0_4 = 6091;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P0_4 = 6092;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_SYSCLK_PR_P1_4 = 6093;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_SYSCLK_PR_P1_4 = 6094;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_0 = 6095;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P0_0 = 6096;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_1 = 6097;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P0_1 = 6098;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_0 = 6099;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P1_0 = 6100;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_1 = 6101;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P1_1 = 6102;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_2 = 6103;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P0_2 = 6104;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_3 = 6105;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P0_3 = 6106;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_2 = 6107;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P1_2 = 6108;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_3 = 6109;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P1_3 = 6110;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P0_4 = 6111;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P0_4 = 6112;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP0_P1_4 = 6113;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP0_P1_4 = 6114;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_0 = 6115;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P0_0 = 6116;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_1 = 6117;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P0_1 = 6118;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_0 = 6119;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P1_0 = 6120;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_1 = 6121;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P1_1 = 6122;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_2 = 6123;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P0_2 = 6124;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_3 = 6125;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P0_3 = 6126;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_2 = 6127;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P1_2 = 6128;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_3 = 6129;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P1_3 = 6130;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P0_4 = 6131;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P0_4 = 6132;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP1_P1_4 = 6133;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP1_P1_4 = 6134;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_0 = 6135;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P0_0 = 6136;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_1 = 6137;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P0_1 = 6138;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_0 = 6139;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P1_0 = 6140;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_1 = 6141;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P1_1 = 6142;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_2 = 6143;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P0_2 = 6144;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_3 = 6145;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P0_3 = 6146;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_2 = 6147;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P1_2 = 6148;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_3 = 6149;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P1_3 = 6150;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P0_4 = 6151;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P0_4 = 6152;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP2_P1_4 = 6153;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP2_P1_4 = 6154;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_0 = 6155;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P0_0 = 6156;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_1 = 6157;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P0_1 = 6158;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_0 = 6159;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P1_0 = 6160;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_1 = 6161;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P1_1 = 6162;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_2 = 6163;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P0_2 = 6164;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_3 = 6165;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P0_3 = 6166;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_2 = 6167;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P1_2 = 6168;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_3 = 6169;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P1_3 = 6170;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P0_4 = 6171;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P0_4 = 6172;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_EN_RP3_P1_4 = 6173;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_EN_RP3_P1_4 = 6174;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_0 = 6175;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P0_0 = 6176;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_1 = 6177;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P0_1 = 6178;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_0 = 6179;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P1_0 = 6180;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_1 = 6181;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P1_1 = 6182;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_2 = 6183;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P0_2 = 6184;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_3 = 6185;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P0_3 = 6186;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_2 = 6187;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P1_2 = 6188;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_3 = 6189;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P1_3 = 6190;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P0_4 = 6191;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P0_4 = 6192;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WRCLK_PR_P1_4 = 6193;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WRCLK_PR_P1_4 = 6194;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_RO = 6195;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_RO = 6196;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_RO = 6197;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_RO = 6198;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_RO = 6199;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_RO = 6200;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_RO = 6201;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_RO = 6202;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_RO = 6203;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_RO = 6204;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_RO = 6205;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_RO = 6206;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_RO = 6207;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_RO = 6208;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_RO = 6209;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_RO = 6210;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_RO = 6211;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_RO = 6212;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_RO = 6213;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_RO = 6214;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_0_RO = 6215;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P0_0_RO = 6216;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_1_RO = 6217;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P0_1_RO = 6218;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_0_RO = 6219;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P1_0_RO = 6220;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_1_RO = 6221;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P1_1_RO = 6222;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_2_RO = 6223;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P0_2_RO = 6224;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_3_RO = 6225;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P0_3_RO = 6226;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_2_RO = 6227;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P1_2_RO = 6228;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_3_RO = 6229;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P1_3_RO = 6230;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P0_4_RO = 6231;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P0_4_RO = 6232;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS1_P1_4_RO = 6233;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS1_P1_4_RO = 6234;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_0_RO = 6235;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P0_0_RO = 6236;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_1_RO = 6237;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P0_1_RO = 6238;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_0_RO = 6239;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P1_0_RO = 6240;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_1_RO = 6241;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P1_1_RO = 6242;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_2_RO = 6243;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P0_2_RO = 6244;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_3_RO = 6245;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P0_3_RO = 6246;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_2_RO = 6247;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P1_2_RO = 6248;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_3_RO = 6249;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P1_3_RO = 6250;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P0_4_RO = 6251;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P0_4_RO = 6252;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_CNTR_STATUS2_P1_4_RO = 6253;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_CNTR_STATUS2_P1_4_RO = 6254;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_0 = 6255;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P0_0 = 6256;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_1 = 6257;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P0_1 = 6258;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_0 = 6259;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P1_0 = 6260;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_1 = 6261;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P1_1 = 6262;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_2 = 6263;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P0_2 = 6264;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_3 = 6265;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P0_3 = 6266;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_2 = 6267;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P1_2 = 6268;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_3 = 6269;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P1_3 = 6270;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P0_4 = 6271;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P0_4 = 6272;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR0_P1_4 = 6273;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR0_P1_4 = 6274;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_0 = 6275;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P0_0 = 6276;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_1 = 6277;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P0_1 = 6278;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_0 = 6279;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P1_0 = 6280;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_1 = 6281;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P1_1 = 6282;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_2 = 6283;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P0_2 = 6284;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_3 = 6285;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P0_3 = 6286;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_2 = 6287;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P1_2 = 6288;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_3 = 6289;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P1_3 = 6290;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P0_4 = 6291;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P0_4 = 6292;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_ERROR_MASK0_P1_4 = 6293;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_ERROR_MASK0_P1_4 = 6294;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_0 = 6295;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P0_0 = 6296;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_1 = 6297;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P0_1 = 6298;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_0 = 6299;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P1_0 = 6300;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_1 = 6301;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P1_1 = 6302;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_2 = 6303;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P0_2 = 6304;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_3 = 6305;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P0_3 = 6306;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_2 = 6307;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P1_2 = 6308;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_3 = 6309;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P1_3 = 6310;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P0_4 = 6311;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P0_4 = 6312;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_WR_LVL_STATUS0_P1_4 = 6313;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_WR_LVL_STATUS0_P1_4 = 6314;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_0 = 6315;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_0 = 6316;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_1 = 6317;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_1 = 6318;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_0 = 6319;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_0 = 6320;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_1 = 6321;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_1 = 6322;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_2 = 6323;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_2 = 6324;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_3 = 6325;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_3 = 6326;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_2 = 6327;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_2 = 6328;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_3 = 6329;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_3 = 6330;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_4 = 6331;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_4 = 6332;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_4 = 6333;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_4 = 6334;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_0 = 6335;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_0 = 6336;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_1 = 6337;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_1 = 6338;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_0 = 6339;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_0 = 6340;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_1 = 6341;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_1 = 6342;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_2 = 6343;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_2 = 6344;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_3 = 6345;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_3 = 6346;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_2 = 6347;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_2 = 6348;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_3 = 6349;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_3 = 6350;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_4 = 6351;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_4 = 6352;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_4 = 6353;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_4 = 6354;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_0 = 6355;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_0 = 6356;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_1 = 6357;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_1 = 6358;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_0 = 6359;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_0 = 6360;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_1 = 6361;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_1 = 6362;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_2 = 6363;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_2 = 6364;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_3 = 6365;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_3 = 6366;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_2 = 6367;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_2 = 6368;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_3 = 6369;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_3 = 6370;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_4 = 6371;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_4 = 6372;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_4 = 6373;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_4 = 6374;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_0 = 6375;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_0 = 6376;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_1 = 6377;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_1 = 6378;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_0 = 6379;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_0 = 6380;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_1 = 6381;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_1 = 6382;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_2 = 6383;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_2 = 6384;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_3 = 6385;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_3 = 6386;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_2 = 6387;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_2 = 6388;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_3 = 6389;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_3 = 6390;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_4 = 6391;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_4 = 6392;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_4 = 6393;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_4 = 6394;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_0 = 6395;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_0 = 6396;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_1 = 6397;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_1 = 6398;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_0 = 6399;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_0 = 6400;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_1 = 6401;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_1 = 6402;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_2 = 6403;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_2 = 6404;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_3 = 6405;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_3 = 6406;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_2 = 6407;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_2 = 6408;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_3 = 6409;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_3 = 6410;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_4 = 6411;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_4 = 6412;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_4 = 6413;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_4 = 6414;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_0 = 6415;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_0 = 6416;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_1 = 6417;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_1 = 6418;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_0 = 6419;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_0 = 6420;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_1 = 6421;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_1 = 6422;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_2 = 6423;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_2 = 6424;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_3 = 6425;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_3 = 6426;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_2 = 6427;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_2 = 6428;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_3 = 6429;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_3 = 6430;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_4 = 6431;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_4 = 6432;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_4 = 6433;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_4 = 6434;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_0 = 6435;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_0 = 6436;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_1 = 6437;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_1 = 6438;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_0 = 6439;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_0 = 6440;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_1 = 6441;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_1 = 6442;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_2 = 6443;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_2 = 6444;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_3 = 6445;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_3 = 6446;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_2 = 6447;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_2 = 6448;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_3 = 6449;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_3 = 6450;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_4 = 6451;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_4 = 6452;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_4 = 6453;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_4 = 6454;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_0 = 6455;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_0 = 6456;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_1 = 6457;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_1 = 6458;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_0 = 6459;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_0 = 6460;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_1 = 6461;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_1 = 6462;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_2 = 6463;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_2 = 6464;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_3 = 6465;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_3 = 6466;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_2 = 6467;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_2 = 6468;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_3 = 6469;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_3 = 6470;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_4 = 6471;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_4 = 6472;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_4 = 6473;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_4 = 6474;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_0 = 6475;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_0 = 6476;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_1 = 6477;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_1 = 6478;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_0 = 6479;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_0 = 6480;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_1 = 6481;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_1 = 6482;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_2 = 6483;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_2 = 6484;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_3 = 6485;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_3 = 6486;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_2 = 6487;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_2 = 6488;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_3 = 6489;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_3 = 6490;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_4 = 6491;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_4 = 6492;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_4 = 6493;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_4 = 6494;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_0 = 6495;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_0 = 6496;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_1 = 6497;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_1 = 6498;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_0 = 6499;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_0 = 6500;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_1 = 6501;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_1 = 6502;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_2 = 6503;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_2 = 6504;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_3 = 6505;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_3 = 6506;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_2 = 6507;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_2 = 6508;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_3 = 6509;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_3 = 6510;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_4 = 6511;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_4 = 6512;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_4 = 6513;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_4 = 6514;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_0 = 6515;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_0 = 6516;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_1 = 6517;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_1 = 6518;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_0 = 6519;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_0 = 6520;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_1 = 6521;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_1 = 6522;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_2 = 6523;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_2 = 6524;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_3 = 6525;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_3 = 6526;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_2 = 6527;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_2 = 6528;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_3 = 6529;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_3 = 6530;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_4 = 6531;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_4 = 6532;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_4 = 6533;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_4 = 6534;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_0 = 6535;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_0 = 6536;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_1 = 6537;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_1 = 6538;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_0 = 6539;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_0 = 6540;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_1 = 6541;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_1 = 6542;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_2 = 6543;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_2 = 6544;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_3 = 6545;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_3 = 6546;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_2 = 6547;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_2 = 6548;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_3 = 6549;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_3 = 6550;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_4 = 6551;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_4 = 6552;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_4 = 6553;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_4 = 6554;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_0 = 6555;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_0 = 6556;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_1 = 6557;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_1 = 6558;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_0 = 6559;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_0 = 6560;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_1 = 6561;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_1 = 6562;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_2 = 6563;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_2 = 6564;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_3 = 6565;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_3 = 6566;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_2 = 6567;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_2 = 6568;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_3 = 6569;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_3 = 6570;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_4 = 6571;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_4 = 6572;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_4 = 6573;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_4 = 6574;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_0 = 6575;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_0 = 6576;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_1 = 6577;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_1 = 6578;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_0 = 6579;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_0 = 6580;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_1 = 6581;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_1 = 6582;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_2 = 6583;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_2 = 6584;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_3 = 6585;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_3 = 6586;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_2 = 6587;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_2 = 6588;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_3 = 6589;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_3 = 6590;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_4 = 6591;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_4 = 6592;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_4 = 6593;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_4 = 6594;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_0 = 6595;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_0 = 6596;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_1 = 6597;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_1 = 6598;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_0 = 6599;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_0 = 6600;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_1 = 6601;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_1 = 6602;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_2 = 6603;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_2 = 6604;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_3 = 6605;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_3 = 6606;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_2 = 6607;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_2 = 6608;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_3 = 6609;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_3 = 6610;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_4 = 6611;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_4 = 6612;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_4 = 6613;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_4 = 6614;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_0 = 6615;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_0 = 6616;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_1 = 6617;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_1 = 6618;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_0 = 6619;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_0 = 6620;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_1 = 6621;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_1 = 6622;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_2 = 6623;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_2 = 6624;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_3 = 6625;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_3 = 6626;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_2 = 6627;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_2 = 6628;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_3 = 6629;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_3 = 6630;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_4 = 6631;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_4 = 6632;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_4 = 6633;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_4 = 6634;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_0 = 6635;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_0 = 6636;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_1 = 6637;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_1 = 6638;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_0 = 6639;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_0 = 6640;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_1 = 6641;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_1 = 6642;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_2 = 6643;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_2 = 6644;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_3 = 6645;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_3 = 6646;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_2 = 6647;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_2 = 6648;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_3 = 6649;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_3 = 6650;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_4 = 6651;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_4 = 6652;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_4 = 6653;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_4 = 6654;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_0 = 6655;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_0 = 6656;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_1 = 6657;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_1 = 6658;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_0 = 6659;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_0 = 6660;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_1 = 6661;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_1 = 6662;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_2 = 6663;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_2 = 6664;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_3 = 6665;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_3 = 6666;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_2 = 6667;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_2 = 6668;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_3 = 6669;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_3 = 6670;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_4 = 6671;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_4 = 6672;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_4 = 6673;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_4 = 6674;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_0 = 6675;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_0 = 6676;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_1 = 6677;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_1 = 6678;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_0 = 6679;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_0 = 6680;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_1 = 6681;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_1 = 6682;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_2 = 6683;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_2 = 6684;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_3 = 6685;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_3 = 6686;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_2 = 6687;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_2 = 6688;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_3 = 6689;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_3 = 6690;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_4 = 6691;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_4 = 6692;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_4 = 6693;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_4 = 6694;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_0 = 6695;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_0 = 6696;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_1 = 6697;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_1 = 6698;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_0 = 6699;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_0 = 6700;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_1 = 6701;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_1 = 6702;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_2 = 6703;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_2 = 6704;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_3 = 6705;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_3 = 6706;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_2 = 6707;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_2 = 6708;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_3 = 6709;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_3 = 6710;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_4 = 6711;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_4 = 6712;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_4 = 6713;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_4 = 6714;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_0 = 6715;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_0 = 6716;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_1 = 6717;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_1 = 6718;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_0 = 6719;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_0 = 6720;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_1 = 6721;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_1 = 6722;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_2 = 6723;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_2 = 6724;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_3 = 6725;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_3 = 6726;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_2 = 6727;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_2 = 6728;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_3 = 6729;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_3 = 6730;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_4 = 6731;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_4 = 6732;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_4 = 6733;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_4 = 6734;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_0 = 6735;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_0 = 6736;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_1 = 6737;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_1 = 6738;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_0 = 6739;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_0 = 6740;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_1 = 6741;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_1 = 6742;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_2 = 6743;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_2 = 6744;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_3 = 6745;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_3 = 6746;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_2 = 6747;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_2 = 6748;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_3 = 6749;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_3 = 6750;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_4 = 6751;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_4 = 6752;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_4 = 6753;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_4 = 6754;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_0 = 6755;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_0 = 6756;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_1 = 6757;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_1 = 6758;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_0 = 6759;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_0 = 6760;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_1 = 6761;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_1 = 6762;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_2 = 6763;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_2 = 6764;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_3 = 6765;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_3 = 6766;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_2 = 6767;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_2 = 6768;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_3 = 6769;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_3 = 6770;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_4 = 6771;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_4 = 6772;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_4 = 6773;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_4 = 6774;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_0 = 6775;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_0 = 6776;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_1 = 6777;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_1 = 6778;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_0 = 6779;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_0 = 6780;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_1 = 6781;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_1 = 6782;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_2 = 6783;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_2 = 6784;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_3 = 6785;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_3 = 6786;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_2 = 6787;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_2 = 6788;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_3 = 6789;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_3 = 6790;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_4 = 6791;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_4 = 6792;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_4 = 6793;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_4 = 6794;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_0 = 6795;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_0 = 6796;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_1 = 6797;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_1 = 6798;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_0 = 6799;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_0 = 6800;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_1 = 6801;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_1 = 6802;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_2 = 6803;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_2 = 6804;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_3 = 6805;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_3 = 6806;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_2 = 6807;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_2 = 6808;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_3 = 6809;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_3 = 6810;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_4 = 6811;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_4 = 6812;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_4 = 6813;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_4 = 6814;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_0 = 6815;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_0 = 6816;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_1 = 6817;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_1 = 6818;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_0 = 6819;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_0 = 6820;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_1 = 6821;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_1 = 6822;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_2 = 6823;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_2 = 6824;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_3 = 6825;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_3 = 6826;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_2 = 6827;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_2 = 6828;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_3 = 6829;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_3 = 6830;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_4 = 6831;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_4 = 6832;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_4 = 6833;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_4 = 6834;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_0 = 6835;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_0 = 6836;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_1 = 6837;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_1 = 6838;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_0 = 6839;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_0 = 6840;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_1 = 6841;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_1 = 6842;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_2 = 6843;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_2 = 6844;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_3 = 6845;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_3 = 6846;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_2 = 6847;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_2 = 6848;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_3 = 6849;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_3 = 6850;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_4 = 6851;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_4 = 6852;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_4 = 6853;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_4 = 6854;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_0 = 6855;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_0 = 6856;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_1 = 6857;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_1 = 6858;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_0 = 6859;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_0 = 6860;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_1 = 6861;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_1 = 6862;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_2 = 6863;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_2 = 6864;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_3 = 6865;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_3 = 6866;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_2 = 6867;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_2 = 6868;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_3 = 6869;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_3 = 6870;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_4 = 6871;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_4 = 6872;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_4 = 6873;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_4 = 6874;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_0 = 6875;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_0 = 6876;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_1 = 6877;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_1 = 6878;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_0 = 6879;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_0 = 6880;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_1 = 6881;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_1 = 6882;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_2 = 6883;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_2 = 6884;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_3 = 6885;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_3 = 6886;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_2 = 6887;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_2 = 6888;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_3 = 6889;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_3 = 6890;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_4 = 6891;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_4 = 6892;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_4 = 6893;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_4 = 6894;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_0 = 6895;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_0 = 6896;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_1 = 6897;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_1 = 6898;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_0 = 6899;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_0 = 6900;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_1 = 6901;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_1 = 6902;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_2 = 6903;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_2 = 6904;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_3 = 6905;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_3 = 6906;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_2 = 6907;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_2 = 6908;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_3 = 6909;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_3 = 6910;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_4 = 6911;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_4 = 6912;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_4 = 6913;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_4 = 6914;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_0 = 6915;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_0 = 6916;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_1 = 6917;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_1 = 6918;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_0 = 6919;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_0 = 6920;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_1 = 6921;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_1 = 6922;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_2 = 6923;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_2 = 6924;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_3 = 6925;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_3 = 6926;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_2 = 6927;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_2 = 6928;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_3 = 6929;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_3 = 6930;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_4 = 6931;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_4 = 6932;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_4 = 6933;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_4 = 6934;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_0 = 6935;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_0 = 6936;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_1 = 6937;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_1 = 6938;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_0 = 6939;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_0 = 6940;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_1 = 6941;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_1 = 6942;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_2 = 6943;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_2 = 6944;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_3 = 6945;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_3 = 6946;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_2 = 6947;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_2 = 6948;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_3 = 6949;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_3 = 6950;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_4 = 6951;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_4 = 6952;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_4 = 6953;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_4 = 6954;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_0 = 6955;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_0 = 6956;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_1 = 6957;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_1 = 6958;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_0 = 6959;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_0 = 6960;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_1 = 6961;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_1 = 6962;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_2 = 6963;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_2 = 6964;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_3 = 6965;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_3 = 6966;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_2 = 6967;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_2 = 6968;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_3 = 6969;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_3 = 6970;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_4 = 6971;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_4 = 6972;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_4 = 6973;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_4 = 6974;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_0 = 6975;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_0 = 6976;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_1 = 6977;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_1 = 6978;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_0 = 6979;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_0 = 6980;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_1 = 6981;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_1 = 6982;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_2 = 6983;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_2 = 6984;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_3 = 6985;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_3 = 6986;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_2 = 6987;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_2 = 6988;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_3 = 6989;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_3 = 6990;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_4 = 6991;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_4 = 6992;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_4 = 6993;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_4 = 6994;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_0 = 6995;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_0 = 6996;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_1 = 6997;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_1 = 6998;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_0 = 6999;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_0 = 7000;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_1 = 7001;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_1 = 7002;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_2 = 7003;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_2 = 7004;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_3 = 7005;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_3 = 7006;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_2 = 7007;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_2 = 7008;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_3 = 7009;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_3 = 7010;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_4 = 7011;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_4 = 7012;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_4 = 7013;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_4 = 7014;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_0 = 7015;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_0 = 7016;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_1 = 7017;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_1 = 7018;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_0 = 7019;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_0 = 7020;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_1 = 7021;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_1 = 7022;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_2 = 7023;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_2 = 7024;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_3 = 7025;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_3 = 7026;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_2 = 7027;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_2 = 7028;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_3 = 7029;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_3 = 7030;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_4 = 7031;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_4 = 7032;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_4 = 7033;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_4 = 7034;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_0 = 7035;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_0 = 7036;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_1 = 7037;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_1 = 7038;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_0 = 7039;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_0 = 7040;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_1 = 7041;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_1 = 7042;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_2 = 7043;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_2 = 7044;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_3 = 7045;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_3 = 7046;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_2 = 7047;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_2 = 7048;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_3 = 7049;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_3 = 7050;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_4 = 7051;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_4 = 7052;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_4 = 7053;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_4 = 7054;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_0 = 7055;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_0 = 7056;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_1 = 7057;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_1 = 7058;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_0 = 7059;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_0 = 7060;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_1 = 7061;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_1 = 7062;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_2 = 7063;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_2 = 7064;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_3 = 7065;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_3 = 7066;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_2 = 7067;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_2 = 7068;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_3 = 7069;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_3 = 7070;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_4 = 7071;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_4 = 7072;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_4 = 7073;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_4 = 7074;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_0 = 7075;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_0 = 7076;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_1 = 7077;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_1 = 7078;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_0 = 7079;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_0 = 7080;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_1 = 7081;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_1 = 7082;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_2 = 7083;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_2 = 7084;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_3 = 7085;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_3 = 7086;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_2 = 7087;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_2 = 7088;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_3 = 7089;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_3 = 7090;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_4 = 7091;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_4 = 7092;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_4 = 7093;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_4 = 7094;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_0 = 7095;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_0 = 7096;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_1 = 7097;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_1 = 7098;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_0 = 7099;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_0 = 7100;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_1 = 7101;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_1 = 7102;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_2 = 7103;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_2 = 7104;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_3 = 7105;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_3 = 7106;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_2 = 7107;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_2 = 7108;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_3 = 7109;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_3 = 7110;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_4 = 7111;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_4 = 7112;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_4 = 7113;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_4 = 7114;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_0 = 7115;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_0 = 7116;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_1 = 7117;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_1 = 7118;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_0 = 7119;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_0 = 7120;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_1 = 7121;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_1 = 7122;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_2 = 7123;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_2 = 7124;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_3 = 7125;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_3 = 7126;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_2 = 7127;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_2 = 7128;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_3 = 7129;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_3 = 7130;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_4 = 7131;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_4 = 7132;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_4 = 7133;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_4 = 7134;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_0 = 7135;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_0 = 7136;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_1 = 7137;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_1 = 7138;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_0 = 7139;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_0 = 7140;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_1 = 7141;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_1 = 7142;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_2 = 7143;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_2 = 7144;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_3 = 7145;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_3 = 7146;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_2 = 7147;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_2 = 7148;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_3 = 7149;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_3 = 7150;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_4 = 7151;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_4 = 7152;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_4 = 7153;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_4 = 7154;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_0 = 7155;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_0 = 7156;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_1 = 7157;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_1 = 7158;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_0 = 7159;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_0 = 7160;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_1 = 7161;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_1 = 7162;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_2 = 7163;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_2 = 7164;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_3 = 7165;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_3 = 7166;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_2 = 7167;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_2 = 7168;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_3 = 7169;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_3 = 7170;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_4 = 7171;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_4 = 7172;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_4 = 7173;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_4 = 7174;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_0 = 7175;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_0 = 7176;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_1 = 7177;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_1 = 7178;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_0 = 7179;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_0 = 7180;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_1 = 7181;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_1 = 7182;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_2 = 7183;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_2 = 7184;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_3 = 7185;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_3 = 7186;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_2 = 7187;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_2 = 7188;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_3 = 7189;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_3 = 7190;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_4 = 7191;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_4 = 7192;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_4 = 7193;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_4 = 7194;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_0 = 7195;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_0 = 7196;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_1 = 7197;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_1 = 7198;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_0 = 7199;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_0 = 7200;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_1 = 7201;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_1 = 7202;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_2 = 7203;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_2 = 7204;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_3 = 7205;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_3 = 7206;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_2 = 7207;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_2 = 7208;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_3 = 7209;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_3 = 7210;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_4 = 7211;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_4 = 7212;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_4 = 7213;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_4 = 7214;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_0 = 7215;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_0 = 7216;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_1 = 7217;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_1 = 7218;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_0 = 7219;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_0 = 7220;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_1 = 7221;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_1 = 7222;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_2 = 7223;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_2 = 7224;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_3 = 7225;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_3 = 7226;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_2 = 7227;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_2 = 7228;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_3 = 7229;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_3 = 7230;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_4 = 7231;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_4 = 7232;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_4 = 7233;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_4 = 7234;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_0 = 7235;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_0 = 7236;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_1 = 7237;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_1 = 7238;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_0 = 7239;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_0 = 7240;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_1 = 7241;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_1 = 7242;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_2 = 7243;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_2 = 7244;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_3 = 7245;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_3 = 7246;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_2 = 7247;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_2 = 7248;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_3 = 7249;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_3 = 7250;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_4 = 7251;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_4 = 7252;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_4 = 7253;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_4 = 7254;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_0 = 7255;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_0 = 7256;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_1 = 7257;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_1 = 7258;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_0 = 7259;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_0 = 7260;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_1 = 7261;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_1 = 7262;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_2 = 7263;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_2 = 7264;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_3 = 7265;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_3 = 7266;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_2 = 7267;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_2 = 7268;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_3 = 7269;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_3 = 7270;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_4 = 7271;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_4 = 7272;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_4 = 7273;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_4 = 7274;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_0 = 7275;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_0 = 7276;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_1 = 7277;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_1 = 7278;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_0 = 7279;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_0 = 7280;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_1 = 7281;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_1 = 7282;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_2 = 7283;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_2 = 7284;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_3 = 7285;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_3 = 7286;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_2 = 7287;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_2 = 7288;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_3 = 7289;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_3 = 7290;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_4 = 7291;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_4 = 7292;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_4 = 7293;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_4 = 7294;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_0 = 7295;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_0 = 7296;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_1 = 7297;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_1 = 7298;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_0 = 7299;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_0 = 7300;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_1 = 7301;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_1 = 7302;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_2 = 7303;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_2 = 7304;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_3 = 7305;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_3 = 7306;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_2 = 7307;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_2 = 7308;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_3 = 7309;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_3 = 7310;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_4 = 7311;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_4 = 7312;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_4 = 7313;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_4 = 7314;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_0 = 7315;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_0 = 7316;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_1 = 7317;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_1 = 7318;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_0 = 7319;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_0 = 7320;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_1 = 7321;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_1 = 7322;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_2 = 7323;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_2 = 7324;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_3 = 7325;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_3 = 7326;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_2 = 7327;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_2 = 7328;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_3 = 7329;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_3 = 7330;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_4 = 7331;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_4 = 7332;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_4 = 7333;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_4 = 7334;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_0 = 7335;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_0 = 7336;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_1 = 7337;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_1 = 7338;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_0 = 7339;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_0 = 7340;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_1 = 7341;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_1 = 7342;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_2 = 7343;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_2 = 7344;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_3 = 7345;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_3 = 7346;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_2 = 7347;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_2 = 7348;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_3 = 7349;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_3 = 7350;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_4 = 7351;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_4 = 7352;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_4 = 7353;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_4 = 7354;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_0 = 7355;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_0 = 7356;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_1 = 7357;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_1 = 7358;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_0 = 7359;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_0 = 7360;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_1 = 7361;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_1 = 7362;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_2 = 7363;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_2 = 7364;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_3 = 7365;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_3 = 7366;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_2 = 7367;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_2 = 7368;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_3 = 7369;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_3 = 7370;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_4 = 7371;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_4 = 7372;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_4 = 7373;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_4 = 7374;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_0 = 7375;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_0 = 7376;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_1 = 7377;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_1 = 7378;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_0 = 7379;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_0 = 7380;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_1 = 7381;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_1 = 7382;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_2 = 7383;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_2 = 7384;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_3 = 7385;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_3 = 7386;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_2 = 7387;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_2 = 7388;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_3 = 7389;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_3 = 7390;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_4 = 7391;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_4 = 7392;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_4 = 7393;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_4 = 7394;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_0 = 7395;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_0 = 7396;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_1 = 7397;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_1 = 7398;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_0 = 7399;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_0 = 7400;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_1 = 7401;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_1 = 7402;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_2 = 7403;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_2 = 7404;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_3 = 7405;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_3 = 7406;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_2 = 7407;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_2 = 7408;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_3 = 7409;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_3 = 7410;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_4 = 7411;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_4 = 7412;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_4 = 7413;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_4 = 7414;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_0 = 7415;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_0 = 7416;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_1 = 7417;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_1 = 7418;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_0 = 7419;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_0 = 7420;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_1 = 7421;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_1 = 7422;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_2 = 7423;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_2 = 7424;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_3 = 7425;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_3 = 7426;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_2 = 7427;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_2 = 7428;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_3 = 7429;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_3 = 7430;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_4 = 7431;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_4 = 7432;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_4 = 7433;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_4 = 7434;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_0 = 7435;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_0 = 7436;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_1 = 7437;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_1 = 7438;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_0 = 7439;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_0 = 7440;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_1 = 7441;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_1 = 7442;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_2 = 7443;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_2 = 7444;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_3 = 7445;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_3 = 7446;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_2 = 7447;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_2 = 7448;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_3 = 7449;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_3 = 7450;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_4 = 7451;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_4 = 7452;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_4 = 7453;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_4 = 7454;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_0 = 7455;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_0 = 7456;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_1 = 7457;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_1 = 7458;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_0 = 7459;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_0 = 7460;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_1 = 7461;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_1 = 7462;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_2 = 7463;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_2 = 7464;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_3 = 7465;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_3 = 7466;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_2 = 7467;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_2 = 7468;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_3 = 7469;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_3 = 7470;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_4 = 7471;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_4 = 7472;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_4 = 7473;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_4 = 7474;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_0 = 7475;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_0 = 7476;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_1 = 7477;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_1 = 7478;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_0 = 7479;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_0 = 7480;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_1 = 7481;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_1 = 7482;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_2 = 7483;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_2 = 7484;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_3 = 7485;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_3 = 7486;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_2 = 7487;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_2 = 7488;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_3 = 7489;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_3 = 7490;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_4 = 7491;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_4 = 7492;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_4 = 7493;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_4 = 7494;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_0 = 7495;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_0 = 7496;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_1 = 7497;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_1 = 7498;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_0 = 7499;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_0 = 7500;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_1 = 7501;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_1 = 7502;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_2 = 7503;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_2 = 7504;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_3 = 7505;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_3 = 7506;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_2 = 7507;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_2 = 7508;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_3 = 7509;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_3 = 7510;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_4 = 7511;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_4 = 7512;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_4 = 7513;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_4 = 7514;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_0 = 7515;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_0 = 7516;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_1 = 7517;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_1 = 7518;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_0 = 7519;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_0 = 7520;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_1 = 7521;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_1 = 7522;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_2 = 7523;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_2 = 7524;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_3 = 7525;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_3 = 7526;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_2 = 7527;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_2 = 7528;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_3 = 7529;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_3 = 7530;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_4 = 7531;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_4 = 7532;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_4 = 7533;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_4 = 7534;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_0 = 7535;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_0 = 7536;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_1 = 7537;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_1 = 7538;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_0 = 7539;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_0 = 7540;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_1 = 7541;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_1 = 7542;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_2 = 7543;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_2 = 7544;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_3 = 7545;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_3 = 7546;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_2 = 7547;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_2 = 7548;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_3 = 7549;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_3 = 7550;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_4 = 7551;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_4 = 7552;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_4 = 7553;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_4 = 7554;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_0 = 7555;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_0 = 7556;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_1 = 7557;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_1 = 7558;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_0 = 7559;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_0 = 7560;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_1 = 7561;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_1 = 7562;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_2 = 7563;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_2 = 7564;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_3 = 7565;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_3 = 7566;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_2 = 7567;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_2 = 7568;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_3 = 7569;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_3 = 7570;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_4 = 7571;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_4 = 7572;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_4 = 7573;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_4 = 7574;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_0 = 7575;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_0 = 7576;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_1 = 7577;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_1 = 7578;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_0 = 7579;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_0 = 7580;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_1 = 7581;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_1 = 7582;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_2 = 7583;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_2 = 7584;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_3 = 7585;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_3 = 7586;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_2 = 7587;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_2 = 7588;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_3 = 7589;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_3 = 7590;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_4 = 7591;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_4 = 7592;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_4 = 7593;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_4 = 7594;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_0 = 7595;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_0 = 7596;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_1 = 7597;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_1 = 7598;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_0 = 7599;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_0 = 7600;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_1 = 7601;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_1 = 7602;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_2 = 7603;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_2 = 7604;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_3 = 7605;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_3 = 7606;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_2 = 7607;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_2 = 7608;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_3 = 7609;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_3 = 7610;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_4 = 7611;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_4 = 7612;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_4 = 7613;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_4 = 7614;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_0 = 7615;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_0 = 7616;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_1 = 7617;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_1 = 7618;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_0 = 7619;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_0 = 7620;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_1 = 7621;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_1 = 7622;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_2 = 7623;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_2 = 7624;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_3 = 7625;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_3 = 7626;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_2 = 7627;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_2 = 7628;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_3 = 7629;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_3 = 7630;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_4 = 7631;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_4 = 7632;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_4 = 7633;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_4 = 7634;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_0 = 7635;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_0 = 7636;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_1 = 7637;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_1 = 7638;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_0 = 7639;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_0 = 7640;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_1 = 7641;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_1 = 7642;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_2 = 7643;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_2 = 7644;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_3 = 7645;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_3 = 7646;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_2 = 7647;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_2 = 7648;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_3 = 7649;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_3 = 7650;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_4 = 7651;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_4 = 7652;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_4 = 7653;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_4 = 7654;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_0 = 7655;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_0 = 7656;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_1 = 7657;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_1 = 7658;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_0 = 7659;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_0 = 7660;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_1 = 7661;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_1 = 7662;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_2 = 7663;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_2 = 7664;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_3 = 7665;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_3 = 7666;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_2 = 7667;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_2 = 7668;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_3 = 7669;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_3 = 7670;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_4 = 7671;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_4 = 7672;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_4 = 7673;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_4 = 7674;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_0 = 7675;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_0 = 7676;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_1 = 7677;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_1 = 7678;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_0 = 7679;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_0 = 7680;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_1 = 7681;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_1 = 7682;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_2 = 7683;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_2 = 7684;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_3 = 7685;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_3 = 7686;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_2 = 7687;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_2 = 7688;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_3 = 7689;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_3 = 7690;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_4 = 7691;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_4 = 7692;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_4 = 7693;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_4 = 7694;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_0 = 7695;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_0 = 7696;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_1 = 7697;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_1 = 7698;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_0 = 7699;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_0 = 7700;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_1 = 7701;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_1 = 7702;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_2 = 7703;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_2 = 7704;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_3 = 7705;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_3 = 7706;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_2 = 7707;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_2 = 7708;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_3 = 7709;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_3 = 7710;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_4 = 7711;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_4 = 7712;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_4 = 7713;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_4 = 7714;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_0 = 7715;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_0 = 7716;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_1 = 7717;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_1 = 7718;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_0 = 7719;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_0 = 7720;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_1 = 7721;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_1 = 7722;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_2 = 7723;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_2 = 7724;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_3 = 7725;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_3 = 7726;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_2 = 7727;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_2 = 7728;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_3 = 7729;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_3 = 7730;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_4 = 7731;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_4 = 7732;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_4 = 7733;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_4 = 7734;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_0 = 7735;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_0 = 7736;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_1 = 7737;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_1 = 7738;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_0 = 7739;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_0 = 7740;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_1 = 7741;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_1 = 7742;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_2 = 7743;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_2 = 7744;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_3 = 7745;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_3 = 7746;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_2 = 7747;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_2 = 7748;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_3 = 7749;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_3 = 7750;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_4 = 7751;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_4 = 7752;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_4 = 7753;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_4 = 7754;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_0 = 7755;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_0 = 7756;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_1 = 7757;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_1 = 7758;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_0 = 7759;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_0 = 7760;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_1 = 7761;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_1 = 7762;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_2 = 7763;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_2 = 7764;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_3 = 7765;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_3 = 7766;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_2 = 7767;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_2 = 7768;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_3 = 7769;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_3 = 7770;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_4 = 7771;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_4 = 7772;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_4 = 7773;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_4 = 7774;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_0 = 7775;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_0 = 7776;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_1 = 7777;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_1 = 7778;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_0 = 7779;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_0 = 7780;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_1 = 7781;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_1 = 7782;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_2 = 7783;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_2 = 7784;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_3 = 7785;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_3 = 7786;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_2 = 7787;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_2 = 7788;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_3 = 7789;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_3 = 7790;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_4 = 7791;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_4 = 7792;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_4 = 7793;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_4 = 7794;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_0 = 7795;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_0 = 7796;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_1 = 7797;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_1 = 7798;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_0 = 7799;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_0 = 7800;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_1 = 7801;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_1 = 7802;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_2 = 7803;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_2 = 7804;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_3 = 7805;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_3 = 7806;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_2 = 7807;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_2 = 7808;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_3 = 7809;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_3 = 7810;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_4 = 7811;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_4 = 7812;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_4 = 7813;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_4 = 7814;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_0 = 7815;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_0 = 7816;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_1 = 7817;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_1 = 7818;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_0 = 7819;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_0 = 7820;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_1 = 7821;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_1 = 7822;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_2 = 7823;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_2 = 7824;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_3 = 7825;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_3 = 7826;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_2 = 7827;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_2 = 7828;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_3 = 7829;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_3 = 7830;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_4 = 7831;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_4 = 7832;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_4 = 7833;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_4 = 7834;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_0 = 7835;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_0 = 7836;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_1 = 7837;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_1 = 7838;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_0 = 7839;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_0 = 7840;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_1 = 7841;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_1 = 7842;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_2 = 7843;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_2 = 7844;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_3 = 7845;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_3 = 7846;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_2 = 7847;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_2 = 7848;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_3 = 7849;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_3 = 7850;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_4 = 7851;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_4 = 7852;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_4 = 7853;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_4 = 7854;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_0 = 7855;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_0 = 7856;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_1 = 7857;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_1 = 7858;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_0 = 7859;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_0 = 7860;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_1 = 7861;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_1 = 7862;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_2 = 7863;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_2 = 7864;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_3 = 7865;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_3 = 7866;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_2 = 7867;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_2 = 7868;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_3 = 7869;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_3 = 7870;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_4 = 7871;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_4 = 7872;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_4 = 7873;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_4 = 7874;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_0 = 7875;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_0 = 7876;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_1 = 7877;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_1 = 7878;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_0 = 7879;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_0 = 7880;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_1 = 7881;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_1 = 7882;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_2 = 7883;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_2 = 7884;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_3 = 7885;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_3 = 7886;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_2 = 7887;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_2 = 7888;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_3 = 7889;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_3 = 7890;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_4 = 7891;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_4 = 7892;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_4 = 7893;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_4 = 7894;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_0 = 7895;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_0 = 7896;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_1 = 7897;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_1 = 7898;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_0 = 7899;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_0 = 7900;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_1 = 7901;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_1 = 7902;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_2 = 7903;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_2 = 7904;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_3 = 7905;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_3 = 7906;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_2 = 7907;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_2 = 7908;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_3 = 7909;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_3 = 7910;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_4 = 7911;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_4 = 7912;
static const uint64_t IDX_CEN_MBA_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_4 = 7913;
static const uint64_t IDX_CEN_MBA_0_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_4 = 7914;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0 = 7915;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0 = 7916;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1 = 7917;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1 = 7918;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0 = 7919;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0 = 7920;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1 = 7921;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1 = 7922;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2 = 7923;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2 = 7924;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3 = 7925;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3 = 7926;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2 = 7927;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2 = 7928;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3 = 7929;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3 = 7930;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4 = 7931;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4 = 7932;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4 = 7933;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4 = 7934;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_0 = 7935;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P0_0 = 7936;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_1 = 7937;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P0_1 = 7938;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_0 = 7939;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P1_0 = 7940;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_1 = 7941;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P1_1 = 7942;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_2 = 7943;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P0_2 = 7944;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_3 = 7945;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P0_3 = 7946;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_2 = 7947;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P1_2 = 7948;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_3 = 7949;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P1_3 = 7950;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P0_4 = 7951;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P0_4 = 7952;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG3_P1_4 = 7953;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG3_P1_4 = 7954;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_0 = 7955;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P0_0 = 7956;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_1 = 7957;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P0_1 = 7958;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_0 = 7959;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P1_0 = 7960;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_1 = 7961;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P1_1 = 7962;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_2 = 7963;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P0_2 = 7964;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_3 = 7965;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P0_3 = 7966;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_2 = 7967;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P1_2 = 7968;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_3 = 7969;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P1_3 = 7970;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P0_4 = 7971;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P0_4 = 7972;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG4_P1_4 = 7973;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG4_P1_4 = 7974;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0 = 7975;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0 = 7976;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1 = 7977;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1 = 7978;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0 = 7979;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0 = 7980;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1 = 7981;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1 = 7982;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2 = 7983;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2 = 7984;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3 = 7985;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3 = 7986;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2 = 7987;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2 = 7988;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3 = 7989;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3 = 7990;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4 = 7991;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4 = 7992;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4 = 7993;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4 = 7994;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_0 = 7995;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P0_0 = 7996;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_1 = 7997;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P0_1 = 7998;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_0 = 7999;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P1_0 = 8000;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_1 = 8001;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P1_1 = 8002;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_2 = 8003;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P0_2 = 8004;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_3 = 8005;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P0_3 = 8006;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_2 = 8007;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P1_2 = 8008;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_3 = 8009;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P1_3 = 8010;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P0_4 = 8011;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P0_4 = 8012;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG0_P1_4 = 8013;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG0_P1_4 = 8014;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_0_ROX = 8015;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P0_0_ROX = 8016;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_1_ROX = 8017;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P0_1_ROX = 8018;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_0_ROX = 8019;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P1_0_ROX = 8020;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_1_ROX = 8021;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P1_1_ROX = 8022;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_2_ROX = 8023;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P0_2_ROX = 8024;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_3_ROX = 8025;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P0_3_ROX = 8026;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_2_ROX = 8027;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P1_2_ROX = 8028;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_3_ROX = 8029;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P1_3_ROX = 8030;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P0_4_ROX = 8031;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P0_4_ROX = 8032;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG1_P1_4_ROX = 8033;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG1_P1_4_ROX = 8034;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_ROX = 8035;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_ROX = 8036;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_ROX = 8037;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_ROX = 8038;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_ROX = 8039;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_ROX = 8040;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_ROX = 8041;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_ROX = 8042;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_ROX = 8043;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_ROX = 8044;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_ROX = 8045;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_ROX = 8046;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_ROX = 8047;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_ROX = 8048;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_ROX = 8049;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_ROX = 8050;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_ROX = 8051;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_ROX = 8052;
static const uint64_t IDX_CEN_MBA_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_ROX = 8053;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_ROX = 8054;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR0 = 8055;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_BIT_ENABLE_P0_ADR0 = 8056;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR1 = 8057;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_BIT_ENABLE_P0_ADR1 = 8058;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR0 = 8059;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_BIT_ENABLE_P1_ADR0 = 8060;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR1 = 8061;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_BIT_ENABLE_P1_ADR1 = 8062;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR2 = 8063;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_BIT_ENABLE_P0_ADR2 = 8064;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P0_ADR3 = 8065;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_BIT_ENABLE_P0_ADR3 = 8066;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR2 = 8067;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_BIT_ENABLE_P1_ADR2 = 8068;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_BIT_ENABLE_P1_ADR3 = 8069;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_BIT_ENABLE_P1_ADR3 = 8070;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR0 = 8071;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY0_P0_ADR0 = 8072;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR1 = 8073;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY0_P0_ADR1 = 8074;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR0 = 8075;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY0_P1_ADR0 = 8076;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR1 = 8077;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY0_P1_ADR1 = 8078;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR2 = 8079;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY0_P0_ADR2 = 8080;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY0_P0_ADR3 = 8081;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY0_P0_ADR3 = 8082;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR2 = 8083;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY0_P1_ADR2 = 8084;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY0_P1_ADR3 = 8085;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY0_P1_ADR3 = 8086;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR0 = 8087;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY1_P0_ADR0 = 8088;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR1 = 8089;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY1_P0_ADR1 = 8090;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR0 = 8091;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY1_P1_ADR0 = 8092;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR1 = 8093;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY1_P1_ADR1 = 8094;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR2 = 8095;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY1_P0_ADR2 = 8096;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY1_P0_ADR3 = 8097;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY1_P0_ADR3 = 8098;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR2 = 8099;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY1_P1_ADR2 = 8100;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY1_P1_ADR3 = 8101;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY1_P1_ADR3 = 8102;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR0 = 8103;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY2_P0_ADR0 = 8104;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR1 = 8105;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY2_P0_ADR1 = 8106;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR0 = 8107;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY2_P1_ADR0 = 8108;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR1 = 8109;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY2_P1_ADR1 = 8110;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR2 = 8111;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY2_P0_ADR2 = 8112;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY2_P0_ADR3 = 8113;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY2_P0_ADR3 = 8114;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR2 = 8115;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY2_P1_ADR2 = 8116;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY2_P1_ADR3 = 8117;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY2_P1_ADR3 = 8118;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR0 = 8119;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY3_P0_ADR0 = 8120;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR1 = 8121;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY3_P0_ADR1 = 8122;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR0 = 8123;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY3_P1_ADR0 = 8124;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR1 = 8125;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY3_P1_ADR1 = 8126;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR2 = 8127;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY3_P0_ADR2 = 8128;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY3_P0_ADR3 = 8129;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY3_P0_ADR3 = 8130;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR2 = 8131;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY3_P1_ADR2 = 8132;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY3_P1_ADR3 = 8133;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY3_P1_ADR3 = 8134;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR0 = 8135;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY4_P0_ADR0 = 8136;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR1 = 8137;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY4_P0_ADR1 = 8138;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR0 = 8139;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY4_P1_ADR0 = 8140;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR1 = 8141;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY4_P1_ADR1 = 8142;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR2 = 8143;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY4_P0_ADR2 = 8144;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY4_P0_ADR3 = 8145;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY4_P0_ADR3 = 8146;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR2 = 8147;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY4_P1_ADR2 = 8148;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY4_P1_ADR3 = 8149;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY4_P1_ADR3 = 8150;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR0 = 8151;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY5_P0_ADR0 = 8152;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR1 = 8153;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY5_P0_ADR1 = 8154;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR0 = 8155;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY5_P1_ADR0 = 8156;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR1 = 8157;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY5_P1_ADR1 = 8158;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR2 = 8159;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY5_P0_ADR2 = 8160;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY5_P0_ADR3 = 8161;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY5_P0_ADR3 = 8162;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR2 = 8163;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY5_P1_ADR2 = 8164;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY5_P1_ADR3 = 8165;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY5_P1_ADR3 = 8166;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR0 = 8167;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY6_P0_ADR0 = 8168;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR1 = 8169;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY6_P0_ADR1 = 8170;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR0 = 8171;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY6_P1_ADR0 = 8172;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR1 = 8173;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY6_P1_ADR1 = 8174;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR2 = 8175;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY6_P0_ADR2 = 8176;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY6_P0_ADR3 = 8177;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY6_P0_ADR3 = 8178;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR2 = 8179;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY6_P1_ADR2 = 8180;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY6_P1_ADR3 = 8181;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY6_P1_ADR3 = 8182;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR0 = 8183;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY7_P0_ADR0 = 8184;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR1 = 8185;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY7_P0_ADR1 = 8186;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR0 = 8187;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY7_P1_ADR0 = 8188;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR1 = 8189;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY7_P1_ADR1 = 8190;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR2 = 8191;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY7_P0_ADR2 = 8192;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY7_P0_ADR3 = 8193;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY7_P0_ADR3 = 8194;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR2 = 8195;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY7_P1_ADR2 = 8196;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DELAY7_P1_ADR3 = 8197;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DELAY7_P1_ADR3 = 8198;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_ROX = 8199;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_ROX = 8200;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_ROX = 8201;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_ROX = 8202;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_ROX = 8203;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_ROX = 8204;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_ROX = 8205;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_ROX = 8206;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_ROX = 8207;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_ROX = 8208;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_ROX = 8209;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_ROX = 8210;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_ROX = 8211;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_ROX = 8212;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_ROX = 8213;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_ROX = 8214;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0 = 8215;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0 = 8216;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1 = 8217;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1 = 8218;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0 = 8219;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0 = 8220;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1 = 8221;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1 = 8222;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2 = 8223;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2 = 8224;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3 = 8225;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3 = 8226;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2 = 8227;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2 = 8228;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3 = 8229;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3 = 8230;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0 = 8231;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0 = 8232;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1 = 8233;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1 = 8234;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0 = 8235;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0 = 8236;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1 = 8237;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1 = 8238;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2 = 8239;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2 = 8240;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3 = 8241;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3 = 8242;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2 = 8243;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2 = 8244;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3 = 8245;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3 = 8246;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0 = 8247;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0 = 8248;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1 = 8249;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1 = 8250;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0 = 8251;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0 = 8252;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1 = 8253;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1 = 8254;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2 = 8255;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2 = 8256;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3 = 8257;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3 = 8258;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2 = 8259;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2 = 8260;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3 = 8261;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3 = 8262;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0 = 8263;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0 = 8264;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1 = 8265;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1 = 8266;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0 = 8267;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0 = 8268;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1 = 8269;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1 = 8270;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2 = 8271;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2 = 8272;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3 = 8273;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3 = 8274;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2 = 8275;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2 = 8276;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3 = 8277;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3 = 8278;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0 = 8279;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0 = 8280;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1 = 8281;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1 = 8282;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0 = 8283;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0 = 8284;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1 = 8285;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1 = 8286;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2 = 8287;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2 = 8288;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3 = 8289;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3 = 8290;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2 = 8291;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2 = 8292;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3 = 8293;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3 = 8294;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0 = 8295;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0 = 8296;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1 = 8297;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1 = 8298;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0 = 8299;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0 = 8300;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1 = 8301;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1 = 8302;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2 = 8303;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2 = 8304;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3 = 8305;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3 = 8306;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2 = 8307;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2 = 8308;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3 = 8309;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3 = 8310;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S0 = 8311;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S0 = 8312;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S1 = 8313;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S1 = 8314;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S0 = 8315;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S0 = 8316;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S1 = 8317;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S1 = 8318;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S0 = 8319;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S0 = 8320;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S1 = 8321;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S1 = 8322;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S0 = 8323;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S0 = 8324;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S1 = 8325;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S1 = 8326;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S0 = 8327;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S0 = 8328;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S1 = 8329;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S1 = 8330;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S0 = 8331;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S0 = 8332;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S1 = 8333;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S1 = 8334;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0 = 8335;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0 = 8336;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1 = 8337;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1 = 8338;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0 = 8339;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0 = 8340;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1 = 8341;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1 = 8342;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0 = 8343;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0 = 8344;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1 = 8345;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1 = 8346;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0 = 8347;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0 = 8348;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1 = 8349;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1 = 8350;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0 = 8351;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0 = 8352;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1 = 8353;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1 = 8354;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0 = 8355;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0 = 8356;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1 = 8357;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1 = 8358;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR0 = 8359;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_POWERDOWN_2_P0_ADR0 = 8360;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR1 = 8361;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_POWERDOWN_2_P0_ADR1 = 8362;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR0 = 8363;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_POWERDOWN_2_P1_ADR0 = 8364;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR1 = 8365;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_POWERDOWN_2_P1_ADR1 = 8366;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR2 = 8367;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_POWERDOWN_2_P0_ADR2 = 8368;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P0_ADR3 = 8369;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_POWERDOWN_2_P0_ADR3 = 8370;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR2 = 8371;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_POWERDOWN_2_P1_ADR2 = 8372;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_POWERDOWN_2_P1_ADR3 = 8373;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_POWERDOWN_2_P1_ADR3 = 8374;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0 = 8375;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0 = 8376;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1 = 8377;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1 = 8378;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0 = 8379;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0 = 8380;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1 = 8381;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1 = 8382;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0 = 8383;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0 = 8384;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1 = 8385;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1 = 8386;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0 = 8387;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0 = 8388;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1 = 8389;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1 = 8390;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_RO = 8391;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_RO = 8392;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_RO = 8393;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_RO = 8394;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_RO = 8395;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_RO = 8396;
static const uint64_t IDX_CEN_MBA_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_RO = 8397;
static const uint64_t IDX_CEN_MBA_0_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_RO = 8398;
static const uint64_t IDX_CEN_MBA_PHY01_DDRPHY_FIR_ACTION0_REG_RO = 8399;
static const uint64_t IDX_CEN_MBA_0_PHY01_DDRPHY_FIR_ACTION0_REG_RO = 8400;
static const uint64_t IDX_CEN_MBA_PHY01_DDRPHY_FIR_ACTION1_REG_RO = 8401;
static const uint64_t IDX_CEN_MBA_0_PHY01_DDRPHY_FIR_ACTION1_REG_RO = 8402;
static const uint64_t IDX_CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG = 8403;
static const uint64_t IDX_CEN_MBA_0_PHY01_DDRPHY_FIR_MASK_REG = 8404;
static const uint64_t IDX_CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_WO_AND = 8405;
static const uint64_t IDX_CEN_MBA_0_PHY01_DDRPHY_FIR_MASK_REG_WO_AND = 8406;
static const uint64_t IDX_CEN_MBA_PHY01_DDRPHY_FIR_MASK_REG_WO_OR = 8407;
static const uint64_t IDX_CEN_MBA_0_PHY01_DDRPHY_FIR_MASK_REG_WO_OR = 8408;
static const uint64_t IDX_CEN_MBA_PHY01_DDRPHY_FIR_REG = 8409;
static const uint64_t IDX_CEN_MBA_0_PHY01_DDRPHY_FIR_REG = 8410;
static const uint64_t IDX_CEN_MBA_PHY01_DDRPHY_FIR_REG_WOX_AND = 8411;
static const uint64_t IDX_CEN_MBA_0_PHY01_DDRPHY_FIR_REG_WOX_AND = 8412;
static const uint64_t IDX_CEN_MBA_PHY01_DDRPHY_FIR_REG_WOX_OR = 8413;
static const uint64_t IDX_CEN_MBA_0_PHY01_DDRPHY_FIR_REG_WOX_OR = 8414;
static const uint64_t IDX_CEN_MBA_PHY01_DDRPHY_FIR_WOF_REG = 8415;
static const uint64_t IDX_CEN_MBA_0_PHY01_DDRPHY_FIR_WOF_REG = 8416;
static const uint64_t IDX_CEN_TCM_SYNC_CONFIG_PCB = 8417;
static const uint64_t IDX_CEN_TCM_PHASE_SHADOW_PCB = 8418;
static const uint64_t IDX_CEN_TCM_OPCG_REG0_PCB = 8419;
static const uint64_t IDX_CEN_TCM_OPCG_REG1_PCB = 8420;
static const uint64_t IDX_CEN_TCM_OPCG_REG2_PCB = 8421;
static const uint64_t IDX_CEN_TCM_OPCG_REG3_PCB = 8422;
static const uint64_t IDX_CEN_TCM_CLK_REGION_PCB = 8423;
static const uint64_t IDX_CEN_TCM_SCANSELQ_PCB = 8424;
static const uint64_t IDX_CEN_TCM_CLOCK_STAT_PCB = 8425;
static const uint64_t IDX_CEN_TCM_ERROR_STATUS_PCB = 8426;
static const uint64_t IDX_CEN_TCM_CC_PROTECT_MODE_REG_PCB = 8427;
static const uint64_t IDX_CEN_TCM_CC_ATOMIC_LOCK_REG_PCB = 8428;
static const uint64_t IDX_CEN_TCM_GP0_PCB = 8429;
static const uint64_t IDX_CEN_TCM_GP0_PCB1 = 8430;
static const uint64_t IDX_CEN_TCM_GP0_PCB2 = 8431;
static const uint64_t IDX_CEN_TCM_GP1_PCB = 8432;
static const uint64_t IDX_CEN_TCM_GP2_PCB = 8433;
static const uint64_t IDX_CEN_TCM_GP4_PCB = 8434;
static const uint64_t IDX_CEN_TCM_GP4_PCB1 = 8435;
static const uint64_t IDX_CEN_TCM_GP4_PCB2 = 8436;
static const uint64_t IDX_CEN_TCM_GPIO_PROTECT_MODE_REG_PCB = 8437;
static const uint64_t IDX_CEN_TCM_GPIO_ATOMIC_LOCK_REG_PCB = 8438;
static const uint64_t IDX_CEN_TCM_XFIR_PCB = 8439;
static const uint64_t IDX_CEN_TCM_RFIR_PCB = 8440;
static const uint64_t IDX_CEN_TCM_FIR_MASK_PCB = 8441;
static const uint64_t IDX_CEN_TCM_LOCAL_FIR_PCB = 8442;
static const uint64_t IDX_CEN_TCM_LOCAL_FIR_PCB1 = 8443;
static const uint64_t IDX_CEN_TCM_LOCAL_FIR_PCB2 = 8444;
static const uint64_t IDX_CEN_TCM_PSCOM_MODE_REG_PCB = 8445;
static const uint64_t IDX_CEN_TCM_PSCOM_STATUS_ERROR_REG_PCB = 8446;
static const uint64_t IDX_CEN_TCM_PSCOM_ERROR_MASK_PCB = 8447;
static const uint64_t IDX_CEN_TCM_ADDR_TRAP_REG_PCB = 8448;
static const uint64_t IDX_CEN_TCM_DEBUG_STATUS_REG_PCB = 8449;
static const uint64_t IDX_CEN_TCM_PSCOM_WRITE_PROTECT_REG_PCB = 8450;
static const uint64_t IDX_CEN_TCM_ATOMIC_LOCK_REG_PCB = 8451;
static const uint64_t IDX_CEN_TCM_SPATTN_PCB = 8452;
static const uint64_t IDX_CEN_TCM_SPATTN_PCB1 = 8453;
static const uint64_t IDX_CEN_TCM_SPATTN_PCB2 = 8454;
static const uint64_t IDX_CEN_TCM_SPA_MASK_PCB = 8455;
static const uint64_t IDX_CEN_TCM_MODE_REG_PCB = 8456;
static const uint64_t IDX_CEN_TCM_LOCAL_FIR_ACTION0_PCB = 8457;
static const uint64_t IDX_CEN_TCM_LOCAL_FIR_ACTION1_PCB = 8458;
static const uint64_t IDX_CEN_TCM_LOCAL_FIR_MASK_PCB = 8459;
static const uint64_t IDX_CEN_TCM_LOCAL_FIR_MASK_PCB1 = 8460;
static const uint64_t IDX_CEN_TCM_LOCAL_FIR_MASK_PCB2 = 8461;
static const uint64_t IDX_CEN_TCM_DTS_RESULT0_PCB = 8462;
static const uint64_t IDX_CEN_TCM_DTS_TRC_RESULT_PCB = 8463;
static const uint64_t IDX_CEN_TCM_ENC_CPM_RESULT0_PCB = 8464;
static const uint64_t IDX_CEN_TCM_VOLT_READ0_PCB = 8465;
static const uint64_t IDX_CEN_TCM_THERM_MODE_REG_PCB = 8466;
static const uint64_t IDX_CEN_TCM_SKITTER_MODE_REG_PCB = 8467;
static const uint64_t IDX_CEN_TCM_SKITTER_CLKSRC_REG_PCB = 8468;
static const uint64_t IDX_CEN_TCM_INJECT_REG_PCB = 8469;
static const uint64_t IDX_CEN_TCM_CONTROL_REG_PCB = 8470;
static const uint64_t IDX_CEN_TCM_ERR_STATUS_REG_PCB = 8471;
static const uint64_t IDX_CEN_TCM_SKITTER_FORCE_REG_PCB = 8472;
static const uint64_t IDX_CEN_TCM_VOLT_MODE_REG_PCB = 8473;
static const uint64_t IDX_CEN_TCM_SKITTER_DATA0_PCB = 8474;
static const uint64_t IDX_CEN_TCM_SKITTER_DATA1_PCB = 8475;
static const uint64_t IDX_CEN_TCM_SKITTER_DATA2_PCB = 8476;
static const uint64_t IDX_CEN_TCM_TIMESTAMP_COUNTER_READ_PCB = 8477;
static const uint64_t IDX_CEN_TCM_DBG_MODE_REG = 8478;
static const uint64_t IDX_CEN_TCM_DBG_INST1_COND_REG_1 = 8479;
static const uint64_t IDX_CEN_TCM_DBG_INST1_COND_REG_2 = 8480;
static const uint64_t IDX_CEN_TCM_DBG_INST2_COND_REG_1 = 8481;
static const uint64_t IDX_CEN_TCM_DBG_INST2_COND_REG_2 = 8482;
static const uint64_t IDX_CEN_TCM_DBG_TRACE_REG_0 = 8483;
static const uint64_t IDX_CEN_TCM_DBG_TRACE_REG_1 = 8484;
static const uint64_t IDX_CEN_TCM_DBG_TRACE_MODE_REG_2 = 8485;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_TRCTRL_CONFIG = 8486;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_TRDATA_CONFIG_0 = 8487;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_TRDATA_CONFIG_1 = 8488;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_TRDATA_CONFIG_2 = 8489;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_TRDATA_CONFIG_3 = 8490;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_TRDATA_CONFIG_4 = 8491;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_TRDATA_CONFIG_5 = 8492;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_TRDATA_CONFIG_9 = 8493;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_HI_DATA_REG_ROX = 8494;
static const uint64_t IDX_CEN_MBA_1_TCM_TRA_MBA23TRA_TRACE_LO_DATA_REG_ROX = 8495;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG = 8496;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_TRCTRL_CONFIG = 8497;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_0 = 8498;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_0 = 8499;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_1 = 8500;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_1 = 8501;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_2 = 8502;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_2 = 8503;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_3 = 8504;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_3 = 8505;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_4 = 8506;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_4 = 8507;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_5 = 8508;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_5 = 8509;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9 = 8510;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_TRDATA_CONFIG_9 = 8511;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_HI_DATA_REG_ROX = 8512;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_HI_DATA_REG_ROX = 8513;
static const uint64_t IDX_CEN_MBA_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_ROX = 8514;
static const uint64_t IDX_CEN_MBA_0_TCM_TRA_MBA01TRA_TRACE_LO_DATA_REG_ROX = 8515;
static const uint64_t IDX_CEN_FSISCRPD = 8516;
static const uint64_t IDX_CEN_SCPSIZE_RO = 8517;
static const uint64_t IDX_CEN_DATA_REGISTER_0 = 8518;
static const uint64_t IDX_CEN_DATA_REGISTER_1 = 8519;
static const uint64_t IDX_CEN_COMMAND_REGISTER = 8520;
static const uint64_t IDX_CEN_RESET_WO = 8521;
static const uint64_t IDX_CEN_SET_PIB_RESET_WO = 8522;
static const uint64_t IDX_CEN_STATUS_ROX = 8523;
static const uint64_t IDX_CEN_CHIPID_ROX = 8524;
static const uint64_t IDX_CEN_INTERRUPT = 8525;
static const uint64_t IDX_CEN_COMPLEMENT_MASK = 8526;
static const uint64_t IDX_CEN_TRUE_MASK = 8527;
static const uint64_t IDX_CEN_FSIGP4 = 8528;
static const uint64_t IDX_CEN_FSIGP3 = 8529;
static const uint64_t IDX_CEN_FSIGP5 = 8530;
static const uint64_t IDX_CEN_FSIGP6 = 8531;
static const uint64_t IDX_CEN_FSIGP7 = 8532;
static const uint64_t IDX_CEN_GPWRP = 8533;
static const uint64_t IDX_CEN_SNS1LTH_RO = 8534;
static const uint64_t IDX_CEN_SNS2LTH_RO = 8535;
static const uint64_t IDX_CEN_PERV_GP3 = 8536;
static const uint64_t IDX_CEN_I2_DATA_REGISTER_0 = 8537;
static const uint64_t IDX_CEN_I2_DATA_REGISTER_1 = 8538;
static const uint64_t IDX_CEN_I2_COMMAND_REGISTER = 8539;
static const uint64_t IDX_CEN_I2_RESET_WO = 8540;
static const uint64_t IDX_CEN_I2_SET_PIB_RESET_WO = 8541;
static const uint64_t IDX_CEN_I2_STATUS_ROX = 8542;
static const uint64_t IDX_CEN_I2_CHIPID_ROX = 8543;
static const uint64_t IDX_CEN_I2_INTERRUPT = 8544;
static const uint64_t IDX_CEN_I2_COMPLEMENT_MASK = 8545;
static const uint64_t IDX_CEN_I2_TRUE_MASK = 8546;
static const uint64_t IDX_CEN_FSI_SHIFT_COMMAND_REGISTER = 8547;
static const uint64_t IDX_CEN_FSI_SHIFT_FRONY_END_LENGTH_REGISTER = 8548;
static const uint64_t IDX_CEN_FSI_SHIFT_READ_BUFFER_ROX = 8549;
static const uint64_t IDX_CEN_FSI_SHIFT_RESET_WOX = 8550;
static const uint64_t IDX_CEN_FSI_SHIFT_RESET_ERRORS_WOX = 8551;
static const uint64_t IDX_CEN_FSI_SHIFT_STATUS_ROX = 8552;
static const uint64_t IDX_CEN_FSI_SHIFT_EXTENDED_STATUS_ROX = 8553;
static const uint64_t IDX_CEN_FSI_SHIFT_CHIP_ID_ROX = 8554;
static const uint64_t IDX_CEN_FSI_SHIFT_COMPLEMENT_MASK = 8555;
static const uint64_t IDX_CEN_FSI_SHIFT_TRUE_MASK = 8556;
static const uint64_t IDX_CEN_FSI_SHIFT_SHIFT_CONTROL_REGISTER_2 = 8557;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_MODE_REGISTER = 8558;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_STAT_COMP_MASK_REGISTER = 8559;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_OP_BLOCKSIZE_REGISTER = 8560;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_REM_SIZE_REGISTER = 8561;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_PIB_SND_BUFFER0_REGISTER = 8562;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_PIB_SND_BUFFER1_REGISTER = 8563;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_PIB_RCV_BUFFER0_REGISTER = 8564;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_PIB_RCV_BUFFER1_REGISTER = 8565;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_ERROR_PTR_REGISTER = 8566;
static const uint64_t IDX_CEN_FSI_SHIFT_DMA_SCOM_CMD_REGISTER = 8567;
static const uint64_t IDX_CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_0_ROX = 8568;
static const uint64_t IDX_CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_1_ROX = 8569;
static const uint64_t IDX_CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_2_ROX = 8570;
static const uint64_t IDX_CEN_FSI_SHIFT_PIB_EXTENDED_ERROR_REGISTER_3_ROX = 8571;
static const uint64_t IDX_CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_0_ROX = 8572;
static const uint64_t IDX_CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_1_ROX = 8573;
static const uint64_t IDX_CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_2_ROX = 8574;
static const uint64_t IDX_CEN_FSI2PIB_PIB_EXTENDED_ERROR_REGISTER_3_ROX = 8575;
static const uint64_t IDX_CEN_FSI_I2C_FIFO_REGISTER = 8576;
static const uint64_t IDX_CEN_FSI_I2C_COMMAND_REGISTER = 8577;
static const uint64_t IDX_CEN_FSI_I2C_MODE_REGISTER = 8578;
static const uint64_t IDX_CEN_FSI_I2C_WATER_MARK_REGISTER = 8579;
static const uint64_t IDX_CEN_FSI_I2C_INTERRUPT_MASK_REGISTER = 8580;
static const uint64_t IDX_CEN_FSI_I2C_INTERRUPT_MASK_REGISTER_WO_OR = 8581;
static const uint64_t IDX_CEN_FSI_I2C_INTERRUPT_MASK_REGISTER_WO_AND = 8582;
static const uint64_t IDX_CEN_FSI_I2C_STATUS_REGISTER_ROX = 8583;
static const uint64_t IDX_CEN_FSI_I2C_RESIDUAL_FRONT_END_BACK_END_LENGTH_ROX = 8584;
static const uint64_t IDX_CEN_FSI_I2C_EXTENDED_STATUS_ROX = 8585;
static const uint64_t IDX_CEN_FSI_I2C_INTERRUPT_COND_ROX = 8586;
static const uint64_t IDX_CEN_FSI_I2C_INTERRUPTS_ROX = 8587;
static const uint64_t IDX_CEN_FSI_I2C_IMM_RESET_I2C_WO = 8588;
static const uint64_t IDX_CEN_FSI_I2C_IMM_RESET_ERR_WO = 8589;
static const uint64_t IDX_CEN_FSI_I2C_IMM_SET_S_SCL_WO = 8590;
static const uint64_t IDX_CEN_FSI_I2C_IMM_RESET_S_SCL_WO = 8591;
static const uint64_t IDX_CEN_FSI_I2C_IMM_SET_S_SDA_WO = 8592;
static const uint64_t IDX_CEN_FSI_I2C_IMM_RESET_S_SDA_WO = 8593;
static const uint64_t IDX_CEN_GPIO_INPUT_REGISTER_ROX = 8594;
static const uint64_t IDX_CEN_GPIO_OUPUT_REGISTER = 8595;
static const uint64_t IDX_CEN_GPIO_OUPUT_REGISTER_WO_OR = 8596;
static const uint64_t IDX_CEN_GPIO_OUPUT_REGISTER_WO_AND = 8597;
static const uint64_t IDX_CEN_GPIO_OUPUT_ENABLE_REGISTER = 8598;
static const uint64_t IDX_CEN_GPIO_INTERRUPT_REGISTER_RO = 8599;
static const uint64_t IDX_CEN_GPIO_INTERRUPT_REGISTER_WO_AND = 8600;
static const uint64_t IDX_CEN_GPIO_INTERRUPT_REGISTER_WO_OR = 8601;
static const uint64_t IDX_CEN_GPIO_POLARITY_REGISTER = 8602;
static const uint64_t IDX_CEN_GPIO_INTERRUPT_ENABLE_REGISTER = 8603;
static const uint64_t IDX_CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_0_ROX = 8604;
static const uint64_t IDX_CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_1_ROX = 8605;
static const uint64_t IDX_CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_2_ROX = 8606;
static const uint64_t IDX_CEN_FSI2PIB2_PIB_EXTENDED_ERROR_REGISTER_3_ROX = 8607;
static const uint64_t IDX_CEN_RLDCOMP_RLDLOG_COMMAND_REGISTER = 8608;
static const uint64_t IDX_CEN_RLDCOMP_RLDLOG_FRONTEND_REGISTER_ROX = 8609;
static const uint64_t IDX_CEN_RLDCOMP_RLDLOG_CMDVAL_REGISTER = 8610;
static const uint64_t IDX_CEN_RLDCOMP_RLDLOG_STATUS_REGISTER_ROX = 8611;
static const uint64_t IDX_CEN_RLDCOMP_RLDLOG_ECCTRAP_REGISTER_ROX = 8612;
static const uint64_t IDX_CEN_RLDCOMP_RLDLOG_CONFIG_REGISTER = 8613;
static const uint64_t IDX_CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_ROX = 8614;
static const uint64_t IDX_CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_ROX = 8615;
static const uint64_t IDX_CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_ROX = 8616;
static const uint64_t IDX_CEN_RLDCOMP_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_ROX = 8617;
static const uint64_t IDX_CEN_I2CM_CONTROL_REGISTER_0_WOX = 8618;
static const uint64_t IDX_CEN_I2CM_RESET_REGISTER_0_WOX = 8619;
static const uint64_t IDX_CEN_I2CM_STATUS_REGISTER_0_ROX = 8620;
static const uint64_t IDX_CEN_I2CM_DATA_REGISTER_0 = 8621;
static const uint64_t IDX_CEN_I2CM_FIFO1_REGISTER_READ_0_ROX = 8622;
static const uint64_t IDX_CEN_I2CM_FIFO4_REGISTER_READ_0_ROX = 8623;
static const uint64_t IDX_CEN_I2CM_COMMAND_REGISTER_0 = 8624;
static const uint64_t IDX_CEN_I2CM_MODE_REGISTER_0 = 8625;
static const uint64_t IDX_CEN_I2CM_WATER_MARK_REGISTER_0 = 8626;
static const uint64_t IDX_CEN_I2CM_INTERRUPT_MASK_REGISTER_READ_0_ROX = 8627;
static const uint64_t IDX_CEN_I2CM_INTERRUPT_MASK_REGISTER_0_WOX = 8628;
static const uint64_t IDX_CEN_I2CM_INTERRUPT_MASK_REGISTER_0_WOX_OR = 8629;
static const uint64_t IDX_CEN_I2CM_INTERRUPT_MASK_REGISTER_0_WOX_AND = 8630;
static const uint64_t IDX_CEN_I2CM_STATUS_REGISTER_ENGINE_0_ROX = 8631;
static const uint64_t IDX_CEN_I2CM_RESIDUAL_FRONT_END_BACK_END_LENGTH_0_ROX = 8632;
static const uint64_t IDX_CEN_I2CM_EXTENDED_STATUS_0_ROX = 8633;
static const uint64_t IDX_CEN_I2CM_INTERRUPT_COND_0_ROX = 8634;
static const uint64_t IDX_CEN_I2CM_INTERRUPTS_0_ROX = 8635;
static const uint64_t IDX_CEN_I2CM_IMM_RESET_I2C_0_WOX = 8636;
static const uint64_t IDX_CEN_I2CM_IMM_RESET_ERR_0_WOX = 8637;
static const uint64_t IDX_CEN_I2CM_IMM_SET_S_SCL_0_WOX = 8638;
static const uint64_t IDX_CEN_I2CM_IMM_RESET_S_SCL_0_WOX = 8639;
static const uint64_t IDX_CEN_I2CM_IMM_SET_S_SDA_0_WOX = 8640;
static const uint64_t IDX_CEN_I2CM_IMM_RESET_S_SDA_0_WOX = 8641;
static const uint64_t IDX_CEN_I2CM_I2C_BUSY_REGISTER_0_ROX = 8642;
static const uint64_t IDX_CEN_MCAST_GRP_0_SLAVES_REG = 8643;
static const uint64_t IDX_CEN_MCAST_GRP_1_SLAVES_REG = 8644;
static const uint64_t IDX_CEN_MCAST_GRP_2_SLAVES_REG = 8645;
static const uint64_t IDX_CEN_MCAST_GRP_3_SLAVES_REG = 8646;
static const uint64_t IDX_CEN_MCAST_GRP_4_SLAVES_REG = 8647;
static const uint64_t IDX_CEN_MCAST_GRP_5_SLAVES_REG = 8648;
static const uint64_t IDX_CEN_MCAST_GRP_6_SLAVES_REG = 8649;
static const uint64_t IDX_CEN_BIT_SEL_REG_2 = 8650;
static const uint64_t IDX_CEN_BIT_SEL_REG_3 = 8651;
static const uint64_t IDX_CEN_DEVICE_ID_REG_RO = 8652;
static const uint64_t IDX_CEN_REC_ACK_REG = 8653;
static const uint64_t IDX_CEN_REC_ERR_REG0_ROX = 8654;
static const uint64_t IDX_CEN_REC_ERR_REG1_ROX = 8655;
static const uint64_t IDX_CEN_MCAST_COMP_REG = 8656;
static const uint64_t IDX_CEN_MCAST_COMP_VAL_REG = 8657;
static const uint64_t IDX_CEN_MCAST_COMP_MASK_REG = 8658;
static const uint64_t IDX_CEN_FIRST_REPLY_REG_ROX = 8659;
static const uint64_t IDX_CEN_TIMEOUT_REG = 8660;
static const uint64_t IDX_CEN_INTERRUPT_TYPE_REG = 8661;
static const uint64_t IDX_CEN_ERROR_REG = 8662;
static const uint64_t IDX_CEN_FIRST_ERR_REG = 8663;
static const uint64_t IDX_CEN_RESET_REG = 8664;
static const uint64_t IDX_CEN_IGNORE_PAR_REG = 8665;
static const uint64_t IDX_CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_0_ROX = 8666;
static const uint64_t IDX_CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_1_ROX = 8667;
static const uint64_t IDX_CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_2_ROX = 8668;
static const uint64_t IDX_CEN_JTAG2PIB_PIB_EXTENDED_ERROR_REGISTER_3_ROX = 8669;
static const uint64_t IDX_CEN_SYNC_CONFIG_PCB = 8670;
static const uint64_t IDX_CEN_PHASE_SHADOW_PCB = 8671;
static const uint64_t IDX_CEN_OPCG_REG0_PCB = 8672;
static const uint64_t IDX_CEN_OPCG_REG1_PCB = 8673;
static const uint64_t IDX_CEN_OPCG_REG2_PCB = 8674;
static const uint64_t IDX_CEN_OPCG_REG3_PCB = 8675;
static const uint64_t IDX_CEN_CLK_REGION_PCB = 8676;
static const uint64_t IDX_CEN_SCANSELQ_PCB = 8677;
static const uint64_t IDX_CEN_CLOCK_STAT_PCB = 8678;
static const uint64_t IDX_CEN_ERROR_STATUS_PCB = 8679;
static const uint64_t IDX_CEN_CC_PROTECT_MODE_REG_PCB = 8680;
static const uint64_t IDX_CEN_CC_ATOMIC_LOCK_REG_PCB = 8681;
static const uint64_t IDX_CEN_GP0_PCB = 8682;
static const uint64_t IDX_CEN_GP0_PCB1 = 8683;
static const uint64_t IDX_CEN_GP0_PCB2 = 8684;
static const uint64_t IDX_CEN_GP1_PCB = 8685;
static const uint64_t IDX_CEN_GP2_PCB = 8686;
static const uint64_t IDX_CEN_GP4_PCB = 8687;
static const uint64_t IDX_CEN_GP4_PCB1 = 8688;
static const uint64_t IDX_CEN_GP4_PCB2 = 8689;
static const uint64_t IDX_CEN_GPIO_PROTECT_MODE_REG_PCB = 8690;
static const uint64_t IDX_CEN_GPIO_ATOMIC_LOCK_REG_PCB = 8691;
static const uint64_t IDX_CEN_XFIR_PCB = 8692;
static const uint64_t IDX_CEN_RFIR_PCB = 8693;
static const uint64_t IDX_CEN_FIR_MASK_PCB = 8694;
static const uint64_t IDX_CEN_LOCAL_FIR_PCB = 8695;
static const uint64_t IDX_CEN_LOCAL_FIR_PCB1 = 8696;
static const uint64_t IDX_CEN_LOCAL_FIR_PCB2 = 8697;
static const uint64_t IDX_CEN_DBG_MODE_REG = 8698;
static const uint64_t IDX_CEN_DBG_INST1_COND_REG_1 = 8699;
static const uint64_t IDX_CEN_DBG_INST1_COND_REG_2 = 8700;
static const uint64_t IDX_CEN_DBG_INST2_COND_REG_1 = 8701;
static const uint64_t IDX_CEN_DBG_INST2_COND_REG_2 = 8702;
static const uint64_t IDX_CEN_DBG_TRACE_REG_0 = 8703;
static const uint64_t IDX_CEN_DBG_TRACE_REG_1 = 8704;
static const uint64_t IDX_CEN_DBG_TRACE_MODE_REG_2 = 8705;
static const uint64_t IDX_CEN_DTS_RESULT0_PCB = 8706;
static const uint64_t IDX_CEN_DTS_TRC_RESULT_PCB = 8707;
static const uint64_t IDX_CEN_ENC_CPM_RESULT0_PCB = 8708;
static const uint64_t IDX_CEN_VOLT_READ0_PCB = 8709;
static const uint64_t IDX_CEN_THERM_MODE_REG_PCB = 8710;
static const uint64_t IDX_CEN_SKITTER_MODE_REG_PCB = 8711;
static const uint64_t IDX_CEN_SKITTER_CLKSRC_REG_PCB = 8712;
static const uint64_t IDX_CEN_INJECT_REG_PCB = 8713;
static const uint64_t IDX_CEN_CONTROL_REG_PCB = 8714;
static const uint64_t IDX_CEN_ERR_STATUS_REG_PCB = 8715;
static const uint64_t IDX_CEN_SKITTER_FORCE_REG_PCB = 8716;
static const uint64_t IDX_CEN_VOLT_MODE_REG_PCB = 8717;
static const uint64_t IDX_CEN_SKITTER_DATA0_PCB = 8718;
static const uint64_t IDX_CEN_SKITTER_DATA1_PCB = 8719;
static const uint64_t IDX_CEN_SKITTER_DATA2_PCB = 8720;
static const uint64_t IDX_CEN_TIMESTAMP_COUNTER_READ_PCB = 8721;
static const uint64_t IDX_CEN_SPATTN_PCB = 8722;
static const uint64_t IDX_CEN_SPATTN_PCB1 = 8723;
static const uint64_t IDX_CEN_SPATTN_PCB2 = 8724;
static const uint64_t IDX_CEN_SPA_MASK_PCB = 8725;
static const uint64_t IDX_CEN_MODE_REG_PCB = 8726;
static const uint64_t IDX_CEN_LOCAL_FIR_ACTION0_PCB = 8727;
static const uint64_t IDX_CEN_LOCAL_FIR_ACTION1_PCB = 8728;
static const uint64_t IDX_CEN_LOCAL_FIR_MASK_PCB = 8729;
static const uint64_t IDX_CEN_LOCAL_FIR_MASK_PCB1 = 8730;
static const uint64_t IDX_CEN_LOCAL_FIR_MASK_PCB2 = 8731;
static const uint64_t IDX_CEN_PSCOM_MODE_REG_PCB = 8732;
static const uint64_t IDX_CEN_PSCOM_STATUS_ERROR_REG_PCB = 8733;
static const uint64_t IDX_CEN_PSCOM_ERROR_MASK_PCB = 8734;
static const uint64_t IDX_CEN_ADDR_TRAP_REG_PCB = 8735;
static const uint64_t IDX_CEN_DEBUG_STATUS_REG_PCB = 8736;
static const uint64_t IDX_CEN_PSCOM_WRITE_PROTECT_REG_PCB = 8737;
static const uint64_t IDX_CEN_ATOMIC_LOCK_REG_PCB = 8738;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_TRCTRL_CONFIG = 8739;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_0 = 8740;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_1 = 8741;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_2 = 8742;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_3 = 8743;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_4 = 8744;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_5 = 8745;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_TRDATA_CONFIG_9 = 8746;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_HI_DATA_REG_ROX = 8747;
static const uint64_t IDX_CEN_TRA_PERVTRA_TRACE_LO_DATA_REG_ROX = 8748;
static const uint64_t IDX_CEN_FMU_MODE_REG_PCB = 8749;
static const uint64_t IDX_CEN_FMU_OSC_CNTR1_REG_PCB = 8750;
static const uint64_t IDX_CEN_FMU_PULSE_GEN_REG_PCB = 8751;
static const uint64_t IDX_CEN_FMU_OSC_CNTR2_REG_PCB = 8752;
static const uint64_t IDX_CEN_FMU_FORCE_OP_REG_PCB = 8753;
static const uint64_t IDX_CEN_HOST_MASK_REG_PCB = 8754;
static const uint64_t IDX_CEN_ERROR_STATUS_REG_PCB = 8755;
static const uint64_t IDX_CEN_OSCERR_HOLD_PCB = 8756;
static const uint64_t IDX_CEN_OSCERR_MASK_PCB = 8757;
static const uint64_t IDX_CEN_OSCERR_MCODE_PCB = 8758;
static const uint64_t IDX_CEN_INTERRUPT1_REG_PCB = 8759;
static const uint64_t IDX_CEN_INTERRUPT1_REG_PCB1 = 8760;
static const uint64_t IDX_CEN_INTERRUPT1_REG_PCB2 = 8761;
static const uint64_t IDX_CEN_INTERRUPT2_REG_PCB = 8762;
static const uint64_t IDX_CEN_INTERRUPT2_REG_PCB1 = 8763;
static const uint64_t IDX_CEN_INTERRUPT2_REG_PCB2 = 8764;
static const uint64_t IDX_CEN_INTERRUPT3_REG_PCB = 8765;
static const uint64_t IDX_CEN_INTERRUPT3_REG_PCB1 = 8766;
static const uint64_t IDX_CEN_INTERRUPT3_REG_PCB2 = 8767;
static const uint64_t IDX_CEN_INTERRUPT4_REG_PCB = 8768;
static const uint64_t IDX_CEN_INTERRUPT4_REG_PCB1 = 8769;
static const uint64_t IDX_CEN_INTERRUPT4_REG_PCB2 = 8770;
static const uint64_t IDX_CEN_INTERRUPT_TYPE_MASK_REG_PCB = 8771;
static const uint64_t IDX_CEN_INTERRUPT_TYPE_MASK_REG_PCB1 = 8772;
static const uint64_t IDX_CEN_INTERRUPT_TYPE_MASK_REG_PCB2 = 8773;
static const uint64_t IDX_CEN_INTERRUPT_CONF_REG_PCB = 8774;
static const uint64_t IDX_CEN_INTERRUPT_CONF_REG_PCB1 = 8775;
static const uint64_t IDX_CEN_INTERRUPT_CONF_REG_PCB2 = 8776;
static const uint64_t IDX_CEN_INTERRUPT_HOLD_REG_PCB = 8777;
static const uint64_t IDX_CEN_PCBSLPERV_PRIMARY_ADDRESS_REG_PCB = 8778;
static const uint64_t IDX_CEN_PCBSLPERV_MULTICAST_GROUP_1_PCB = 8779;
static const uint64_t IDX_CEN_PCBSLPERV_MULTICAST_GROUP_2_PCB = 8780;
static const uint64_t IDX_CEN_PCBSLPERV_MULTICAST_GROUP_3_PCB = 8781;
static const uint64_t IDX_CEN_PCBSLPERV_MULTICAST_GROUP_4_PCB = 8782;
static const uint64_t IDX_CEN_PCBSLPERV_TIMEOUT_REG_PCB = 8783;
static const uint64_t IDX_CEN_PCBSLPERV_ASSIST_INTERRUPT_REG_PCB = 8784;
static const uint64_t IDX_CEN_PCBSLPERV_ERROR_REG_PCB = 8785;
static const uint64_t IDX_CEN_PCBSLPERV_GP3_REG_PCB = 8786;
static const uint64_t IDX_CEN_PCBSLPERV_GP3_REG_PCB1 = 8787;
static const uint64_t IDX_CEN_PCBSLPERV_GP3_REG_PCB2 = 8788;
static const uint64_t IDX_CEN_PCBSLPERV_CLK_ADJ_REG_PCB = 8789;
static const uint64_t IDX_CEN_PCBSLPERV_CLK_ADJ_SET_PCB = 8790;
static const uint64_t IDX_CEN_PCBSLPERV_VITAL_SCAN_OUT_PCB = 8791;
static const uint64_t IDX_CEN_PCBSLPERV_HANG_PULSE_0_REG_PCB = 8792;
static const uint64_t IDX_CEN_PCBSLPERV_HANG_PULSE_1_REG_PCB = 8793;
static const uint64_t IDX_CEN_PCBSLPERV_HANG_PULSE_2_REG_PCB = 8794;
static const uint64_t IDX_CEN_PCBSLPERV_HANG_PULSE_3_REG_PCB = 8795;
static const uint64_t IDX_CEN_PCBSLPERV_HANG_PULSE_4_REG_PCB = 8796;
static const uint64_t IDX_CEN_PCBSLPERV_HANG_PULSE_5_REG_PCB = 8797;
static const uint64_t IDX_CEN_PCBSLPERV_HANG_PULSE_6_REG_PCB = 8798;
static const uint64_t IDX_CEN_PCBSLPERV_PRE_COUNTER_REG_PCB = 8799;
static const uint64_t IDX_CEN_PCBSLPERV_SLAVE_CONFIG_REG_PCB = 8800;
static const uint64_t IDX_CEN_PCBSLPERV_HEARTBEAT_REG_PCB = 8801;
static const uint64_t IDX_CEN_PCBSLPERV_PLL_LOCK_REG_PCB = 8802;
static const uint64_t IDX_CEN_PCBSLPERV_ATTN_INTERRUPT_REG_PCB = 8803;
static const uint64_t IDX_CEN_PCBSLPERV_RECOV_INTERRUPT_REG_PCB = 8804;
static const uint64_t IDX_CEN_PCBSLPERV_XSTOP_INTERRUPT_REG_PCB = 8805;
static const uint64_t IDX_CEN_PCBSLPERV_PROTECT_MODE_REG_PCB = 8806;
static const uint64_t IDX_CEN_PCBSLPERV_ATOMIC_LOCK_REG_PCB = 8807;
static const uint64_t IDX_CEN_PCBSLNEST_PRIMARY_ADDRESS_REG_PCB = 8808;
static const uint64_t IDX_CEN_PCBSLNEST_MULTICAST_GROUP_1_PCB = 8809;
static const uint64_t IDX_CEN_PCBSLNEST_MULTICAST_GROUP_2_PCB = 8810;
static const uint64_t IDX_CEN_PCBSLNEST_MULTICAST_GROUP_3_PCB = 8811;
static const uint64_t IDX_CEN_PCBSLNEST_MULTICAST_GROUP_4_PCB = 8812;
static const uint64_t IDX_CEN_PCBSLNEST_TIMEOUT_REG_PCB = 8813;
static const uint64_t IDX_CEN_PCBSLNEST_ASSIST_INTERRUPT_REG_PCB = 8814;
static const uint64_t IDX_CEN_PCBSLNEST_ERROR_REG_PCB = 8815;
static const uint64_t IDX_CEN_PCBSLNEST_GP3_REG_PCB = 8816;
static const uint64_t IDX_CEN_PCBSLNEST_GP3_REG_PCB1 = 8817;
static const uint64_t IDX_CEN_PCBSLNEST_GP3_REG_PCB2 = 8818;
static const uint64_t IDX_CEN_PCBSLNEST_CLK_ADJ_REG_PCB = 8819;
static const uint64_t IDX_CEN_PCBSLNEST_CLK_ADJ_SET_PCB = 8820;
static const uint64_t IDX_CEN_PCBSLNEST_VITAL_SCAN_OUT_PCB = 8821;
static const uint64_t IDX_CEN_PCBSLNEST_HANG_PULSE_0_REG_PCB = 8822;
static const uint64_t IDX_CEN_PCBSLNEST_HANG_PULSE_1_REG_PCB = 8823;
static const uint64_t IDX_CEN_PCBSLNEST_HANG_PULSE_2_REG_PCB = 8824;
static const uint64_t IDX_CEN_PCBSLNEST_HANG_PULSE_3_REG_PCB = 8825;
static const uint64_t IDX_CEN_PCBSLNEST_HANG_PULSE_4_REG_PCB = 8826;
static const uint64_t IDX_CEN_PCBSLNEST_HANG_PULSE_5_REG_PCB = 8827;
static const uint64_t IDX_CEN_PCBSLNEST_HANG_PULSE_6_REG_PCB = 8828;
static const uint64_t IDX_CEN_PCBSLNEST_PRE_COUNTER_REG_PCB = 8829;
static const uint64_t IDX_CEN_PCBSLNEST_SLAVE_CONFIG_REG_PCB = 8830;
static const uint64_t IDX_CEN_PCBSLNEST_HEARTBEAT_REG_PCB = 8831;
static const uint64_t IDX_CEN_PCBSLNEST_PLL_LOCK_REG_PCB = 8832;
static const uint64_t IDX_CEN_PCBSLNEST_ATTN_INTERRUPT_REG_PCB = 8833;
static const uint64_t IDX_CEN_PCBSLNEST_RECOV_INTERRUPT_REG_PCB = 8834;
static const uint64_t IDX_CEN_PCBSLNEST_XSTOP_INTERRUPT_REG_PCB = 8835;
static const uint64_t IDX_CEN_PCBSLNEST_PROTECT_MODE_REG_PCB = 8836;
static const uint64_t IDX_CEN_PCBSLNEST_ATOMIC_LOCK_REG_PCB = 8837;
static const uint64_t IDX_CEN_PCBSLMEM_PRIMARY_ADDRESS_REG_PCB = 8838;
static const uint64_t IDX_CEN_PCBSLMEM_MULTICAST_GROUP_1_PCB = 8839;
static const uint64_t IDX_CEN_PCBSLMEM_MULTICAST_GROUP_2_PCB = 8840;
static const uint64_t IDX_CEN_PCBSLMEM_MULTICAST_GROUP_3_PCB = 8841;
static const uint64_t IDX_CEN_PCBSLMEM_MULTICAST_GROUP_4_PCB = 8842;
static const uint64_t IDX_CEN_PCBSLMEM_TIMEOUT_REG_PCB = 8843;
static const uint64_t IDX_CEN_PCBSLMEM_ASSIST_INTERRUPT_REG_PCB = 8844;
static const uint64_t IDX_CEN_PCBSLMEM_ERROR_REG_PCB = 8845;
static const uint64_t IDX_CEN_PCBSLMEM_GP3_REG_PCB = 8846;
static const uint64_t IDX_CEN_PCBSLMEM_GP3_REG_PCB1 = 8847;
static const uint64_t IDX_CEN_PCBSLMEM_GP3_REG_PCB2 = 8848;
static const uint64_t IDX_CEN_PCBSLMEM_CLK_ADJ_REG_PCB = 8849;
static const uint64_t IDX_CEN_PCBSLMEM_CLK_ADJ_SET_PCB = 8850;
static const uint64_t IDX_CEN_PCBSLMEM_VITAL_SCAN_OUT_PCB = 8851;
static const uint64_t IDX_CEN_PCBSLMEM_HANG_PULSE_0_REG_PCB = 8852;
static const uint64_t IDX_CEN_PCBSLMEM_HANG_PULSE_1_REG_PCB = 8853;
static const uint64_t IDX_CEN_PCBSLMEM_HANG_PULSE_2_REG_PCB = 8854;
static const uint64_t IDX_CEN_PCBSLMEM_HANG_PULSE_3_REG_PCB = 8855;
static const uint64_t IDX_CEN_PCBSLMEM_HANG_PULSE_4_REG_PCB = 8856;
static const uint64_t IDX_CEN_PCBSLMEM_HANG_PULSE_5_REG_PCB = 8857;
static const uint64_t IDX_CEN_PCBSLMEM_HANG_PULSE_6_REG_PCB = 8858;
static const uint64_t IDX_CEN_PCBSLMEM_PRE_COUNTER_REG_PCB = 8859;
static const uint64_t IDX_CEN_PCBSLMEM_SLAVE_CONFIG_REG_PCB = 8860;
static const uint64_t IDX_CEN_PCBSLMEM_HEARTBEAT_REG_PCB = 8861;
static const uint64_t IDX_CEN_PCBSLMEM_PLL_LOCK_REG_PCB = 8862;
static const uint64_t IDX_CEN_PCBSLMEM_ATTN_INTERRUPT_REG_PCB = 8863;
static const uint64_t IDX_CEN_PCBSLMEM_RECOV_INTERRUPT_REG_PCB = 8864;
static const uint64_t IDX_CEN_PCBSLMEM_XSTOP_INTERRUPT_REG_PCB = 8865;
static const uint64_t IDX_CEN_PCBSLMEM_PROTECT_MODE_REG_PCB = 8866;
static const uint64_t IDX_CEN_PCBSLMEM_ATOMIC_LOCK_REG_PCB = 8867;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART0_REGISTER_RO = 8868;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART1_REGISTER_RO = 8869;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART2_REGISTER_RO = 8870;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART3_REGISTER_RO = 8871;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART4_REGISTER_RO = 8872;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART5_REGISTER_RO = 8873;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART6_REGISTER_RO = 8874;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART7_REGISTER_RO = 8875;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART8_REGISTER_RO = 8876;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART9_REGISTER_RO = 8877;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART10_REGISTER_RO = 8878;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART11_REGISTER_RO = 8879;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART12_REGISTER_RO = 8880;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART13_REGISTER_RO = 8881;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART14_REGISTER_RO = 8882;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART15_REGISTER_RO = 8883;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART16_REGISTER_RO = 8884;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART17_REGISTER_RO = 8885;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART18_REGISTER_RO = 8886;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART19_REGISTER_RO = 8887;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART20_REGISTER_RO = 8888;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART21_REGISTER_RO = 8889;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART22_REGISTER_RO = 8890;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART23_REGISTER_RO = 8891;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART24_REGISTER_RO = 8892;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART25_REGISTER_RO = 8893;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART26_REGISTER_RO = 8894;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART27_REGISTER_RO = 8895;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART28_REGISTER_RO = 8896;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART29_REGISTER_RO = 8897;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART30_REGISTER_RO = 8898;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART31_REGISTER_RO = 8899;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART32_REGISTER_RO = 8900;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART33_REGISTER_RO = 8901;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART34_REGISTER_RO = 8902;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART35_REGISTER_RO = 8903;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART36_REGISTER_RO = 8904;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART37_REGISTER_RO = 8905;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART38_REGISTER_RO = 8906;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART39_REGISTER_RO = 8907;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART40_REGISTER_RO = 8908;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART41_REGISTER_RO = 8909;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART42_REGISTER_RO = 8910;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART43_REGISTER_RO = 8911;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART44_REGISTER_RO = 8912;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART45_REGISTER_RO = 8913;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART46_REGISTER_RO = 8914;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART47_REGISTER_RO = 8915;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART48_REGISTER_RO = 8916;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART49_REGISTER_RO = 8917;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART50_REGISTER_RO = 8918;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART51_REGISTER_RO = 8919;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART52_REGISTER_RO = 8920;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART53_REGISTER_RO = 8921;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART54_REGISTER_RO = 8922;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART55_REGISTER_RO = 8923;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART56_REGISTER_RO = 8924;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART57_REGISTER_RO = 8925;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART58_REGISTER_RO = 8926;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART59_REGISTER_RO = 8927;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART60_REGISTER_RO = 8928;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART61_REGISTER_RO = 8929;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART62_REGISTER_RO = 8930;
static const uint64_t IDX_CEN_OTPROM0_ECID_PART63_REGISTER_RO = 8931;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART0_REGISTER_RO = 8932;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART1_REGISTER_RO = 8933;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART2_REGISTER_RO = 8934;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART3_REGISTER_RO = 8935;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART4_REGISTER_RO = 8936;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART5_REGISTER_RO = 8937;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART6_REGISTER_RO = 8938;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART7_REGISTER_RO = 8939;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART8_REGISTER_RO = 8940;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART9_REGISTER_RO = 8941;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART10_REGISTER_RO = 8942;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART11_REGISTER_RO = 8943;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART12_REGISTER_RO = 8944;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART13_REGISTER_RO = 8945;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART14_REGISTER_RO = 8946;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART15_REGISTER_RO = 8947;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART16_REGISTER_RO = 8948;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART17_REGISTER_RO = 8949;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART18_REGISTER_RO = 8950;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART19_REGISTER_RO = 8951;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART20_REGISTER_RO = 8952;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART21_REGISTER_RO = 8953;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART22_REGISTER_RO = 8954;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART23_REGISTER_RO = 8955;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART24_REGISTER_RO = 8956;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART25_REGISTER_RO = 8957;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART26_REGISTER_RO = 8958;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART27_REGISTER_RO = 8959;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART28_REGISTER_RO = 8960;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART29_REGISTER_RO = 8961;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART30_REGISTER_RO = 8962;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART31_REGISTER_RO = 8963;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART32_REGISTER_RO = 8964;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART33_REGISTER_RO = 8965;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART34_REGISTER_RO = 8966;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART35_REGISTER_RO = 8967;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART36_REGISTER_RO = 8968;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART37_REGISTER_RO = 8969;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART38_REGISTER_RO = 8970;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART39_REGISTER_RO = 8971;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART40_REGISTER_RO = 8972;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART41_REGISTER_RO = 8973;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART42_REGISTER_RO = 8974;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART43_REGISTER_RO = 8975;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART44_REGISTER_RO = 8976;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART45_REGISTER_RO = 8977;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART46_REGISTER_RO = 8978;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART47_REGISTER_RO = 8979;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART48_REGISTER_RO = 8980;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART49_REGISTER_RO = 8981;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART50_REGISTER_RO = 8982;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART51_REGISTER_RO = 8983;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART52_REGISTER_RO = 8984;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART53_REGISTER_RO = 8985;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART54_REGISTER_RO = 8986;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART55_REGISTER_RO = 8987;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART56_REGISTER_RO = 8988;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART57_REGISTER_RO = 8989;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART58_REGISTER_RO = 8990;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART59_REGISTER_RO = 8991;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART60_REGISTER_RO = 8992;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART61_REGISTER_RO = 8993;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART62_REGISTER_RO = 8994;
static const uint64_t IDX_CEN_OTPROM1_ECID_PART63_REGISTER_RO = 8995;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART0_REGISTER_RO = 8996;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART1_REGISTER_RO = 8997;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART2_REGISTER_RO = 8998;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART3_REGISTER_RO = 8999;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART4_REGISTER_RO = 9000;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART5_REGISTER_RO = 9001;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART6_REGISTER_RO = 9002;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART7_REGISTER_RO = 9003;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART8_REGISTER_RO = 9004;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART9_REGISTER_RO = 9005;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART10_REGISTER_RO = 9006;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART11_REGISTER_RO = 9007;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART12_REGISTER_RO = 9008;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART13_REGISTER_RO = 9009;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART14_REGISTER_RO = 9010;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART15_REGISTER_RO = 9011;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART16_REGISTER_RO = 9012;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART17_REGISTER_RO = 9013;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART18_REGISTER_RO = 9014;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART19_REGISTER_RO = 9015;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART20_REGISTER_RO = 9016;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART21_REGISTER_RO = 9017;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART22_REGISTER_RO = 9018;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART23_REGISTER_RO = 9019;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART24_REGISTER_RO = 9020;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART25_REGISTER_RO = 9021;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART26_REGISTER_RO = 9022;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART27_REGISTER_RO = 9023;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART28_REGISTER_RO = 9024;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART29_REGISTER_RO = 9025;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART30_REGISTER_RO = 9026;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART31_REGISTER_RO = 9027;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART32_REGISTER_RO = 9028;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART33_REGISTER_RO = 9029;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART34_REGISTER_RO = 9030;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART35_REGISTER_RO = 9031;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART36_REGISTER_RO = 9032;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART37_REGISTER_RO = 9033;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART38_REGISTER_RO = 9034;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART39_REGISTER_RO = 9035;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART40_REGISTER_RO = 9036;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART41_REGISTER_RO = 9037;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART42_REGISTER_RO = 9038;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART43_REGISTER_RO = 9039;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART44_REGISTER_RO = 9040;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART45_REGISTER_RO = 9041;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART46_REGISTER_RO = 9042;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART47_REGISTER_RO = 9043;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART48_REGISTER_RO = 9044;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART49_REGISTER_RO = 9045;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART50_REGISTER_RO = 9046;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART51_REGISTER_RO = 9047;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART52_REGISTER_RO = 9048;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART53_REGISTER_RO = 9049;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART54_REGISTER_RO = 9050;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART55_REGISTER_RO = 9051;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART56_REGISTER_RO = 9052;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART57_REGISTER_RO = 9053;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART58_REGISTER_RO = 9054;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART59_REGISTER_RO = 9055;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART60_REGISTER_RO = 9056;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART61_REGISTER_RO = 9057;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART62_REGISTER_RO = 9058;
static const uint64_t IDX_CEN_OTPROM2_ECID_PART63_REGISTER_RO = 9059;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART0_REGISTER_RO = 9060;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART1_REGISTER_RO = 9061;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART2_REGISTER_RO = 9062;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART3_REGISTER_RO = 9063;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART4_REGISTER_RO = 9064;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART5_REGISTER_RO = 9065;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART6_REGISTER_RO = 9066;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART7_REGISTER_RO = 9067;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART8_REGISTER_RO = 9068;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART9_REGISTER_RO = 9069;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART10_REGISTER_RO = 9070;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART11_REGISTER_RO = 9071;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART12_REGISTER_RO = 9072;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART13_REGISTER_RO = 9073;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART14_REGISTER_RO = 9074;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART15_REGISTER_RO = 9075;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART16_REGISTER_RO = 9076;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART17_REGISTER_RO = 9077;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART18_REGISTER_RO = 9078;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART19_REGISTER_RO = 9079;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART20_REGISTER_RO = 9080;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART21_REGISTER_RO = 9081;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART22_REGISTER_RO = 9082;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART23_REGISTER_RO = 9083;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART24_REGISTER_RO = 9084;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART25_REGISTER_RO = 9085;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART26_REGISTER_RO = 9086;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART27_REGISTER_RO = 9087;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART28_REGISTER_RO = 9088;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART29_REGISTER_RO = 9089;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART30_REGISTER_RO = 9090;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART31_REGISTER_RO = 9091;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART32_REGISTER_RO = 9092;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART33_REGISTER_RO = 9093;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART34_REGISTER_RO = 9094;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART35_REGISTER_RO = 9095;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART36_REGISTER_RO = 9096;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART37_REGISTER_RO = 9097;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART38_REGISTER_RO = 9098;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART39_REGISTER_RO = 9099;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART40_REGISTER_RO = 9100;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART41_REGISTER_RO = 9101;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART42_REGISTER_RO = 9102;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART43_REGISTER_RO = 9103;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART44_REGISTER_RO = 9104;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART45_REGISTER_RO = 9105;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART46_REGISTER_RO = 9106;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART47_REGISTER_RO = 9107;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART48_REGISTER_RO = 9108;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART49_REGISTER_RO = 9109;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART50_REGISTER_RO = 9110;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART51_REGISTER_RO = 9111;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART52_REGISTER_RO = 9112;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART53_REGISTER_RO = 9113;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART54_REGISTER_RO = 9114;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART55_REGISTER_RO = 9115;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART56_REGISTER_RO = 9116;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART57_REGISTER_RO = 9117;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART58_REGISTER_RO = 9118;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART59_REGISTER_RO = 9119;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART60_REGISTER_RO = 9120;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART61_REGISTER_RO = 9121;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART62_REGISTER_RO = 9122;
static const uint64_t IDX_CEN_OTPROM3_ECID_PART63_REGISTER_RO = 9123;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART0_REGISTER_RO = 9124;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART1_REGISTER_RO = 9125;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART2_REGISTER_RO = 9126;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART3_REGISTER_RO = 9127;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART4_REGISTER_RO = 9128;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART5_REGISTER_RO = 9129;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART6_REGISTER_RO = 9130;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART7_REGISTER_RO = 9131;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART8_REGISTER_RO = 9132;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART9_REGISTER_RO = 9133;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART10_REGISTER_RO = 9134;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART11_REGISTER_RO = 9135;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART12_REGISTER_RO = 9136;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART13_REGISTER_RO = 9137;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART14_REGISTER_RO = 9138;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART15_REGISTER_RO = 9139;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART16_REGISTER_RO = 9140;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART17_REGISTER_RO = 9141;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART18_REGISTER_RO = 9142;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART19_REGISTER_RO = 9143;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART20_REGISTER_RO = 9144;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART21_REGISTER_RO = 9145;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART22_REGISTER_RO = 9146;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART23_REGISTER_RO = 9147;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART24_REGISTER_RO = 9148;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART25_REGISTER_RO = 9149;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART26_REGISTER_RO = 9150;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART27_REGISTER_RO = 9151;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART28_REGISTER_RO = 9152;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART29_REGISTER_RO = 9153;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART30_REGISTER_RO = 9154;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART31_REGISTER_RO = 9155;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART32_REGISTER_RO = 9156;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART33_REGISTER_RO = 9157;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART34_REGISTER_RO = 9158;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART35_REGISTER_RO = 9159;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART36_REGISTER_RO = 9160;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART37_REGISTER_RO = 9161;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART38_REGISTER_RO = 9162;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART39_REGISTER_RO = 9163;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART40_REGISTER_RO = 9164;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART41_REGISTER_RO = 9165;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART42_REGISTER_RO = 9166;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART43_REGISTER_RO = 9167;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART44_REGISTER_RO = 9168;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART45_REGISTER_RO = 9169;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART46_REGISTER_RO = 9170;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART47_REGISTER_RO = 9171;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART48_REGISTER_RO = 9172;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART49_REGISTER_RO = 9173;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART50_REGISTER_RO = 9174;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART51_REGISTER_RO = 9175;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART52_REGISTER_RO = 9176;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART53_REGISTER_RO = 9177;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART54_REGISTER_RO = 9178;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART55_REGISTER_RO = 9179;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART56_REGISTER_RO = 9180;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART57_REGISTER_RO = 9181;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART58_REGISTER_RO = 9182;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART59_REGISTER_RO = 9183;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART60_REGISTER_RO = 9184;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART61_REGISTER_RO = 9185;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART62_REGISTER_RO = 9186;
static const uint64_t IDX_CEN_OTPROM4_ECID_PART63_REGISTER_RO = 9187;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART0_REGISTER_RO = 9188;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART1_REGISTER_RO = 9189;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART2_REGISTER_RO = 9190;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART3_REGISTER_RO = 9191;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART4_REGISTER_RO = 9192;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART5_REGISTER_RO = 9193;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART6_REGISTER_RO = 9194;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART7_REGISTER_RO = 9195;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART8_REGISTER_RO = 9196;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART9_REGISTER_RO = 9197;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART10_REGISTER_RO = 9198;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART11_REGISTER_RO = 9199;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART12_REGISTER_RO = 9200;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART13_REGISTER_RO = 9201;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART14_REGISTER_RO = 9202;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART15_REGISTER_RO = 9203;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART16_REGISTER_RO = 9204;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART17_REGISTER_RO = 9205;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART18_REGISTER_RO = 9206;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART19_REGISTER_RO = 9207;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART20_REGISTER_RO = 9208;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART21_REGISTER_RO = 9209;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART22_REGISTER_RO = 9210;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART23_REGISTER_RO = 9211;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART24_REGISTER_RO = 9212;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART25_REGISTER_RO = 9213;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART26_REGISTER_RO = 9214;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART27_REGISTER_RO = 9215;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART28_REGISTER_RO = 9216;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART29_REGISTER_RO = 9217;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART30_REGISTER_RO = 9218;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART31_REGISTER_RO = 9219;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART32_REGISTER_RO = 9220;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART33_REGISTER_RO = 9221;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART34_REGISTER_RO = 9222;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART35_REGISTER_RO = 9223;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART36_REGISTER_RO = 9224;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART37_REGISTER_RO = 9225;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART38_REGISTER_RO = 9226;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART39_REGISTER_RO = 9227;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART40_REGISTER_RO = 9228;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART41_REGISTER_RO = 9229;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART42_REGISTER_RO = 9230;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART43_REGISTER_RO = 9231;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART44_REGISTER_RO = 9232;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART45_REGISTER_RO = 9233;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART46_REGISTER_RO = 9234;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART47_REGISTER_RO = 9235;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART48_REGISTER_RO = 9236;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART49_REGISTER_RO = 9237;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART50_REGISTER_RO = 9238;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART51_REGISTER_RO = 9239;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART52_REGISTER_RO = 9240;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART53_REGISTER_RO = 9241;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART54_REGISTER_RO = 9242;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART55_REGISTER_RO = 9243;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART56_REGISTER_RO = 9244;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART57_REGISTER_RO = 9245;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART58_REGISTER_RO = 9246;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART59_REGISTER_RO = 9247;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART60_REGISTER_RO = 9248;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART61_REGISTER_RO = 9249;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART62_REGISTER_RO = 9250;
static const uint64_t IDX_CEN_OTPROM5_ECID_PART63_REGISTER_RO = 9251;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART0_REGISTER_RO = 9252;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART1_REGISTER_RO = 9253;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART2_REGISTER_RO = 9254;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART3_REGISTER_RO = 9255;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART4_REGISTER_RO = 9256;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART5_REGISTER_RO = 9257;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART6_REGISTER_RO = 9258;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART7_REGISTER_RO = 9259;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART8_REGISTER_RO = 9260;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART9_REGISTER_RO = 9261;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART10_REGISTER_RO = 9262;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART11_REGISTER_RO = 9263;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART12_REGISTER_RO = 9264;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART13_REGISTER_RO = 9265;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART14_REGISTER_RO = 9266;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART15_REGISTER_RO = 9267;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART16_REGISTER_RO = 9268;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART17_REGISTER_RO = 9269;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART18_REGISTER_RO = 9270;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART19_REGISTER_RO = 9271;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART20_REGISTER_RO = 9272;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART21_REGISTER_RO = 9273;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART22_REGISTER_RO = 9274;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART23_REGISTER_RO = 9275;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART24_REGISTER_RO = 9276;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART25_REGISTER_RO = 9277;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART26_REGISTER_RO = 9278;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART27_REGISTER_RO = 9279;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART28_REGISTER_RO = 9280;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART29_REGISTER_RO = 9281;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART30_REGISTER_RO = 9282;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART31_REGISTER_RO = 9283;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART32_REGISTER_RO = 9284;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART33_REGISTER_RO = 9285;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART34_REGISTER_RO = 9286;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART35_REGISTER_RO = 9287;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART36_REGISTER_RO = 9288;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART37_REGISTER_RO = 9289;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART38_REGISTER_RO = 9290;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART39_REGISTER_RO = 9291;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART40_REGISTER_RO = 9292;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART41_REGISTER_RO = 9293;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART42_REGISTER_RO = 9294;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART43_REGISTER_RO = 9295;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART44_REGISTER_RO = 9296;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART45_REGISTER_RO = 9297;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART46_REGISTER_RO = 9298;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART47_REGISTER_RO = 9299;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART48_REGISTER_RO = 9300;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART49_REGISTER_RO = 9301;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART50_REGISTER_RO = 9302;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART51_REGISTER_RO = 9303;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART52_REGISTER_RO = 9304;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART53_REGISTER_RO = 9305;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART54_REGISTER_RO = 9306;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART55_REGISTER_RO = 9307;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART56_REGISTER_RO = 9308;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART57_REGISTER_RO = 9309;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART58_REGISTER_RO = 9310;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART59_REGISTER_RO = 9311;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART60_REGISTER_RO = 9312;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART61_REGISTER_RO = 9313;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART62_REGISTER_RO = 9314;
static const uint64_t IDX_CEN_OTPROM6_ECID_PART63_REGISTER_RO = 9315;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART0_REGISTER_RO = 9316;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART1_REGISTER_RO = 9317;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART2_REGISTER_RO = 9318;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART3_REGISTER_RO = 9319;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART4_REGISTER_RO = 9320;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART5_REGISTER_RO = 9321;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART6_REGISTER_RO = 9322;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART7_REGISTER_RO = 9323;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART8_REGISTER_RO = 9324;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART9_REGISTER_RO = 9325;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART10_REGISTER_RO = 9326;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART11_REGISTER_RO = 9327;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART12_REGISTER_RO = 9328;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART13_REGISTER_RO = 9329;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART14_REGISTER_RO = 9330;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART15_REGISTER_RO = 9331;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART16_REGISTER_RO = 9332;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART17_REGISTER_RO = 9333;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART18_REGISTER_RO = 9334;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART19_REGISTER_RO = 9335;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART20_REGISTER_RO = 9336;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART21_REGISTER_RO = 9337;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART22_REGISTER_RO = 9338;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART23_REGISTER_RO = 9339;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART24_REGISTER_RO = 9340;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART25_REGISTER_RO = 9341;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART26_REGISTER_RO = 9342;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART27_REGISTER_RO = 9343;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART28_REGISTER_RO = 9344;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART29_REGISTER_RO = 9345;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART30_REGISTER_RO = 9346;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART31_REGISTER_RO = 9347;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART32_REGISTER_RO = 9348;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART33_REGISTER_RO = 9349;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART34_REGISTER_RO = 9350;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART35_REGISTER_RO = 9351;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART36_REGISTER_RO = 9352;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART37_REGISTER_RO = 9353;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART38_REGISTER_RO = 9354;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART39_REGISTER_RO = 9355;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART40_REGISTER_RO = 9356;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART41_REGISTER_RO = 9357;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART42_REGISTER_RO = 9358;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART43_REGISTER_RO = 9359;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART44_REGISTER_RO = 9360;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART45_REGISTER_RO = 9361;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART46_REGISTER_RO = 9362;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART47_REGISTER_RO = 9363;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART48_REGISTER_RO = 9364;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART49_REGISTER_RO = 9365;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART50_REGISTER_RO = 9366;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART51_REGISTER_RO = 9367;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART52_REGISTER_RO = 9368;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART53_REGISTER_RO = 9369;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART54_REGISTER_RO = 9370;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART55_REGISTER_RO = 9371;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART56_REGISTER_RO = 9372;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART57_REGISTER_RO = 9373;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART58_REGISTER_RO = 9374;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART59_REGISTER_RO = 9375;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART60_REGISTER_RO = 9376;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART61_REGISTER_RO = 9377;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART62_REGISTER_RO = 9378;
static const uint64_t IDX_CEN_OTPROM7_ECID_PART63_REGISTER_RO = 9379;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART0_REGISTER_RO = 9380;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART1_REGISTER_RO = 9381;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART2_REGISTER_RO = 9382;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART3_REGISTER_RO = 9383;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART4_REGISTER_RO = 9384;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART5_REGISTER_RO = 9385;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART6_REGISTER_RO = 9386;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART7_REGISTER_RO = 9387;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART8_REGISTER_RO = 9388;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART9_REGISTER_RO = 9389;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART10_REGISTER_RO = 9390;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART11_REGISTER_RO = 9391;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART12_REGISTER_RO = 9392;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART13_REGISTER_RO = 9393;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART14_REGISTER_RO = 9394;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART15_REGISTER_RO = 9395;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART16_REGISTER_RO = 9396;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART17_REGISTER_RO = 9397;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART18_REGISTER_RO = 9398;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART19_REGISTER_RO = 9399;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART20_REGISTER_RO = 9400;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART21_REGISTER_RO = 9401;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART22_REGISTER_RO = 9402;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART23_REGISTER_RO = 9403;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART24_REGISTER_RO = 9404;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART25_REGISTER_RO = 9405;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART26_REGISTER_RO = 9406;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART27_REGISTER_RO = 9407;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART28_REGISTER_RO = 9408;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART29_REGISTER_RO = 9409;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART30_REGISTER_RO = 9410;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART31_REGISTER_RO = 9411;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART32_REGISTER_RO = 9412;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART33_REGISTER_RO = 9413;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART34_REGISTER_RO = 9414;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART35_REGISTER_RO = 9415;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART36_REGISTER_RO = 9416;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART37_REGISTER_RO = 9417;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART38_REGISTER_RO = 9418;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART39_REGISTER_RO = 9419;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART40_REGISTER_RO = 9420;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART41_REGISTER_RO = 9421;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART42_REGISTER_RO = 9422;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART43_REGISTER_RO = 9423;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART44_REGISTER_RO = 9424;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART45_REGISTER_RO = 9425;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART46_REGISTER_RO = 9426;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART47_REGISTER_RO = 9427;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART48_REGISTER_RO = 9428;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART49_REGISTER_RO = 9429;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART50_REGISTER_RO = 9430;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART51_REGISTER_RO = 9431;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART52_REGISTER_RO = 9432;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART53_REGISTER_RO = 9433;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART54_REGISTER_RO = 9434;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART55_REGISTER_RO = 9435;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART56_REGISTER_RO = 9436;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART57_REGISTER_RO = 9437;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART58_REGISTER_RO = 9438;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART59_REGISTER_RO = 9439;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART60_REGISTER_RO = 9440;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART61_REGISTER_RO = 9441;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART62_REGISTER_RO = 9442;
static const uint64_t IDX_CEN_OTPROM8_ECID_PART63_REGISTER_RO = 9443;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART0_REGISTER_RO = 9444;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART1_REGISTER_RO = 9445;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART2_REGISTER_RO = 9446;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART3_REGISTER_RO = 9447;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART4_REGISTER_RO = 9448;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART5_REGISTER_RO = 9449;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART6_REGISTER_RO = 9450;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART7_REGISTER_RO = 9451;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART8_REGISTER_RO = 9452;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART9_REGISTER_RO = 9453;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART10_REGISTER_RO = 9454;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART11_REGISTER_RO = 9455;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART12_REGISTER_RO = 9456;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART13_REGISTER_RO = 9457;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART14_REGISTER_RO = 9458;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART15_REGISTER_RO = 9459;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART16_REGISTER_RO = 9460;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART17_REGISTER_RO = 9461;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART18_REGISTER_RO = 9462;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART19_REGISTER_RO = 9463;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART20_REGISTER_RO = 9464;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART21_REGISTER_RO = 9465;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART22_REGISTER_RO = 9466;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART23_REGISTER_RO = 9467;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART24_REGISTER_RO = 9468;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART25_REGISTER_RO = 9469;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART26_REGISTER_RO = 9470;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART27_REGISTER_RO = 9471;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART28_REGISTER_RO = 9472;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART29_REGISTER_RO = 9473;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART30_REGISTER_RO = 9474;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART31_REGISTER_RO = 9475;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART32_REGISTER_RO = 9476;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART33_REGISTER_RO = 9477;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART34_REGISTER_RO = 9478;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART35_REGISTER_RO = 9479;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART36_REGISTER_RO = 9480;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART37_REGISTER_RO = 9481;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART38_REGISTER_RO = 9482;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART39_REGISTER_RO = 9483;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART40_REGISTER_RO = 9484;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART41_REGISTER_RO = 9485;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART42_REGISTER_RO = 9486;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART43_REGISTER_RO = 9487;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART44_REGISTER_RO = 9488;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART45_REGISTER_RO = 9489;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART46_REGISTER_RO = 9490;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART47_REGISTER_RO = 9491;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART48_REGISTER_RO = 9492;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART49_REGISTER_RO = 9493;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART50_REGISTER_RO = 9494;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART51_REGISTER_RO = 9495;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART52_REGISTER_RO = 9496;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART53_REGISTER_RO = 9497;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART54_REGISTER_RO = 9498;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART55_REGISTER_RO = 9499;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART56_REGISTER_RO = 9500;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART57_REGISTER_RO = 9501;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART58_REGISTER_RO = 9502;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART59_REGISTER_RO = 9503;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART60_REGISTER_RO = 9504;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART61_REGISTER_RO = 9505;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART62_REGISTER_RO = 9506;
static const uint64_t IDX_CEN_OTPROM9_ECID_PART63_REGISTER_RO = 9507;
static const uint64_t IDX_CEN_PLLMEM_PLL_CNTRL0_RO = 9508;
static const uint64_t IDX_CEN_PLLMEM_PLL_CNTRL1_RO = 9509;
static const uint64_t IDX_CEN_PLLMEM_PLL_CNTRL2_RO = 9510;
static const uint64_t IDX_CEN_PLLMEM_PLL_CNTRL_SETUP0_WO = 9511;
static const uint64_t IDX_CEN_PLLMEM_PLL_CNTRL_SETUP1_WO = 9512;
static const uint64_t IDX_CEN_PLLMEM_PLL_CNTRL_SETUP2_WO = 9513;
static const uint64_t IDX_CEN_SCAC_ACTIONMASK = 9514;
static const uint64_t IDX_CEN_SCAC_ADDRMAP = 9515;
static const uint64_t IDX_CEN_SCAC_CONFIG = 9516;
static const uint64_t IDX_CEN_SCAC_CONFIG_WO_OR = 9517;
static const uint64_t IDX_CEN_SCAC_CONFIG_WO_CLEAR = 9518;
static const uint64_t IDX_CEN_SCAC_DATA0_3_ROX = 9519;
static const uint64_t IDX_CEN_SCAC_DATA4_7_ROX = 9520;
static const uint64_t IDX_CEN_SCAC_ENABLE = 9521;
static const uint64_t IDX_CEN_SCAC_ERRRPT_ROX = 9522;
static const uint64_t IDX_CEN_SCAC_FIRACTION0_RO = 9523;
static const uint64_t IDX_CEN_SCAC_FIRACTION1_RO = 9524;
static const uint64_t IDX_CEN_SCAC_FIRMASK = 9525;
static const uint64_t IDX_CEN_SCAC_FIRMASK_WO_AND = 9526;
static const uint64_t IDX_CEN_SCAC_FIRMASK_WO_OR = 9527;
static const uint64_t IDX_CEN_SCAC_FIRWOF = 9528;
static const uint64_t IDX_CEN_SCAC_I2CMCTRL_SCAC_I2CMCTRL = 9529;
static const uint64_t IDX_CEN_SCAC_LFIR = 9530;
static const uint64_t IDX_CEN_SCAC_LFIR_WOX_AND = 9531;
static const uint64_t IDX_CEN_SCAC_LFIR_WOX_OR = 9532;
static const uint64_t IDX_CEN_SCAC_PIBTARGET = 9533;
static const uint64_t IDX_CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_0_ROX = 9534;
static const uint64_t IDX_CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_1_ROX = 9535;
static const uint64_t IDX_CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_2_ROX = 9536;
static const uint64_t IDX_CEN_PIBMST_PIB_EXTENDED_ERROR_REGISTER_3_ROX = 9537;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_ATEST_MUX_SEL_P0 = 9538;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_ATEST_MUX_SEL_P1 = 9539;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_CONFIG0_P0 = 9540;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_CONFIG0_P1 = 9541;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_ERROR_MASK0_P0 = 9542;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_ERROR_MASK0_P1 = 9543;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_ERROR_STATUS0_P0_ROX = 9544;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_ERROR_STATUS0_P1_ROX = 9545;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_FIR_ERR0_P0_ROX = 9546;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_FIR_ERR0_P1_ROX = 9547;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_FIR_ERR1_P0_ROX = 9548;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_APB_FIR_ERR1_P1_ROX = 9549;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P0_ROX = 9550;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_AD32S_PLL_LOCK_STATUS_P1_ROX = 9551;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_BASE_CNTR0_P0_ROX = 9552;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_BASE_CNTR0_P1_ROX = 9553;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_BASE_CNTR1_P0_ROX = 9554;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_BASE_CNTR1_P1_ROX = 9555;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P0 = 9556;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CAL_TIMER_RELOAD_VALUE_P1 = 9557;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CAL_TIMER_P0_ROX = 9558;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CAL_TIMER_P1_ROX = 9559;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CONFIG0_P0 = 9560;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CONFIG0_P1 = 9561;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CONFIG1_P0 = 9562;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CONFIG1_P1 = 9563;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CSID_CFG_P0 = 9564;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_CSID_CFG_P1 = 9565;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P0_ROX = 9566;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_DP18_PLL_LOCK_STATUS_P1_ROX = 9567;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_ERROR_MASK0_P0 = 9568;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_ERROR_MASK0_P1 = 9569;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_ERROR_STATUS0_P0_ROX = 9570;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_ERROR_STATUS0_P1_ROX = 9571;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_CONFIG0_P0 = 9572;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_CONFIG0_P1 = 9573;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_CONFIG1_P0 = 9574;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_CONFIG1_P1 = 9575;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_ERROR_P0_ROX = 9576;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_ERROR_P1_ROX = 9577;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_MASK_P0 = 9578;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_MASK_P1 = 9579;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_STATUS_P0_ROX = 9580;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_INIT_CAL_STATUS_P1_ROX = 9581;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_IO_PVT_FET_CONTROL_P0 = 9582;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_IO_PVT_FET_CONTROL_P1 = 9583;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_IO_PVT_FET_STATUS_P0_ROX = 9584;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_IO_PVT_FET_STATUS_P1_ROX = 9585;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_PRI_RP0_P0 = 9586;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_PRI_RP0_P1 = 9587;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_PRI_RP1_P0 = 9588;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_PRI_RP1_P1 = 9589;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_PRI_RP2_P0 = 9590;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_PRI_RP2_P1 = 9591;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_PRI_RP3_P0 = 9592;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_PRI_RP3_P1 = 9593;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_SEC_RP0_P0 = 9594;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_SEC_RP0_P1 = 9595;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_SEC_RP1_P0 = 9596;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_SEC_RP1_P1 = 9597;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_SEC_RP2_P0 = 9598;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_SEC_RP2_P1 = 9599;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_SEC_RP3_P0 = 9600;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR0_SEC_RP3_P1 = 9601;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_PRI_RP0_P0 = 9602;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_PRI_RP0_P1 = 9603;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_PRI_RP1_P0 = 9604;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_PRI_RP1_P1 = 9605;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_PRI_RP2_P0 = 9606;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_PRI_RP2_P1 = 9607;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_PRI_RP3_P0 = 9608;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_PRI_RP3_P1 = 9609;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_SEC_RP0_P0 = 9610;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_SEC_RP0_P1 = 9611;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_SEC_RP1_P0 = 9612;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_SEC_RP1_P1 = 9613;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_SEC_RP2_P0 = 9614;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_SEC_RP2_P1 = 9615;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_SEC_RP3_P0 = 9616;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR1_SEC_RP3_P1 = 9617;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_PRI_RP0_P0 = 9618;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_PRI_RP0_P1 = 9619;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_PRI_RP1_P0 = 9620;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_PRI_RP1_P1 = 9621;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_PRI_RP2_P0 = 9622;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_PRI_RP2_P1 = 9623;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_PRI_RP3_P0 = 9624;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_PRI_RP3_P1 = 9625;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_SEC_RP0_P0 = 9626;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_SEC_RP0_P1 = 9627;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_SEC_RP1_P0 = 9628;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_SEC_RP1_P1 = 9629;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_SEC_RP2_P0 = 9630;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_SEC_RP2_P1 = 9631;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_SEC_RP3_P0 = 9632;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR2_SEC_RP3_P1 = 9633;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_PRI_RP0_P0 = 9634;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_PRI_RP0_P1 = 9635;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_PRI_RP1_P0 = 9636;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_PRI_RP1_P1 = 9637;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_PRI_RP2_P0 = 9638;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_PRI_RP2_P1 = 9639;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_PRI_RP3_P0 = 9640;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_PRI_RP3_P1 = 9641;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_SEC_RP0_P0 = 9642;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_SEC_RP0_P1 = 9643;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_SEC_RP1_P0 = 9644;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_SEC_RP1_P1 = 9645;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_SEC_RP2_P0 = 9646;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_SEC_RP2_P1 = 9647;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_SEC_RP3_P0 = 9648;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_MR3_SEC_RP3_P1 = 9649;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_PER_CAL_CONFIG_P0 = 9650;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_PER_CAL_CONFIG_P1 = 9651;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_PER_ZCAL_CONFIG_P0 = 9652;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_PER_ZCAL_CONFIG_P1 = 9653;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_POWERDOWN_1_P0 = 9654;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_POWERDOWN_1_P1 = 9655;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_GROUP_EXT_P0 = 9656;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_GROUP_EXT_P1 = 9657;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_GROUP_P0 = 9658;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_GROUP_P1 = 9659;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_PAIR0_P0 = 9660;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_PAIR0_P1 = 9661;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_PAIR1_P0 = 9662;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_PAIR1_P1 = 9663;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_PAIR2_P0 = 9664;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_PAIR2_P1 = 9665;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_PAIR3_P0 = 9666;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RANK_PAIR3_P1 = 9667;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RELOAD_VALUE0_P0 = 9668;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RELOAD_VALUE0_P1 = 9669;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RESETS_P0 = 9670;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_RESETS_P1 = 9671;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_VREF_DRV_CONTROL_P0 = 9672;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_VREF_DRV_CONTROL_P1 = 9673;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P0 = 9674;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_ZCAL_TIMER_RELOAD_VALUE_P1 = 9675;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_ZCAL_TIMER_P0_ROX = 9676;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_PC_ZCAL_TIMER_P1_ROX = 9677;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_CONFIG0_P0 = 9678;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_CONFIG0_P1 = 9679;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_CONFIG1_P0 = 9680;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_CONFIG1_P1 = 9681;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_CONFIG2_P0 = 9682;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_CONFIG2_P1 = 9683;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_CONFIG3_P0 = 9684;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_CONFIG3_P1 = 9685;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_ERROR_MASK0_P0 = 9686;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_ERROR_MASK0_P1 = 9687;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_ERROR_STATUS0_P0_ROX = 9688;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_RC_ERROR_STATUS0_P1_ROX = 9689;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_CONFIG0_P0 = 9690;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_CONFIG0_P1 = 9691;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ERROR_MASK0_P0 = 9692;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ERROR_MASK0_P1 = 9693;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ERROR_STATUS0_P0_ROX = 9694;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ERROR_STATUS0_P1_ROX = 9695;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_LPT_ADDR2_P0 = 9696;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_LPT_ADDR2_P1 = 9697;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_LPT_ADDR3_P0 = 9698;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_LPT_ADDR3_P1 = 9699;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_LPT_ADDR4_P0 = 9700;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_LPT_ADDR4_P1 = 9701;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_MEM_TIMING_PARAM0_P0 = 9702;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_MEM_TIMING_PARAM0_P1 = 9703;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_MEM_TIMING_PARAM1_P0 = 9704;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_MEM_TIMING_PARAM1_P1 = 9705;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_MEM_TIMING_PARAM2_P0 = 9706;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_MEM_TIMING_PARAM2_P1 = 9707;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_DEFAULT_CFG_P0 = 9708;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_DEFAULT_CFG_P1 = 9709;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_RD_CONFIG0_P0 = 9710;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_RD_CONFIG0_P1 = 9711;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_RD_CONFIG1_P0 = 9712;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_RD_CONFIG1_P1 = 9713;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_RD_CONFIG2_P0 = 9714;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_RD_CONFIG2_P1 = 9715;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_RD_CONFIG3_P0 = 9716;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_RD_CONFIG3_P1 = 9717;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_WR_CONFIG0_P0 = 9718;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_WR_CONFIG0_P1 = 9719;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_WR_CONFIG1_P0 = 9720;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_WR_CONFIG1_P1 = 9721;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_WR_CONFIG2_P0 = 9722;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_WR_CONFIG2_P1 = 9723;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_WR_CONFIG3_P0 = 9724;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ODT_WR_CONFIG3_P1 = 9725;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RD_WR_DATA0_P0 = 9726;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RD_WR_DATA0_P1 = 9727;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RD_WR_DATA1_P0 = 9728;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RD_WR_DATA1_P1 = 9729;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR0_P0 = 9730;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR0_P1 = 9731;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR1_P0 = 9732;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR1_P1 = 9733;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR2_P0 = 9734;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR2_P1 = 9735;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR3_P0 = 9736;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR3_P1 = 9737;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR4_P0 = 9738;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_RESERVED_ADDR4_P1 = 9739;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P0 = 9740;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG0_P1 = 9741;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P0 = 9742;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_SEQ_ZQCAL_ENC_RANK_CTL_REG1_P1 = 9743;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_CONFIG0_P0 = 9744;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_CONFIG0_P1 = 9745;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_CONFIG1_P0 = 9746;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_CONFIG1_P1 = 9747;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_CONFIG2_P0 = 9748;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_CONFIG2_P1 = 9749;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_CONFIG3_P0 = 9750;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_CONFIG3_P1 = 9751;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_ERROR_MASK0_P0 = 9752;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_ERROR_MASK0_P1 = 9753;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_ERROR_STATUS0_P0_ROX = 9754;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_WC_ERROR_STATUS0_P1_ROX = 9755;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P0_0 = 9756;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P0_1 = 9757;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P1_0 = 9758;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P1_1 = 9759;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P0_2 = 9760;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P0_3 = 9761;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P1_2 = 9762;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P1_3 = 9763;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P0_4 = 9764;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR0_P1_4 = 9765;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P0_0 = 9766;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P0_1 = 9767;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P1_0 = 9768;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P1_1 = 9769;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P0_2 = 9770;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P0_3 = 9771;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P1_2 = 9772;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P1_3 = 9773;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P0_4 = 9774;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DIR1_P1_4 = 9775;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_0 = 9776;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_1 = 9777;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_0 = 9778;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_1 = 9779;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_2 = 9780;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_3 = 9781;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_2 = 9782;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_3 = 9783;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P0_4 = 9784;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP0_P1_4 = 9785;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_0 = 9786;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_1 = 9787;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_0 = 9788;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_1 = 9789;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_2 = 9790;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_3 = 9791;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_2 = 9792;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_3 = 9793;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P0_4 = 9794;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP1_P1_4 = 9795;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_0 = 9796;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_1 = 9797;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_0 = 9798;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_1 = 9799;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_2 = 9800;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_3 = 9801;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_2 = 9802;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_3 = 9803;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P0_4 = 9804;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP2_P1_4 = 9805;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_0 = 9806;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_1 = 9807;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_0 = 9808;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_1 = 9809;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_2 = 9810;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_3 = 9811;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_2 = 9812;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_3 = 9813;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P0_4 = 9814;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE0_RP3_P1_4 = 9815;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_0 = 9816;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_1 = 9817;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_0 = 9818;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_1 = 9819;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_2 = 9820;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_3 = 9821;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_2 = 9822;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_3 = 9823;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P0_4 = 9824;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP0_P1_4 = 9825;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_0 = 9826;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_1 = 9827;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_0 = 9828;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_1 = 9829;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_2 = 9830;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_3 = 9831;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_2 = 9832;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_3 = 9833;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P0_4 = 9834;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP1_P1_4 = 9835;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_0 = 9836;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_1 = 9837;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_0 = 9838;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_1 = 9839;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_2 = 9840;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_3 = 9841;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_2 = 9842;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_3 = 9843;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P0_4 = 9844;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP2_P1_4 = 9845;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_0 = 9846;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_1 = 9847;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_0 = 9848;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_1 = 9849;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_2 = 9850;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_3 = 9851;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_2 = 9852;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_3 = 9853;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P0_4 = 9854;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_DISABLE1_RP3_P1_4 = 9855;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_0 = 9856;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_1 = 9857;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_0 = 9858;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_1 = 9859;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_2 = 9860;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_3 = 9861;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_2 = 9862;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_3 = 9863;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P0_4 = 9864;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE0_P1_4 = 9865;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_0 = 9866;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_1 = 9867;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_0 = 9868;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_1 = 9869;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_2 = 9870;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_3 = 9871;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_2 = 9872;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_3 = 9873;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P0_4 = 9874;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DATA_BIT_ENABLE1_P1_4 = 9875;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P0_0 = 9876;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P0_1 = 9877;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P1_0 = 9878;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P1_1 = 9879;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P0_2 = 9880;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P0_3 = 9881;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P1_2 = 9882;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P1_3 = 9883;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P0_4 = 9884;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DEBUG_SEL_P1_4 = 9885;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P0_0 = 9886;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P0_1 = 9887;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P1_0 = 9888;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P1_1 = 9889;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P0_2 = 9890;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P0_3 = 9891;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P1_2 = 9892;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P1_3 = 9893;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P0_4 = 9894;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_DIG_EYE_P1_4 = 9895;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P0_0 = 9896;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P0_1 = 9897;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P1_0 = 9898;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P1_1 = 9899;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P0_2 = 9900;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P0_3 = 9901;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P1_2 = 9902;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P1_3 = 9903;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P0_4 = 9904;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DFT_WRAP_STATUS_P1_4 = 9905;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P0_0 = 9906;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P0_1 = 9907;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P1_0 = 9908;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P1_1 = 9909;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P0_2 = 9910;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P0_3 = 9911;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P1_2 = 9912;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P1_3 = 9913;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P0_4 = 9914;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_OFFSET_P1_4 = 9915;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_0 = 9916;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_1 = 9917;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_0 = 9918;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_1 = 9919;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_2 = 9920;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_3 = 9921;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_2 = 9922;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_3 = 9923;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P0_4 = 9924;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR0_P1_4 = 9925;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_0 = 9926;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_1 = 9927;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_0 = 9928;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_1 = 9929;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_2 = 9930;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_3 = 9931;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_2 = 9932;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_3 = 9933;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P0_4 = 9934;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR1_P1_4 = 9935;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_0 = 9936;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_1 = 9937;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_0 = 9938;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_1 = 9939;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_2 = 9940;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_3 = 9941;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_2 = 9942;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_3 = 9943;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P0_4 = 9944;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR2_P1_4 = 9945;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_0 = 9946;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_1 = 9947;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_0 = 9948;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_1 = 9949;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_2 = 9950;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_3 = 9951;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_2 = 9952;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_3 = 9953;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P0_4 = 9954;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR0_RANK_PAIR3_P1_4 = 9955;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_0 = 9956;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_1 = 9957;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_0 = 9958;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_1 = 9959;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_2 = 9960;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_3 = 9961;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_2 = 9962;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_3 = 9963;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P0_4 = 9964;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR0_P1_4 = 9965;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_0 = 9966;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_1 = 9967;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_0 = 9968;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_1 = 9969;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_2 = 9970;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_3 = 9971;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_2 = 9972;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_3 = 9973;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P0_4 = 9974;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR1_P1_4 = 9975;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_0 = 9976;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_1 = 9977;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_0 = 9978;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_1 = 9979;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_2 = 9980;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_3 = 9981;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_2 = 9982;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_3 = 9983;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P0_4 = 9984;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR2_P1_4 = 9985;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_0 = 9986;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_1 = 9987;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_0 = 9988;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_1 = 9989;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_2 = 9990;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_3 = 9991;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_2 = 9992;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_3 = 9993;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P0_4 = 9994;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQSCLK_PR1_RANK_PAIR3_P1_4 = 9995;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_0 = 9996;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_1 = 9997;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_0 = 9998;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_1 = 9999;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_2 = 10000;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_3 = 10001;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_2 = 10002;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_3 = 10003;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P0_4 = 10004;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP0_P1_4 = 10005;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_0 = 10006;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_1 = 10007;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_0 = 10008;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_1 = 10009;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_2 = 10010;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_3 = 10011;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_2 = 10012;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_3 = 10013;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P0_4 = 10014;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP1_P1_4 = 10015;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_0 = 10016;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_1 = 10017;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_0 = 10018;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_1 = 10019;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_2 = 10020;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_3 = 10021;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_2 = 10022;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_3 = 10023;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P0_4 = 10024;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP2_P1_4 = 10025;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_0 = 10026;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_1 = 10027;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_0 = 10028;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_1 = 10029;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_2 = 10030;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_3 = 10031;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_2 = 10032;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_3 = 10033;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P0_4 = 10034;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_GATE_DELAY_RP3_P1_4 = 10035;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_0 = 10036;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_1 = 10037;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_0 = 10038;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_1 = 10039;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_2 = 10040;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_3 = 10041;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_2 = 10042;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_3 = 10043;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P0_4 = 10044;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR0_P1_4 = 10045;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_0 = 10046;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_1 = 10047;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_0 = 10048;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_1 = 10049;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_2 = 10050;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_3 = 10051;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_2 = 10052;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_3 = 10053;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P0_4 = 10054;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR1_P1_4 = 10055;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_0 = 10056;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_1 = 10057;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_0 = 10058;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_1 = 10059;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_2 = 10060;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_3 = 10061;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_2 = 10062;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_3 = 10063;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P0_4 = 10064;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR2_P1_4 = 10065;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_0 = 10066;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_1 = 10067;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_0 = 10068;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_1 = 10069;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_2 = 10070;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_3 = 10071;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_2 = 10072;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_3 = 10073;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P0_4 = 10074;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQS_RD_PHASE_SELECT_RANK_PAIR3_P1_4 = 10075;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_0 = 10076;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_1 = 10077;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_0 = 10078;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_1 = 10079;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_2 = 10080;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_3 = 10081;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_2 = 10082;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_3 = 10083;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P0_4 = 10084;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP0_P1_4 = 10085;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_0 = 10086;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_1 = 10087;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_0 = 10088;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_1 = 10089;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_2 = 10090;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_3 = 10091;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_2 = 10092;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_3 = 10093;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P0_4 = 10094;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP1_P1_4 = 10095;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_0 = 10096;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_1 = 10097;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_0 = 10098;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_1 = 10099;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_2 = 10100;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_3 = 10101;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_2 = 10102;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_3 = 10103;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P0_4 = 10104;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP2_P1_4 = 10105;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_0 = 10106;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_1 = 10107;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_0 = 10108;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_1 = 10109;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_2 = 10110;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_3 = 10111;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_2 = 10112;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_3 = 10113;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P0_4 = 10114;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DQ_WR_OFFSET_RP3_P1_4 = 10115;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P0_0 = 10116;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P0_1 = 10117;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P1_0 = 10118;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P1_1 = 10119;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P0_2 = 10120;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P0_3 = 10121;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P1_2 = 10122;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P1_3 = 10123;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P0_4 = 10124;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DRIFT_LIMITS_P1_4 = 10125;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_0_RO = 10126;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_1_RO = 10127;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_0_RO = 10128;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_1_RO = 10129;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_2_RO = 10130;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_3_RO = 10131;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_2_RO = 10132;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_3_RO = 10133;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P0_4_RO = 10134;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR0_P1_4_RO = 10135;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_0_RO = 10136;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_1_RO = 10137;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_0_RO = 10138;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_1_RO = 10139;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_2_RO = 10140;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_3_RO = 10141;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_2_RO = 10142;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_3_RO = 10143;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P0_4_RO = 10144;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR1_P1_4_RO = 10145;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_0_RO = 10146;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_1_RO = 10147;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_0_RO = 10148;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_1_RO = 10149;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_2_RO = 10150;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_3_RO = 10151;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_2_RO = 10152;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_3_RO = 10153;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P0_4_RO = 10154;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR2_P1_4_RO = 10155;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_0_RO = 10156;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_1_RO = 10157;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_0_RO = 10158;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_1_RO = 10159;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_2_RO = 10160;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_3_RO = 10161;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_2_RO = 10162;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_3_RO = 10163;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P0_4_RO = 10164;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN0_RANK_PAIR3_P1_4_RO = 10165;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_0_RO = 10166;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_1_RO = 10167;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_0_RO = 10168;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_1_RO = 10169;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_2_RO = 10170;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_3_RO = 10171;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_2_RO = 10172;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_3_RO = 10173;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P0_4_RO = 10174;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR0_P1_4_RO = 10175;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_0_RO = 10176;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_1_RO = 10177;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_0_RO = 10178;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_1_RO = 10179;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_2_RO = 10180;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_3_RO = 10181;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_2_RO = 10182;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_3_RO = 10183;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P0_4_RO = 10184;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR1_P1_4_RO = 10185;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_0_RO = 10186;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_1_RO = 10187;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_0_RO = 10188;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_1_RO = 10189;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_2_RO = 10190;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_3_RO = 10191;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_2_RO = 10192;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_3_RO = 10193;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P0_4_RO = 10194;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR2_P1_4_RO = 10195;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_0_RO = 10196;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_1_RO = 10197;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_0_RO = 10198;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_1_RO = 10199;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_2_RO = 10200;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_3_RO = 10201;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_2_RO = 10202;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_3_RO = 10203;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P0_4_RO = 10204;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_INITIAL_DQS_ALIGN1_RANK_PAIR3_P1_4_RO = 10205;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P0_0 = 10206;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P0_1 = 10207;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P1_0 = 10208;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P1_1 = 10209;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P0_2 = 10210;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P0_3 = 10211;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P1_2 = 10212;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P1_3 = 10213;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P0_4 = 10214;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_CONFIG0_P1_4 = 10215;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_0 = 10216;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_1 = 10217;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_0 = 10218;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_1 = 10219;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_2 = 10220;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_3 = 10221;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_2 = 10222;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_3 = 10223;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P0_4 = 10224;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_SLICE_P1_4 = 10225;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P0_0 = 10226;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P0_1 = 10227;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P1_0 = 10228;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P1_1 = 10229;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P0_2 = 10230;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P0_3 = 10231;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P1_2 = 10232;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P1_3 = 10233;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P0_4 = 10234;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_NFET_TERM_P1_4 = 10235;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_0 = 10236;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_1 = 10237;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_0 = 10238;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_1 = 10239;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_2 = 10240;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_3 = 10241;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_2 = 10242;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_3 = 10243;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P0_4 = 10244;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_SLICE_P1_4 = 10245;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P0_0 = 10246;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P0_1 = 10247;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P1_0 = 10248;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P1_1 = 10249;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P0_2 = 10250;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P0_3 = 10251;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P1_2 = 10252;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P1_3 = 10253;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P0_4 = 10254;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_IO_TX_PFET_TERM_P1_4 = 10255;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P0_0 = 10256;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P0_1 = 10257;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P1_0 = 10258;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P1_1 = 10259;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P0_2 = 10260;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P0_3 = 10261;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P1_2 = 10262;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P1_3 = 10263;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P0_4 = 10264;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_0_P1_4 = 10265;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P0_0 = 10266;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P0_1 = 10267;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P1_0 = 10268;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P1_1 = 10269;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P0_2 = 10270;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P0_3 = 10271;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P1_2 = 10272;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P1_3 = 10273;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P0_4 = 10274;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_1_P1_4 = 10275;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P0_0 = 10276;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P0_1 = 10277;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P1_0 = 10278;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P1_1 = 10279;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P0_2 = 10280;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P0_3 = 10281;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P1_2 = 10282;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P1_3 = 10283;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P0_4 = 10284;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PATTERN_POS_2_P1_4 = 10285;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P0_0 = 10286;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P0_1 = 10287;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P1_0 = 10288;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P1_1 = 10289;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P0_2 = 10290;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P0_3 = 10291;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P1_2 = 10292;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P1_3 = 10293;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P0_4 = 10294;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG0_P1_4 = 10295;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P0_0 = 10296;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P0_1 = 10297;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P1_0 = 10298;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P1_1 = 10299;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P0_2 = 10300;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P0_3 = 10301;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P1_2 = 10302;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P1_3 = 10303;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P0_4 = 10304;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_PLL_CONFIG1_P1_4 = 10305;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P0_0 = 10306;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P0_1 = 10307;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P1_0 = 10308;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P1_1 = 10309;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P0_2 = 10310;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P0_3 = 10311;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P1_2 = 10312;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P1_3 = 10313;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P0_4 = 10314;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_ERROR_MASK0_P1_4 = 10315;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P0_0_RO = 10316;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P0_1_RO = 10317;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P1_0_RO = 10318;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P1_1_RO = 10319;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P0_2_RO = 10320;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P0_3_RO = 10321;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P1_2_RO = 10322;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P1_3_RO = 10323;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P0_4_RO = 10324;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS0_P1_4_RO = 10325;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P0_0_RO = 10326;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P0_1_RO = 10327;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P1_0_RO = 10328;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P1_1_RO = 10329;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P0_2_RO = 10330;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P0_3_RO = 10331;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P1_2_RO = 10332;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P1_3_RO = 10333;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P0_4_RO = 10334;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS1_P1_4_RO = 10335;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P0_0_RO = 10336;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P0_1_RO = 10337;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P1_0_RO = 10338;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P1_1_RO = 10339;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P0_2_RO = 10340;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P0_3_RO = 10341;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P1_2_RO = 10342;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P1_3_RO = 10343;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P0_4_RO = 10344;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS2_P1_4_RO = 10345;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P0_0_RO = 10346;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P0_1_RO = 10347;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P1_0_RO = 10348;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P1_1_RO = 10349;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P0_2_RO = 10350;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P0_3_RO = 10351;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P1_2_RO = 10352;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P1_3_RO = 10353;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P0_4_RO = 10354;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_LVL_STATUS3_P1_4_RO = 10355;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P0_0 = 10356;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P0_1 = 10357;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P1_0 = 10358;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P1_1 = 10359;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P0_2 = 10360;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P0_3 = 10361;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P1_2 = 10362;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P1_3 = 10363;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P0_4 = 10364;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_STATUS0_P1_4 = 10365;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_0 = 10366;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_1 = 10367;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_0 = 10368;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_1 = 10369;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_2 = 10370;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_3 = 10371;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_2 = 10372;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_3 = 10373;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P0_4 = 10374;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR0_P1_4 = 10375;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_0 = 10376;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_1 = 10377;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_0 = 10378;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_1 = 10379;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_2 = 10380;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_3 = 10381;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_2 = 10382;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_3 = 10383;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P0_4 = 10384;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR1_P1_4 = 10385;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_0 = 10386;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_1 = 10387;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_0 = 10388;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_1 = 10389;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_2 = 10390;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_3 = 10391;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_2 = 10392;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_3 = 10393;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P0_4 = 10394;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR2_P1_4 = 10395;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_0 = 10396;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_1 = 10397;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_0 = 10398;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_1 = 10399;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_2 = 10400;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_3 = 10401;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_2 = 10402;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_3 = 10403;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P0_4 = 10404;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_CLOCK_RANK_PAIR3_P1_4 = 10405;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_0 = 10406;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_1 = 10407;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_0 = 10408;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_1 = 10409;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_2 = 10410;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_3 = 10411;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_2 = 10412;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_3 = 10413;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P0_4 = 10414;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR0_P1_4 = 10415;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_0 = 10416;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_1 = 10417;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_0 = 10418;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_1 = 10419;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_2 = 10420;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_3 = 10421;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_2 = 10422;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_3 = 10423;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P0_4 = 10424;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR1_P1_4 = 10425;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_0 = 10426;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_1 = 10427;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_0 = 10428;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_1 = 10429;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_2 = 10430;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_3 = 10431;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_2 = 10432;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_3 = 10433;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P0_4 = 10434;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR2_P1_4 = 10435;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_0 = 10436;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_1 = 10437;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_0 = 10438;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_1 = 10439;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_2 = 10440;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_3 = 10441;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_2 = 10442;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_3 = 10443;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P0_4 = 10444;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY0_RANK_PAIR3_P1_4 = 10445;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_0 = 10446;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_1 = 10447;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_0 = 10448;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_1 = 10449;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_2 = 10450;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_3 = 10451;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_2 = 10452;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_3 = 10453;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P0_4 = 10454;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR0_P1_4 = 10455;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_0 = 10456;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_1 = 10457;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_0 = 10458;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_1 = 10459;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_2 = 10460;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_3 = 10461;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_2 = 10462;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_3 = 10463;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P0_4 = 10464;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR1_P1_4 = 10465;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_0 = 10466;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_1 = 10467;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_0 = 10468;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_1 = 10469;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_2 = 10470;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_3 = 10471;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_2 = 10472;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_3 = 10473;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P0_4 = 10474;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR2_P1_4 = 10475;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_0 = 10476;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_1 = 10477;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_0 = 10478;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_1 = 10479;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_2 = 10480;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_3 = 10481;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_2 = 10482;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_3 = 10483;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P0_4 = 10484;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY1_RANK_PAIR3_P1_4 = 10485;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_0 = 10486;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_1 = 10487;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_0 = 10488;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_1 = 10489;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_2 = 10490;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_3 = 10491;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_2 = 10492;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_3 = 10493;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P0_4 = 10494;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR0_P1_4 = 10495;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_0 = 10496;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_1 = 10497;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_0 = 10498;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_1 = 10499;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_2 = 10500;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_3 = 10501;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_2 = 10502;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_3 = 10503;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P0_4 = 10504;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR1_P1_4 = 10505;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_0 = 10506;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_1 = 10507;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_0 = 10508;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_1 = 10509;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_2 = 10510;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_3 = 10511;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_2 = 10512;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_3 = 10513;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P0_4 = 10514;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR2_P1_4 = 10515;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_0 = 10516;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_1 = 10517;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_0 = 10518;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_1 = 10519;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_2 = 10520;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_3 = 10521;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_2 = 10522;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_3 = 10523;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P0_4 = 10524;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY2_RANK_PAIR3_P1_4 = 10525;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_0 = 10526;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_1 = 10527;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_0 = 10528;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_1 = 10529;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_2 = 10530;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_3 = 10531;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_2 = 10532;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_3 = 10533;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P0_4 = 10534;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR0_P1_4 = 10535;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_0 = 10536;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_1 = 10537;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_0 = 10538;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_1 = 10539;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_2 = 10540;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_3 = 10541;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_2 = 10542;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_3 = 10543;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P0_4 = 10544;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR1_P1_4 = 10545;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_0 = 10546;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_1 = 10547;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_0 = 10548;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_1 = 10549;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_2 = 10550;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_3 = 10551;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_2 = 10552;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_3 = 10553;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P0_4 = 10554;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR2_P1_4 = 10555;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_0 = 10556;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_1 = 10557;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_0 = 10558;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_1 = 10559;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_2 = 10560;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_3 = 10561;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_2 = 10562;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_3 = 10563;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P0_4 = 10564;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY3_RANK_PAIR3_P1_4 = 10565;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_0 = 10566;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_1 = 10567;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_0 = 10568;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_1 = 10569;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_2 = 10570;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_3 = 10571;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_2 = 10572;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_3 = 10573;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P0_4 = 10574;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR0_P1_4 = 10575;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_0 = 10576;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_1 = 10577;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_0 = 10578;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_1 = 10579;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_2 = 10580;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_3 = 10581;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_2 = 10582;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_3 = 10583;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P0_4 = 10584;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR1_P1_4 = 10585;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_0 = 10586;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_1 = 10587;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_0 = 10588;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_1 = 10589;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_2 = 10590;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_3 = 10591;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_2 = 10592;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_3 = 10593;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P0_4 = 10594;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR2_P1_4 = 10595;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_0 = 10596;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_1 = 10597;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_0 = 10598;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_1 = 10599;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_2 = 10600;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_3 = 10601;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_2 = 10602;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_3 = 10603;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P0_4 = 10604;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY4_RANK_PAIR3_P1_4 = 10605;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_0 = 10606;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_1 = 10607;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_0 = 10608;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_1 = 10609;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_2 = 10610;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_3 = 10611;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_2 = 10612;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_3 = 10613;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P0_4 = 10614;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR0_P1_4 = 10615;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_0 = 10616;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_1 = 10617;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_0 = 10618;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_1 = 10619;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_2 = 10620;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_3 = 10621;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_2 = 10622;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_3 = 10623;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P0_4 = 10624;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR1_P1_4 = 10625;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_0 = 10626;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_1 = 10627;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_0 = 10628;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_1 = 10629;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_2 = 10630;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_3 = 10631;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_2 = 10632;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_3 = 10633;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P0_4 = 10634;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR2_P1_4 = 10635;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_0 = 10636;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_1 = 10637;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_0 = 10638;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_1 = 10639;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_2 = 10640;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_3 = 10641;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_2 = 10642;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_3 = 10643;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P0_4 = 10644;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY5_RANK_PAIR3_P1_4 = 10645;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_0 = 10646;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_1 = 10647;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_0 = 10648;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_1 = 10649;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_2 = 10650;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_3 = 10651;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_2 = 10652;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_3 = 10653;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P0_4 = 10654;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR0_P1_4 = 10655;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_0 = 10656;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_1 = 10657;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_0 = 10658;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_1 = 10659;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_2 = 10660;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_3 = 10661;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_2 = 10662;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_3 = 10663;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P0_4 = 10664;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR1_P1_4 = 10665;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_0 = 10666;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_1 = 10667;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_0 = 10668;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_1 = 10669;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_2 = 10670;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_3 = 10671;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_2 = 10672;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_3 = 10673;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P0_4 = 10674;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR2_P1_4 = 10675;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_0 = 10676;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_1 = 10677;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_0 = 10678;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_1 = 10679;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_2 = 10680;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_3 = 10681;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_2 = 10682;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_3 = 10683;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P0_4 = 10684;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY6_RANK_PAIR3_P1_4 = 10685;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_0 = 10686;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_1 = 10687;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_0 = 10688;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_1 = 10689;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_2 = 10690;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_3 = 10691;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_2 = 10692;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_3 = 10693;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P0_4 = 10694;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR0_P1_4 = 10695;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_0 = 10696;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_1 = 10697;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_0 = 10698;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_1 = 10699;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_2 = 10700;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_3 = 10701;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_2 = 10702;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_3 = 10703;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P0_4 = 10704;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR1_P1_4 = 10705;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_0 = 10706;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_1 = 10707;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_0 = 10708;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_1 = 10709;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_2 = 10710;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_3 = 10711;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_2 = 10712;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_3 = 10713;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P0_4 = 10714;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR2_P1_4 = 10715;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_0 = 10716;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_1 = 10717;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_0 = 10718;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_1 = 10719;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_2 = 10720;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_3 = 10721;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_2 = 10722;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_3 = 10723;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P0_4 = 10724;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY7_RANK_PAIR3_P1_4 = 10725;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_0 = 10726;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_1 = 10727;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_0 = 10728;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_1 = 10729;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_2 = 10730;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_3 = 10731;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_2 = 10732;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_3 = 10733;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P0_4 = 10734;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR0_P1_4 = 10735;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_0 = 10736;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_1 = 10737;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_0 = 10738;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_1 = 10739;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_2 = 10740;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_3 = 10741;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_2 = 10742;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_3 = 10743;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P0_4 = 10744;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR1_P1_4 = 10745;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_0 = 10746;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_1 = 10747;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_0 = 10748;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_1 = 10749;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_2 = 10750;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_3 = 10751;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_2 = 10752;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_3 = 10753;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P0_4 = 10754;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR2_P1_4 = 10755;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_0 = 10756;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_1 = 10757;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_0 = 10758;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_1 = 10759;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_2 = 10760;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_3 = 10761;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_2 = 10762;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_3 = 10763;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P0_4 = 10764;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET0_RANK_PAIR3_P1_4 = 10765;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_0 = 10766;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_1 = 10767;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_0 = 10768;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_1 = 10769;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_2 = 10770;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_3 = 10771;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_2 = 10772;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_3 = 10773;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P0_4 = 10774;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR0_P1_4 = 10775;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_0 = 10776;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_1 = 10777;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_0 = 10778;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_1 = 10779;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_2 = 10780;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_3 = 10781;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_2 = 10782;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_3 = 10783;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P0_4 = 10784;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR1_P1_4 = 10785;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_0 = 10786;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_1 = 10787;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_0 = 10788;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_1 = 10789;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_2 = 10790;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_3 = 10791;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_2 = 10792;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_3 = 10793;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P0_4 = 10794;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR2_P1_4 = 10795;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_0 = 10796;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_1 = 10797;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_0 = 10798;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_1 = 10799;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_2 = 10800;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_3 = 10801;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_2 = 10802;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_3 = 10803;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P0_4 = 10804;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DELAY_OFFSET1_RANK_PAIR3_P1_4 = 10805;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_0 = 10806;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_1 = 10807;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_0 = 10808;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_1 = 10809;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_2 = 10810;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_3 = 10811;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_2 = 10812;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_3 = 10813;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P0_4 = 10814;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_DQS_TIMING_REFERENCE_P1_4 = 10815;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_0 = 10816;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_1 = 10817;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_0 = 10818;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_1 = 10819;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_2 = 10820;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_3 = 10821;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_2 = 10822;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_3 = 10823;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P0_4 = 10824;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR0_P1_4 = 10825;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_0 = 10826;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_1 = 10827;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_0 = 10828;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_1 = 10829;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_2 = 10830;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_3 = 10831;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_2 = 10832;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_3 = 10833;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P0_4 = 10834;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR1_P1_4 = 10835;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_0 = 10836;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_1 = 10837;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_0 = 10838;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_1 = 10839;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_2 = 10840;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_3 = 10841;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_2 = 10842;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_3 = 10843;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P0_4 = 10844;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR2_P1_4 = 10845;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_0 = 10846;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_1 = 10847;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_0 = 10848;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_1 = 10849;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_2 = 10850;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_3 = 10851;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_2 = 10852;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_3 = 10853;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P0_4 = 10854;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE0_RANK_PAIR3_P1_4 = 10855;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_0 = 10856;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_1 = 10857;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_0 = 10858;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_1 = 10859;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_2 = 10860;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_3 = 10861;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_2 = 10862;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_3 = 10863;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P0_4 = 10864;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR0_P1_4 = 10865;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_0 = 10866;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_1 = 10867;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_0 = 10868;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_1 = 10869;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_2 = 10870;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_3 = 10871;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_2 = 10872;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_3 = 10873;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P0_4 = 10874;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR1_P1_4 = 10875;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_0 = 10876;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_1 = 10877;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_0 = 10878;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_1 = 10879;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_2 = 10880;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_3 = 10881;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_2 = 10882;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_3 = 10883;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P0_4 = 10884;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR2_P1_4 = 10885;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_0 = 10886;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_1 = 10887;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_0 = 10888;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_1 = 10889;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_2 = 10890;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_3 = 10891;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_2 = 10892;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_3 = 10893;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P0_4 = 10894;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE10_RANK_PAIR3_P1_4 = 10895;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_0 = 10896;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_1 = 10897;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_0 = 10898;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_1 = 10899;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_2 = 10900;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_3 = 10901;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_2 = 10902;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_3 = 10903;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P0_4 = 10904;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR0_P1_4 = 10905;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_0 = 10906;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_1 = 10907;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_0 = 10908;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_1 = 10909;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_2 = 10910;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_3 = 10911;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_2 = 10912;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_3 = 10913;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P0_4 = 10914;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR1_P1_4 = 10915;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_0 = 10916;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_1 = 10917;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_0 = 10918;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_1 = 10919;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_2 = 10920;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_3 = 10921;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_2 = 10922;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_3 = 10923;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P0_4 = 10924;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR2_P1_4 = 10925;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_0 = 10926;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_1 = 10927;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_0 = 10928;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_1 = 10929;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_2 = 10930;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_3 = 10931;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_2 = 10932;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_3 = 10933;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P0_4 = 10934;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE11_RANK_PAIR3_P1_4 = 10935;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_0 = 10936;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_1 = 10937;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_0 = 10938;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_1 = 10939;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_2 = 10940;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_3 = 10941;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_2 = 10942;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_3 = 10943;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P0_4 = 10944;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR0_P1_4 = 10945;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_0 = 10946;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_1 = 10947;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_0 = 10948;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_1 = 10949;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_2 = 10950;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_3 = 10951;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_2 = 10952;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_3 = 10953;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P0_4 = 10954;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR1_P1_4 = 10955;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_0 = 10956;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_1 = 10957;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_0 = 10958;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_1 = 10959;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_2 = 10960;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_3 = 10961;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_2 = 10962;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_3 = 10963;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P0_4 = 10964;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR2_P1_4 = 10965;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_0 = 10966;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_1 = 10967;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_0 = 10968;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_1 = 10969;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_2 = 10970;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_3 = 10971;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_2 = 10972;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_3 = 10973;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P0_4 = 10974;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE1_RANK_PAIR3_P1_4 = 10975;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_0 = 10976;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_1 = 10977;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_0 = 10978;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_1 = 10979;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_2 = 10980;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_3 = 10981;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_2 = 10982;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_3 = 10983;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P0_4 = 10984;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR0_P1_4 = 10985;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_0 = 10986;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_1 = 10987;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_0 = 10988;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_1 = 10989;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_2 = 10990;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_3 = 10991;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_2 = 10992;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_3 = 10993;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P0_4 = 10994;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR1_P1_4 = 10995;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_0 = 10996;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_1 = 10997;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_0 = 10998;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_1 = 10999;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_2 = 11000;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_3 = 11001;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_2 = 11002;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_3 = 11003;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P0_4 = 11004;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR2_P1_4 = 11005;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_0 = 11006;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_1 = 11007;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_0 = 11008;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_1 = 11009;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_2 = 11010;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_3 = 11011;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_2 = 11012;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_3 = 11013;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P0_4 = 11014;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE2_RANK_PAIR3_P1_4 = 11015;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_0 = 11016;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_1 = 11017;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_0 = 11018;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_1 = 11019;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_2 = 11020;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_3 = 11021;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_2 = 11022;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_3 = 11023;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P0_4 = 11024;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR0_P1_4 = 11025;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_0 = 11026;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_1 = 11027;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_0 = 11028;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_1 = 11029;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_2 = 11030;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_3 = 11031;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_2 = 11032;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_3 = 11033;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P0_4 = 11034;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR1_P1_4 = 11035;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_0 = 11036;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_1 = 11037;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_0 = 11038;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_1 = 11039;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_2 = 11040;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_3 = 11041;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_2 = 11042;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_3 = 11043;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P0_4 = 11044;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR2_P1_4 = 11045;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_0 = 11046;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_1 = 11047;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_0 = 11048;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_1 = 11049;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_2 = 11050;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_3 = 11051;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_2 = 11052;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_3 = 11053;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P0_4 = 11054;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE3_RANK_PAIR3_P1_4 = 11055;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_0 = 11056;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_1 = 11057;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_0 = 11058;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_1 = 11059;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_2 = 11060;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_3 = 11061;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_2 = 11062;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_3 = 11063;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P0_4 = 11064;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR0_P1_4 = 11065;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_0 = 11066;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_1 = 11067;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_0 = 11068;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_1 = 11069;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_2 = 11070;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_3 = 11071;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_2 = 11072;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_3 = 11073;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P0_4 = 11074;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR1_P1_4 = 11075;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_0 = 11076;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_1 = 11077;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_0 = 11078;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_1 = 11079;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_2 = 11080;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_3 = 11081;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_2 = 11082;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_3 = 11083;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P0_4 = 11084;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR2_P1_4 = 11085;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_0 = 11086;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_1 = 11087;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_0 = 11088;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_1 = 11089;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_2 = 11090;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_3 = 11091;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_2 = 11092;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_3 = 11093;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P0_4 = 11094;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE4_RANK_PAIR3_P1_4 = 11095;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_0 = 11096;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_1 = 11097;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_0 = 11098;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_1 = 11099;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_2 = 11100;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_3 = 11101;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_2 = 11102;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_3 = 11103;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P0_4 = 11104;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR0_P1_4 = 11105;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_0 = 11106;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_1 = 11107;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_0 = 11108;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_1 = 11109;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_2 = 11110;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_3 = 11111;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_2 = 11112;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_3 = 11113;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P0_4 = 11114;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR1_P1_4 = 11115;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_0 = 11116;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_1 = 11117;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_0 = 11118;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_1 = 11119;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_2 = 11120;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_3 = 11121;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_2 = 11122;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_3 = 11123;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P0_4 = 11124;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR2_P1_4 = 11125;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_0 = 11126;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_1 = 11127;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_0 = 11128;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_1 = 11129;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_2 = 11130;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_3 = 11131;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_2 = 11132;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_3 = 11133;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P0_4 = 11134;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE5_RANK_PAIR3_P1_4 = 11135;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_0 = 11136;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_1 = 11137;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_0 = 11138;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_1 = 11139;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_2 = 11140;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_3 = 11141;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_2 = 11142;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_3 = 11143;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P0_4 = 11144;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR0_P1_4 = 11145;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_0 = 11146;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_1 = 11147;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_0 = 11148;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_1 = 11149;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_2 = 11150;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_3 = 11151;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_2 = 11152;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_3 = 11153;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P0_4 = 11154;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR1_P1_4 = 11155;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_0 = 11156;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_1 = 11157;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_0 = 11158;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_1 = 11159;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_2 = 11160;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_3 = 11161;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_2 = 11162;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_3 = 11163;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P0_4 = 11164;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR2_P1_4 = 11165;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_0 = 11166;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_1 = 11167;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_0 = 11168;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_1 = 11169;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_2 = 11170;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_3 = 11171;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_2 = 11172;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_3 = 11173;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P0_4 = 11174;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE6_RANK_PAIR3_P1_4 = 11175;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_0 = 11176;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_1 = 11177;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_0 = 11178;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_1 = 11179;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_2 = 11180;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_3 = 11181;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_2 = 11182;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_3 = 11183;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P0_4 = 11184;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR0_P1_4 = 11185;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_0 = 11186;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_1 = 11187;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_0 = 11188;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_1 = 11189;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_2 = 11190;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_3 = 11191;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_2 = 11192;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_3 = 11193;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P0_4 = 11194;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR1_P1_4 = 11195;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_0 = 11196;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_1 = 11197;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_0 = 11198;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_1 = 11199;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_2 = 11200;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_3 = 11201;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_2 = 11202;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_3 = 11203;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P0_4 = 11204;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR2_P1_4 = 11205;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_0 = 11206;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_1 = 11207;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_0 = 11208;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_1 = 11209;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_2 = 11210;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_3 = 11211;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_2 = 11212;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_3 = 11213;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P0_4 = 11214;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE7_RANK_PAIR3_P1_4 = 11215;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_0 = 11216;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_1 = 11217;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_0 = 11218;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_1 = 11219;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_2 = 11220;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_3 = 11221;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_2 = 11222;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_3 = 11223;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P0_4 = 11224;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR0_P1_4 = 11225;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_0 = 11226;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_1 = 11227;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_0 = 11228;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_1 = 11229;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_2 = 11230;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_3 = 11231;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_2 = 11232;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_3 = 11233;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P0_4 = 11234;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR1_P1_4 = 11235;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_0 = 11236;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_1 = 11237;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_0 = 11238;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_1 = 11239;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_2 = 11240;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_3 = 11241;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_2 = 11242;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_3 = 11243;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P0_4 = 11244;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR2_P1_4 = 11245;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_0 = 11246;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_1 = 11247;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_0 = 11248;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_1 = 11249;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_2 = 11250;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_3 = 11251;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_2 = 11252;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_3 = 11253;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P0_4 = 11254;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE8_RANK_PAIR3_P1_4 = 11255;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_0 = 11256;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_1 = 11257;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_0 = 11258;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_1 = 11259;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_2 = 11260;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_3 = 11261;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_2 = 11262;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_3 = 11263;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P0_4 = 11264;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR0_P1_4 = 11265;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_0 = 11266;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_1 = 11267;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_0 = 11268;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_1 = 11269;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_2 = 11270;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_3 = 11271;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_2 = 11272;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_3 = 11273;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P0_4 = 11274;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR1_P1_4 = 11275;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_0 = 11276;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_1 = 11277;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_0 = 11278;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_1 = 11279;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_2 = 11280;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_3 = 11281;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_2 = 11282;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_3 = 11283;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P0_4 = 11284;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR2_P1_4 = 11285;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_0 = 11286;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_1 = 11287;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_0 = 11288;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_1 = 11289;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_2 = 11290;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_3 = 11291;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_2 = 11292;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_3 = 11293;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P0_4 = 11294;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_EYE_SIZE9_RANK_PAIR3_P1_4 = 11295;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_0 = 11296;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_1 = 11297;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_0 = 11298;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_1 = 11299;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_2 = 11300;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_3 = 11301;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_2 = 11302;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_3 = 11303;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P0_4 = 11304;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE0_P1_4 = 11305;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_0 = 11306;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_1 = 11307;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_0 = 11308;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_1 = 11309;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_2 = 11310;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_3 = 11311;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_2 = 11312;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_3 = 11313;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P0_4 = 11314;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_READ_TIMING_REFERENCE1_P1_4 = 11315;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P0_0 = 11316;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P0_1 = 11317;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P1_0 = 11318;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P1_1 = 11319;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P0_2 = 11320;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P0_3 = 11321;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P1_2 = 11322;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P1_3 = 11323;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P0_4 = 11324;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RX_PEAK_AMP_P1_4 = 11325;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_0_ROX = 11326;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_1_ROX = 11327;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_0_ROX = 11328;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_1_ROX = 11329;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_2_ROX = 11330;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_3_ROX = 11331;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_2_ROX = 11332;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_3_ROX = 11333;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P0_4_ROX = 11334;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_VALUE_P1_4_ROX = 11335;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P0_0 = 11336;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P0_1 = 11337;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P1_0 = 11338;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P1_1 = 11339;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P0_2 = 11340;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P0_3 = 11341;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P1_2 = 11342;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P1_3 = 11343;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P0_4 = 11344;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_SYSCLK_PR_P1_4 = 11345;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P0_0 = 11346;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P0_1 = 11347;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P1_0 = 11348;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P1_1 = 11349;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P0_2 = 11350;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P0_3 = 11351;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P1_2 = 11352;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P1_3 = 11353;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P0_4 = 11354;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP0_P1_4 = 11355;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P0_0 = 11356;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P0_1 = 11357;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P1_0 = 11358;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P1_1 = 11359;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P0_2 = 11360;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P0_3 = 11361;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P1_2 = 11362;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P1_3 = 11363;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P0_4 = 11364;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP1_P1_4 = 11365;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P0_0 = 11366;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P0_1 = 11367;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P1_0 = 11368;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P1_1 = 11369;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P0_2 = 11370;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P0_3 = 11371;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P1_2 = 11372;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P1_3 = 11373;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P0_4 = 11374;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP2_P1_4 = 11375;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P0_0 = 11376;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P0_1 = 11377;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P1_0 = 11378;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P1_1 = 11379;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P0_2 = 11380;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P0_3 = 11381;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P1_2 = 11382;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P1_3 = 11383;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P0_4 = 11384;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_EN_RP3_P1_4 = 11385;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P0_0 = 11386;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P0_1 = 11387;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P1_0 = 11388;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P1_1 = 11389;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P0_2 = 11390;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P0_3 = 11391;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P1_2 = 11392;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P1_3 = 11393;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P0_4 = 11394;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WRCLK_PR_P1_4 = 11395;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P0_0_RO = 11396;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P0_1_RO = 11397;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P1_0_RO = 11398;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P1_1_RO = 11399;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P0_2_RO = 11400;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P0_3_RO = 11401;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P1_2_RO = 11402;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P1_3_RO = 11403;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P0_4_RO = 11404;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS0_P1_4_RO = 11405;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P0_0_RO = 11406;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P0_1_RO = 11407;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P1_0_RO = 11408;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P1_1_RO = 11409;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P0_2_RO = 11410;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P0_3_RO = 11411;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P1_2_RO = 11412;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P1_3_RO = 11413;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P0_4_RO = 11414;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS1_P1_4_RO = 11415;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P0_0_RO = 11416;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P0_1_RO = 11417;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P1_0_RO = 11418;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P1_1_RO = 11419;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P0_2_RO = 11420;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P0_3_RO = 11421;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P1_2_RO = 11422;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P1_3_RO = 11423;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P0_4_RO = 11424;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_CNTR_STATUS2_P1_4_RO = 11425;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P0_0 = 11426;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P0_1 = 11427;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P1_0 = 11428;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P1_1 = 11429;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P0_2 = 11430;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P0_3 = 11431;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P1_2 = 11432;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P1_3 = 11433;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P0_4 = 11434;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR0_P1_4 = 11435;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P0_0 = 11436;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P0_1 = 11437;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P1_0 = 11438;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P1_1 = 11439;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P0_2 = 11440;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P0_3 = 11441;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P1_2 = 11442;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P1_3 = 11443;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P0_4 = 11444;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_ERROR_MASK0_P1_4 = 11445;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P0_0 = 11446;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P0_1 = 11447;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P1_0 = 11448;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P1_1 = 11449;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P0_2 = 11450;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P0_3 = 11451;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P1_2 = 11452;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P1_3 = 11453;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P0_4 = 11454;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_WR_LVL_STATUS0_P1_4 = 11455;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_0 = 11456;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_1 = 11457;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_0 = 11458;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_1 = 11459;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_2 = 11460;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_3 = 11461;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_2 = 11462;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_3 = 11463;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P0_4 = 11464;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP0_REG_P1_4 = 11465;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_0 = 11466;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_1 = 11467;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_0 = 11468;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_1 = 11469;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_2 = 11470;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_3 = 11471;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_2 = 11472;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_3 = 11473;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P0_4 = 11474;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP1_REG_P1_4 = 11475;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_0 = 11476;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_1 = 11477;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_0 = 11478;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_1 = 11479;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_2 = 11480;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_3 = 11481;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_2 = 11482;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_3 = 11483;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P0_4 = 11484;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP2_REG_P1_4 = 11485;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_0 = 11486;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_1 = 11487;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_0 = 11488;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_1 = 11489;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_2 = 11490;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_3 = 11491;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_2 = 11492;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_3 = 11493;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P0_4 = 11494;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_0_RP3_REG_P1_4 = 11495;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_0 = 11496;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_1 = 11497;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_0 = 11498;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_1 = 11499;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_2 = 11500;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_3 = 11501;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_2 = 11502;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_3 = 11503;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P0_4 = 11504;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP0_REG_P1_4 = 11505;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_0 = 11506;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_1 = 11507;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_0 = 11508;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_1 = 11509;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_2 = 11510;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_3 = 11511;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_2 = 11512;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_3 = 11513;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P0_4 = 11514;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP1_REG_P1_4 = 11515;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_0 = 11516;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_1 = 11517;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_0 = 11518;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_1 = 11519;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_2 = 11520;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_3 = 11521;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_2 = 11522;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_3 = 11523;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P0_4 = 11524;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP2_REG_P1_4 = 11525;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_0 = 11526;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_1 = 11527;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_0 = 11528;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_1 = 11529;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_2 = 11530;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_3 = 11531;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_2 = 11532;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_3 = 11533;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P0_4 = 11534;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_10_RP3_REG_P1_4 = 11535;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_0 = 11536;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_1 = 11537;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_0 = 11538;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_1 = 11539;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_2 = 11540;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_3 = 11541;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_2 = 11542;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_3 = 11543;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P0_4 = 11544;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP0_REG_P1_4 = 11545;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_0 = 11546;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_1 = 11547;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_0 = 11548;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_1 = 11549;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_2 = 11550;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_3 = 11551;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_2 = 11552;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_3 = 11553;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P0_4 = 11554;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP1_REG_P1_4 = 11555;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_0 = 11556;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_1 = 11557;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_0 = 11558;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_1 = 11559;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_2 = 11560;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_3 = 11561;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_2 = 11562;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_3 = 11563;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P0_4 = 11564;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP2_REG_P1_4 = 11565;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_0 = 11566;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_1 = 11567;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_0 = 11568;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_1 = 11569;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_2 = 11570;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_3 = 11571;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_2 = 11572;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_3 = 11573;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P0_4 = 11574;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_11_RP3_REG_P1_4 = 11575;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_0 = 11576;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_1 = 11577;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_0 = 11578;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_1 = 11579;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_2 = 11580;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_3 = 11581;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_2 = 11582;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_3 = 11583;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P0_4 = 11584;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP0_REG_P1_4 = 11585;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_0 = 11586;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_1 = 11587;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_0 = 11588;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_1 = 11589;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_2 = 11590;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_3 = 11591;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_2 = 11592;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_3 = 11593;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P0_4 = 11594;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP1_REG_P1_4 = 11595;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_0 = 11596;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_1 = 11597;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_0 = 11598;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_1 = 11599;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_2 = 11600;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_3 = 11601;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_2 = 11602;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_3 = 11603;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P0_4 = 11604;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP2_REG_P1_4 = 11605;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_0 = 11606;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_1 = 11607;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_0 = 11608;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_1 = 11609;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_2 = 11610;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_3 = 11611;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_2 = 11612;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_3 = 11613;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P0_4 = 11614;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_12_RP3_REG_P1_4 = 11615;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_0 = 11616;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_1 = 11617;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_0 = 11618;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_1 = 11619;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_2 = 11620;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_3 = 11621;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_2 = 11622;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_3 = 11623;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P0_4 = 11624;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP0_REG_P1_4 = 11625;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_0 = 11626;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_1 = 11627;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_0 = 11628;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_1 = 11629;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_2 = 11630;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_3 = 11631;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_2 = 11632;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_3 = 11633;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P0_4 = 11634;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP1_REG_P1_4 = 11635;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_0 = 11636;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_1 = 11637;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_0 = 11638;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_1 = 11639;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_2 = 11640;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_3 = 11641;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_2 = 11642;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_3 = 11643;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P0_4 = 11644;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP2_REG_P1_4 = 11645;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_0 = 11646;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_1 = 11647;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_0 = 11648;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_1 = 11649;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_2 = 11650;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_3 = 11651;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_2 = 11652;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_3 = 11653;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P0_4 = 11654;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_13_RP3_REG_P1_4 = 11655;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_0 = 11656;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_1 = 11657;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_0 = 11658;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_1 = 11659;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_2 = 11660;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_3 = 11661;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_2 = 11662;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_3 = 11663;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P0_4 = 11664;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP0_REG_P1_4 = 11665;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_0 = 11666;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_1 = 11667;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_0 = 11668;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_1 = 11669;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_2 = 11670;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_3 = 11671;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_2 = 11672;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_3 = 11673;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P0_4 = 11674;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP1_REG_P1_4 = 11675;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_0 = 11676;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_1 = 11677;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_0 = 11678;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_1 = 11679;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_2 = 11680;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_3 = 11681;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_2 = 11682;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_3 = 11683;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P0_4 = 11684;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP2_REG_P1_4 = 11685;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_0 = 11686;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_1 = 11687;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_0 = 11688;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_1 = 11689;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_2 = 11690;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_3 = 11691;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_2 = 11692;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_3 = 11693;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P0_4 = 11694;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_14_RP3_REG_P1_4 = 11695;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_0 = 11696;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_1 = 11697;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_0 = 11698;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_1 = 11699;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_2 = 11700;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_3 = 11701;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_2 = 11702;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_3 = 11703;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P0_4 = 11704;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP0_REG_P1_4 = 11705;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_0 = 11706;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_1 = 11707;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_0 = 11708;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_1 = 11709;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_2 = 11710;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_3 = 11711;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_2 = 11712;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_3 = 11713;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P0_4 = 11714;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP1_REG_P1_4 = 11715;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_0 = 11716;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_1 = 11717;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_0 = 11718;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_1 = 11719;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_2 = 11720;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_3 = 11721;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_2 = 11722;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_3 = 11723;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P0_4 = 11724;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP2_REG_P1_4 = 11725;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_0 = 11726;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_1 = 11727;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_0 = 11728;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_1 = 11729;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_2 = 11730;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_3 = 11731;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_2 = 11732;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_3 = 11733;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P0_4 = 11734;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_15_RP3_REG_P1_4 = 11735;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_0 = 11736;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_1 = 11737;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_0 = 11738;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_1 = 11739;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_2 = 11740;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_3 = 11741;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_2 = 11742;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_3 = 11743;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P0_4 = 11744;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP0_REG_P1_4 = 11745;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_0 = 11746;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_1 = 11747;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_0 = 11748;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_1 = 11749;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_2 = 11750;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_3 = 11751;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_2 = 11752;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_3 = 11753;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P0_4 = 11754;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP1_REG_P1_4 = 11755;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_0 = 11756;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_1 = 11757;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_0 = 11758;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_1 = 11759;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_2 = 11760;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_3 = 11761;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_2 = 11762;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_3 = 11763;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P0_4 = 11764;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP2_REG_P1_4 = 11765;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_0 = 11766;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_1 = 11767;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_0 = 11768;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_1 = 11769;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_2 = 11770;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_3 = 11771;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_2 = 11772;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_3 = 11773;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P0_4 = 11774;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_16_RP3_REG_P1_4 = 11775;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_0 = 11776;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_1 = 11777;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_0 = 11778;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_1 = 11779;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_2 = 11780;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_3 = 11781;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_2 = 11782;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_3 = 11783;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P0_4 = 11784;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP0_REG_P1_4 = 11785;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_0 = 11786;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_1 = 11787;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_0 = 11788;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_1 = 11789;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_2 = 11790;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_3 = 11791;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_2 = 11792;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_3 = 11793;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P0_4 = 11794;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP1_REG_P1_4 = 11795;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_0 = 11796;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_1 = 11797;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_0 = 11798;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_1 = 11799;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_2 = 11800;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_3 = 11801;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_2 = 11802;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_3 = 11803;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P0_4 = 11804;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP2_REG_P1_4 = 11805;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_0 = 11806;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_1 = 11807;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_0 = 11808;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_1 = 11809;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_2 = 11810;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_3 = 11811;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_2 = 11812;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_3 = 11813;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P0_4 = 11814;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_18_RP3_REG_P1_4 = 11815;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_0 = 11816;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_1 = 11817;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_0 = 11818;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_1 = 11819;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_2 = 11820;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_3 = 11821;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_2 = 11822;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_3 = 11823;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P0_4 = 11824;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP0_REG_P1_4 = 11825;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_0 = 11826;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_1 = 11827;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_0 = 11828;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_1 = 11829;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_2 = 11830;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_3 = 11831;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_2 = 11832;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_3 = 11833;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P0_4 = 11834;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP1_REG_P1_4 = 11835;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_0 = 11836;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_1 = 11837;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_0 = 11838;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_1 = 11839;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_2 = 11840;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_3 = 11841;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_2 = 11842;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_3 = 11843;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P0_4 = 11844;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP2_REG_P1_4 = 11845;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_0 = 11846;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_1 = 11847;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_0 = 11848;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_1 = 11849;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_2 = 11850;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_3 = 11851;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_2 = 11852;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_3 = 11853;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P0_4 = 11854;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_1_RP3_REG_P1_4 = 11855;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_0 = 11856;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_1 = 11857;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_0 = 11858;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_1 = 11859;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_2 = 11860;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_3 = 11861;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_2 = 11862;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_3 = 11863;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P0_4 = 11864;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP0_REG_P1_4 = 11865;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_0 = 11866;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_1 = 11867;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_0 = 11868;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_1 = 11869;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_2 = 11870;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_3 = 11871;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_2 = 11872;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_3 = 11873;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P0_4 = 11874;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP1_REG_P1_4 = 11875;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_0 = 11876;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_1 = 11877;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_0 = 11878;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_1 = 11879;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_2 = 11880;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_3 = 11881;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_2 = 11882;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_3 = 11883;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P0_4 = 11884;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP2_REG_P1_4 = 11885;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_0 = 11886;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_1 = 11887;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_0 = 11888;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_1 = 11889;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_2 = 11890;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_3 = 11891;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_2 = 11892;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_3 = 11893;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P0_4 = 11894;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_20_RP3_REG_P1_4 = 11895;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_0 = 11896;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_1 = 11897;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_0 = 11898;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_1 = 11899;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_2 = 11900;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_3 = 11901;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_2 = 11902;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_3 = 11903;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P0_4 = 11904;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP0_REG_P1_4 = 11905;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_0 = 11906;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_1 = 11907;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_0 = 11908;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_1 = 11909;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_2 = 11910;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_3 = 11911;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_2 = 11912;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_3 = 11913;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P0_4 = 11914;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP1_REG_P1_4 = 11915;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_0 = 11916;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_1 = 11917;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_0 = 11918;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_1 = 11919;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_2 = 11920;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_3 = 11921;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_2 = 11922;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_3 = 11923;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P0_4 = 11924;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP2_REG_P1_4 = 11925;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_0 = 11926;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_1 = 11927;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_0 = 11928;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_1 = 11929;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_2 = 11930;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_3 = 11931;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_2 = 11932;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_3 = 11933;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P0_4 = 11934;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_22_RP3_REG_P1_4 = 11935;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_0 = 11936;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_1 = 11937;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_0 = 11938;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_1 = 11939;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_2 = 11940;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_3 = 11941;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_2 = 11942;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_3 = 11943;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P0_4 = 11944;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP0_REG_P1_4 = 11945;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_0 = 11946;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_1 = 11947;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_0 = 11948;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_1 = 11949;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_2 = 11950;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_3 = 11951;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_2 = 11952;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_3 = 11953;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P0_4 = 11954;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP1_REG_P1_4 = 11955;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_0 = 11956;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_1 = 11957;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_0 = 11958;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_1 = 11959;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_2 = 11960;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_3 = 11961;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_2 = 11962;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_3 = 11963;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P0_4 = 11964;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP2_REG_P1_4 = 11965;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_0 = 11966;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_1 = 11967;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_0 = 11968;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_1 = 11969;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_2 = 11970;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_3 = 11971;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_2 = 11972;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_3 = 11973;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P0_4 = 11974;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_2_RP3_REG_P1_4 = 11975;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_0 = 11976;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_1 = 11977;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_0 = 11978;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_1 = 11979;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_2 = 11980;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_3 = 11981;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_2 = 11982;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_3 = 11983;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P0_4 = 11984;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP0_REG_P1_4 = 11985;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_0 = 11986;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_1 = 11987;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_0 = 11988;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_1 = 11989;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_2 = 11990;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_3 = 11991;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_2 = 11992;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_3 = 11993;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P0_4 = 11994;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP1_REG_P1_4 = 11995;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_0 = 11996;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_1 = 11997;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_0 = 11998;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_1 = 11999;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_2 = 12000;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_3 = 12001;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_2 = 12002;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_3 = 12003;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P0_4 = 12004;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP2_REG_P1_4 = 12005;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_0 = 12006;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_1 = 12007;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_0 = 12008;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_1 = 12009;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_2 = 12010;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_3 = 12011;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_2 = 12012;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_3 = 12013;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P0_4 = 12014;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_3_RP3_REG_P1_4 = 12015;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_0 = 12016;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_1 = 12017;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_0 = 12018;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_1 = 12019;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_2 = 12020;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_3 = 12021;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_2 = 12022;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_3 = 12023;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P0_4 = 12024;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP0_REG_P1_4 = 12025;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_0 = 12026;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_1 = 12027;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_0 = 12028;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_1 = 12029;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_2 = 12030;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_3 = 12031;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_2 = 12032;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_3 = 12033;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P0_4 = 12034;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP1_REG_P1_4 = 12035;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_0 = 12036;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_1 = 12037;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_0 = 12038;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_1 = 12039;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_2 = 12040;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_3 = 12041;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_2 = 12042;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_3 = 12043;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P0_4 = 12044;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP2_REG_P1_4 = 12045;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_0 = 12046;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_1 = 12047;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_0 = 12048;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_1 = 12049;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_2 = 12050;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_3 = 12051;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_2 = 12052;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_3 = 12053;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P0_4 = 12054;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_4_RP3_REG_P1_4 = 12055;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_0 = 12056;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_1 = 12057;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_0 = 12058;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_1 = 12059;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_2 = 12060;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_3 = 12061;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_2 = 12062;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_3 = 12063;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P0_4 = 12064;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP0_REG_P1_4 = 12065;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_0 = 12066;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_1 = 12067;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_0 = 12068;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_1 = 12069;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_2 = 12070;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_3 = 12071;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_2 = 12072;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_3 = 12073;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P0_4 = 12074;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP1_REG_P1_4 = 12075;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_0 = 12076;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_1 = 12077;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_0 = 12078;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_1 = 12079;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_2 = 12080;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_3 = 12081;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_2 = 12082;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_3 = 12083;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P0_4 = 12084;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP2_REG_P1_4 = 12085;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_0 = 12086;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_1 = 12087;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_0 = 12088;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_1 = 12089;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_2 = 12090;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_3 = 12091;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_2 = 12092;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_3 = 12093;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P0_4 = 12094;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_5_RP3_REG_P1_4 = 12095;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_0 = 12096;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_1 = 12097;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_0 = 12098;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_1 = 12099;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_2 = 12100;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_3 = 12101;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_2 = 12102;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_3 = 12103;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P0_4 = 12104;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP0_REG_P1_4 = 12105;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_0 = 12106;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_1 = 12107;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_0 = 12108;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_1 = 12109;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_2 = 12110;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_3 = 12111;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_2 = 12112;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_3 = 12113;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P0_4 = 12114;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP1_REG_P1_4 = 12115;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_0 = 12116;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_1 = 12117;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_0 = 12118;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_1 = 12119;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_2 = 12120;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_3 = 12121;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_2 = 12122;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_3 = 12123;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P0_4 = 12124;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP2_REG_P1_4 = 12125;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_0 = 12126;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_1 = 12127;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_0 = 12128;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_1 = 12129;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_2 = 12130;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_3 = 12131;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_2 = 12132;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_3 = 12133;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P0_4 = 12134;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_6_RP3_REG_P1_4 = 12135;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_0 = 12136;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_1 = 12137;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_0 = 12138;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_1 = 12139;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_2 = 12140;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_3 = 12141;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_2 = 12142;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_3 = 12143;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P0_4 = 12144;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP0_REG_P1_4 = 12145;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_0 = 12146;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_1 = 12147;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_0 = 12148;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_1 = 12149;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_2 = 12150;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_3 = 12151;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_2 = 12152;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_3 = 12153;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P0_4 = 12154;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP1_REG_P1_4 = 12155;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_0 = 12156;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_1 = 12157;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_0 = 12158;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_1 = 12159;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_2 = 12160;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_3 = 12161;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_2 = 12162;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_3 = 12163;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P0_4 = 12164;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP2_REG_P1_4 = 12165;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_0 = 12166;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_1 = 12167;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_0 = 12168;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_1 = 12169;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_2 = 12170;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_3 = 12171;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_2 = 12172;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_3 = 12173;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P0_4 = 12174;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_7_RP3_REG_P1_4 = 12175;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_0 = 12176;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_1 = 12177;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_0 = 12178;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_1 = 12179;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_2 = 12180;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_3 = 12181;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_2 = 12182;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_3 = 12183;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P0_4 = 12184;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP0_REG_P1_4 = 12185;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_0 = 12186;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_1 = 12187;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_0 = 12188;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_1 = 12189;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_2 = 12190;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_3 = 12191;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_2 = 12192;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_3 = 12193;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P0_4 = 12194;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP1_REG_P1_4 = 12195;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_0 = 12196;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_1 = 12197;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_0 = 12198;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_1 = 12199;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_2 = 12200;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_3 = 12201;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_2 = 12202;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_3 = 12203;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P0_4 = 12204;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP2_REG_P1_4 = 12205;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_0 = 12206;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_1 = 12207;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_0 = 12208;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_1 = 12209;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_2 = 12210;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_3 = 12211;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_2 = 12212;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_3 = 12213;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P0_4 = 12214;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_8_RP3_REG_P1_4 = 12215;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_0 = 12216;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_1 = 12217;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_0 = 12218;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_1 = 12219;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_2 = 12220;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_3 = 12221;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_2 = 12222;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_3 = 12223;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P0_4 = 12224;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP0_REG_P1_4 = 12225;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_0 = 12226;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_1 = 12227;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_0 = 12228;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_1 = 12229;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_2 = 12230;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_3 = 12231;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_2 = 12232;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_3 = 12233;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P0_4 = 12234;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP1_REG_P1_4 = 12235;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_0 = 12236;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_1 = 12237;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_0 = 12238;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_1 = 12239;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_2 = 12240;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_3 = 12241;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_2 = 12242;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_3 = 12243;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P0_4 = 12244;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP2_REG_P1_4 = 12245;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_0 = 12246;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_1 = 12247;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_0 = 12248;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_1 = 12249;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_2 = 12250;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_3 = 12251;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_2 = 12252;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_3 = 12253;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P0_4 = 12254;
static const uint64_t IDX_CEN_MBA_1_DP18_WR_DELAY_VALUE_9_RP3_REG_P1_4 = 12255;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_0 = 12256;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_1 = 12257;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_0 = 12258;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_1 = 12259;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_2 = 12260;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_3 = 12261;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_2 = 12262;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_3 = 12263;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P0_4 = 12264;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_DELAY_LINE_PWR_CTL_P1_4 = 12265;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P0_0 = 12266;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P0_1 = 12267;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P1_0 = 12268;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P1_1 = 12269;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P0_2 = 12270;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P0_3 = 12271;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P1_2 = 12272;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P1_3 = 12273;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P0_4 = 12274;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG3_P1_4 = 12275;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P0_0 = 12276;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P0_1 = 12277;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P1_0 = 12278;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P1_1 = 12279;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P0_2 = 12280;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P0_3 = 12281;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P1_2 = 12282;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P1_3 = 12283;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P0_4 = 12284;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG4_P1_4 = 12285;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P0_0 = 12286;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P0_1 = 12287;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P1_0 = 12288;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P1_1 = 12289;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P0_2 = 12290;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P0_3 = 12291;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P1_2 = 12292;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P1_3 = 12293;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P0_4 = 12294;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG5_P1_4 = 12295;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P0_0 = 12296;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P0_1 = 12297;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P1_0 = 12298;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P1_1 = 12299;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P0_2 = 12300;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P0_3 = 12301;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P1_2 = 12302;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P1_3 = 12303;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P0_4 = 12304;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG0_P1_4 = 12305;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P0_0_ROX = 12306;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P0_1_ROX = 12307;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P1_0_ROX = 12308;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P1_1_ROX = 12309;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P0_2_ROX = 12310;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P0_3_ROX = 12311;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P1_2_ROX = 12312;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P1_3_ROX = 12313;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P0_4_ROX = 12314;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG1_P1_4_ROX = 12315;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P0_0_ROX = 12316;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P0_1_ROX = 12317;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P1_0_ROX = 12318;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P1_1_ROX = 12319;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P0_2_ROX = 12320;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P0_3_ROX = 12321;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P1_2_ROX = 12322;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P1_3_ROX = 12323;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P0_4_ROX = 12324;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_DP18_RD_DIA_CONFIG2_P1_4_ROX = 12325;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_BIT_ENABLE_P0_ADR0 = 12326;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_BIT_ENABLE_P0_ADR1 = 12327;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_BIT_ENABLE_P1_ADR0 = 12328;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_BIT_ENABLE_P1_ADR1 = 12329;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_BIT_ENABLE_P0_ADR2 = 12330;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_BIT_ENABLE_P0_ADR3 = 12331;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_BIT_ENABLE_P1_ADR2 = 12332;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_BIT_ENABLE_P1_ADR3 = 12333;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY0_P0_ADR0 = 12334;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY0_P0_ADR1 = 12335;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY0_P1_ADR0 = 12336;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY0_P1_ADR1 = 12337;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY0_P0_ADR2 = 12338;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY0_P0_ADR3 = 12339;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY0_P1_ADR2 = 12340;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY0_P1_ADR3 = 12341;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY1_P0_ADR0 = 12342;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY1_P0_ADR1 = 12343;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY1_P1_ADR0 = 12344;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY1_P1_ADR1 = 12345;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY1_P0_ADR2 = 12346;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY1_P0_ADR3 = 12347;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY1_P1_ADR2 = 12348;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY1_P1_ADR3 = 12349;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY2_P0_ADR0 = 12350;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY2_P0_ADR1 = 12351;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY2_P1_ADR0 = 12352;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY2_P1_ADR1 = 12353;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY2_P0_ADR2 = 12354;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY2_P0_ADR3 = 12355;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY2_P1_ADR2 = 12356;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY2_P1_ADR3 = 12357;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY3_P0_ADR0 = 12358;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY3_P0_ADR1 = 12359;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY3_P1_ADR0 = 12360;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY3_P1_ADR1 = 12361;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY3_P0_ADR2 = 12362;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY3_P0_ADR3 = 12363;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY3_P1_ADR2 = 12364;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY3_P1_ADR3 = 12365;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY4_P0_ADR0 = 12366;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY4_P0_ADR1 = 12367;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY4_P1_ADR0 = 12368;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY4_P1_ADR1 = 12369;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY4_P0_ADR2 = 12370;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY4_P0_ADR3 = 12371;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY4_P1_ADR2 = 12372;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY4_P1_ADR3 = 12373;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY5_P0_ADR0 = 12374;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY5_P0_ADR1 = 12375;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY5_P1_ADR0 = 12376;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY5_P1_ADR1 = 12377;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY5_P0_ADR2 = 12378;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY5_P0_ADR3 = 12379;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY5_P1_ADR2 = 12380;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY5_P1_ADR3 = 12381;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY6_P0_ADR0 = 12382;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY6_P0_ADR1 = 12383;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY6_P1_ADR0 = 12384;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY6_P1_ADR1 = 12385;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY6_P0_ADR2 = 12386;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY6_P0_ADR3 = 12387;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY6_P1_ADR2 = 12388;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY6_P1_ADR3 = 12389;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY7_P0_ADR0 = 12390;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY7_P0_ADR1 = 12391;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY7_P1_ADR0 = 12392;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY7_P1_ADR1 = 12393;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY7_P0_ADR2 = 12394;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY7_P0_ADR3 = 12395;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY7_P1_ADR2 = 12396;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DELAY7_P1_ADR3 = 12397;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR0_ROX = 12398;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR1_ROX = 12399;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR0_ROX = 12400;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR1_ROX = 12401;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR2_ROX = 12402;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P0_ADR3_ROX = 12403;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR2_ROX = 12404;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DFT_WRAP_STATUS_CONTROL_P1_ADR3_ROX = 12405;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR0 = 12406;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR1 = 12407;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR0 = 12408;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR1 = 12409;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR2 = 12410;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DIFFPAIR_ENABLE_P0_ADR3 = 12411;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR2 = 12412;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_DIFFPAIR_ENABLE_P1_ADR3 = 12413;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR0 = 12414;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR1 = 12415;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR0 = 12416;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR1 = 12417;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR2 = 12418;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P0_ADR3 = 12419;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR2 = 12420;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP0_P1_ADR3 = 12421;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR0 = 12422;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR1 = 12423;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR0 = 12424;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR1 = 12425;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR2 = 12426;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P0_ADR3 = 12427;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR2 = 12428;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_FET_SLICE_EN_MAP1_P1_ADR3 = 12429;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR0 = 12430;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR1 = 12431;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR0 = 12432;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR1 = 12433;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR2 = 12434;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P0_ADR3 = 12435;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR2 = 12436;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP0_P1_ADR3 = 12437;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR0 = 12438;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR1 = 12439;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR0 = 12440;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR1 = 12441;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR2 = 12442;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P0_ADR3 = 12443;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR2 = 12444;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_MAP1_P1_ADR3 = 12445;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR0 = 12446;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR1 = 12447;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR0 = 12448;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR1 = 12449;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR2 = 12450;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P0_ADR3 = 12451;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR2 = 12452;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_IO_SLEW_CTL_VALUE_P1_ADR3 = 12453;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S0 = 12454;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P0_ADR32S1 = 12455;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S0 = 12456;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_MCCLK_WRCLK_PR_STATIC_OFFSET_P1_ADR32S1 = 12457;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S0 = 12458;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P0_ADR32S1 = 12459;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S0 = 12460;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE0_P1_ADR32S1 = 12461;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S0 = 12462;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P0_ADR32S1 = 12463;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S0 = 12464;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_DRIVER_FORCE_VALUE1_P1_ADR32S1 = 12465;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S0 = 12466;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P0_ADR32S1 = 12467;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S0 = 12468;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_OUTPUT_FORCE_ATEST_CNTL_P1_ADR32S1 = 12469;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S0 = 12470;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_PLL_VREG_CONFIG_0_P0_ADR32S1 = 12471;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S0 = 12472;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_PLL_VREG_CONFIG_0_P1_ADR32S1 = 12473;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S0 = 12474;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_PLL_VREG_CONFIG_1_P0_ADR32S1 = 12475;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S0 = 12476;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_PLL_VREG_CONFIG_1_P1_ADR32S1 = 12477;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_POWERDOWN_2_P0_ADR0 = 12478;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_POWERDOWN_2_P0_ADR1 = 12479;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_POWERDOWN_2_P1_ADR0 = 12480;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_POWERDOWN_2_P1_ADR1 = 12481;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_POWERDOWN_2_P0_ADR2 = 12482;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_POWERDOWN_2_P0_ADR3 = 12483;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_POWERDOWN_2_P1_ADR2 = 12484;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_POWERDOWN_2_P1_ADR3 = 12485;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S0 = 12486;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SLEW_CAL_CNTL_P0_ADR32S1 = 12487;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S0 = 12488;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SLEW_CAL_CNTL_P1_ADR32S1 = 12489;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S0 = 12490;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SYSCLK_CNTL_PR_P0_ADR32S1 = 12491;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S0 = 12492;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SYSCLK_CNTL_PR_P1_ADR32S1 = 12493;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S0_RO = 12494;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P0_ADR32S1_RO = 12495;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S0_RO = 12496;
static const uint64_t IDX_CEN_MBA_1_DDRPHY_ADR_SYSCLK_PR_VALUE_RO_P1_ADR32S1_RO = 12497;
static const uint64_t IDX_CEN_MBA_1_PHY23_DDRPHY_FIR_ACTION0_REG_RO = 12498;
static const uint64_t IDX_CEN_MBA_1_PHY23_DDRPHY_FIR_ACTION1_REG_RO = 12499;
static const uint64_t IDX_CEN_MBA_1_PHY23_DDRPHY_FIR_MASK_REG = 12500;
static const uint64_t IDX_CEN_MBA_1_PHY23_DDRPHY_FIR_MASK_REG_WO_AND = 12501;
static const uint64_t IDX_CEN_MBA_1_PHY23_DDRPHY_FIR_MASK_REG_WO_OR = 12502;
static const uint64_t IDX_CEN_MBA_1_PHY23_DDRPHY_FIR_REG = 12503;
static const uint64_t IDX_CEN_MBA_1_PHY23_DDRPHY_FIR_REG_WOX_AND = 12504;
static const uint64_t IDX_CEN_MBA_1_PHY23_DDRPHY_FIR_REG_WOX_OR = 12505;
static const uint64_t IDX_CEN_MBA_1_PHY23_DDRPHY_FIR_WOF_REG = 12506;
static const uint64_t IDX_CEN_FBNAMC = 12507;
static const uint64_t IDX_CEN_FBNBAC = 12508;
static const uint64_t IDX_CEN_FBNCNTL = 12509;
static const uint64_t IDX_CEN_FBNCSPCR = 12510;
static const uint64_t IDX_CEN_FBNDCM0 = 12511;
static const uint64_t IDX_CEN_FBNDCM1 = 12512;
static const uint64_t IDX_CEN_FBNDCM10 = 12513;
static const uint64_t IDX_CEN_FBNDCM11 = 12514;
static const uint64_t IDX_CEN_FBNDCM12 = 12515;
static const uint64_t IDX_CEN_FBNDCM13 = 12516;
static const uint64_t IDX_CEN_FBNDCM14 = 12517;
static const uint64_t IDX_CEN_FBNDCM15 = 12518;
static const uint64_t IDX_CEN_FBNDCM2 = 12519;
static const uint64_t IDX_CEN_FBNDCM3 = 12520;
static const uint64_t IDX_CEN_FBNDCM4 = 12521;
static const uint64_t IDX_CEN_FBNDCM5 = 12522;
static const uint64_t IDX_CEN_FBNDCM6 = 12523;
static const uint64_t IDX_CEN_FBNDCM7 = 12524;
static const uint64_t IDX_CEN_FBNDCM8 = 12525;
static const uint64_t IDX_CEN_FBNDCM9 = 12526;
static const uint64_t IDX_CEN_FBNDCR = 12527;
static const uint64_t IDX_CEN_FBNDMEC0_ROX = 12528;
static const uint64_t IDX_CEN_FBNDMEC1_ROX = 12529;
static const uint64_t IDX_CEN_FBNDMEC2_ROX = 12530;
static const uint64_t IDX_CEN_FBNDMEC3_ROX = 12531;
static const uint64_t IDX_CEN_FBNEA_ROX = 12532;
static const uint64_t IDX_CEN_FBNEAC = 12533;
static const uint64_t IDX_CEN_FBNED0_ROX = 12534;
static const uint64_t IDX_CEN_FBNED1_ROX = 12535;
static const uint64_t IDX_CEN_FBNED10_ROX = 12536;
static const uint64_t IDX_CEN_FBNED11_ROX = 12537;
static const uint64_t IDX_CEN_FBNED12_ROX = 12538;
static const uint64_t IDX_CEN_FBNED13_ROX = 12539;
static const uint64_t IDX_CEN_FBNED14_ROX = 12540;
static const uint64_t IDX_CEN_FBNED15_ROX = 12541;
static const uint64_t IDX_CEN_FBNED2_ROX = 12542;
static const uint64_t IDX_CEN_FBNED3_ROX = 12543;
static const uint64_t IDX_CEN_FBNED4_ROX = 12544;
static const uint64_t IDX_CEN_FBNED5_ROX = 12545;
static const uint64_t IDX_CEN_FBNED6_ROX = 12546;
static const uint64_t IDX_CEN_FBNED7_ROX = 12547;
static const uint64_t IDX_CEN_FBNED8_ROX = 12548;
static const uint64_t IDX_CEN_FBNED9_ROX = 12549;
static const uint64_t IDX_CEN_FBNEIR_ROX = 12550;
static const uint64_t IDX_CEN_FBNEMS_ROX = 12551;
static const uint64_t IDX_CEN_FBNHPC = 12552;
static const uint64_t IDX_CEN_FBNM0_ROX = 12553;
static const uint64_t IDX_CEN_FBNM1_ROX = 12554;
static const uint64_t IDX_CEN_FBNMR0 = 12555;
static const uint64_t IDX_CEN_FBNMR1 = 12556;
static const uint64_t IDX_CEN_FBNMR2 = 12557;
static const uint64_t IDX_CEN_FBNMR3 = 12558;
static const uint64_t IDX_CEN_FBNMR4 = 12559;
static const uint64_t IDX_CEN_FBNMR5 = 12560;
static const uint64_t IDX_CEN_FBNMR6 = 12561;
static const uint64_t IDX_CEN_FBNMR7 = 12562;
static const uint64_t IDX_CEN_FBNPAM0 = 12563;
static const uint64_t IDX_CEN_FBNPAM1 = 12564;
static const uint64_t IDX_CEN_FBNPARM0 = 12565;
static const uint64_t IDX_CEN_FBNRAER = 12566;
static const uint64_t IDX_CEN_FBNRAG = 12567;
static const uint64_t IDX_CEN_FBNRAMR = 12568;
static const uint64_t IDX_CEN_FBNRASR = 12569;
static const uint64_t IDX_CEN_FBNRCCR = 12570;
static const uint64_t IDX_CEN_FBNRCSR = 12571;
static const uint64_t IDX_CEN_FBNRD0_ROX = 12572;
static const uint64_t IDX_CEN_FBNRD1_ROX = 12573;
static const uint64_t IDX_CEN_FBNRD10_ROX = 12574;
static const uint64_t IDX_CEN_FBNRD11_ROX = 12575;
static const uint64_t IDX_CEN_FBNRD12_ROX = 12576;
static const uint64_t IDX_CEN_FBNRD13_ROX = 12577;
static const uint64_t IDX_CEN_FBNRD14_ROX = 12578;
static const uint64_t IDX_CEN_FBNRD15_ROX = 12579;
static const uint64_t IDX_CEN_FBNRD2_ROX = 12580;
static const uint64_t IDX_CEN_FBNRD3_ROX = 12581;
static const uint64_t IDX_CEN_FBNRD4_ROX = 12582;
static const uint64_t IDX_CEN_FBNRD5_ROX = 12583;
static const uint64_t IDX_CEN_FBNRD6_ROX = 12584;
static const uint64_t IDX_CEN_FBNRD7_ROX = 12585;
static const uint64_t IDX_CEN_FBNRD8_ROX = 12586;
static const uint64_t IDX_CEN_FBNRD9_ROX = 12587;
static const uint64_t IDX_CEN_FBNRDSR0 = 12588;
static const uint64_t IDX_CEN_FBNRDSR1 = 12589;
static const uint64_t IDX_CEN_FBNRMWC = 12590;
static const uint64_t IDX_CEN_FBNRTCTR_ROX = 12591;
static const uint64_t IDX_CEN_FBNSAC = 12592;
static const uint64_t IDX_CEN_FBNTT = 12593;
static const uint64_t IDX_CEN_FBNUD0 = 12594;
static const uint64_t IDX_CEN_FBNUD1 = 12595;
static const uint64_t IDX_CEN_FBNUD10 = 12596;
static const uint64_t IDX_CEN_FBNUD11 = 12597;
static const uint64_t IDX_CEN_FBNUD12 = 12598;
static const uint64_t IDX_CEN_FBNUD13 = 12599;
static const uint64_t IDX_CEN_FBNUD14 = 12600;
static const uint64_t IDX_CEN_FBNUD15 = 12601;
static const uint64_t IDX_CEN_FBNUD2 = 12602;
static const uint64_t IDX_CEN_FBNUD3 = 12603;
static const uint64_t IDX_CEN_FBNUD4 = 12604;
static const uint64_t IDX_CEN_FBNUD5 = 12605;
static const uint64_t IDX_CEN_FBNUD6 = 12606;
static const uint64_t IDX_CEN_FBNUD7 = 12607;
static const uint64_t IDX_CEN_FBNUD8 = 12608;
static const uint64_t IDX_CEN_FBNUD9 = 12609;
static const uint64_t IDX_CEN_FBN_FIR_ACTION0_REG = 12610;
static const uint64_t IDX_CEN_FBN_FIR_ACTION1_REG = 12611;
static const uint64_t IDX_CEN_FBN_FIR_MASK_REG = 12612;
static const uint64_t IDX_CEN_FBN_FIR_MASK_REG_WO_AND = 12613;
static const uint64_t IDX_CEN_FBN_FIR_MASK_REG_WO_OR = 12614;
static const uint64_t IDX_CEN_FBN_FIR_REG = 12615;
static const uint64_t IDX_CEN_FBN_FIR_REG_WOX_AND = 12616;
static const uint64_t IDX_CEN_FBN_FIR_REG_WOX_OR = 12617;
static const uint64_t IDX_CEN_FBMCRCR = 12618;
static const uint64_t IDX_CEN_FBMDCM0 = 12619;
static const uint64_t IDX_CEN_FBMDCM1 = 12620;
static const uint64_t IDX_CEN_FBMDCM10 = 12621;
static const uint64_t IDX_CEN_FBMDCM11 = 12622;
static const uint64_t IDX_CEN_FBMDCM12 = 12623;
static const uint64_t IDX_CEN_FBMDCM13 = 12624;
static const uint64_t IDX_CEN_FBMDCM14 = 12625;
static const uint64_t IDX_CEN_FBMDCM15 = 12626;
static const uint64_t IDX_CEN_FBMDCM2 = 12627;
static const uint64_t IDX_CEN_FBMDCM3 = 12628;
static const uint64_t IDX_CEN_FBMDCM4 = 12629;
static const uint64_t IDX_CEN_FBMDCM5 = 12630;
static const uint64_t IDX_CEN_FBMDCM6 = 12631;
static const uint64_t IDX_CEN_FBMDCM7 = 12632;
static const uint64_t IDX_CEN_FBMDCM8 = 12633;
static const uint64_t IDX_CEN_FBMDCM9 = 12634;
static const uint64_t IDX_CEN_FBMDCR = 12635;
static const uint64_t IDX_CEN_FBMDMEC0_ROX = 12636;
static const uint64_t IDX_CEN_FBMDMEC1_ROX = 12637;
static const uint64_t IDX_CEN_FBMDMEC2_ROX = 12638;
static const uint64_t IDX_CEN_FBMDMEC3_ROX = 12639;
static const uint64_t IDX_CEN_FBMEA_ROX = 12640;
static const uint64_t IDX_CEN_FBMED0_ROX = 12641;
static const uint64_t IDX_CEN_FBMED1_ROX = 12642;
static const uint64_t IDX_CEN_FBMED10_ROX = 12643;
static const uint64_t IDX_CEN_FBMED11_ROX = 12644;
static const uint64_t IDX_CEN_FBMED12_ROX = 12645;
static const uint64_t IDX_CEN_FBMED13_ROX = 12646;
static const uint64_t IDX_CEN_FBMED14_ROX = 12647;
static const uint64_t IDX_CEN_FBMED15_ROX = 12648;
static const uint64_t IDX_CEN_FBMED2_ROX = 12649;
static const uint64_t IDX_CEN_FBMED3_ROX = 12650;
static const uint64_t IDX_CEN_FBMED4_ROX = 12651;
static const uint64_t IDX_CEN_FBMED5_ROX = 12652;
static const uint64_t IDX_CEN_FBMED6_ROX = 12653;
static const uint64_t IDX_CEN_FBMED7_ROX = 12654;
static const uint64_t IDX_CEN_FBMED8_ROX = 12655;
static const uint64_t IDX_CEN_FBMED9_ROX = 12656;
static const uint64_t IDX_CEN_FBMEIR_ROX = 12657;
static const uint64_t IDX_CEN_FBMM0_ROX = 12658;
static const uint64_t IDX_CEN_FBMM1_ROX = 12659;
static const uint64_t IDX_CEN_FBMMC0 = 12660;
static const uint64_t IDX_CEN_FBMMR0 = 12661;
static const uint64_t IDX_CEN_FBMMR1 = 12662;
static const uint64_t IDX_CEN_FBMMR2 = 12663;
static const uint64_t IDX_CEN_FBMMR3 = 12664;
static const uint64_t IDX_CEN_FBMMR4 = 12665;
static const uint64_t IDX_CEN_FBMMR5 = 12666;
static const uint64_t IDX_CEN_FBMMR6 = 12667;
static const uint64_t IDX_CEN_FBMMR7 = 12668;
static const uint64_t IDX_CEN_FBMPARM0 = 12669;
static const uint64_t IDX_CEN_FBMRD0_ROX = 12670;
static const uint64_t IDX_CEN_FBMRD1_ROX = 12671;
static const uint64_t IDX_CEN_FBMRD10_ROX = 12672;
static const uint64_t IDX_CEN_FBMRD11_ROX = 12673;
static const uint64_t IDX_CEN_FBMRD12_ROX = 12674;
static const uint64_t IDX_CEN_FBMRD13_ROX = 12675;
static const uint64_t IDX_CEN_FBMRD14_ROX = 12676;
static const uint64_t IDX_CEN_FBMRD15_ROX = 12677;
static const uint64_t IDX_CEN_FBMRD2_ROX = 12678;
static const uint64_t IDX_CEN_FBMRD3_ROX = 12679;
static const uint64_t IDX_CEN_FBMRD4_ROX = 12680;
static const uint64_t IDX_CEN_FBMRD5_ROX = 12681;
static const uint64_t IDX_CEN_FBMRD6_ROX = 12682;
static const uint64_t IDX_CEN_FBMRD7_ROX = 12683;
static const uint64_t IDX_CEN_FBMRD8_ROX = 12684;
static const uint64_t IDX_CEN_FBMRD9_ROX = 12685;
static const uint64_t IDX_CEN_FBMRDDR = 12686;
static const uint64_t IDX_CEN_FBMRDSR0 = 12687;
static const uint64_t IDX_CEN_FBMRDSR1 = 12688;
static const uint64_t IDX_CEN_FBMRMWC = 12689;
static const uint64_t IDX_CEN_FBMUD0 = 12690;
static const uint64_t IDX_CEN_FBMUD1 = 12691;
static const uint64_t IDX_CEN_FBMUD10 = 12692;
static const uint64_t IDX_CEN_FBMUD11 = 12693;
static const uint64_t IDX_CEN_FBMUD12 = 12694;
static const uint64_t IDX_CEN_FBMUD13 = 12695;
static const uint64_t IDX_CEN_FBMUD14 = 12696;
static const uint64_t IDX_CEN_FBMUD15 = 12697;
static const uint64_t IDX_CEN_FBMUD2 = 12698;
static const uint64_t IDX_CEN_FBMUD3 = 12699;
static const uint64_t IDX_CEN_FBMUD4 = 12700;
static const uint64_t IDX_CEN_FBMUD5 = 12701;
static const uint64_t IDX_CEN_FBMUD6 = 12702;
static const uint64_t IDX_CEN_FBMUD7 = 12703;
static const uint64_t IDX_CEN_FBMUD8 = 12704;
static const uint64_t IDX_CEN_FBMUD9 = 12705;
static const uint64_t IDX_CEN_FBM_FIR_ACTION0_REG = 12706;
static const uint64_t IDX_CEN_FBM_FIR_ACTION1_REG = 12707;
static const uint64_t IDX_CEN_FBM_FIR_MASK_REG = 12708;
static const uint64_t IDX_CEN_FBM_FIR_MASK_REG_WO_AND = 12709;
static const uint64_t IDX_CEN_FBM_FIR_MASK_REG_WO_OR = 12710;
static const uint64_t IDX_CEN_FBM_FIR_REG = 12711;
static const uint64_t IDX_CEN_FBM_FIR_REG_WOX_AND = 12712;
static const uint64_t IDX_CEN_FBM_FIR_REG_WOX_OR = 12713;
#endif
