Update target_instances_v3.xml

Added Naples.

1 files changed, 534 insertions, 0 deletions

diff --git a/xml/target_instances_v3.xml b/xml/target_instances_v3.xml
index b905106..dc394b1 100644
--- a/xml/target_instances_v3.xml
+++ b/xml/target_instances_v3.xml
@@ -872,6 +872,540 @@
 		</attribute>
 	</targetInstance>
 
+	<!-- Naples -->
+	<targetInstance>
+		<type>module-module-dellovo</type>
+		<instance_name>module</instance_name>
+		<child_id>proc</child_id>
+		<attribute>
+			<id>POSITION</id>
+			<default>0</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>chip-processor-naples</type>
+		<id>proc</id>
+		<child_id>ex-1</child_id>
+		<child_id>ex-2</child_id>
+		<child_id>ex-3</child_id>
+		<child_id>ex-4</child_id>
+		<child_id>ex-5</child_id>
+		<child_id>ex-6</child_id>
+		<child_id>ex-9</child_id>
+		<child_id>ex-10</child_id>
+		<child_id>ex-11</child_id>
+		<child_id>ex-12</child_id>
+		<child_id>ex-13</child_id>
+		<child_id>ex-14</child_id>
+		<child_id>pore-0</child_id>
+		<child_id>capp-0</child_id>
+		<child_id>nx-0</child_id>
+		<child_id>occ-0</child_id>
+		<child_id>pci_configs</child_id>
+		<hidden_child_id>pci-0</hidden_child_id>
+		<hidden_child_id>pci-1</hidden_child_id>
+		<hidden_child_id>pci-2</hidden_child_id>
+		<hidden_child_id>pci-3</hidden_child_id>
+		<hidden_child_id>xbus-0</hidden_child_id>
+		<child_id>xbus-1</child_id>
+		<hidden_child_id>xbus-2</hidden_child_id>
+		<hidden_child_id>xbus-3</hidden_child_id>
+		<child_id>mcs-0</child_id>
+		<child_id>mcs-1</child_id>
+		<hidden_child_id>mcs-2</hidden_child_id>
+		<hidden_child_id>mcs-3</hidden_child_id>
+		<child_id>mcs-4</child_id>
+		<child_id>mcs-5</child_id>
+		<hidden_child_id>mcs-6</hidden_child_id>
+		<hidden_child_id>mcs-7</hidden_child_id>
+		<child_id>fsi-slave-0</child_id>
+		<child_id>fsi-cm-0</child_id>
+		<child_id>fsi-cm-1</child_id>
+		<child_id>fsi-cm-2</child_id>
+		<child_id>fsi-cm-3</child_id>
+		<child_id>fsim-0</child_id>
+		<child_id>fsim-1</child_id>
+		<child_id>fsim-2</child_id>
+		<child_id>i2c-slave</child_id>
+		<child_id>i2c-master-lightpath</child_id>
+		<child_id>i2c-master-hotplug</child_id>
+		<child_id>lpc-slave</child_id>
+		<child_id>proc_fru_assoc</child_id>
+		<hidden_child_id>cpu_temp_sensor</hidden_child_id>
+		<hidden_child_id>cpu_func_sensor</hidden_child_id>
+		<attribute>
+			<id>POSITION</id>
+			<default>0</default>
+		</attribute>
+	</targetInstance>
+
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-1</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>1</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-2</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>2</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-3</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>3</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-4</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>4</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-5</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>5</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-6</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>6</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-9</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>9</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-10</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>10</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-11</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>11</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-12</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>12</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-13</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>13</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-ex-naples</type>
+		<id>ex-14</id>
+		<child_id>core-0</child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>14</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-core-naples</type>
+		<id>core-0</id>
+		<hidden_child_id>cpucore_temp_sensor</hidden_child_id>
+		<hidden_child_id>cpucore_func_sensor</hidden_child_id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>0</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-pore-naples</type>
+		<id>pore-0</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>0</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-nx-naples</type>
+		<id>nx-0</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>0</default>
+		</attribute>
+	</targetInstance>
+
+	<!-- PCIe instances -->
+	<targetInstance>
+		<type>unit-pciconfigs-naples</type>
+		<id>pci_configs</id>
+		<child_id>E0_x16:E1_x16</child_id>
+		<child_id>E0_x16:E1_x8x8</child_id>
+	</targetInstance>
+
+	<targetInstance>
+		<type>unit-pciconfig0-naples</type>
+		<id>E0_x16:E1_x16</id>
+		<child_id>E0_x16</child_id>
+		<child_id>E1_x16</child_id>
+			<attribute>
+		<id>PCIE_LANE_SWAP_TABLE</id>
+		<default>
+		000,010,001,011,111,101,110,100,
+		000,010,001,011,110,101,110,100
+		 </default>
+		</attribute>
+			<attribute>
+			<id>IO_CONFIG_NUM</id>
+			<default>1</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-pciconfig1-naples</type>
+		<id>E0_x16:E1_x8x8</id>
+		<child_id>E0_x16</child_id>
+		<child_id>E1_CLK0_x8</child_id>
+		<child_id>E1_CLK1_x8</child_id>
+			<attribute>
+		<id>PCIE_LANE_SWAP_TABLE</id>
+		<default>
+		000,010,001,011,111,101,110,100,
+		000,010,001,011,000,010,001,011
+		 </default>
+		</attribute>
+			<attribute>
+			<id>IO_CONFIG_NUM</id>
+			<default>2</default>
+		</attribute>
+	</targetInstance>
+
+	<!-- IOP0 config 0: PHB0=x16 -->
+	<targetInstance>
+		<type>unit-pci-naples</type>
+		<id>E0_x16</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>0</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_NUM_LANES</id>
+			<default>16</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_LANE_MASK</id>
+			<default>0xFFFF</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_LANE_SET</id>
+			<default>0</default>
+		</attribute>
+		<attribute>
+			<id>PHB_NUM</id>
+			<default>0</default>
+		</attribute>
+		<attribute>
+			<id>IOP_NUM</id>
+			<default>0</default>
+		</attribute>
+	</targetInstance>
+
+	<!-- IOP1 config: PHB1=x16 -->
+	<targetInstance>
+		<type>unit-pci-naples</type>
+		<id>E1_x16</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>1</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_NUM_LANES</id>
+			<default>16</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_LANE_MASK</id>
+			<default>0xFFFF</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_LANE_SET</id>
+			<default>0</default>
+		</attribute>
+		<attribute>
+			<id>PHB_NUM</id>
+			<default>1</default>
+		</attribute>
+		<attribute>
+			<id>IOP_NUM</id>
+			<default>1</default>
+		</attribute>
+	</targetInstance>
+
+	<!-- IOP1 config 1: PHB1=x8, PHB2=x8 -->
+	<targetInstance>
+		<type>unit-pci-naples</type>
+		<id>E1_CLK0_x8</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>1</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_NUM_LANES</id>
+			<default>8</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_LANE_MASK</id>
+			<default>0xFF00</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_LANE_SET</id>
+			<default>0</default>
+		</attribute>
+		<attribute>
+			<id>PHB_NUM</id>
+			<default>1</default>
+		</attribute>
+		<attribute>
+			<id>IOP_NUM</id>
+			<default>1</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-pci-naples</type>
+		<id>E1_CLK1_x8</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>1</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_NUM_LANES</id>
+			<default>8</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_LANE_MASK</id>
+			<default>0x00FF</default>
+		</attribute>
+		<attribute>
+			<id>PCIE_LANE_SET</id>
+			<default>1</default>
+		</attribute>
+		<attribute>
+			<id>PHB_NUM</id>
+			<default>2</default>
+		</attribute>
+		<attribute>
+			<id>IOP_NUM</id>
+			<default>1</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-pci-naples</type>
+		<id>pci-0</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>0</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-pci-naples</type>
+		<id>pci-1</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>1</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-pci-naples</type>
+		<id>pci-2</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>2</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-pci-naples</type>
+		<id>pci-3</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>3</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-mcs-naples</type>
+		<id>mcs-0</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>0</default>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+			<default>M0 DMI D</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-mcs-naples</type>
+		<id>mcs-1</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>1</default>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+			<default>M0 DMI C</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-mcs-naples</type>
+		<id>mcs-2</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>2</default>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+			<default>M1 DMI A</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-mcs-naples</type>
+		<id>mcs-3</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>3</default>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+			<default>M1 DMI B</default>
+		</attribute>
+	</targetInstance>
+
+	<targetInstance>
+		<type>unit-mcs-naples</type>
+		<id>mcs-4</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>4</default>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+			<default>M1 DMI D</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-mcs-naples</type>
+		<id>mcs-5</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>5</default>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+			<default>M1 DMI C</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-mcs-naples</type>
+		<id>mcs-6</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>6</default>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+			<default>M0 DMI C</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-mcs-naples</type>
+		<id>mcs-7</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>7</default>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+			<default>M0 DMI C</default>
+		</attribute>
+	</targetInstance>
+
+	<targetInstance>
+		<type>unit-capp-naples</type>
+		<id>capp-0</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>0</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-xbus-naples</type>
+		<id>xbus-0</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>0</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-xbus-naples</type>
+		<id>xbus-1</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>1</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-xbus-naples</type>
+		<id>xbus-2</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>2</default>
+		</attribute>
+	</targetInstance>
+	<targetInstance>
+		<type>unit-xbus-naples</type>
+		<id>xbus-3</id>
+		<attribute>
+			<id>CHIP_UNIT</id>
+			<default>3</default>
+		</attribute>
+	</targetInstance>
+
 
 	<!-- Centaur -->
 	<targetInstance>