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* gcc/ChangeLogbonzini2004-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2004-03-16 Paolo Bonzini <bonzini@gnu.org> * c-common.c (c_common_type_for_mode): Build vector types on demand. (handle_mode_attribute): Deprecate using the mode attribute to create vector types. Fix indentation. (vector_type_node_list): Remove. (handle_vector_size_attribute): Create vector types on demand. Strip a NON_LVALUE_EXPR from the attribute if there is one. * c-typeck.c (comptypes): Make vector types compatible if they have the same underlying mode. (convert_for_assignment): Use comptypes to convert between vector types. * tree.c (build_common_tree_nodes_2): Do not create vector types. * config/arm/arm.c (arm_init_iwmmxt_builtins): Create necessary vector types. * tree.h: Remove vector types. * config/i386/i386.c (i386_init_mmx_sse_builtins): Likewise. * config/rs6000/rs6000.c (rs6000_init_builtins): Likewise. (V16QI_type_node, V2SI_type_node, V2SF_type_node, V4HI_type_node, V4SI_type_node, V4SF_type_node, V8HI_type_node): New globals. * doc/extend.texi (Vector Types): Document how to use the vector_size attribute to create vectors, rather than mode. * config/arm/mmintrin.h: Use vector_size attribute, not mode. * config/i386/emmintrin.h: Likewise. * config/i386/mmintrin.h: Likewise. * config/i386/xmmintrin.h: Likewise. * config/sh/ushmedia.h: Likwise. testsuite/ChangeLog 2004-03-16 Paolo Bonzini <bonzini@gnu.org> * g++.dg/eh/simd-1.C: Use vector_size attribute, not mode. * g++.dg/eh/simd-2.C: Likewise. * g++.dg/init/array10.C: Likewise. * gcc.c-torture/compile/simd-1.c: Likewise. * gcc.c-torture/compile/simd-2.c: Likewise. * gcc.c-torture/compile/simd-3.c: Likewise. * gcc.c-torture/compile/simd-4.c: Likewise. * gcc.c-torture/compile/simd-6.c: Likewise. * gcc.c-torture/execute/simd-1.c: Likewise. * gcc.c-torture/execute/simd-2.c: Likewise. * gcc.dg/compat/vector-defs.h: Likewise. * gcc.dg/20020531-1.c: Likewise. * gcc.dg/altivec-3.c: Likewise. * gcc.dg/altivec-4.c: Likewise. * gcc.dg/altivec-varargs-1.c: Likewise. * testsuite/gcc.dg/compat/vector-defs.h: Likewise. * gcc.dg/i386-mmx-3.c: Likewise. * gcc.dg/i386-sse-4.c: Likewise. * gcc.dg/i386-sse-5.c: Likewise. * gcc.dg/i386-sse-8.c: Likewise. * gcc.dg/simd-1.c: Likewise. * gcc.dg/20030218-1.c: Likewise. Plus, do not declare __ev64_opaque__ since the machine description provides it. Index: c-common.c =================================================================== RCS file: /cvs/gcc/gcc/gcc/c-common.c,v retrieving revision 1.487 diff -u -r1.487 c-common.c --- c-common.c 26 Feb 2004 01:24:37 -0000 1.487 +++ c-common.c 10 Mar 2004 10:25:28 -0000 @@ -1874,38 +1874,12 @@ if (mode == TYPE_MODE (build_pointer_type (integer_type_node))) return unsignedp ? make_unsigned_type (mode) : make_signed_type (mode); - switch (mode) + if (VECTOR_MODE_P (mode)) { - case V16QImode: git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@79544 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc:amylaar2002-07-031-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * optabs.c (expand_vector_binop): Don't store using a SUBREG smaller than UNITS_PER_WORD, unless this is little endian and the first unit in this word. Let extract_bit_field decide how to load an element. Force arguments to matching mode. (expand_vector_unop): Likewise. * simplify-rtx.c (simplify_subreg): Don't assume that all vectors consist of word_mode elements. * c-typeck.c (build_binary_op): Allow vector types for BIT_AND_EXPR, BIT_ANDTC_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR. (build_unary_op): Allow vector types for BIT_NOT_EPR. * emit-rtl.c (gen_lowpart_common): Use simplify_gen_subreg for CONST_VECTOR. * optabs.c (expand_vector_binop): Try to perform operation in smaller vector modes with same inner size. Add handling of AND, IOR and XOR. Reject expansion to inner-mode sized scalars when using OPTAB_DIRECT. Use simplify_gen_subreg on constants. (expand_vector_unop): Try to perform operation in smaller vector modes with same inner size. Add handling of one's complement. When there is no vector negate operation, try a vector subtract operation. Use simplify_gen_subreg on constants. * simplify-rtx.c (simplify_subreg): Add capability to convert vector constants into smaller vectors with same inner mode, and to integer CONST_DOUBLEs. gcc/testsuite: * gcc.c-torture/execute/simd-1.c (main): Also test &, |, ^, ~. * gcc.c-torture/execute/simd-2.c (main): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@55209 138bc75d-0d04-0410-961f-82ee72b054a4
* * gcc.c-torture/execute/simd-2.c (i, j): Add initializer elements toamylaar2002-06-271-2/+2
| | | | | | | avoid division by zero. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@55030 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc:amylaar2002-06-251-0/+53
* optabs.c (expand_vector_binop, expand_vector_unop): Don't assume GET_MODE_UNIT_SIZE (mode) == UNITS_PER_WORD. gcc/testsuite: * gcc.c-torture/execute/simd-2.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@54994 138bc75d-0d04-0410-961f-82ee72b054a4
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