diff options
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 9 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 14 | ||||
-rw-r--r-- | gcc/config/rs6000/spe.md | 25 |
3 files changed, 31 insertions, 17 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2df61916674..cb4c1fc188b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2004-02-26 Aldy Hernandez <aldyh@redhat.com> + + * config/rs6000/rs6000.md: Add fixuns_truncsfsi2 and + fix_truncsfsi2. + + * config/rs6000/spe.md: Delete spe_efsctuiz. + Add spe_fixuns_truncsfsi2. + Add spe_fix_truncsfsi2. + 2004-02-26 Eric Christopher <echristo@redhat.com> * c-lex.c (c_lex_string_translate): New variable. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index b49a0acbc8a..af0d781d148 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4959,6 +4959,20 @@ "fsel %0,%1,%2,%3" [(set_attr "type" "fp")]) +;; Conversions to and from floating-point. + +(define_expand "fixuns_truncsfsi2" + [(set (match_operand:SI 0 "gpc_reg_operand" "") + (unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "")))] + "TARGET_HARD_FLOAT && !TARGET_FPRS" + "") + +(define_expand "fix_truncsfsi2" + [(set (match_operand:SI 0 "gpc_reg_operand" "") + (fix:SI (match_operand:SF 1 "gpc_reg_operand" "")))] + "TARGET_HARD_FLOAT && !TARGET_FPRS" + "") + ; For each of these conversions, there is a define_expand, a define_insn ; with a '#' template, and a define_split (with C code). The idea is ; to allow constant folding with the template of the define_insn, diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md index 07ee0987198..cd4771f6096 100644 --- a/gcc/config/rs6000/spe.md +++ b/gcc/config/rs6000/spe.md @@ -76,28 +76,19 @@ "efsdiv %0,%1,%2" [(set_attr "type" "vecfdiv")]) -(define_insn "spe_efsctuiz" +(define_insn "spe_fixuns_truncsfsi2" [(set (match_operand:SI 0 "gpc_reg_operand" "=r") - (unspec:SI [(match_operand:SF 1 "gpc_reg_operand" "r")] 700))] + (unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))] "TARGET_HARD_FLOAT && !TARGET_FPRS" "efsctuiz %0,%1" [(set_attr "type" "fp")]) -; These instructions aren't IEEE compliant. They get some corner cases -; wrong. Don't enable them! -;(define_insn "spe_fixuns_truncsfsi2" -; [(set (match_operand:SI 0 "gpc_reg_operand" "=r") -; (unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))] -; "TARGET_HARD_FLOAT && !TARGET_FPRS" -; "efsctui %0,%1" -; [(set_attr "type" "fp")]) -; -;(define_insn "spe_fix_truncsfsi2" -; [(set (match_operand:SI 0 "gpc_reg_operand" "=r") -; (fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))] -; "TARGET_HARD_FLOAT && !TARGET_FPRS" -; "efsctsi %0,%1" -; [(set_attr "type" "fp")]) +(define_insn "spe_fix_truncsfsi2" + [(set (match_operand:SI 0 "gpc_reg_operand" "=r") + (fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))] + "TARGET_HARD_FLOAT && !TARGET_FPRS" + "efsctsiz %0,%1" + [(set_attr "type" "fp")]) (define_insn "spe_floatunssisf2" [(set (match_operand:SF 0 "gpc_reg_operand" "=r") |