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-rw-r--r--gcc/config/sparc/sparc.md59
1 files changed, 4 insertions, 55 deletions
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 850b2f56242..2a060b85be9 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -80,12 +80,12 @@
;; Attribute for the instruction set.
;; At present we only need to distinguish v9/!v9, but for clarity we
;; test TARGET_V8 too.
-(define_attr "isa" "v6,v8,v9,sparclet"
+(define_attr "isa" "v7,v8,v9,sparclet"
(const
(cond [(symbol_ref "TARGET_V9") (const_string "v9")
(symbol_ref "TARGET_V8") (const_string "v8")
(symbol_ref "TARGET_SPARCLET") (const_string "sparclet")]
- (const_string "v6"))))
+ (const_string "v7"))))
;; Architecture size.
(define_attr "arch" "arch32bit,arch64bit"
@@ -124,9 +124,6 @@
(define_attr "current_function_calls_alloca" "false,true"
(symbol_ref "current_function_calls_alloca != 0"))
-(define_attr "flat" "false,true"
- (symbol_ref "TARGET_FLAT != 0"))
-
;; Length (in # of insns).
(define_attr "length" ""
(cond [(eq_attr "type" "uncond_branch,call,sibcall")
@@ -7724,7 +7721,6 @@
"jmp\t%a0%#"
[(set_attr "type" "uncond_branch")])
-;; ??? Doesn't work with -mflat.
(define_expand "nonlocal_goto"
[(match_operand:SI 0 "general_operand" "")
(match_operand:SI 1 "general_operand" "")
@@ -7839,7 +7835,7 @@
{
if (! current_function_calls_alloca)
return "";
- if (! TARGET_V9 || TARGET_FLAT)
+ if (! TARGET_V9)
return "\tta\t3\n";
fputs ("\tflushw\n", asm_out_file);
if (flag_pic)
@@ -7858,8 +7854,6 @@
(set (attr "length")
(cond [(eq_attr "current_function_calls_alloca" "false")
(const_int 0)
- (eq_attr "flat" "true")
- (const_int 1)
(eq_attr "isa" "!v9")
(const_int 1)
(eq_attr "pic" "true")
@@ -8107,7 +8101,7 @@
(compare:CCX (match_dup 1) (const_int 0)))])]
"")
-;; Return peepholes. These are generated by sparc_nonflat_function_epilogue
+;; Return peepholes. These are generated by sparc_function_epilogue
;; who then immediately calls final_scan_insn.
(define_insn "*return_qi"
@@ -8267,31 +8261,6 @@
[(set_attr "type" "multi")
(set_attr "length" "2")])
-;; Now peepholes to do a call followed by a jump.
-
-(define_peephole
- [(parallel [(set (match_operand 0 "" "")
- (call (mem:SI (match_operand:SI 1 "call_operand_address" "ps"))
- (match_operand 2 "" "")))
- (clobber (reg:SI 15))])
- (set (pc) (label_ref (match_operand 3 "" "")))]
- "short_branch (INSN_UID (insn), INSN_UID (operands[3]))
- && (USING_SJLJ_EXCEPTIONS || ! can_throw_internal (ins1))
- && sparc_cpu != PROCESSOR_ULTRASPARC
- && sparc_cpu != PROCESSOR_ULTRASPARC3"
- "call\t%a1, %2\n\tadd\t%%o7, (%l3-.-4), %%o7")
-
-(define_peephole
- [(parallel [(call (mem:SI (match_operand:SI 0 "call_operand_address" "ps"))
- (match_operand 1 "" ""))
- (clobber (reg:SI 15))])
- (set (pc) (label_ref (match_operand 2 "" "")))]
- "short_branch (INSN_UID (insn), INSN_UID (operands[2]))
- && (USING_SJLJ_EXCEPTIONS || ! can_throw_internal (ins1))
- && sparc_cpu != PROCESSOR_ULTRASPARC
- && sparc_cpu != PROCESSOR_ULTRASPARC3"
- "call\t%a0, %1\n\tadd\t%%o7, (%l2-.-4), %%o7")
-
;; ??? UltraSPARC-III note: A memory operation loading into the floating point register
;; ??? file, if it hits the prefetch cache, has a chance to dual-issue with other memory
;; ??? operations. With DFA we might be able to model this, but it requires a lot of
@@ -8370,26 +8339,6 @@
load_pic_register ();
DONE;
})
-
-;; We need to reload %l7 for -mflat -fpic,
-;; otherwise %l7 should be preserved simply
-;; by loading the function's register window
-(define_expand "exception_receiver"
- [(const_int 0)]
- "TARGET_FLAT && flag_pic"
-{
- load_pic_register ();
- DONE;
-})
-
-;; Likewise
-(define_expand "builtin_setjmp_receiver"
- [(label_ref (match_operand 0 "" ""))]
- "TARGET_FLAT && flag_pic"
-{
- load_pic_register ();
- DONE;
-})
(define_insn "trap"
[(trap_if (const_int 1) (const_int 5))]
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