diff options
Diffstat (limited to 'gcc/config/i386/i386.c')
| -rw-r--r-- | gcc/config/i386/i386.c | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 935f3df7151..7794017eb26 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -984,23 +984,25 @@ const struct processor_costs *ix86_cost = &pentium_cost; #define m_486 (1<<PROCESSOR_I486) #define m_PENT (1<<PROCESSOR_PENTIUM) #define m_PPRO (1<<PROCESSOR_PENTIUMPRO) +#define m_PENT4 (1<<PROCESSOR_PENTIUM4) +#define m_NOCONA (1<<PROCESSOR_NOCONA) +#define m_CORE2 (1<<PROCESSOR_CORE2) + #define m_GEODE (1<<PROCESSOR_GEODE) -#define m_K6_GEODE (m_K6 | m_GEODE) #define m_K6 (1<<PROCESSOR_K6) -#define m_ATHLON (1<<PROCESSOR_ATHLON) -#define m_PENT4 (1<<PROCESSOR_PENTIUM4) +#define m_K6_GEODE (m_K6 | m_GEODE) #define m_K8 (1<<PROCESSOR_K8) +#define m_ATHLON (1<<PROCESSOR_ATHLON) #define m_ATHLON_K8 (m_K8 | m_ATHLON) #define m_AMDFAM10 (1<<PROCESSOR_AMDFAM10) -#define m_NOCONA (1<<PROCESSOR_NOCONA) -#define m_CORE2 (1<<PROCESSOR_CORE2) +#define m_ATHLON_K8_AMDFAM10 (m_K8 | m_ATHLON | m_AMDFAM10) + #define m_GENERIC32 (1<<PROCESSOR_GENERIC32) #define m_GENERIC64 (1<<PROCESSOR_GENERIC64) -#define m_GENERIC (m_GENERIC32 | m_GENERIC64) -#define m_ATHLON_K8_AMDFAM10 (m_K8 | m_ATHLON | m_AMDFAM10) /* Generic instruction choice should be common subset of supported CPUs (PPro/PENT4/NOCONA/CORE2/Athlon/K8). */ +#define m_GENERIC (m_GENERIC32 | m_GENERIC64) /* Leave is not affecting Nocona SPEC2000 results negatively, so enabling for Generic64 seems like good code size tradeoff. We can't enable it for 32bit @@ -1395,8 +1397,11 @@ enum fpmath_unit ix86_fpmath; /* Which cpu are we scheduling for. */ enum processor_type ix86_tune; +int ix86_tune_mask; + /* Which instruction set architecture to use. */ enum processor_type ix86_arch; +int ix86_arch_mask; /* true if sse prefetch instruction is not NOOP. */ int x86_prefetch_sse; @@ -2074,8 +2079,10 @@ override_options (void) if (! strcmp (ix86_arch_string, processor_alias_table[i].name)) { ix86_arch = processor_alias_table[i].processor; + ix86_arch_mask = 1 << ix86_arch; /* Default cpu tuning to the architecture. */ ix86_tune = ix86_arch; + ix86_tune_mask = 1 << ix86_tune; if (processor_alias_table[i].flags & PTA_MMX && !(target_flags_explicit & MASK_MMX)) target_flags |= MASK_MMX; @@ -2276,7 +2283,7 @@ override_options (void) /* If the architecture always has an FPU, turn off NO_FANCY_MATH_387, since the insns won't need emulation. */ - if (x86_arch_always_fancy_math_387 & (1 << ix86_arch)) + if (x86_arch_always_fancy_math_387 & ARCHMASK) target_flags &= ~MASK_NO_FANCY_MATH_387; /* Likewise, if the target doesn't have a 387, or we've specified |
