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| author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-07-09 22:35:35 +0000 |
|---|---|---|
| committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-07-09 22:35:35 +0000 |
| commit | fabb8546e54830051300c70ddcd8a6fce3b7d790 (patch) | |
| tree | 3c1f045cf03960d8636bd8748ec94c9179a80ac2 /libjava/java/util | |
| parent | 56d16a1aa45f3f619b74ec19bf13b5a247783fb5 (diff) | |
| download | ppe42-gcc-fabb8546e54830051300c70ddcd8a6fce3b7d790.tar.gz ppe42-gcc-fabb8546e54830051300c70ddcd8a6fce3b7d790.zip | |
* config/i386/i386.c (classify_argument): Treat V1xx modes the same as
their base modes. CTImode, TCmode, and XCmode must be passed in memory.
TFmode (__float128) must be is an SSE/SSEUP pair. V2SImode, V4HImode,
and V8QI are class SSE. All sufficiently small remaining vector modes
must be passed in one or two integer registers.
(ix86_libcall_value): TFmode must be returned in xmm0, XCmode must be
returned in memory.
(bdesc_2arg, ix86_init_mmx_sse_builtins): __builtin_ia32_pmuludq and
__builtin_ia32_pmuludq128 have non-uniform argument and return types
and must thus be handled explicitly.
* config/i386/i386.md (*movdi_1_rex64): Add cases for moving between
MMX and XMM regs.
(movv8qi_internal, movv4hi_internal, movv2si_internal,
movv2sf_internal): Permit moving between MMX and XMM registers (since
MMX areguments and return values are passed in XMM registers).
(sse2_umulsidi3): Correct type and mode.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@84410 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libjava/java/util')
0 files changed, 0 insertions, 0 deletions
