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| author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-08-25 19:18:22 +0000 |
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| committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-08-25 19:18:22 +0000 |
| commit | b440d9949c7dad439a7d4d550acaba31b324ea70 (patch) | |
| tree | 5abfaa699a4662e46516b45897e35a6dca9e4030 /libjava/java/util/ArrayList.java | |
| parent | 7d2c89605157331c2e79ff725563307bc1ae0251 (diff) | |
| download | ppe42-gcc-b440d9949c7dad439a7d4d550acaba31b324ea70.tar.gz ppe42-gcc-b440d9949c7dad439a7d4d550acaba31b324ea70.zip | |
* config/mips/mips.md (any_shift): New code macro.
(optab, insn): New code attributes.
({ashl,ashr,lshr}[sd]i3): Redefine using :GPR and any_shift.
Use the standard rather than internal patterns for the MIPS16
double-shift optimization.
(*{ashl,ashr,lshr}[sd]i3): New names for the non-mips16 shift patterns.
Redefine using :GPR and any_shift.
(*{ashl,ashr,lshr}si3_extend): Generalize ashlsi3_internal1_extend
to cover all three shifts.
(*{ashl,ashr,lshr}si3_mips16): New names for the mips16 SImode shifts.
Redefine using any_shift. Use :GPR and any_shift to combine splitters.
(*{ashl,ashr,lshr}di3_mips16): New names for the mips16 DImode shifts.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@86566 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libjava/java/util/ArrayList.java')
0 files changed, 0 insertions, 0 deletions
