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| author | dberlin <dberlin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-12-01 01:59:02 +0000 |
|---|---|---|
| committer | dberlin <dberlin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-12-01 01:59:02 +0000 |
| commit | fc0a3bf8a4da74727e32c85ccc5a396d32b24fa5 (patch) | |
| tree | b1e97ced54c5df40ecdbb3fb976618106a610db3 /libjava/java/sql/Array.java | |
| parent | fbda33410c6e44f9506739b3fe222bcd76c8db86 (diff) | |
| download | ppe42-gcc-fc0a3bf8a4da74727e32c85ccc5a396d32b24fa5.tar.gz ppe42-gcc-fc0a3bf8a4da74727e32c85ccc5a396d32b24fa5.zip | |
2001-11-30 Daniel Berlin <dan@cgsoftware.com>
* config/rs6000/rs6000.c (altivec_expand_builtin): add
ALTIVEC_BUILTIN_LD_INTERNAL_4sf and ALTIVEC_BUILTIN_ST_INTERNAL_4sf,
*_16qi,_8hi, rename existing V4SI ones to *_4si.
(altivec_init_builtins): Ditto.
(bdesc_2arg): Rename CODE_FOR_* to match changes in MD file.
* config/rs6000/rs6000.md: Add attribute types vecsimple,
veccomplex, vecfloat, and vecperm, for altivec instructions.
Modify altivec patterns to use approriate attribute type.
Modify altivec patterns to match RTL operations where approriate
(IE no unspec where we can avoid it).
Add vector unit scheduling for ppc7450.
Rename patterns to what they are where approriate
(altivec_vaddfp->addv4sf3, etc)
* config/rs6000/rs6000.h (enum rs6000_builtins): Change VRS->VSR.
Pass -mppc, and define _ARCH_PPC, if -mcpu=7450 is used.
* config/rs6000/sysv4.h: Add -mcpu=7450.
* testsuite/gcc.dg/altivec-1.c: Update test to take into account renamed
_builtin_altivec_ld_interal function.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@47502 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libjava/java/sql/Array.java')
0 files changed, 0 insertions, 0 deletions
