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| author | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-10-17 10:58:17 +0000 |
|---|---|---|
| committer | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-10-17 10:58:17 +0000 |
| commit | 58d6528bb02daa2bcd69edb055cea217a2f5ded1 (patch) | |
| tree | d402bff7289bb069a9367b802d647c14c1d1d00f /libjava/java/beans | |
| parent | c927e7606c97878a0a683c155af62f30c3fd187b (diff) | |
| download | ppe42-gcc-58d6528bb02daa2bcd69edb055cea217a2f5ded1.tar.gz ppe42-gcc-58d6528bb02daa2bcd69edb055cea217a2f5ded1.zip | |
* arm-modes.def (CC_Nmode): New condition code mode.
* arm.c (thumb_condition_code): Delete.
(arm_select_cc_mode): Handle single-bit test for Thumb.
(arm_print_operand, cases 'd' and 'D'): Don't special case the
condition code logic for Thumb.
(get_arm_condition_code): Handle CC_Nmode.
(thumb_cbrch_target_operand): New function.
* arm.h (PREDICATE_CODES): Add thumb_cbrch_target_operand.
* arm-protos.h (thumb_cbrch_target_operand): Add prototype.
* arm.md: Add Thumb split patterns for zero_extract and
sign_extract.
(tbit_cbranch, andsi3_cbranch_scratch, andsi3_cbranch)
(orrsi3_cbranch_scratch, orrsi3_cbranch, xorsi3_cbranch_scratch)
(xorsi3_cbranch, addsi3_cbranch, addsi3_cbranch_scratch)
(subsi3_cbranch, subsi3_cbranch_scratch): New Thumb patterns.
(cbranchne_decr1): Re-work to use CC_Nmode.
* arm.c (thumb_expand_epilogue): Add clobbers of registers restored
by the return instruction. Add a use of the link register if it
wasn't stored.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@72595 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libjava/java/beans')
0 files changed, 0 insertions, 0 deletions
