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| author | rguenth <rguenth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-06-16 16:39:51 +0000 |
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| committer | rguenth <rguenth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-06-16 16:39:51 +0000 |
| commit | 3524624e41742e76fd93edd07e529dcc7c394b8f (patch) | |
| tree | a3006dc02705766a9adcabb69887d2a2d4c2d6f3 /libjava/java/beans | |
| parent | f32e3360d2a8ba7c4919e9c8145f014b4d598c8d (diff) | |
| download | ppe42-gcc-3524624e41742e76fd93edd07e529dcc7c394b8f.tar.gz ppe42-gcc-3524624e41742e76fd93edd07e529dcc7c394b8f.zip | |
2005-06-16 Richard Guenther <rguenth@gcc.gnu.org>
* doc/extend.texi: Document sseregparm target attribute.
Clarify fastcall and regparm documentation.
* config/i386/i386.h: Adjust float_in_sse documentation.
* config/i386/i386.c: Add new target attribute sseregparm.
(ix86_handle_cdecl_attribute, ix86_handle_regparm_attribute):
Merge into ...
(ix86_handle_cconv_attribute): ... here. Also handle
sseregparm attribute.
(ix86_comp_type_attributes): Compare sseregparm attributes.
(ix86_function_sseregparm): New function, split out from ...
(init_cumulative_args): ... here. Use to decide use
of SSE registers and error in case of missing support.
(ix86_value_regno): Likewise.
(function_arg_advance): Do not bail out for DFmode if we need
to pass doubles in registers.
(function_arg): Likewise.
* gcc.target/i386/attributes-error.c: New testcase.
* gcc.target/i386/fastcall-sseregparm.c: Likewise.
* gcc.target/i386/regparm-stdcall.c: Likewise.
* gcc.target/i386/sseregparm-1.c: Likewise.
* gcc.target/i386/sseregparm-2.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@101085 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libjava/java/beans')
0 files changed, 0 insertions, 0 deletions
