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authornickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4>2010-06-16 16:04:27 +0000
committernickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4>2010-06-16 16:04:27 +0000
commit3934958573eee21add1caff2bbb427fb7e643235 (patch)
treee8984b80519fe880dca217e1729114c5b76284f4 /libjava/gnu/java
parentc5fa0717f822227b38b760a8f384da15b5c399db (diff)
downloadppe42-gcc-3934958573eee21add1caff2bbb427fb7e643235.tar.gz
ppe42-gcc-3934958573eee21add1caff2bbb427fb7e643235.zip
* config/rx/constraints.md (NEGint4): New constraint.
* config/rx/rx.md (attr cc): Add set_zsc. (cbranchsf4): Only test for -fnon-call-exceptions if cfun has been initialised. (cmpsf): Likewise. (call_internal): Clobber the cc0 register. (call_value_internal): Likewise. (cstoresi4): Likewise. (movsieq): Likewise. (movsine): Likewise. (addsi3): Add alternative to handle small negative constants. (sunsi3): Likewise. (addsi3): Do not set the O bit in the cc0 register. (adddi3): Likewise. (subsi3): Likewise. (subdi3): Likewise. (andsi3): Reorder alternatives to prefer shorter forms. (mulsi3): Likewise. (iorsi3): Likewise. (negsi2): Note that the cc0 flags are set. (rotlsi3): Note that only the Z and S bits are set in cc0. (lshrsi3): Likewise. (ashlsi3): Likewise. (subsf3): Use %Q for the MEM operand. (fix_truncsfsi2): Likewise. (floatsisf2): Likewise. (bitset): Remove early clobber from destination. (bitset_in_memory): Likewise. (lrintsf2): Clobber the cc0 register. * config/rx/rx.c (rx_notice_update_cc): Handle CC_SET_ZSC. (rx_print_operand): Handle %N. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@160846 138bc75d-0d04-0410-961f-82ee72b054a4
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