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authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2005-04-07 11:24:11 +0000
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2005-04-07 11:24:11 +0000
commitd51f92df9d93481509f4e372ab0f38eaba94af4b (patch)
tree8588996f87869b15eb7ed84df12df651ae3e5086 /libjava/gnu/java/beans/decoder/AbstractContext.java
parent8fa4ef5a79d145889399fe868366f69e390b0d5f (diff)
downloadppe42-gcc-d51f92df9d93481509f4e372ab0f38eaba94af4b.tar.gz
ppe42-gcc-d51f92df9d93481509f4e372ab0f38eaba94af4b.zip
* arm.c (arm_const_double_inline_cost): Handle any constant by
using gen_lowpart and gen_highpart_mode. (note_invalid_constants): All constants in an RTX with a constraint that permits memory are now pushed to the constant pool. (output_move_double): Delete code to handle reg to reg and constant to reg moves. (const_double_needs_minipool, output_mov_immediate): Delete. * arm.h (EXTRA_CONSTRAINT_STR_ARM): All 'D' variants now handle CONST_INT and CONST_VECTOR. * arm.md (ANY64): New mode macro. (arm_movdi): Split reg-reg and const-reg moves. Simplify constraints. (movdf_soft_insn): Split reg-reg and const-reg moves. (split patterns for 64-bit constant and register moves): New. * cirrus.md (cirrus_arm_movdi): Split reg-reg and const-reg moves. (cirrus_movdf_hard_insn): Likewise. * fpa.md (movdf_fpa): Likewise. * iwmmxt.md (iwmmxt_arm_movdi): Likewise. (movv8qi_internal, movv4hi_internal, movv2si_internal): Fix constraints. (movv2si_internal_2): Likewise. * vfp.md (arm_movdi_vfp): Split reg-reg and const-reg moves. (movdf_vfp): Likewise. * arm-protos.h (output_mov_immediate): Delete prototype. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@97778 138bc75d-0d04-0410-961f-82ee72b054a4
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