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authorchrbr <chrbr@138bc75d-0d04-0410-961f-82ee72b054a4>2007-06-21 08:58:53 +0000
committerchrbr <chrbr@138bc75d-0d04-0410-961f-82ee72b054a4>2007-06-21 08:58:53 +0000
commit2f8b8488b9b73fff97e73aa6607797cf59ca423b (patch)
tree8d7710b8980080d3eb483bf37da36f82da80d011 /libjava/classpath/lib/gnu/java/text/LineBreakIterator.class
parentc2917bc8e80b8f61e218060befc64d736cb33996 (diff)
downloadppe42-gcc-2f8b8488b9b73fff97e73aa6607797cf59ca423b.tar.gz
ppe42-gcc-2f8b8488b9b73fff97e73aa6607797cf59ca423b.zip
svn ci -m "introduce bank[0,1] registers and fix rte delay slot scheduling"
2007-06-21 Christian Bruel <christian.bruel@st.com> * config/sh/sh-protos.h (sh_loads_bankedreg_p): Declare. * config/sh/sh.c (sh_loads_bankedreg_p): New function. (push_regs): Changed saving order or banked registers. (sh_expand_epilogue): Likewise. * config/sh/sh.h (BANKED_REGISTER_P): New macro. (FIRST_BANKED_REG): Likewise. (LAST_BANKED_REG): Likewise. * config/sh/sh.md (banked) New attribute. (in_delay_slot): Check banked attribute. 2007-06-21 Christian Bruel <christian.bruel@st.com> * gcc.dg/attr-isr.c: Test delay slot content. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@125914 138bc75d-0d04-0410-961f-82ee72b054a4
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