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| author | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-04-15 18:25:09 +0000 |
|---|---|---|
| committer | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-04-15 18:25:09 +0000 |
| commit | ebbb7f00245f872298f6c7ee621bc5432e7ef2b8 (patch) | |
| tree | 29257b9ed1955b08b1ee4f48fdefc313dbc24966 /libjava/classpath/java/util/Random.java | |
| parent | 251bd74c28b77dbe0210cc6b76435f3075ba8bc8 (diff) | |
| download | ppe42-gcc-ebbb7f00245f872298f6c7ee621bc5432e7ef2b8.tar.gz ppe42-gcc-ebbb7f00245f872298f6c7ee621bc5432e7ef2b8.zip | |
2014-04-15 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
PR target/60839
Revert the following patch
2014-04-02 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60735
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
software floating point or no floating point registers, do not
allow any type in the FPRs. Eliminate a test for SPE SIMD types
in GPRs that occurs after we tested for GPRs that would never be
true.
* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,
specifically allow DDmode, since that does not use the SPE SIMD
instructions.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@209426 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libjava/classpath/java/util/Random.java')
0 files changed, 0 insertions, 0 deletions
