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| author | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-07-21 21:45:06 +0000 |
|---|---|---|
| committer | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-07-21 21:45:06 +0000 |
| commit | 27eda24040c703c6ecd3eadc44c78eb80098b995 (patch) | |
| tree | 2e34198e0e1a0497de165774678adb850f5fdf36 /libjava/classpath/java/security | |
| parent | ba9293d743480d445cf092990fc04951477c5871 (diff) | |
| download | ppe42-gcc-27eda24040c703c6ecd3eadc44c78eb80098b995.tar.gz ppe42-gcc-27eda24040c703c6ecd3eadc44c78eb80098b995.zip | |
* optabs.h (enum optab_index): Add new OTI_signbit.
(signbit_optab): Define corresponding macro.
(enum insn_code signbit_optab[]): Remove array.
* optabs.c (init_optabs): Initialize signbit_optab using init_optab.
(expand_copysign_absneg): If back end provides signbit insn, use it
instead of bit operations on floating point argument.
* builtins.c (enum insn_code signbit_optab[]): Remove array.
(expand_builtin_signbit): Check signbit_optab->handlers[].insn_code for
availability of signbit insn.
* config/i386/i386.md (signbit<mode>2): New insn pattern to implement
signbitf, signbit and signbitl built-ins as inline x87 intrinsics when
SSE mode is not active.
(isinf<mode>2): Disable for mfpmath=sse,387.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@126813 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libjava/classpath/java/security')
0 files changed, 0 insertions, 0 deletions
