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| author | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-05-04 05:38:47 +0000 |
|---|---|---|
| committer | meissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-05-04 05:38:47 +0000 |
| commit | 21e5dc0169f0dbd2485f7536ebfda8401c4b76c9 (patch) | |
| tree | 33ebf64e84aca3b4d16f51cc4c5b88e76ed4106f /libjava/classpath/gnu/java/text | |
| parent | e64c90eb86152530ec555c398acc701104df38f2 (diff) | |
| download | ppe42-gcc-21e5dc0169f0dbd2485f7536ebfda8401c4b76c9.tar.gz ppe42-gcc-21e5dc0169f0dbd2485f7536ebfda8401c4b76c9.zip | |
[gcc]
2013-05-03 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/57150
* config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode
to save TFmode registers and DImode to save TImode registers for
caller save operations.
(HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to
mark being partially clobbered since they only use the first
double word.
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode
and TDmode only use the upper 64-bits of each VSX register.
[gcc/testsuite]
2013-05-03 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/57150
* gcc.target/powerpc/pr57150.c: New file.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198593 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libjava/classpath/gnu/java/text')
0 files changed, 0 insertions, 0 deletions
