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| author | jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-04-29 07:43:20 +0000 |
|---|---|---|
| committer | jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-04-29 07:43:20 +0000 |
| commit | ebdfd365b4faad81fdc4b69d23b5eb690a2045c3 (patch) | |
| tree | 0e4b8e9c518b7c25c2e179d7eba8512edf482d22 /libjava/classpath/gnu/java/beans/encoder/elements/ObjectReference.java | |
| parent | a45ed3a3cca3e87c612ef311abe3f5bdc5e826b1 (diff) | |
| download | ppe42-gcc-ebdfd365b4faad81fdc4b69d23b5eb690a2045c3.tar.gz ppe42-gcc-ebdfd365b4faad81fdc4b69d23b5eb690a2045c3.zip | |
* config/i386/predicates.md (general_vector_operand): New predicate.
* config/i386/i386.c (const_vector_equal_evenodd_p): New function.
(ix86_expand_mul_widen_evenodd): Force op1 resp. op2 into register
if they aren't nonimmediate operands. If their original values
satisfy const_vector_equal_evenodd_p, don't shift them.
* config/i386/sse.md (mul<mode>3): Use general_vector_operand
predicates. For the SSE4.1 case force operands[{1,2}] into registers
if not nonimmediate_operand.
(vec_widen_smult_even_v4si): Use nonimmediate_operand predicates
instead of register_operand.
(vec_widen_<s>mult_odd_<mode>): Use general_vector_operand predicates.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198387 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libjava/classpath/gnu/java/beans/encoder/elements/ObjectReference.java')
0 files changed, 0 insertions, 0 deletions
