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| author | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-06-14 15:54:02 +0000 |
|---|---|---|
| committer | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-06-14 15:54:02 +0000 |
| commit | d3ceeebcad8c52bcec0ff997fc6a9788c27d7deb (patch) | |
| tree | 222da06efb090bffff370b9ef6adc124764db20c /gcc | |
| parent | 3bf18462df2d70a9475023636abf5bab7968799a (diff) | |
| download | ppe42-gcc-d3ceeebcad8c52bcec0ff997fc6a9788c27d7deb.tar.gz ppe42-gcc-d3ceeebcad8c52bcec0ff997fc6a9788c27d7deb.zip | |
PR target/11183
* arm.h (CANNOT_CHANGE_MODE_CLASS): Define.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@67947 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/arm/arm.h | 6 |
2 files changed, 11 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fd2c2949e1f..4713756af4c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2003-06-14 Richard Earnshaw <rearnsha@arm.com> + + PR target/11183 + * arm.h (CANNOT_CHANGE_MODE_CLASS): Define. + 2003-06-14 Roger Sayle <roger@eyesopen.com> * opts.sh: Work around a mysterious feature in cygwin's gawk diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index cffdd3ba056..acec706d995 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1146,6 +1146,12 @@ enum reg_class or could index an array. */ #define REGNO_REG_CLASS(REGNO) arm_regno_class (REGNO) +/* FPA registers can't do dubreg as all values are reformatted to internal + precision. */ +#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ + (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ + ? reg_classes_intersect_p (FPA_REGS, (CLASS)) : 0) + /* The class value for index registers, and the one for base regs. */ #define INDEX_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS) #define BASE_REG_CLASS (TARGET_THUMB ? LO_REGS : GENERAL_REGS) |
