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authorbwilson <bwilson@138bc75d-0d04-0410-961f-82ee72b054a4>2003-10-09 20:21:11 +0000
committerbwilson <bwilson@138bc75d-0d04-0410-961f-82ee72b054a4>2003-10-09 20:21:11 +0000
commitb68eeca91b968dfcd82693320c3b751775b9b37c (patch)
tree667e7725144f11fe19f4cd886609d060879e0fa6 /gcc
parentab4c376ff22e1cda96543c1f8c8c110360e71689 (diff)
downloadppe42-gcc-b68eeca91b968dfcd82693320c3b751775b9b37c.tar.gz
ppe42-gcc-b68eeca91b968dfcd82693320c3b751775b9b37c.zip
* config/xtensa/xtensa.c (xtensa_dbx_register_number): Change first
FP register number to 48 and MAC16 accumulator to 0x210. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@72283 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/xtensa/xtensa.c13
2 files changed, 9 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f42327bec67..a8a7fe45d98 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2003-10-09 Bob Wilson <bob.wilson@acm.org>
+
+ * config/xtensa/xtensa.c (xtensa_dbx_register_number): Change first
+ FP register number to 48 and MAC16 accumulator to 0x210.
+
2003-10-09 Nathanael Nerode <neroden@gcc.gnu.org>
* config.gcc: Remove redundant thread_file setting clauses for
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 68a2bd7663e..23798b00191 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -1646,7 +1646,7 @@ xtensa_emit_call (int callop, rtx *operands)
}
-/* Return the stabs register number to use for 'regno'. */
+/* Return the debugger register number to use for 'regno'. */
int
xtensa_dbx_register_number (int regno)
@@ -1666,17 +1666,12 @@ xtensa_dbx_register_number (int regno)
else if (FP_REG_P (regno))
{
regno -= FP_REG_FIRST;
- /* The current numbering convention is that TIE registers are
- numbered in libcc order beginning with 256. We can't guarantee
- that the FP registers will come first, so the following is just
- a guess. It seems like we should make a special case for FP
- registers and give them fixed numbers < 256. */
- first = 256;
+ first = 48;
}
else if (ACC_REG_P (regno))
{
- first = 0;
- regno = -1;
+ first = 0x200; /* Start of Xtensa special registers. */
+ regno = 16; /* ACCLO is special register 16. */
}
/* When optimizing, we sometimes get asked about pseudo-registers
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