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authoruweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4>2002-12-19 19:55:12 +0000
committeruweigand <uweigand@138bc75d-0d04-0410-961f-82ee72b054a4>2002-12-19 19:55:12 +0000
commit679d27f31857448930251406461738adc1720aeb (patch)
tree6af528dd853df53ce90c4ce923d41e6971a62b26 /gcc
parent712f79d64f5db95814f7113cfd384262e8335da6 (diff)
downloadppe42-gcc-679d27f31857448930251406461738adc1720aeb.tar.gz
ppe42-gcc-679d27f31857448930251406461738adc1720aeb.zip
* config/s390/s390.md ("*tsthiCCT", "*tsthiCCT_cconly",
"*tstqiCCT", "*tstqiCCT_cconly"): New insns. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@60322 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/s390/s390.md49
2 files changed, 54 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d13dac71f35..47f7ef5f185 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2002-12-19 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * config/s390/s390.md ("*tsthiCCT", "*tsthiCCT_cconly",
+ "*tstqiCCT", "*tstqiCCT_cconly"): New insns.
+
2002-12-19 Eric Botcazou <ebotcazou@libertysurf.fr>
PR target/8340
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 4767ebbdaf5..fe41557cdc3 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -500,6 +500,31 @@
"ltr\\t%0,%0"
[(set_attr "op_type" "RR")])
+(define_insn "*tsthiCCT"
+ [(set (reg 33)
+ (compare (match_operand:HI 0 "nonimmediate_operand" "?Q,d")
+ (match_operand:HI 1 "const0_operand" "")))
+ (set (match_operand:HI 2 "register_operand" "=d,0")
+ (match_dup 0))]
+ "s390_match_ccmode(insn, CCTmode)"
+ "@
+ icm\\t%2,3,%0
+ tml\\t%0,65535"
+ [(set_attr "op_type" "RS,RI")
+ (set_attr "atype" "mem,reg")])
+
+(define_insn "*tsthiCCT_cconly"
+ [(set (reg 33)
+ (compare (match_operand:HI 0 "nonimmediate_operand" "?Q,d")
+ (match_operand:HI 1 "const0_operand" "")))
+ (clobber (match_scratch:HI 2 "=d,X"))]
+ "s390_match_ccmode(insn, CCTmode)"
+ "@
+ icm\\t%2,3,%0
+ tml\\t%0,65535"
+ [(set_attr "op_type" "RS,RI")
+ (set_attr "atype" "mem,reg")])
+
(define_insn "*tsthi"
[(set (reg 33)
(compare (match_operand:HI 0 "s_operand" "Q")
@@ -521,6 +546,30 @@
[(set_attr "op_type" "RS")
(set_attr "atype" "mem")])
+(define_insn "*tstqiCCT"
+ [(set (reg 33)
+ (compare (match_operand:QI 0 "nonimmediate_operand" "?Q,d")
+ (match_operand:QI 1 "const0_operand" "")))
+ (set (match_operand:QI 2 "register_operand" "=d,0")
+ (match_dup 0))]
+ "s390_match_ccmode(insn, CCTmode)"
+ "@
+ icm\\t%2,1,%0
+ tml\\t%0,255"
+ [(set_attr "op_type" "RS,RI")
+ (set_attr "atype" "mem,reg")])
+
+(define_insn "*tstqiCCT_cconly"
+ [(set (reg 33)
+ (compare (match_operand:QI 0 "nonimmediate_operand" "?Q,d")
+ (match_operand:QI 1 "const0_operand" "")))]
+ "s390_match_ccmode(insn, CCTmode)"
+ "@
+ cli\\t%0,0
+ tml\\t%0,255"
+ [(set_attr "op_type" "SI,RI")
+ (set_attr "atype" "mem,reg")])
+
(define_insn "*tstqi"
[(set (reg 33)
(compare (match_operand:QI 0 "s_operand" "Q")
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