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| author | sayle <sayle@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-11-02 13:56:42 +0000 |
|---|---|---|
| committer | sayle <sayle@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-11-02 13:56:42 +0000 |
| commit | 357b5a1fee37eb81e9891d85691309d338bb81d8 (patch) | |
| tree | 3b7c1888d9ed7fad3b4bf1b5208f5a4d7e6b11cf /gcc/simplify-rtx.c | |
| parent | 13e2632334ae1b382f69349050259f3e34c87e2c (diff) | |
| download | ppe42-gcc-357b5a1fee37eb81e9891d85691309d338bb81d8.tar.gz ppe42-gcc-357b5a1fee37eb81e9891d85691309d338bb81d8.zip | |
PR optimization/10817
* ifcvt.c (noce_emit_move_insn): Improve documentation comment.
(noce_try_move): New function to optimize an if-the-else into an
unconditional move, i.e. "if (a!=b) x=a; else x=b" into "x=a".
(noce_process_if_block): Attempt simplification with noce_try_move.
* simplify-rtx.c (simplify_ternary_operation): Some minor fixes
and improvements to the optimizations of IF_THEN_ELSE expressions.
(simplify_subreg): Silence signed/unsigned comparison warning.
* gcc.c-torture/compile/20031102-1.c: New test case.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@73200 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/simplify-rtx.c')
| -rw-r--r-- | gcc/simplify-rtx.c | 38 |
1 files changed, 27 insertions, 11 deletions
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index ee75e3497ca..bf44b55e765 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -2821,18 +2821,33 @@ simplify_ternary_operation (enum rtx_code code, enum machine_mode mode, if (GET_CODE (op0) == CONST_INT) return op0 != const0_rtx ? op1 : op2; - /* Convert a == b ? b : a to "a". */ - if (GET_CODE (op0) == NE && ! side_effects_p (op0) - && !HONOR_NANS (mode) - && rtx_equal_p (XEXP (op0, 0), op1) - && rtx_equal_p (XEXP (op0, 1), op2)) + /* Convert c ? a : a into "a". */ + if (rtx_equal_p (op1, op2) && ! side_effects_p (op0)) return op1; - else if (GET_CODE (op0) == EQ && ! side_effects_p (op0) - && !HONOR_NANS (mode) - && rtx_equal_p (XEXP (op0, 1), op1) - && rtx_equal_p (XEXP (op0, 0), op2)) + + /* Convert a != b ? a : b into "a". */ + if (GET_CODE (op0) == NE + && ! side_effects_p (op0) + && ! HONOR_NANS (mode) + && ! HONOR_SIGNED_ZEROS (mode) + && ((rtx_equal_p (XEXP (op0, 0), op1) + && rtx_equal_p (XEXP (op0, 1), op2)) + || (rtx_equal_p (XEXP (op0, 0), op2) + && rtx_equal_p (XEXP (op0, 1), op1)))) + return op1; + + /* Convert a == b ? a : b into "b". */ + if (GET_CODE (op0) == EQ + && ! side_effects_p (op0) + && ! HONOR_NANS (mode) + && ! HONOR_SIGNED_ZEROS (mode) + && ((rtx_equal_p (XEXP (op0, 0), op1) + && rtx_equal_p (XEXP (op0, 1), op2)) + || (rtx_equal_p (XEXP (op0, 0), op2) + && rtx_equal_p (XEXP (op0, 1), op1)))) return op2; - else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0)) + + if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0)) { enum machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode ? GET_MODE (XEXP (op0, 1)) @@ -2874,6 +2889,7 @@ simplify_ternary_operation (enum rtx_code code, enum machine_mode mode, } } break; + case VEC_MERGE: if (GET_MODE (op0) != mode || GET_MODE (op1) != mode @@ -3286,7 +3302,7 @@ simplify_subreg (enum machine_mode outermode, rtx op, of real and imaginary part. */ if (GET_CODE (op) == CONCAT) { - int is_realpart = byte < GET_MODE_UNIT_SIZE (innermode); + int is_realpart = byte < (unsigned int) GET_MODE_UNIT_SIZE (innermode); rtx part = is_realpart ? XEXP (op, 0) : XEXP (op, 1); unsigned int final_offset; rtx res; |
