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authorrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2005-01-03 19:59:13 +0000
committerrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2005-01-03 19:59:13 +0000
commita5c5f9d31b26c951ede002b7eea32d69b2f47547 (patch)
treeccfd57538990a65fee413ecc4781ca4127de0aa3 /gcc/lambda-code.c
parent4c3f4e89ebe7cb39ed666b6cd2fdfd69bdd87b02 (diff)
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* config/ia64/ia64.c (TARGET_VECTOR_MODE_SUPPORTED_P): New.
(ia64_const_ok_for_letter_p): New. (ia64_const_double_ok_for_letter_p): New. (ia64_extra_constraint): New. (ia64_expand_vecint_compare): New. (ia64_expand_vcondu_v2si): New. (ia64_expand_vecint_cmov): New. (ia64_expand_vecint_minmax): New. (ia64_print_operand): Add 'v'. (ia64_preferred_reload_class): New. (ia64_vector_mode_supported_p): New. * config/ia64/ia64.h (UNITS_PER_SIMD_WORD): New. (PREFERRED_RELOAD_CLASS): Move to function. (CONST_OK_FOR_LETTER_P): Move to function. (CONST_DOUBLE_OK_FOR_LETTER_P): Move to function. (CONSTRAINT_OK_FOR_Q, CONSTRAINT_OK_FOR_R): Remove. (CONSTRAINT_OK_FOR_S, CONSTRAINT_OK_FOR_T): Remove. (EXTRA_CONSTRAINT): Move to function. * config/ia64/ia64.md: Include vect.md. (itanium_class): Add mmalua. (type): Handle it. * config/ia64/itanium1.md (1_mmalua): New. Add it to bypasses. (1b_mmalua): New. * config/ia64/itanium2.md (2_mmalua, 2b_mmalua): Similarly. * config/ia64/predicates.md (gr_reg_or_0_operand): Accept any CONST0_RTX. (const_int_2bit_operand): New. (fr_reg_or_0_operand): New. * config/ia64/ia64-modes.def: Add vector modes. * config/ia64/ia64-protos.h: Update. * config/ia64/vect.md: New file. * gcc.dg/vect/vect.exp: Enable for ia64. * lib/target-supports.exp (check_effective_target_vect_int): Likewise. (check_effective_target_vect_float): Likewise. (check_effective_target_vect_no_align): Likewise. * gcc.dg/vect/vect-30.c: XFAIL for vect_no_align. * gcc.dg/vect/vect-8.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@92862 138bc75d-0d04-0410-961f-82ee72b054a4
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