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author | aldyh <aldyh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-04-30 00:49:01 +0000 |
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committer | aldyh <aldyh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-04-30 00:49:01 +0000 |
commit | c050f95aeaba7cd45060fe09021b53649702af5f (patch) | |
tree | a1b6ae09de57e5566900ed964808e7ed0f31cf4a /gcc/expr.c | |
parent | 068be54b1c0e7721dba016ca81dc77a14cce9016 (diff) | |
download | ppe42-gcc-c050f95aeaba7cd45060fe09021b53649702af5f.tar.gz ppe42-gcc-c050f95aeaba7cd45060fe09021b53649702af5f.zip |
2003-04-29 Aldy Hernandez <aldyh@redhat.com>
* expr.c (emit_group_load): Dump parallels of simd types to
memory.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@66280 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/expr.c')
-rw-r--r-- | gcc/expr.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/gcc/expr.c b/gcc/expr.c index 73f9baf6eb5..6f0b36cfada 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -2363,6 +2363,19 @@ emit_group_load (dst, orig_src, ssize) else abort (); } + /* FIXME: A SIMD parallel will eventually lead to a subreg of a + SIMD register, which is currently broken. While we get GCC + to emit proper RTL for these cases, let's dump to memory. */ + else if (VECTOR_MODE_P (GET_MODE (dst)) + && GET_CODE (src) == REG) + { + int slen = GET_MODE_SIZE (GET_MODE (src)); + rtx mem; + + mem = assign_stack_temp (GET_MODE (src), slen, 0); + emit_move_insn (mem, src); + tmps[i] = adjust_address (mem, mode, (int) bytepos); + } else if (CONSTANT_P (src) || (GET_CODE (src) == REG && GET_MODE (src) == mode)) tmps[i] = src; |