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| author | phython <phython@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-11-26 13:18:14 +0000 |
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| committer | phython <phython@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-11-26 13:18:14 +0000 |
| commit | 88fb6217341063ba2fbb4ba2f0428af325789eb4 (patch) | |
| tree | eae9b508bda436f58c01ff7c2cfc95f15e41125f /gcc/doc | |
| parent | 01466354cf2b55bedd7f809d6d9efbd9d918bd97 (diff) | |
| download | ppe42-gcc-88fb6217341063ba2fbb4ba2f0428af325789eb4.tar.gz ppe42-gcc-88fb6217341063ba2fbb4ba2f0428af325789eb4.zip | |
2004-11-26 James A. Morrison <phython@gcc.gnu.org>
PR target/18510
* doc/extend.texi (SPARC VIS Built-in Functions): New section.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@91338 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/doc')
| -rw-r--r-- | gcc/doc/extend.texi | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index dcb27f5642b..cac004f4157 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -5383,6 +5383,7 @@ instructions, but allow the compiler to schedule those calls. * X86 Built-in Functions:: * MIPS Paired-Single Support:: * PowerPC AltiVec Built-in Functions:: +* SPARC VIS Built-in Functions:: @end menu @node Alpha Built-in Functions @@ -8471,6 +8472,45 @@ int vec_any_numeric (vector float); int vec_any_out (vector float, vector float); @end smallexample +@node SPARC VIS Built-in Functions +@subsection SPARC VIS Built-in Functions + +GCC supports SIMD operations on the SPARC using both the generic vector +extentions (@pxref{Vector Extensions}) as well as built-in functions for +the SPARC Visual Instruction Set (VIS). When you use the @option{-mvis} +switch, the VIS extension is exposed as the following built-in functions: + +@smallexample +typedef int v2si __attribute__ ((vector_size (8))); +typedef short v4hi __attribute__ ((vector_size (8))); +typedef short v2hi __attribute__ ((vector_size (4))); +typedef char v8qi __attribute__ ((vector_size (8))); +typedef char v4qi __attribute__ ((vector_size (4))); + +void * __builtin_vis_alignaddr (void *, long); +int64_t __builtin_vis_faligndatadi (int64_t, int64_t); +v2si __builtin_vis_faligndatav2si (v2si, v2si); +v4hi __builtin_vis_faligndatav4hi (v4si, v4si); +v8qi __builtin_vis_faligndatav8qi (v8qi, v8qi); + +v4hi __builtin_vis_fexpand (v4qi); + +v4hi __builtin_vis_fmul8x16 (v4qi, v4hi); +v4hi __builtin_vis_fmul8x16au (v4qi, v4hi); +v4hi __builtin_vis_fmul8x16al (v4qi, v4hi); +v4hi __builtin_vis_fmul8sux16 (v8qi, v4hi); +v4hi __builtin_vis_fmul8ulx16 (v8qi, v4hi); +v2si __builtin_vis_fmuld8sux16 (v4qi, v2hi); +v2si __builtin_vis_fmuld8ulx16 (v4qi, v2hi); + +v4qi __builtin_vis_fpack16 (v4hi); +v8qi __builtin_vis_fpack32 (v2si, v2si); +v2hi __builtin_vis_fpackfix (v2si); +v8qi __builtin_vis_fpmerge (v4qi, v4qi); + +int64_t __builtin_vis_pdist (v8qi, v8qi, int64_t); +@end smallexample + @node Target Format Checks @section Format Checks Specific to Particular Target Machines |
