diff options
| author | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1996-09-05 16:43:54 +0000 |
|---|---|---|
| committer | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1996-09-05 16:43:54 +0000 |
| commit | d9c6a19ea758bf1d9257fcef81f692ea075f3beb (patch) | |
| tree | 2d3ae0e87964bbf59501861b6fd9f0185b24b57e /gcc/config/pa | |
| parent | 9b05659f6670e79fa5e79b08fa2914fbd36152f5 (diff) | |
| download | ppe42-gcc-d9c6a19ea758bf1d9257fcef81f692ea075f3beb.tar.gz ppe42-gcc-d9c6a19ea758bf1d9257fcef81f692ea075f3beb.zip | |
ci -u pa.md
* pa/pa.md (movsi, movdi, movsf patterns): Handle 'R'
constraints as needed.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@12690 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/pa')
| -rw-r--r-- | gcc/config/pa/pa.md | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 0084d95611e..de3b00103c5 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -1319,7 +1319,7 @@ (define_insn "" [(set (match_operand:SI 0 "reg_or_nonsymb_mem_operand" - "=r,r,r,r,r,Q,*q,!f,f,*T") + "=r,r,r,r,r,Q,*q,!f,f,*TR") (match_operand:SI 1 "move_operand" "r,J,N,K,RQ,rM,rM,!fM,*RT,f"))] "(register_operand (operands[0], SImode) @@ -2361,9 +2361,9 @@ (define_insn "" [(set (match_operand:DI 0 "reg_or_nonsymb_mem_operand" - "=r,o,Q,r,r,r,f,f,*T") + "=r,o,Q,r,r,r,f,f,*TR") (match_operand:DI 1 "general_operand" - "rM,r,r,o,Q,i,fM,*T,f"))] + "rM,r,r,o,Q,i,fM,*TR,f"))] "(register_operand (operands[0], DImode) || reg_or_0_operand (operands[1], DImode)) && ! TARGET_SOFT_FLOAT" @@ -2477,7 +2477,7 @@ [(set (match_operand:SF 0 "reg_or_nonsymb_mem_operand" "=f,r,f,r,RQ,Q") (match_operand:SF 1 "reg_or_0_or_nonsymb_mem_operand" - "fG,rG,RQ,Q,f,rG"))] + "fG,rG,RQ,RQ,f,rG"))] "(register_operand (operands[0], SFmode) || reg_or_0_operand (operands[1], SFmode)) && ! TARGET_SOFT_FLOAT" @@ -2495,7 +2495,7 @@ [(set (match_operand:SF 0 "reg_or_nonsymb_mem_operand" "=r,r,Q") (match_operand:SF 1 "reg_or_0_or_nonsymb_mem_operand" - "rG,Q,rG"))] + "rG,RQ,rG"))] "(register_operand (operands[0], SFmode) || reg_or_0_operand (operands[1], SFmode)) && TARGET_SOFT_FLOAT" |
