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author | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1997-08-29 22:14:07 +0000 |
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committer | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1997-08-29 22:14:07 +0000 |
commit | c13e6dce7d18cb70bbb293d9c69c20f793558dd7 (patch) | |
tree | 7d9d57ce58d730a09cfd1ea2569dc58950c18cba /gcc/config/pa | |
parent | 13609b99c45b5b30912b31ddbc8d2bbcbc67feaa (diff) | |
download | ppe42-gcc-c13e6dce7d18cb70bbb293d9c69c20f793558dd7.tar.gz ppe42-gcc-c13e6dce7d18cb70bbb293d9c69c20f793558dd7.zip |
* pa.md (reload_peepholes): Make sure operand is a REG before
examining REGNO. Allow general registers too.
Fixes sporatic c-torture failure.
Remove last change to fold-const.c and c-decl.c
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@15000 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/pa')
-rw-r--r-- | gcc/config/pa/pa.md | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index 2f13795399b..1844a6ea844 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -4835,8 +4835,8 @@ ;; Clean up turds left by reload. (define_peephole [(set (match_operand 0 "reg_or_nonsymb_mem_operand" "") - (match_operand 1 "register_operand" "f")) - (set (match_operand 2 "register_operand" "f") + (match_operand 1 "register_operand" "fr")) + (set (match_operand 2 "register_operand" "fr") (match_dup 0))] "! TARGET_SOFT_FLOAT && GET_CODE (operands[0]) == MEM @@ -4844,6 +4844,8 @@ && GET_MODE (operands[0]) == GET_MODE (operands[1]) && GET_MODE (operands[0]) == GET_MODE (operands[2]) && GET_MODE (operands[0]) == DFmode + && GET_CODE (operands[1]) == REG + && GET_CODE (operands[2]) == REG && REGNO_REG_CLASS (REGNO (operands[1])) == REGNO_REG_CLASS (REGNO (operands[2]))" "* @@ -4871,9 +4873,9 @@ }") (define_peephole - [(set (match_operand 0 "register_operand" "f") + [(set (match_operand 0 "register_operand" "fr") (match_operand 1 "reg_or_nonsymb_mem_operand" "")) - (set (match_operand 2 "register_operand" "f") + (set (match_operand 2 "register_operand" "fr") (match_dup 1))] "! TARGET_SOFT_FLOAT && GET_CODE (operands[1]) == MEM @@ -4881,7 +4883,9 @@ && GET_MODE (operands[0]) == GET_MODE (operands[1]) && GET_MODE (operands[0]) == GET_MODE (operands[2]) && GET_MODE (operands[0]) == DFmode - && REGNO_REG_CLASS (REGNO (operands[1])) + && GET_CODE (operands[0]) == REG + && GET_CODE (operands[2]) == REG + && REGNO_REG_CLASS (REGNO (operands[0])) == REGNO_REG_CLASS (REGNO (operands[2]))" "* { |