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| author | hp <hp@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-03-06 05:01:15 +0000 |
|---|---|---|
| committer | hp <hp@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-03-06 05:01:15 +0000 |
| commit | 7d6770351ea3a8ec15be696366e2f49d1ad017ae (patch) | |
| tree | b8415a8922312358320737f7ad36eb7cde949794 /gcc/config/mmix | |
| parent | 6d1cedf9f543cfa0916d1c3076e21a29c65c1d98 (diff) | |
| download | ppe42-gcc-7d6770351ea3a8ec15be696366e2f49d1ad017ae.tar.gz ppe42-gcc-7d6770351ea3a8ec15be696366e2f49d1ad017ae.zip | |
* config/mmix/mmix.md ("*movcc_expanded"): New pattern.
("movcc", "movcc_uns", "movcc_fp", "movcc_fpeq", "movcc_fun"): New
expanders.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@63887 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mmix')
| -rw-r--r-- | gcc/config/mmix/mmix.md | 49 |
1 files changed, 48 insertions, 1 deletions
diff --git a/gcc/config/mmix/mmix.md b/gcc/config/mmix/mmix.md index dc7148f39d3..e3623bdaed0 100644 --- a/gcc/config/mmix/mmix.md +++ b/gcc/config/mmix/mmix.md @@ -1,5 +1,5 @@ ;; GCC machine description for MMIX -;; Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc. +;; Copyright (C) 2000, 2001, 2002, 2003 Free Software Foundation, Inc. ;; Contributed by Hans-Peter Nilsson (hp@bitrange.com) ;; This file is part of GCC. @@ -131,6 +131,53 @@ STOU %1,%0 %r0%I1") +;; We need to be able to move around the values used as condition codes. +;; First spotted as reported in +;; <URL:http://gcc.gnu.org/ml/gcc-bugs/2003-03/msg00008.html> due to +;; changes in loop optimization. The file machmode.def says they're of +;; size 4 QI. Valid bit-patterns correspond to integers -1, 0 and 1, so +;; we treat them as signed entities; see mmix-modes.def. The following +;; expanders should cover all MODE_CC modes, and expand for this pattern. +(define_insn "*movcc_expanded" + [(set (match_operand 0 "nonimmediate_operand" "=r,r,m") + (match_operand 1 "nonimmediate_operand" "r,m,r"))] + "GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_CC + && GET_MODE_CLASS (GET_MODE (operands[1])) == MODE_CC" + "@ + SET %0,%1 + LDT %0,%1 + STT %1,%0") + +(define_expand "movcc" + [(set (match_operand:CC 0 "nonimmediate_operand" "") + (match_operand:CC 1 "nonimmediate_operand" ""))] + "" + "") + +(define_expand "movcc_uns" + [(set (match_operand:CC_UNS 0 "nonimmediate_operand" "") + (match_operand:CC_UNS 1 "nonimmediate_operand" ""))] + "" + "") + +(define_expand "movcc_fp" + [(set (match_operand:CC_FP 0 "nonimmediate_operand" "") + (match_operand:CC_FP 1 "nonimmediate_operand" ""))] + "" + "") + +(define_expand "movcc_fpeq" + [(set (match_operand:CC_FPEQ 0 "nonimmediate_operand" "") + (match_operand:CC_FPEQ 1 "nonimmediate_operand" ""))] + "" + "") + +(define_expand "movcc_fun" + [(set (match_operand:CC_FUN 0 "nonimmediate_operand" "") + (match_operand:CC_FUN 1 "nonimmediate_operand" ""))] + "" + "") + (define_insn "adddi3" [(set (match_operand:DI 0 "register_operand" "=r,r,r") (plus:DI |
