Revert:

	2007-10-09  Kazu Hirata  <kazu@codesourcery.com>
	* longlong.h (count_leading_zeros): Replace '{' and '}' with '%{'
	and '%}', respectively.

	Revert:
	2007-10-09  Kazu Hirata  <kazu@codesourcery.com>
	* config/m68k/m68k.c (print_operand): Handle '{' and '}'.
	* config/m68k/m68k.h (PRINT_OPERAND_PUNCT_VALID_P): Accept '{'
	and '}'.
	* config/m68k/m68k.md: Replace '{' with '%{' where '{' is
	meant to be output.

	Revert:
	2007-10-07  Kazu Hirata  <kazu@codesourcery.com>
	* config/m68k/m68k.c, config/m68k/m68k.md: Use the assembly
	syntax for ASSEMBLER_DIALECT.
	* config/m68k/m68k.h (ASSEMBLER_DIALECT): New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@129202 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 65 insertions, 40 deletions

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 3191aecb31a..68053b33b70 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -825,7 +825,7 @@
   "TUNE_68040_60"
 {
   if (which_alternative == 0)
-    return "lea 0{.|:}w,%0";
+    return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0";
   else if (which_alternative == 1)
     return "clr%.l %0";
   else
@@ -1140,7 +1140,7 @@
 	{
 	  /* On the '040, 'subl an,an' takes 2 clocks while lea takes only 1 */
 	  if (TUNE_68040_60)
-	    return "lea 0{.|:}w,%0";
+	    return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0";
 	  else
 	    return "sub%.l %0,%0";
 	}
@@ -2444,13 +2444,13 @@
       return "#";
 
     case 5:
-      return "lea {(%1,%2.l)|%1@(0,%2:l)},%0";
+      return MOTOROLA ? "lea (%1,%2.l),%0" : "lea %1@(0,%2:l),%0";
 
     case 6:
-      return "lea {(%2,%1.l)|%2@(0,%1:l)},%0";
+      return MOTOROLA ? "lea (%2,%1.l),%0" : "lea %2@(0,%1:l),%0";
 
     case 7:
-      return "lea {(%c2,%1)|%1@(%c2)},%0";
+      return MOTOROLA ? "lea (%c2,%1),%0" : "lea %1@(%c2),%0";
 
     default:
       gcc_unreachable ();
@@ -2521,7 +2521,7 @@
 	    }
 	}
       if (ADDRESS_REG_P (operands[0]) && !TUNE_68040)
-	return "lea {(%c2,%0)|%0@(%c2)},%0";
+	return MOTOROLA ? "lea (%c2,%0),%0" : "lea %0@(%c2),%0";
     }
   return "add%.w %2,%0";
 })
@@ -2576,7 +2576,7 @@
 	    }
 	}
       if (ADDRESS_REG_P (operands[0]) && !TUNE_68040)
-	return "lea {(%c1,%0)|%0@(%c1)},%0";
+	return MOTOROLA ? "lea (%c1,%0),%0" : "lea %0@(%c1),%0";
     }
   return "add%.w %1,%0";
 })
@@ -2625,7 +2625,7 @@
 	    }
 	}
       if (ADDRESS_REG_P (operands[0]) && !TUNE_68040)
-	return "lea {(%c1,%0)|%0@(%c1)},%0";
+	return MOTOROLA ? "lea (%c1,%0),%0" : "lea %0@(%c1),%0";
     }
   return "add%.w %1,%0";
 })
@@ -2971,7 +2971,9 @@
 	(mult:HI (match_operand:HI 1 "general_operand" "%0")
 		 (match_operand:HI 2 "general_src_operand" "dmSn")))]
   ""
-  "muls{.w} %2,%0"
+{
+  return MOTOROLA ? "muls%.w %2,%0" : "muls %2,%0";
+}
   [(set_attr "type" "muls_w")
    (set_attr "opy" "2")])
 
@@ -2982,7 +2984,9 @@
 		 (sign_extend:SI
 		  (match_operand:HI 2 "nonimmediate_src_operand" "dmS"))))]
   ""
-  "muls{.w} %2,%0"
+{
+  return MOTOROLA ? "muls%.w %2,%0" : "muls %2,%0";
+}
   [(set_attr "type" "muls_w")
    (set_attr "opy" "2")])
 
@@ -2992,7 +2996,9 @@
 		  (match_operand:HI 1 "nonimmediate_operand" "%0"))
 		 (match_operand:SI 2 "const_int_operand" "n")))]
   "INTVAL (operands[2]) >= -0x8000 && INTVAL (operands[2]) <= 0x7fff"
-  "muls{.w} %2,%0"
+{
+  return MOTOROLA ? "muls%.w %2,%0" : "muls %2,%0";
+}
   [(set_attr "type" "muls_w")
    (set_attr "opy" "2")])
 
@@ -3029,7 +3035,9 @@
 		 (zero_extend:SI
 		  (match_operand:HI 2 "nonimmediate_src_operand" "dmS"))))]
   ""
-  "mulu{.w} %2,%0"
+{
+  return MOTOROLA ? "mulu%.w %2,%0" : "mulu %2,%0";
+}
   [(set_attr "type" "mulu_w")
    (set_attr "opy" "2")])
 
@@ -3039,7 +3047,9 @@
 		  (match_operand:HI 1 "nonimmediate_operand" "%0"))
 		 (match_operand:SI 2 "const_int_operand" "n")))]
   "INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 0xffff"
-  "mulu{.w} %2,%0"
+{
+  return MOTOROLA ? "mulu%.w %2,%0" : "mulu %2,%0";
+}
   [(set_attr "type" "mulu_w")
    (set_attr "opy" "2")])
 
@@ -3462,7 +3472,10 @@
 	(mod:HI (match_dup 1) (match_dup 2)))]
   "!TARGET_COLDFIRE || TARGET_CF_HWDIV"
 {
-  output_asm_insn ("ext%.l %0\;divs{.w} %2,%0", operands);
+  output_asm_insn (MOTOROLA ?
+    "ext%.l %0\;divs%.w %2,%0" :
+    "extl %0\;divs %2,%0",
+    operands);
   if (!find_reg_note(insn, REG_UNUSED, operands[3]))
     {
       CC_STATUS_INIT;
@@ -3481,9 +3494,15 @@
   "!TARGET_COLDFIRE || TARGET_CF_HWDIV"
 {
   if (ISA_HAS_MVS_MVZ)
-    output_asm_insn ("mvz%.w %0,%0\;divu{.w} %2,%0", operands);
+    output_asm_insn (MOTOROLA ?
+      "mvz%.w %0,%0\;divu%.w %2,%0" :
+      "mvz%.w %0,%0\;divu %2,%0",
+      operands);
   else
-    output_asm_insn ("and%.l #0xFFFF,%0\;divu{.w} %2,%0", operands);
+    output_asm_insn (MOTOROLA ?
+      "and%.l #0xFFFF,%0\;divu%.w %2,%0" :
+      "and%.l #0xFFFF,%0\;divu %2,%0",
+      operands);
 
   if (!find_reg_note(insn, REG_UNUSED, operands[3]))
     {
@@ -5487,7 +5506,7 @@
   if (REG_P (operands[0]))
     {
       if (INTVAL (operands[1]) + INTVAL (operands[2]) != 32)
-        return "bfins %3,%0%{%b2:%b1%}";
+        return "bfins %3,%0{%b2:%b1}";
     }
   else
     operands[0] = adjust_address (operands[0],
@@ -5542,7 +5561,7 @@
   if (REG_P (operands[1]))
     {
       if (INTVAL (operands[2]) + INTVAL (operands[3]) != 32)
-	return "bfextu %1%{%b3:%b2%},%0";
+	return "bfextu %1{%b3:%b2},%0";
     }
   else
     operands[1]
@@ -5595,7 +5614,7 @@
   if (REG_P (operands[1]))
     {
       if (INTVAL (operands[2]) + INTVAL (operands[3]) != 32)
-	return "bfexts %1%{%b3:%b2%},%0";
+	return "bfexts %1{%b3:%b2},%0";
     }
   else
     operands[1]
@@ -5626,7 +5645,7 @@
 			 (match_operand:SI 2 "nonmemory_operand" "dn")
 			 (match_operand:SI 3 "nonmemory_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
-  "bfexts %1%{%b3:%b2%},%0")
+  "bfexts %1{%b3:%b2},%0")
 
 (define_expand "extzv"
   [(set (match_operand:SI 0 "register_operand" "")
@@ -5652,7 +5671,7 @@
     {
       CC_STATUS_INIT;
     }
-  return "bfextu %1%{%b3:%b2%},%0";
+  return "bfextu %1{%b3:%b2},%0";
 })
 
 (define_insn ""
@@ -5667,7 +5686,7 @@
            && (~ INTVAL (operands[3]) & ((1 << INTVAL (operands[1]))- 1)) == 0))"
 {
   CC_STATUS_INIT;
-  return "bfchg %0%{%b2:%b1%}";
+  return "bfchg %0{%b2:%b1}";
 })
 
 (define_insn ""
@@ -5678,7 +5697,7 @@
   "TARGET_68020 && TARGET_BITFIELD"
 {
   CC_STATUS_INIT;
-  return "bfclr %0%{%b2:%b1%}";
+  return "bfclr %0{%b2:%b1}";
 })
 
 (define_insn ""
@@ -5689,7 +5708,7 @@
   "TARGET_68020 && TARGET_BITFIELD"
 {
   CC_STATUS_INIT;
-  return "bfset %0%{%b2:%b1%}";
+  return "bfset %0{%b2:%b1}";
 })
 
 (define_expand "insv"
@@ -5706,7 +5725,7 @@
 			 (match_operand:SI 2 "nonmemory_operand" "dn"))
 	(match_operand:SI 3 "register_operand" "d"))]
   "TARGET_68020 && TARGET_BITFIELD"
-  "bfins %3,%0%{%b2:%b1%}")
+  "bfins %3,%0{%b2:%b1}")
 
 ;; Now recognize bit-field insns that operate on registers
 ;; (or at least were intended to do so).
@@ -5717,7 +5736,7 @@
 			 (match_operand:SI 2 "const_int_operand" "n")
 			 (match_operand:SI 3 "const_int_operand" "n")))]
   "TARGET_68020 && TARGET_BITFIELD"
-  "bfexts %1%{%b3:%b2%},%0")
+  "bfexts %1{%b3:%b2},%0")
 
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=d")
@@ -5735,7 +5754,7 @@
     {
       CC_STATUS_INIT;
     }
-  return "bfextu %1%{%b3:%b2%},%0";
+  return "bfextu %1{%b3:%b2},%0";
 })
 
 (define_insn ""
@@ -5746,7 +5765,7 @@
   "TARGET_68020 && TARGET_BITFIELD"
 {
   CC_STATUS_INIT;
-  return "bfclr %0%{%b2:%b1%}";
+  return "bfclr %0{%b2:%b1}";
 })
 
 (define_insn ""
@@ -5757,7 +5776,7 @@
   "TARGET_68020 && TARGET_BITFIELD"
 {
   CC_STATUS_INIT;
-  return "bfset %0%{%b2:%b1%}";
+  return "bfset %0{%b2:%b1}";
 })
 
 (define_insn ""
@@ -5776,7 +5795,7 @@
       && INTVAL (operands[1]) == 24 && INTVAL (operands[2]) == 8)
     return "move%.b %3,%0";
 #endif
-  return "bfins %3,%0%{%b2:%b1%}";
+  return "bfins %3,%0{%b2:%b1}";
 })
 
 ;; Special patterns for optimizing bit-field instructions.
@@ -5801,7 +5820,7 @@
     }
   if (INTVAL (operands[1]) != 32)
     cc_status.flags = CC_NOT_NEGATIVE;
-  return "bftst %0%{%b2:%b1%}";
+  return "bftst %0{%b2:%b1}";
 })
 
 
@@ -5825,7 +5844,7 @@
     }
   if (INTVAL (operands[1]) != 32)
     cc_status.flags = CC_NOT_NEGATIVE;
-  return "bftst %0%{%b2:%b1%}";
+  return "bftst %0{%b2:%b1}";
 })
 
 (define_insn "scc0_di"
@@ -6813,7 +6832,9 @@
   [(set (pc) (match_operand:SI 0 "register_operand" "a"))
    (use (label_ref (match_operand 1 "" "")))]
   ""
-  "jmp {(%0)|%0@}"
+{
+  return MOTOROLA ? "jmp (%0)" : "jmp %0@";
+}
   [(set_attr "type" "bra")])
 
 ;; Jump to variable address from dispatch table of relative addresses.
@@ -6830,12 +6851,14 @@
   if (TARGET_COLDFIRE)
     {
       if (ADDRESS_REG_P (operands[0]))
-	return "jmp {(2,pc,%0.l)|pc@(2,%0:l)}";
+	return MOTOROLA ? "jmp (2,pc,%0.l)" : "jmp pc@(2,%0:l)";
+      else if (MOTOROLA)
+	return "ext%.l %0\;jmp (2,pc,%0.l)";
       else
-	return "ext%.l %0\;jmp {(2,pc,%0.l)|pc@(2,%0:l)}";
+	return "extl %0\;jmp pc@(2,%0:l)";
     }
   else
-    return "jmp {(2,pc,%0.w)|pc@(2,%0:w)}";
+    return MOTOROLA ? "jmp (2,pc,%0.w)" : "jmp pc@(2,%0:w)";
 #endif
 })
 
@@ -7202,10 +7225,12 @@
   "TARGET_68020 || INTVAL (operands[1]) >= -0x8004"
 {
   operands[1] = GEN_INT (INTVAL (operands[1]) + 4);
-  if (INTVAL (operands[1]) >= -0x8000)
-    return "link{.w} %0,%1";
+  if (!MOTOROLA)
+    return "link %0,%1";
+  else if (INTVAL (operands[1]) >= -0x8000)
+    return "link.w %0,%1";
   else
-    return "link{.l} %0,%1";
+    return "link.l %0,%1";
 })
 
 (define_expand "unlink"
@@ -7238,7 +7263,7 @@
   if (TARGET_ID_SHARED_LIBRARY)
     {
       operands[1] = gen_rtx_REG (Pmode, PIC_REG);
-      return "move%.l {%?(%1)|%1@(%?)},%0";
+      return MOTOROLA ? "move.l %?(%1),%0" : "movel %1@(%?), %0";
     }
   else if (MOTOROLA)
     {