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author | dj <dj@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-07-20 23:27:02 +0000 |
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committer | dj <dj@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-07-20 23:27:02 +0000 |
commit | 85c84d5c59d48b488efa17d1697a2069c042eed7 (patch) | |
tree | 49956253fc931fdfea43fb640512022daf032ae2 /gcc/config/m32c/prologue.md | |
parent | 05ba8e7a1b29eca22eb553bc0d2c81158c06c9ee (diff) | |
download | ppe42-gcc-85c84d5c59d48b488efa17d1697a2069c042eed7.tar.gz ppe42-gcc-85c84d5c59d48b488efa17d1697a2069c042eed7.zip |
* config.gcc: Add m32c-elf support.
* doc/contrib.texi: Mention m32c.
* doc/extend.texi: Document m32c extensions.
* doc/install.texi: Mention m32c.
* doc/invoke.texi: Document m32c options.
* doc/md.texi: Document m32c constraints.
* config/m32c/addsub.md: New file.
* config/m32c/bitops.md: New file.
* config/m32c/cond.md: New file.
* config/m32c/jump.md: New file.
* config/m32c/m32c-lib1.S: New file.
* config/m32c/m32c-lib2.c: New file.
* config/m32c/m32c-modes.def: New file.
* config/m32c/m32c-pragma.c: New file.
* config/m32c/m32c-protos.h: New file.
* config/m32c/m32c.abi: New file.
* config/m32c/m32c.c: New file.
* config/m32c/m32c.h: New file.
* config/m32c/m32c.md: New file.
* config/m32c/m32c.opt: New file.
* config/m32c/minmax.md: New file.
* config/m32c/mov.md: New file.
* config/m32c/muldiv.md: New file.
* config/m32c/predicates.md: New file.
* config/m32c/prologue.md: New file.
* config/m32c/shift.md: New file.
* config/m32c/t-m32c: New file.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@102207 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m32c/prologue.md')
-rw-r--r-- | gcc/config/m32c/prologue.md | 139 |
1 files changed, 139 insertions, 0 deletions
diff --git a/gcc/config/m32c/prologue.md b/gcc/config/m32c/prologue.md new file mode 100644 index 00000000000..7e78594badd --- /dev/null +++ b/gcc/config/m32c/prologue.md @@ -0,0 +1,139 @@ +;; Machine Descriptions for R8C/M16C/M32C +;; Copyright (C) 2005 +;; Free Software Foundation, Inc. +;; Contributed by Red Hat. +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify it +;; under the terms of the GNU General Public License as published +;; by the Free Software Foundation; either version 2, or (at your +;; option) any later version. +;; +;; GCC is distributed in the hope that it will be useful, but WITHOUT +;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +;; License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING. If not, write to the Free +;; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA +;; 02110-1301, USA. + +;; Prologue and epilogue patterns + +(define_expand "prologue" + [(const_int 1)] + "" + "m32c_emit_prologue(); DONE;" + ) + +; For the next two, operands[0] is the amount of stack space we want +; to reserve. + +; We assume dwarf2out will process each set in sequence. +(define_insn "prologue_enter_16" + [(set (mem:HI (pre_dec:HI (reg:HI SP_REGNO))) + (reg:HI FB_REGNO)) + (set (reg:HI FB_REGNO) + (reg:HI SP_REGNO)) + (set (reg:HI SP_REGNO) + (minus:HI (reg:HI SP_REGNO) + (match_operand 0 "const_int_operand" "i"))) + ] + "TARGET_A16" + "enter\t%0" + ) + +(define_insn "prologue_enter_24" + [(set (mem:SI (pre_dec:PSI (reg:PSI SP_REGNO))) + (reg:SI FB_REGNO)) + (set (reg:PSI FB_REGNO) + (reg:PSI SP_REGNO)) + (set (reg:PSI SP_REGNO) + (minus:PSI (reg:PSI SP_REGNO) + (match_operand 0 "const_int_operand" "i"))) + ] + "TARGET_A24" + "enter\t%0" + ) + +; Just a comment, for debugging the assembler output. +(define_insn "prologue_end" + [(unspec_volatile [(const_int 0)] UNS_PROLOGUE_END)] + "" + "; end of prologue" + ) + + + +(define_expand "epilogue" + [(const_int 1)] + "" + "m32c_emit_epilogue(); DONE;" + ) + +(define_expand "eh_return" + [(match_operand:PSI 0 "" "")] + "" + "m32c_emit_eh_epilogue(operands[0]); DONE;" + ) + +(define_insn "eh_epilogue" + [(set (pc) + (unspec_volatile [(match_operand 0 "m32c_r1_operand" "") + (match_operand 1 "m32c_r0_operand" "") + ] UNS_EH_EPILOGUE))] + "" + "jmp.a\t__m32c_eh_return" + ) + +(define_insn "epilogue_exitd" + [(set (reg:PSI SP_REGNO) + (reg:PSI FB_REGNO)) + (set (reg:PSI FB_REGNO) + (mem:PSI (reg:PSI SP_REGNO))) + (set (reg:PSI SP_REGNO) + (plus:PSI (reg:PSI SP_REGNO) + (match_operand 0 "const_int_operand" "i"))) + (return) + ] + "" + "exitd" + ) + +(define_insn "epilogue_reit" + [(set (reg:PSI SP_REGNO) + (plus:PSI (reg:PSI SP_REGNO) + (match_operand 0 "const_int_operand" "i"))) + (return) + ] + "" + "reit" + ) + +(define_insn "epilogue_rts" + [(return) + ] + "" + "rts" + ) + +(define_insn "epilogue_start" + [(unspec_volatile [(const_int 0)] UNS_EPILOGUE_START)] + "" + "; start of epilogue" + ) + + +; These are used by the prologue/epilogue code. + +(define_insn "pushm" + [(unspec [(match_operand 0 "const_int_operand" "i")] UNS_PUSHM)] + "" + "pushm\t%p0") + +(define_insn "popm" + [(unspec [(match_operand 0 "const_int_operand" "i")] UNS_POPM)] + "" + "popm\t%p0") |