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authoramylaar <amylaar@138bc75d-0d04-0410-961f-82ee72b054a4>2010-12-06 17:29:56 +0000
committeramylaar <amylaar@138bc75d-0d04-0410-961f-82ee72b054a4>2010-12-06 17:29:56 +0000
commit0c000b754b8472fde2ba74610b63d55e58e964c1 (patch)
tree1c72aff2c766082674b1b53f77545f5212020b20 /gcc/config/frv/frv.c
parent5498a4cc51db955d95a13769378127900acedf27 (diff)
downloadppe42-gcc-0c000b754b8472fde2ba74610b63d55e58e964c1.tar.gz
ppe42-gcc-0c000b754b8472fde2ba74610b63d55e58e964c1.zip
PR target/46735
* config/frv/predicates.md (gpr_or_int12_operand): Use IN_RANGE. (gpr_fpr_or_int12_operand, gpr_or_int10_operand): Likewise. (int12_operand, int_2word_operand, uint16_operand): Likewise. (fpr_or_int6_operand, int6_operand, int5_operand): Likewise. (uint5_operand, uint4_operand): Likewise. * config/frv/frv.h (IN_RANGE_P): Delete. (GPR_P, FPR_P, CC_P, ICC_P, FCC_P, CR_P, ICR_P, FCR_P): Use IN_RANGE. (ACC_P, ACCG_P, SPR_P, CONST_OK_FOR_I, CONST_OK_FOR_J): Likewise. (CONST_OK_FOR_L, CONST_OK_FOR_M, CONST_OK_FOR_N): Likewise. (CONST_OK_FOR_P): Likewise. * config/frv/frv.md (*movqicc_internal2_int): Likewise. (*movqicc_internal2_float, *movhicc_internal2_int): Likewise. (*movhicc_internal2_float, *movsicc_internal2_int): Likewise. (*movsicc_internal2_float, casesi): Likewise. * config/frv/frv.c (frv_frame_offset_rtx): Likewise. (frv_asm_output_mi_thunk, frv_legitimate_address_p_1): Likewise. (frv_emit_movsi, output_move_single, frv_emit_cond_move): Likewise. (frv_split_cond_move, frv_rtx_costs): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@167508 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/frv/frv.c')
-rw-r--r--gcc/config/frv/frv.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index 56f69e2065d..0f59265532e 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -1624,12 +1624,12 @@ static rtx
frv_frame_offset_rtx (int offset)
{
rtx offset_rtx = GEN_INT (offset);
- if (IN_RANGE_P (offset, -2048, 2047))
+ if (IN_RANGE (offset, -2048, 2047))
return offset_rtx;
else
{
rtx reg_rtx = gen_rtx_REG (SImode, OFFSET_REGNO);
- if (IN_RANGE_P (offset, -32768, 32767))
+ if (IN_RANGE (offset, -32768, 32767))
emit_insn (gen_movsi (reg_rtx, offset_rtx));
else
{
@@ -2057,7 +2057,7 @@ frv_asm_output_mi_thunk (FILE *file,
const char *parallel = (frv_issue_rate () > 1 ? ".p" : "");
/* Do the add using an addi if possible. */
- if (IN_RANGE_P (delta, -2048, 2047))
+ if (IN_RANGE (delta, -2048, 2047))
fprintf (file, "\taddi %s,#%d,%s\n", name_arg0, (int) delta, name_arg0);
else
{
@@ -3459,13 +3459,13 @@ frv_legitimate_address_p_1 (enum machine_mode mode,
ret = FALSE;
else
{
- ret = IN_RANGE_P (INTVAL (x), -2048, 2047);
+ ret = IN_RANGE (INTVAL (x), -2048, 2047);
/* If we can't use load/store double operations, make sure we can
address the second word. */
if (ret && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
- ret = IN_RANGE_P (INTVAL (x) + GET_MODE_SIZE (mode) - 1,
- -2048, 2047);
+ ret = IN_RANGE (INTVAL (x) + GET_MODE_SIZE (mode) - 1,
+ -2048, 2047);
}
break;
@@ -3511,12 +3511,12 @@ frv_legitimate_address_p_1 (enum machine_mode mode,
else
{
value = INTVAL (x1);
- ret = IN_RANGE_P (value, -2048, 2047);
+ ret = IN_RANGE (value, -2048, 2047);
/* If we can't use load/store double operations, make sure we can
address the second word. */
if (ret && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
- ret = IN_RANGE_P (value + GET_MODE_SIZE (mode) - 1, -2048, 2047);
+ ret = IN_RANGE (value + GET_MODE_SIZE (mode) - 1, -2048, 2047);
}
break;
@@ -4076,9 +4076,9 @@ frv_emit_movsi (rtx dest, rtx src)
add instruction, so expose this to CSE by copying to
an intermediate register. */
|| (GET_CODE (src) == REG
- && IN_RANGE_P (REGNO (src),
- FIRST_VIRTUAL_REGISTER,
- LAST_VIRTUAL_POINTER_REGISTER))))
+ && IN_RANGE (REGNO (src),
+ FIRST_VIRTUAL_REGISTER,
+ LAST_VIRTUAL_POINTER_REGISTER))))
{
emit_insn (gen_rtx_SET (VOIDmode, dest, copy_to_mode_reg (SImode, src)));
return TRUE;
@@ -4380,7 +4380,7 @@ output_move_single (rtx operands[], rtx insn)
else
value = CONST_DOUBLE_LOW (src);
- if (IN_RANGE_P (value, -32768, 32767))
+ if (IN_RANGE (value, -32768, 32767))
return "setlos %1, %0";
return "#";
@@ -4951,8 +4951,8 @@ frv_emit_cond_move (rtx dest, rtx test_rtx, rtx src1, rtx src2)
between the two fits in an addi's range, load up the difference, then
conditionally move in 0, and then unconditionally add the first
value. */
- else if (IN_RANGE_P (value1, -2048, 2047)
- && IN_RANGE_P (value2 - value1, -2048, 2047))
+ else if (IN_RANGE (value1, -2048, 2047)
+ && IN_RANGE (value2 - value1, -2048, 2047))
;
/* If neither condition holds, just force the constant into a
@@ -5046,8 +5046,8 @@ frv_split_cond_move (rtx operands[])
between the two fits in an addi's range, load up the difference, then
conditionally move in 0, and then unconditionally add the first
value. */
- else if (IN_RANGE_P (value1, -2048, 2047)
- && IN_RANGE_P (value2 - value1, -2048, 2047))
+ else if (IN_RANGE (value1, -2048, 2047)
+ && IN_RANGE (value2 - value1, -2048, 2047))
{
rtx dest_si = ((GET_MODE (dest) == SImode)
? dest
@@ -9611,7 +9611,7 @@ frv_rtx_costs (rtx x,
{
case CONST_INT:
/* Make 12-bit integers really cheap. */
- if (IN_RANGE_P (INTVAL (x), -2048, 2047))
+ if (IN_RANGE (INTVAL (x), -2048, 2047))
{
*total = 0;
return true;
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